A vertical structure LED chip and a manufacturing method thereof

Abstract

The application provides a vertical structure LED chip and a manufacturing method thereof, wherein the vertical structure LED chip comprises two vertical light emitting structures horizontally arranged on one side of a conductive substrate, the two vertical light emitting structures are reversely connected in parallel with each other, and are used for being connected to an alternating current power supply or for reverse voltage protection of the vertical structure LED chip; the application of the LED is widened, the LED power supply system is changed from direct current driving to alternating current driving, the danger that the LED device cannot work normally due to reverse breakdown caused by reverse connection of the voltage polarity in actual application is avoided, a transformer, a bridge rectifier and the like are saved, and the manufacturing cost of the LED light source device working under alternating current is reduced; and when the vertical structure LED chip works under direct current or when the vertical structure LED chip contacts external static electricity, the two vertical light emitting structures are used as static electricity release channels of each other, the anti-static capability of the vertical structure LED chip is improved, the process manufacturing is simple and convenient, and production is facilitated.

Description

Technical Field

[0001] This invention relates to the field of light-emitting diode technology, and more specifically, to a vertical structure LED chip and its fabrication method. Background Technology

[0002] Current sources can be divided into two types: DC and AC. The current source commonly supplied by mains power is 220V (50Hz) AC power. LED chips have the characteristic of forward conduction and reverse cutoff; therefore, when using AC power, the reverse current flow of an LED chip is blocked. To better utilize AC power, packaging manufacturers or application end users typically use a combination of transformer and rectifier to drive the LED light source. This not only increases the cost and price of LED lighting fixtures but also significantly increases their size due to the added circuitry. Furthermore, the lifespan of transformers, rectifier circuits, and switching power supplies is far shorter than that of LEDs. This means that during LED use, it is often this circuitry that fails or even terminates its lifespan, while the LED chip remains intact.

[0003] On the other hand, LED chips are highly sensitive to static electricity. Conventional vertical-structure LED chips have poor ESD capabilities because they lack a reverse voltage electrostatic discharge path, making them susceptible to leakage due to accumulated electrostatic discharge during manufacturing, testing, transportation, and assembly. Without ESD protection, damage typically results in through-dislocations or instantaneous electrostatic breakdown causing metal melting, leading to LED chip failure. Improving the ESD protection of LED chips primarily involves: enhancing the quality of the epitaxial crystal, increasing the chip's current spread capability, grounding, wearing anti-static wrist straps, gloves, ionizers, and humidity control. However, these methods have limitations. Therefore, adding electrostatic discharge channels to the chip manufacturing process can significantly improve the chip's ESD (electrostatic discharge) capability. Summary of the Invention

[0004] In view of this, the present invention provides a vertical structure LED chip and its manufacturing method to solve the problems of existing technologies, such as the need for transformers, bridge rectifiers, etc. for vertical LED chips to operate under AC power, which complicates circuit design; and the weak anti-static capability of vertical LED chips.

[0005] To achieve the above objectives, the technical solution adopted by the present invention is as follows:

[0006] A vertical LED chip, characterized in that it comprises:

[0007] Conductive substrate;

[0008] Two vertical light-emitting structures are horizontally arranged on one side of the conductive substrate. The two vertical light-emitting structures are connected in parallel in opposite directions to each other for use in AC power supply or for reverse voltage protection of vertical LED chips. The two vertical light-emitting structures are each other's electrostatic discharge channels.

[0009] Both of the vertical light-emitting structures include an ohmic contact layer, a metal reflective layer, and an epitaxial stack stacked sequentially along a first direction. The epitaxial stack stack includes a second type semiconductor layer, an active region, and a first type semiconductor layer stacked sequentially along the first direction. The first direction is perpendicular to the conductive substrate and extends from the conductive substrate to the two vertical light-emitting structures.

[0010] An insulating layer is disposed on the side of the epitaxial stack facing the conductive substrate and covers the exposed surfaces of the ohmic contact layer and the metal reflective layer.

[0011] The two vertical light-emitting structures are a through-hole type vertical light-emitting structure and a vertical electrode light-emitting structure, separated by an isolation trench. In the vertical electrode light-emitting structure, the insulating layer has a plurality of first through holes on the side facing the conductive substrate, exposing a portion of the ohmic contact layer surface. In the through-hole type vertical light-emitting structure, the epitaxial stack has a groove extending into the first type semiconductor layer on the side facing the conductive substrate, exposing a portion of the first type semiconductor layer surface. The insulating layer extends to the sidewall of the groove and exposes a portion of the ohmic contact layer surface on the side facing the isolation trench.

[0012] A metal bonding layer is stacked on the side surface of the insulating layer away from the ohmic contact layer, and is embedded in the groove to form contact with the first type semiconductor layer of the through-hole vertical light-emitting structure, and is embedded in each of the first through holes to form contact with the ohmic contact layer of the vertical electrode light-emitting structure, and the conductive substrate is stacked on the side surface of the metal bonding layer away from the epitaxial stack.

[0013] A passivation layer covers the exposed surface of the epitaxial stack and extends to the isolation trench and the sidewall of the epitaxial stack to connect to the insulating layer, and the passivation layer has a second via exposing a portion of the surface of the first type semiconductor layer of the vertical electrode light-emitting structure.

[0014] The first electrode is connected to the exposed surface of the ohmic contact layer of the through-hole vertical light-emitting structure and extends to the second through-hole to form contact with the first type semiconductor layer of the vertical electrode light-emitting structure. The first electrode is insulated from the sidewall of the epitaxial stack through the passivation layer.

[0015] Preferably, the first electrode is disposed on a step, and the through-hole type vertical light-emitting structure and the vertical electrode light-emitting structure are connected by a stepped extension.

[0016] Preferably, the passivation layer between the vertical electrode light-emitting structure and the isolation groove is arranged in a downwardly extending stepped shape to form the step.

[0017] Preferably, the vertical electrode light-emitting structure has a platform facing the side wall of the isolation groove, and the passivation layer is disposed on the platform to form the step.

[0018] Preferably, the epitaxial stack of the vertical electrode light-emitting structure has a trench extending toward the isolation trench on one side surface facing the conductive substrate, the insulating layer extends to the sidewall of the trench, and the metal bonding layer is embedded in the trench to form the step.

[0019] Preferably, the vertical electrode light-emitting structure and the through-hole type vertical light-emitting structure are located at the same horizontal height and are set at the same height.

[0020] The present invention also provides a method for manufacturing a vertical structure LED chip, characterized in that the manufacturing method includes the following steps:

[0021] S01, Provide a growth substrate;

[0022] S02. An epitaxial stack is formed on one side surface of the growth substrate. The epitaxial stack includes a first type semiconductor layer, an active region, and a second type semiconductor layer stacked sequentially along the growth direction. The epitaxial stack is divided into a through-hole type vertical light-emitting structure preset region, a vertical electrode light-emitting structure preset region, and an isolation trench preset region located between the two light-emitting structure preset regions.

[0023] S03. A groove and a light-emitting platform are formed in the epitaxial stack, the groove exposes a portion of the surface of the first type semiconductor layer, and the groove is located in a preset area of ​​the through-hole type vertical light-emitting structure;

[0024] S04. Deposit an insulating layer, the insulating layer covering the surface of the epitaxial stack, the sidewalls and bottom surface of the groove, and pattern the insulating layer so that both the preset area of ​​the vertical electrode light-emitting structure and the preset area of ​​the through-hole type vertical light-emitting structure have a portion of the surface of the light-emitting platform exposed.

[0025] S05. A metal reflective layer is formed on the exposed surface of the light-emitting platform;

[0026] S06. Fabricate an ohmic contact layer that covers the surface of the metal reflective layer and extends to a portion of the surface of the insulating layer;

[0027] S07. Deposit an insulating layer again to cover the exposed surfaces of the ohmic contact layer and the metal reflective layer, and pattern the insulating layer to expose the bottom of the groove, and form a plurality of first through holes exposing a portion of the surface of the ohmic contact layer, each of the first through holes being located in a preset area of ​​the vertical electrode light-emitting structure.

[0028] S08. A metal bonding layer is deposited by vapor deposition, wherein the metal bonding layer is stacked on the surface of the insulating layer and is embedded in the groove to form contact with the first type semiconductor layer of the preset area of ​​the through-hole vertical light-emitting structure, and is embedded in each of the first through holes to form contact with the ohmic contact layer of the preset area of ​​the vertical electrode light-emitting structure.

[0029] S09. The chip structure formed in step S08 is fixed to a conductive substrate by a bonding process, and the conductive substrate is formed on the side surface of the metal bonding layer away from the epitaxial stack.

[0030] S10. Peel off the growth substrate to expose the first type of semiconductor layer;

[0031] S11. Form an isolation groove and a cutting channel, and form a through-hole type vertical light-emitting structure and a vertical electrode light-emitting structure through the isolation groove, and expose part of the ohmic contact layer of the through-hole type vertical light-emitting structure through the isolation groove.

[0032] Specifically, through an etching process, the upper surface of the first type of semiconductor layer is etched along the preset area of ​​the isolation trench, so that at least part of the ohmic contact layer is etched away on the side facing the vertical electrode light-emitting structure, exposing part of the insulating layer, and at least part of the ohmic contact layer is exposed on the side facing the through-hole type vertical light-emitting structure, thus forming the isolation trench.

[0033] Simultaneously, etching is performed along the edge of the upper surface of the first type semiconductor layer to expose a portion of the insulating layer, forming the cutting path;

[0034] S12. A passivation layer is deposited, which covers the exposed surface of the epitaxial stack and extends to the isolation trench and the sidewall of the epitaxial stack to connect with the insulating layer;

[0035] S13. The passivation layer is patterned by photolithography and etching to form a second via that exposes a portion of the surface of the first type semiconductor layer in the vertical electrode light-emitting structure.

[0036] S14. Fabricate a first electrode, which is connected to the exposed surface of the ohmic contact layer of the through-hole vertical light-emitting structure and extends to the second through-hole to form contact with the first type semiconductor layer of the vertical electrode light-emitting structure. The first electrode is insulated from the sidewall of the epitaxial stack through the passivation layer.

[0037] The through-hole type vertical light-emitting structure and the vertical electrode light-emitting structure are connected in parallel in opposite directions for use with AC power supply or for reverse voltage protection of vertical structure LED chips. The through-hole type vertical light-emitting structure and the vertical electrode light-emitting structure serve as electrostatic discharge channels for each other.

[0038] Preferably, the first electrode is disposed on a step, and the through-hole type vertical light-emitting structure and the vertical electrode light-emitting structure are connected by a stepped extension.

[0039] Preferably, the passivation layer between the vertical electrode light-emitting structure and the isolation groove is arranged in a downwardly extending stepped shape to form the step.

[0040] Preferably, the vertical electrode light-emitting structure has a platform facing the side wall of the isolation groove, and the passivation layer is disposed on the platform to form the step.

[0041] Preferably, the epitaxial stack of the vertical electrode light-emitting structure has a trench extending toward the isolation trench on one side surface facing the conductive substrate, the insulating layer extends to the sidewall of the trench, and the metal bonding layer is embedded in the trench to form the step.

[0042] Preferably, the vertical electrode light-emitting structure and the through-hole type vertical light-emitting structure are located at the same horizontal height and are set at the same height.

[0043] The above technical solution achieves the following results:

[0044] 1. The vertical structure LED chip provided by this invention comprises two vertical light-emitting structures horizontally arranged on one side of a conductive substrate. The two vertical light-emitting structures are connected in parallel with each other in opposite directions for use in AC power supply or for reverse voltage protection of the vertical structure LED chip. This not only broadens the application of LEDs, enabling LED power supply systems to switch from DC to AC drive, but also avoids the danger of reverse breakdown due to reverse voltage polarity of LED devices in practical applications, which could lead to malfunction. It also eliminates the need for transformers, bridge rectifiers, etc., reducing the manufacturing cost of LED light source devices when operating under AC power. Furthermore, when the vertical structure LED chip operates under DC power or comes into contact with external static electricity (e.g., static electricity accumulated during preparation, testing, transportation, and assembly), the two vertical light-emitting structures act as static discharge channels for each other, thereby improving the anti-static capability of the vertical structure LED chip.

[0045] 2. Furthermore, by setting the first electrode on the step, the through-hole type vertical light-emitting structure and the vertical electrode light-emitting structure are connected by a stepped extension. The step can provide a buffer for the electrode and prevent the first electrode from breaking.

[0046] 3. Furthermore, by setting the vertical electrode light-emitting structure and the through-hole type vertical light-emitting structure at the same horizontal height and with equal height, epitaxial cracking due to inconsistent heights can be avoided during subsequent chip transfer.

[0047] 4. The method for manufacturing a vertical structure LED chip provided by this invention, through a simple and convenient process, produces a vertical structure LED chip that can be used in connection with an AC power supply or for reverse voltage protection of the vertical structure LED chip. This not only broadens the application of LEDs, enabling LED power supply systems to switch from DC to AC drive, but also avoids the danger of reverse breakdown due to reverse voltage polarity of the LED device in practical applications, which could lead to malfunction. Furthermore, it eliminates the need for transformers, bridge rectifiers, etc., reducing the manufacturing cost of LED light source devices when operating under AC power. Moreover, when the vertical structure LED chip operates under DC power or comes into contact with external static electricity (e.g., static electricity accumulated during preparation, testing, transportation, and assembly), the two vertical light-emitting structures act as static discharge channels for each other, which can improve the anti-static capability of the vertical structure LED chip. Attached Figure Description

[0048] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on the provided drawings without creative effort.

[0049] Figure 1 This is a schematic diagram of a vertical LED chip provided in an embodiment of the present invention;

[0050] Figure 2 for Figure 1 Circuit diagram of a vertical LED chip;

[0051] Figures 3 to 4 This is a schematic diagram of another vertical LED chip provided in an embodiment of the present invention;

[0052] Figures 5 to 6 This is a schematic diagram of another vertical LED chip provided in an embodiment of the present invention.

[0053] Figure 7 This is a schematic diagram of another vertical LED chip provided in an embodiment of the present invention.

[0054] Figure 8 This is a schematic diagram of another vertical LED chip provided in an embodiment of the present invention.

[0055] Figure 9 This is a schematic diagram of another vertical LED chip provided in an embodiment of the present invention.

[0056] Figures 10 to 23 The diagram shows the structural steps of a method for manufacturing a vertical LED chip according to an embodiment of the present invention.

[0057] Explanation of symbols in the diagram:

[0058] 01. Growth substrate; A. First through-hole; B. Second through-hole; Y1. Preset area for through-hole type vertical light-emitting structure; Y2. Preset area for vertical electrode light-emitting structure; Y3. Preset area for isolation trench; C1. Through-hole type vertical light-emitting structure; C2. Vertical electrode light-emitting structure; G. Isolation trench; Q. Cutting track;

[0059] 1. Conductive substrate; 2. Epitaxial stack; 21. Type I semiconductor layer; 22. Active region; 23. Type II semiconductor layer; 24. Groove; 25. Light-emitting mesa; 201. N-type semiconductor layer; 202. P-type semiconductor layer; 3. Insulating layer; 4. Metal reflective layer; 5. Ohmic contact layer; 6. Metal bonding layer; 7. Passivation layer; 8. First electrode. Detailed Implementation

[0060] To make the content of this invention clearer, the technical solutions in the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments in this application, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the scope of protection of this application.

[0061] Many specific details are set forth in the following description in order to provide a full understanding of this application. However, this application may also be implemented in other ways different from those described herein. Those skilled in the art can make similar extensions without departing from the spirit of this application. Therefore, this application is not limited to the specific embodiments disclosed below.

[0062] Secondly, this application provides a detailed description in conjunction with schematic diagrams. When detailing the embodiments of this application, for ease of explanation, the cross-sectional views illustrating the device structure may be partially enlarged, not adhering to the usual scale. Furthermore, the schematic diagrams are merely examples and should not limit the scope of protection of this application. In addition, actual fabrication should include three-dimensional spatial dimensions of length, width, and depth.

[0063] An embodiment of the present invention provides an antistatic vertical structure LED chip, such as... Figures 1 to 2 As shown, it includes:

[0064] An embodiment of the present invention provides a vertical structure LED chip, such as... Figure 1 As shown, it includes:

[0065] Conductive substrate 1;

[0066] Two vertical light-emitting structures are horizontally arranged on one side of the conductive substrate 1. The two vertical light-emitting structures are connected in parallel in opposite directions to each other for use in AC power supply or for reverse voltage protection of vertical structure LED chips. The two vertical light-emitting structures are each other's electrostatic discharge channels.

[0067] Both vertical light-emitting structures include an ohmic contact layer 5, a metal reflective layer 4, and an epitaxial stack 2 stacked sequentially along a first direction. The epitaxial stack 2 includes a second type semiconductor layer 23, an active region 22, and a first type semiconductor layer 21 stacked sequentially along the first direction. The first direction is perpendicular to the conductive substrate 1 and points from the conductive substrate 1 to the two vertical light-emitting structures.

[0068] An insulating layer 3 is disposed on the side of the epitaxial stack 2 facing the conductive substrate 1, and covers the exposed surfaces of the ohmic contact layer 5 and the metal reflective layer 4.

[0069] The two vertical light-emitting structures are a through-hole type vertical light-emitting structure C1 and a vertical electrode light-emitting structure C2, separated by an isolation trench G. In the vertical electrode light-emitting structure C2, the insulating layer 3 has multiple first through holes A on the side facing the conductive substrate 1, exposing a portion of the surface of the ohmic contact layer 5. In the through-hole type vertical light-emitting structure C1, the epitaxial stack 2 has a groove 24 extending towards the first type semiconductor layer 21 on the side facing the conductive substrate 1, exposing a portion of the surface of the first type semiconductor layer 21. The insulating layer 3 extends to the sidewall of the groove 24, and exposes a portion of the surface of the ohmic contact layer 5 on the side of the insulating layer 3 facing the isolation trench G.

[0070] The metal bonding layer 6 is stacked on the side surface of the insulating layer 3 away from the ohmic contact layer 5, and is embedded in the groove 24 to form contact with the first type semiconductor layer 21 of the through-hole vertical light-emitting structure C1, and is embedded in each first through hole A to form contact with the ohmic contact layer 5 of the vertical electrode light-emitting structure C2, and the conductive substrate 1 is stacked on the side surface of the metal bonding layer 6 away from the epitaxial stack 2.

[0071] Passivation layer 7 covers the exposed surface of epitaxial stack 2 and extends to the isolation trench G and the sidewall of epitaxial stack 2 to connect to insulating layer 3. Passivation layer 7 has a second via B that exposes a portion of the surface of the first type semiconductor layer 21 of the vertical electrode light-emitting structure C2.

[0072] The first electrode 8 is connected to the exposed surface of the ohmic contact layer 5 of the through-hole type vertical light-emitting structure C1, and extends to the second through-hole B to form contact with the first type semiconductor layer 21 of the vertical electrode light-emitting structure C2. The first electrode 8 is insulated from the sidewall of the epitaxial stack 2 through the passivation layer 7.

[0073] It should be noted that in this embodiment, multiple first through holes A can not only realize the electrical connection of the vertical electrode light-emitting structure C2, but also disperse the current, so that the current passes through each first through hole A evenly, avoid current congestion, and improve the light-emitting efficiency and reliability of the vertical electrode light-emitting structure C2.

[0074] Optionally, in this embodiment, the luminous area of ​​the through-hole vertical light-emitting structure is s1, and the luminous area of ​​the vertical electrode light-emitting structure is s2. Then, s1 = s2, or s1 < s2, or s1 > s2. The luminous areas of the through-hole vertical light-emitting structure and the vertical electrode light-emitting structure can be the same or different. They can be set according to actual needs to obtain different proportions of luminous brightness. This embodiment does not impose any limitations.

[0075] Optionally, in this embodiment, the vertical electrode light-emitting structure C2 and the through-hole type vertical light-emitting structure C1 are located at the same horizontal height and are set at the same height.

[0076] Optionally, in this embodiment, the first electrode 8 and the conductive substrate 1 are the common electrode of the vertical electrode light-emitting structure C2 and the through-hole type vertical light-emitting structure C1.

[0077] Optionally, in this embodiment, the ohmic contact layer 5 includes, but is not limited to, one or more of chromium, nickel, aluminum, titanium, platinum, and gold.

[0078] Optionally, in this embodiment, the insulating layer 3 includes, but is not limited to, one or more of silicon dioxide, aluminum oxide, silicon nitride, hydrogen fluoride, and zirconium dioxide.

[0079] Optionally, in this embodiment, the metal reflective layer 4 is a highly reflective metal material, including but not limited to one or more of indium tin oxide, nickel, titanium, gold, silver, magnesium, rhodium, aluminum, and platinum.

[0080] Optionally, in this embodiment, the metal bonding layer 6 includes, but is not limited to, one or more of gold-indium alloy, gold-tin alloy, nickel-tin alloy, and tin-silver-copper alloy.

[0081] It should be noted that in this embodiment, the vertically structured LED chip can be used in conjunction with either an AC power supply or a DC power supply, such as... Figure 2 As shown, Figure 2 for Figure 1 The circuit diagram of the vertical LED chip allows for the application of either DC or AC power at the EF terminal, depending on the specific requirements.

[0082] It should be noted that in this embodiment, the two vertical light-emitting structures serve as electrostatic discharge channels for each other. That is, the through-hole type vertical light-emitting structure C1 and the vertical electrode light-emitting structure C2 serve as electrostatic discharge channels for each other. For example, when the vertical structure LED chip is operating under DC power, when a positive voltage is applied to the through-hole type vertical light-emitting structure C1, the through-hole type vertical light-emitting structure C1 conducts forward, while the vertical electrode light-emitting structure C2 is reverse cut off. Subsequently, the reverse electrostatic charge accumulated relative to the through-hole type vertical structure C1 can be released from the cut-off vertical electrode light-emitting structure C2. Conversely, when a positive voltage is applied to the vertical electrode light-emitting structure C2, the vertical electrode light-emitting structure C2 conducts forward, while the through-hole type vertical light-emitting structure C1 is reverse cut off. Subsequently, the reverse electrostatic charge accumulated relative to the vertical electrode light-emitting structure C2 can be released from the cut-off through-hole type vertical light-emitting structure C1.

[0083] Alternatively, when the vertical structure LED chip is negatively charged when it comes into contact with external static electricity (e.g., static electricity accumulated through friction during preparation, testing, transportation, and assembly), the static electricity can always be released through the anode to cathode of the through-hole type vertical light-emitting structure C1 or the vertical electrode light-emitting structure C2; ​​when the vertical structure LED chip is positively charged when it comes into contact with external static electricity (e.g., static electricity accumulated through friction during preparation, testing, transportation, and assembly), the static electricity can always be released through the cathode to anode of the through-hole type vertical light-emitting structure C1 or the vertical electrode light-emitting structure C2.

[0084] It should also be noted that the specific doping type of the first type semiconductor layer 21 and the second type semiconductor layer 23 is not limited in this embodiment. The doping types of the first type semiconductor layer 21 and the second type semiconductor layer 23 are opposite. The first type semiconductor layer 21 can be a P-type semiconductor layer or an N-type semiconductor layer.

[0085] Optionally, in another embodiment of this application, such as Figure 3 As shown, the first type semiconductor layer 21 is an N-type semiconductor layer 201, and the second type semiconductor layer 23 is a P-type semiconductor layer 202.

[0086] In this embodiment, when the vertical LED chip operates under DC power, a forward voltage is applied to the through-hole type vertical light-emitting structure C1, i.e., the first electrode 8 is connected to the positive terminal of the power supply, and the conductive substrate 1 is connected to the negative terminal of the power supply. The through-hole type vertical light-emitting structure C1 is forward-conducting, while the vertical electrode light-emitting structure C2 is reverse-conducting and cut off. Figure 3As shown in the figure, the solid lines and solid arrows represent the current flow when a positive voltage is applied to the through-hole type vertical light-emitting structure C1. The current is input from the first electrode 8, and flows sequentially through the ohmic contact layer 5, the metal reflective layer 4, the P-type semiconductor layer 202, the active region 22, the N-type semiconductor layer 201, the metal bonding layer 6, and towards the conductive substrate 1. Subsequently, the reverse static electricity accumulated relative to the through-hole type vertical structure C1 can be released from the cut-off vertical electrode light-emitting structure C2, as shown in the figure. Figure 3 As shown in the figure, the dashed line and hollow arrow indicate the electrostatic discharge path when a reverse voltage is applied to the vertical electrode light-emitting structure C2. The static electricity is discharged sequentially through the conductive substrate 1, the metal bonding layer 6, the ohmic contact layer 5, the metal reflective layer 4, the P-type semiconductor layer 202, the active region 22, the N-type semiconductor layer 201, and the first electrode 8.

[0087] Conversely, when a positive voltage is applied to the vertical electrode light-emitting structure C2, i.e., the conductive substrate 1 is connected to the positive terminal of the power supply and the first electrode 8 is connected to the negative terminal of the power supply, the vertical electrode light-emitting structure C2 is forward-conducting, while the through-hole type vertical light-emitting structure C1 is reverse-conducting and cut off. Figure 4 As shown in the figure, the solid line and solid arrow indicate the current flow when a positive voltage is applied to the vertical electrode light-emitting structure C2. The current is input from the conductive substrate 1, passes sequentially through the metal bonding layer 6, the ohmic contact layer 5, the metal reflective layer 4, the P-type semiconductor layer 202, the active region 22, the N-type semiconductor layer 201, and flows to the first electrode 8. Subsequently, the reverse static electricity accumulated relative to the vertical electrode light-emitting structure C2 can be released from the closed through-hole type vertical light-emitting structure C1, such as... Figure 4 As shown in the figure, the dashed line and hollow arrow indicate the electrostatic discharge path when a reverse voltage is applied to the through-hole type vertical light-emitting structure C1. The static electricity is discharged sequentially through the first electrode 8, ohmic contact layer 5, metal reflective layer 4, P-type semiconductor layer 202, active region 22, N-type semiconductor layer 201, metal bonding layer 6, and conductive substrate 1.

[0088] Optionally, in another embodiment of this application, such as Figure 5 As shown, the first type semiconductor layer 21 is a P-type semiconductor layer 202, and the second type semiconductor layer 23 is an N-type semiconductor layer 201.

[0089] In this embodiment, when the vertical LED chip operates under DC power, a positive voltage is applied to the vertical electrode light-emitting structure C2, i.e., the first electrode 8 is connected to the positive terminal of the power supply, and the conductive substrate 1 is connected to the negative terminal of the power supply. The vertical electrode light-emitting structure C2 is forward-biased, while the through-hole type vertical light-emitting structure C1 is reverse-biased and cut off. Figure 5As shown in the figure, the solid lines and solid arrows represent the current flow when a positive voltage is applied to the vertical electrode light-emitting structure C2. The current is input from the first electrode 8, passes sequentially through the P-type semiconductor layer 202, the active region 22, the N-type semiconductor layer 201, the metal reflective layer 4, the ohmic contact layer 5, the metal bonding layer 6, and flows to the conductive substrate 1. Subsequently, the reverse static electricity accumulated relative to the vertical electrode light-emitting structure C2 can be released from the closed through-hole type vertical light-emitting structure C1, such as... Figure 5 As shown in the figure, the dashed line and hollow arrow indicate the electrostatic discharge path when a reverse voltage is applied to the through-hole type vertical light-emitting structure C1. The static electricity is discharged sequentially through the conductive substrate 1, the metal bonding layer 6, the P-type semiconductor layer 202, the active region 22, the N-type semiconductor layer 201, the metal reflective layer 4, the ohmic contact layer 5, and the first electrode 8.

[0090] Conversely, when a positive voltage is applied to the through-hole type vertical light-emitting structure C1, i.e., the conductive substrate 1 is connected to the positive terminal of the power supply and the first electrode 8 is connected to the negative terminal of the power supply, the through-hole type vertical light-emitting structure C1 is forward-conducting, while the vertical electrode light-emitting structure C2 is reverse-conducting and cut off. Figure 6 As shown in the figure, the solid lines and solid arrows represent the current flow when a positive voltage is applied to the through-hole type vertical light-emitting structure C1. The current is input from the conductive substrate 1, passes sequentially through the metal bonding layer 6, the P-type semiconductor layer 202, the active region 22, the N-type semiconductor layer 201, the metal reflective layer 4, the ohmic contact layer 5, and flows to the first electrode 8. Subsequently, the reverse static electricity accumulated relative to the through-hole type vertical light-emitting structure C1 can be released from the cut-off vertical electrode light-emitting structure C2, as shown in the figure. Figure 6 As shown in the figure, the dashed line and hollow arrow indicate the electrostatic discharge path when a reverse voltage is applied to the vertical electrode light-emitting structure C2. The static electricity is discharged sequentially through the first electrode 8, P-type semiconductor layer 202, active region 22, N-type semiconductor layer 201, metal reflective layer 4, ohmic contact layer 5, metal bonding layer 6, and conductive substrate 1.

[0091] Optionally, in another embodiment of this application, the first electrode 8 is disposed on a step and connects the through-hole type vertical light-emitting structure C1 and the vertical electrode light-emitting structure C2 in a stepped extension manner.

[0092] Optionally, in this embodiment, as Figure 7 As shown, the passivation layer 7 between the vertical electrode light-emitting structure C2 and the isolation trench G is arranged in a downward-extending stepped manner, forming a step.

[0093] Optionally, in this embodiment, as Figure 8 As shown, the vertical electrode light-emitting structure C2 has a platform on the side wall facing the isolation groove G, and the passivation layer 7 is disposed on the platform to form a step.

[0094] Optionally, in this embodiment, as Figure 9As shown, the epitaxial stack 2 of the vertical electrode light-emitting structure C2 has a trench extending toward the isolation groove G on the side surface facing the conductive substrate 1. The insulating layer 3 extends to the sidewall of the trench, and the metal bonding layer 6 is embedded in the trench to form a step.

[0095] An embodiment of the present invention provides a sensor comprising:

[0096] The vertical structure LED chip of any of the above is integrated with a light receiver to detect static electricity accumulation.

[0097] This invention also provides a method for manufacturing a vertical LED chip, comprising the following steps:

[0098] S01, such as Figure 10 As shown, a growth substrate 01 is provided;

[0099] S02, such as Figure 11 As shown, an epitaxial stack 2 is formed on one side surface of the growth substrate 01. The epitaxial stack 2 includes a first type semiconductor layer 21, an active region 22 and a second type semiconductor layer 23 stacked sequentially along the growth direction. The epitaxial stack 2 is divided into a through-hole type vertical light-emitting structure preset region Y1, a vertical electrode light-emitting structure preset region Y2 and an isolation trench preset region Y3 located between the two light-emitting structure preset regions.

[0100] S03, such as Figure 12 As shown, a groove 24 and a light-emitting platform 25 are formed in the epitaxial stack 2. The groove 24 exposes part of the surface of the first type semiconductor layer 21, and the groove 24 is located in the preset region Y1 of the through-hole type vertical light-emitting structure.

[0101] S04, such as Figure 13 As shown, an insulating layer 3 is deposited, which covers the surface of the epitaxial stack 2, the sidewalls of the groove 24 and its bottom surface. The insulating layer 3 is patterned so that both the preset area Y2 of the vertical electrode light-emitting structure and the preset area Y1 of the through-hole type vertical light-emitting structure have a portion of the surface of the light-emitting platform 25 exposed.

[0102] S05, such as Figure 14 As shown, a metal reflective layer 4 is formed on the exposed surface of the light-emitting platform 25;

[0103] S06, such as Figure 15 As shown, an ohmic contact layer 5 is fabricated, which covers the surface of the metal reflective layer 4 and extends to a portion of the surface of the insulating layer 3.

[0104] S07, such as Figure 16As shown, an insulating layer 3 is deposited again to cover the exposed surfaces of the ohmic contact layer 5 and the metal reflective layer 4, and the insulating layer 3 is patterned to expose the bottom of the groove 24, and multiple first through holes A are formed on the exposed surface of the ohmic contact layer 5. Each first through hole A is located in the preset area Y2 of the vertical electrode light-emitting structure.

[0105] The insulating layer 3 covers at least the sidewalls of the ohmic contact layer 5 and the metal reflective layer 4;

[0106] S08, such as Figure 17 As shown, a metal bonding layer 6 is deposited by vapor deposition. The metal bonding layer 6 is stacked on the surface of the insulating layer 3 and is embedded in the groove 24 to form contact with the first type semiconductor layer 21 of the preset area Y1 of the through-hole vertical light-emitting structure, and is embedded in each first through hole A to form contact with the ohmic contact layer 5 of the preset area Y2 of the vertical electrode light-emitting structure.

[0107] S09, such as Figure 18 As shown, the chip structure formed in step S08 is fixed to the conductive substrate 1 by bonding process, and the conductive substrate 1 is formed on the side surface of the metal bonding layer 6 away from the epitaxial stack 2.

[0108] S10, such as Figure 19 As shown, the growth substrate 01 is peeled off to expose the first type semiconductor layer 21;

[0109] S11, such as Figure 20 As shown, an isolation groove G and a cutting channel Q are formed. A through-hole type vertical light-emitting structure C1 and a vertical electrode light-emitting structure C2 are formed through the isolation groove G, and the isolation groove G exposes part of the ohmic contact layer 5 of the through-hole type vertical light-emitting structure C1.

[0110] Specifically, through an etching process, the upper surface of the first type semiconductor layer 21 is etched along the preset area Y3 of the isolation trench, so that at least part of the ohmic contact layer 5 is etched away on the side facing the vertical electrode light-emitting structure C2, exposing part of the insulating layer 3, and at least part of the ohmic contact layer 5 is exposed on the side facing the through-hole type vertical light-emitting structure C1, forming the isolation trench G.

[0111] Simultaneously, etching is performed along the upper surface edge of the first type semiconductor layer 21 to expose the insulating layer 3 and form a cleaving path Q;

[0112] S12, such as Figure 21 As shown, a passivation layer 7 is deposited, which covers the exposed surface of the epitaxial stack 2 and extends to the isolation trench G and the sidewall of the epitaxial stack 2 to connect to the insulating layer 3.

[0113] S13, such as Figure 22 As shown, a second via B is formed in the vertical electrode light-emitting structure by photolithography and etching of the patterned passivation layer 7, exposing a portion of the surface of the first type semiconductor layer 21.

[0114] S14, such as Figure 23 As shown, a first electrode 8 is fabricated. The first electrode 8 is connected to the exposed surface of the ohmic contact layer 5 of the through-hole type vertical light-emitting structure C1, and extends to the second through-hole B to form contact with the first type semiconductor layer 21 of the vertical electrode light-emitting structure C2. The first electrode 8 is insulated from the sidewall of the epitaxial stack 2 through the passivation layer 7.

[0115] The through-hole type vertical light-emitting structure C1 and the vertical electrode light-emitting structure C2 are connected in parallel in opposite directions for use with AC power supply or for reverse voltage protection of vertical structure LED chips. The through-hole type vertical light-emitting structure C1 and the vertical electrode light-emitting structure C2 are each other's electrostatic discharge channels.

[0116] It should be noted that in this embodiment, multiple first through holes A can not only realize the electrical connection of the vertical electrode light-emitting structure C2, but also disperse the current, so that the current passes through each first through hole A evenly, avoid current congestion, and improve the light-emitting efficiency and reliability of the vertical electrode light-emitting structure C2.

[0117] Optionally, in this embodiment, in step S03, forming the groove 24 specifically includes: copying the through hole on the photomask onto the photoresist through a spin coating, exposure, and development process, and then transferring the pattern onto the epitaxial stack 2 through dry etching.

[0118] Optionally, in this embodiment, in step S03, the groove 24 is formed by ICP, the etching gas is Cl2 and BCl3, the gas ratio is 2:1 to 20:1, the etching power is 100W to 600W, and the etching angle is 100° to 160°.

[0119] Optionally, in this embodiment, in step S05, forming the metal reflective layer 4 specifically includes:

[0120] First, the current blocking layer is patterned by uniform negative resist, exposure and development processes, and then wet etching or dry etching.

[0121] Alternatively, the current blocking layer can be patterned by uniform negative resist application, exposure and development processes, followed by BOE etching solution or ICP etching.

[0122] Without removing the resist from the epitaxial wafer, a metal reflective layer 4 is prepared by vapor deposition or sputtering.

[0123] Optionally, in this embodiment, in step S10, the growth substrate 01 is peeled off by laser stripping or chemical etching.

[0124] Optionally, in this embodiment, in step S11, the isolation trench G and the cutting path Q are formed by dry etching or wet etching.

[0125] Optionally, in this embodiment, the luminous area of ​​the through-hole vertical light-emitting structure is s1, and the luminous area of ​​the vertical electrode light-emitting structure is s2. Then, s1 = s2, or s1 < s2, or s1 > s2. The luminous areas of the through-hole vertical light-emitting structure and the vertical electrode light-emitting structure can be the same or different. They can be set according to actual needs to obtain different proportions of luminous brightness. This embodiment does not impose any limitations.

[0126] Optionally, in this embodiment, the vertical electrode light-emitting structure C2 and the through-hole type vertical light-emitting structure C1 are located at the same horizontal height and are set at the same height.

[0127] Optionally, in this embodiment, the first electrode 8 and the conductive substrate 1 are the common electrode of the vertical electrode light-emitting structure C2 and the through-hole type vertical light-emitting structure C1.

[0128] Optionally, in this embodiment, the ohmic contact layer 5 includes, but is not limited to, one or more of chromium, nickel, aluminum, titanium, platinum, and gold.

[0129] Optionally, in this embodiment, the insulating layer 3 includes, but is not limited to, one or more of silicon dioxide, aluminum oxide, silicon nitride, hydrogen fluoride, and zirconium dioxide.

[0130] Optionally, in this embodiment, the metal reflective layer 4 is a highly reflective metal material, including but not limited to one or more of indium tin oxide, nickel, titanium, gold, silver, magnesium, rhodium, aluminum, and platinum.

[0131] Optionally, in this embodiment, the metal bonding layer 6 includes, but is not limited to, one or more of gold-indium alloy, gold-tin alloy, nickel-tin alloy, and tin-silver-copper alloy.

[0132] It should be noted that in this embodiment, the vertically structured LED chip can be used in conjunction with either an AC power supply or a DC power supply, such as... Figure 2 As shown, Figure 2 for Figure 1 The circuit diagram of the vertical LED chip allows for the application of either DC or AC power at the EF terminal, depending on the specific requirements.

[0133] It should be noted that in this embodiment, the through-hole vertical light-emitting structure C1 and the vertical electrode light-emitting structure C2 are each other's electrostatic discharge channels. For example, when the vertical structure LED chip is working under DC power, when a positive voltage is applied to the through-hole vertical light-emitting structure C1, the through-hole vertical light-emitting structure C1 is forward-conducting, and the vertical electrode light-emitting structure C2 is reverse-cut off. Subsequently, the reverse electrostatic discharge accumulated relative to the through-hole vertical structure C1 can be released from the cut-off vertical electrode light-emitting structure C2. Conversely, when a positive voltage is applied to the vertical electrode light-emitting structure C2, the vertical electrode light-emitting structure C2 is forward-conducting, and the through-hole vertical light-emitting structure C1 is reverse-cut off. Subsequently, the reverse electrostatic discharge accumulated relative to the vertical electrode light-emitting structure C2 can be released from the cut-off through-hole vertical light-emitting structure C1.

[0134] Alternatively, when the vertical structure LED chip is negatively charged when it comes into contact with external static electricity (e.g., static electricity accumulated through friction during preparation, testing, transportation, and assembly), the static electricity can always be released through the anode to cathode of the through-hole type vertical light-emitting structure C1 or the vertical electrode light-emitting structure C2; ​​when the vertical structure LED chip is positively charged when it comes into contact with external static electricity (e.g., static electricity accumulated through friction during preparation, testing, transportation, and assembly), the static electricity can always be released through the cathode to anode of the through-hole type vertical light-emitting structure C1 or the vertical electrode light-emitting structure C2.

[0135] It should also be noted that the specific doping type of the first type semiconductor layer 21 and the second type semiconductor layer 23 is not limited in this embodiment. The doping types of the first type semiconductor layer 21 and the second type semiconductor layer 23 are opposite. The first type semiconductor layer 21 can be a P-type semiconductor layer or an N-type semiconductor layer.

[0136] Optionally, in another embodiment of this application, such as Figure 3 As shown, the first type semiconductor layer 21 is an N-type semiconductor layer 201, and the second type semiconductor layer 23 is a P-type semiconductor layer 202.

[0137] In this embodiment, when the vertical LED chip operates under DC power, a forward voltage is applied to the through-hole type vertical light-emitting structure C1, i.e., the first electrode 8 is connected to the positive terminal of the power supply, and the conductive substrate 1 is connected to the negative terminal of the power supply. The through-hole type vertical light-emitting structure C1 is forward-conducting, while the vertical electrode light-emitting structure C2 is reverse-conducting and cut off. Figure 3 As shown in the figure, the solid lines and solid arrows represent the current flow when a positive voltage is applied to the through-hole type vertical light-emitting structure C1. The current is input from the first electrode 8, and flows sequentially through the ohmic contact layer 5, the metal reflective layer 4, the P-type semiconductor layer 202, the active region 22, the N-type semiconductor layer 201, the metal bonding layer 6, and towards the conductive substrate 1. Subsequently, the reverse static electricity accumulated relative to the through-hole type vertical structure C1 can be released from the cut-off vertical electrode light-emitting structure C2, as shown in the figure. Figure 3 As shown in the figure, the dashed line and hollow arrow indicate the electrostatic discharge path when a reverse voltage is applied to the vertical electrode light-emitting structure C2. The static electricity is discharged sequentially through the conductive substrate 1, the metal bonding layer 6, the ohmic contact layer 5, the metal reflective layer 4, the P-type semiconductor layer 202, the active region 22, the N-type semiconductor layer 201, and the first electrode 8.

[0138] Conversely, when a positive voltage is applied to the vertical electrode light-emitting structure C2, i.e., the conductive substrate 1 is connected to the positive terminal of the power supply and the first electrode 8 is connected to the negative terminal of the power supply, the vertical electrode light-emitting structure C2 is forward-conducting, while the through-hole type vertical light-emitting structure C1 is reverse-conducting and cut off. Figure 4 As shown in the figure, the solid line and solid arrow indicate the current flow when a positive voltage is applied to the vertical electrode light-emitting structure C2. The current is input from the conductive substrate 1, passes sequentially through the metal bonding layer 6, the ohmic contact layer 5, the metal reflective layer 4, the P-type semiconductor layer 202, the active region 22, the N-type semiconductor layer 201, and flows to the first electrode 8. Subsequently, the reverse static electricity accumulated relative to the vertical electrode light-emitting structure C2 can be released from the closed through-hole type vertical light-emitting structure C1, such as... Figure 4 As shown in the figure, the dashed line and hollow arrow indicate the electrostatic discharge path when a reverse voltage is applied to the through-hole type vertical light-emitting structure C1. The static electricity is discharged sequentially through the first electrode 8, ohmic contact layer 5, metal reflective layer 4, P-type semiconductor layer 202, active region 22, N-type semiconductor layer 201, metal bonding layer 6, and conductive substrate 1.

[0139] Optionally, in another embodiment of this application, such as Figure 5 As shown, the first type semiconductor layer 21 is a P-type semiconductor layer 202, and the second type semiconductor layer 23 is an N-type semiconductor layer 201.

[0140] In this embodiment, when the vertical LED chip operates under DC power, a positive voltage is applied to the vertical electrode light-emitting structure C2, i.e., the first electrode 8 is connected to the positive terminal of the power supply, and the conductive substrate 1 is connected to the negative terminal of the power supply. The vertical electrode light-emitting structure C2 is forward-biased, while the through-hole type vertical light-emitting structure C1 is reverse-biased and cut off. Figure 5 As shown in the figure, the solid lines and solid arrows represent the current flow when a positive voltage is applied to the vertical electrode light-emitting structure C2. The current is input from the first electrode 8, passes sequentially through the P-type semiconductor layer 202, the active region 22, the N-type semiconductor layer 201, the metal reflective layer 4, the ohmic contact layer 5, the metal bonding layer 6, and flows to the conductive substrate 1. Subsequently, the reverse static electricity accumulated relative to the vertical electrode light-emitting structure C2 can be released from the closed through-hole type vertical light-emitting structure C1, such as... Figure 5As shown in the figure, the dashed line and hollow arrow indicate the electrostatic discharge path when a reverse voltage is applied to the through-hole type vertical light-emitting structure C1. The static electricity is discharged sequentially through the conductive substrate 1, the metal bonding layer 6, the P-type semiconductor layer 202, the active region 22, the N-type semiconductor layer 201, the metal reflective layer 4, the ohmic contact layer 5, and the first electrode 8.

[0141] Conversely, when a positive voltage is applied to the through-hole type vertical light-emitting structure C1, i.e., the conductive substrate 1 is connected to the positive terminal of the power supply and the first electrode 8 is connected to the negative terminal of the power supply, the through-hole type vertical light-emitting structure C1 is forward-conducting, while the vertical electrode light-emitting structure C2 is reverse-conducting and cut off. Figure 6 As shown in the figure, the solid lines and solid arrows represent the current flow when a positive voltage is applied to the through-hole type vertical light-emitting structure C1. The current is input from the conductive substrate 1, passes sequentially through the metal bonding layer 6, the P-type semiconductor layer 202, the active region 22, the N-type semiconductor layer 201, the metal reflective layer 4, the ohmic contact layer 5, and flows to the first electrode 8. Subsequently, the reverse static electricity accumulated relative to the through-hole type vertical light-emitting structure C1 can be released from the cut-off vertical electrode light-emitting structure C2, as shown in the figure. Figure 6 As shown in the figure, the dashed line and hollow arrow indicate the electrostatic discharge path when a reverse voltage is applied to the vertical electrode light-emitting structure C2. The static electricity is discharged sequentially through the first electrode 8, P-type semiconductor layer 202, active region 22, N-type semiconductor layer 201, metal reflective layer 4, ohmic contact layer 5, metal bonding layer 6, and conductive substrate 1.

[0142] Optionally, in another embodiment of this application, the first electrode 8 is disposed on a step and connects the through-hole type vertical light-emitting structure C1 and the vertical electrode light-emitting structure C2 in a stepped extension manner.

[0143] Optionally, in this embodiment, as Figure 7 As shown, the passivation layer 7 between the vertical electrode light-emitting structure C2 and the isolation trench G is arranged in a downward-extending stepped manner, forming a step.

[0144] Optionally, in this embodiment, as Figure 8 As shown, the vertical electrode light-emitting structure C2 has a platform on the side wall facing the isolation groove G, and the passivation layer 7 is disposed on the platform to form a step.

[0145] Optionally, in this embodiment, as Figure 9 As shown, the epitaxial stack 2 of the vertical electrode light-emitting structure C2 has a trench extending toward the isolation groove G on the side surface facing the conductive substrate 1. The insulating layer 3 extends to the sidewall of the trench, and the metal bonding layer 6 is embedded in the trench to form a step.

[0146] In summary, the above technical solution achieves the following results:

[0147] 1. The vertical structure LED chip provided in this embodiment uses two vertical light-emitting structures horizontally arranged on one side of a conductive substrate. The two vertical light-emitting structures are connected in parallel with each other in opposite directions for use with AC power supply or for reverse voltage protection of the vertical structure LED chip. This not only broadens the application of LEDs, enabling LED power supply systems to switch from DC to AC drive, but also avoids the danger of reverse breakdown due to reverse voltage polarity of LED devices in practical applications, which would lead to malfunction. It also eliminates the need for transformers, bridge rectifiers, etc., reducing the manufacturing cost of LED light source devices when operating under AC power. Furthermore, when the vertical structure LED chip operates under DC power or comes into contact with static electricity from the outside (such as static electricity accumulated during preparation, testing, transportation, and assembly), the two vertical light-emitting structures act as static discharge channels for each other, which can be used to improve the anti-static capability of the vertical structure LED chip.

[0148] 2. Furthermore, by setting the first electrode on the step, the through-hole type vertical light-emitting structure and the vertical electrode light-emitting structure are connected by a stepped extension. The step can provide a buffer for the electrode and prevent the first electrode from breaking.

[0149] 3. Furthermore, by setting the vertical electrode light-emitting structure and the through-hole type vertical light-emitting structure at the same horizontal height and with equal height, epitaxial cracking due to inconsistent heights can be avoided during subsequent chip transfer.

[0150] 4. The vertical structure LED chip manufacturing method provided in this embodiment, through a simple and convenient process, produces a vertical structure LED chip that can be used in connection with an AC power supply or for reverse voltage protection of the vertical structure LED chip. This not only broadens the application of LEDs, enabling LED power supply systems to switch from DC to AC drive, but also avoids the danger of reverse breakdown due to reverse voltage polarity of the LED device in practical applications, which could lead to malfunction. Furthermore, it eliminates the need for transformers, bridge rectifiers, etc., reducing the manufacturing cost of LED light source devices when operating under AC power. Moreover, when the vertical structure LED chip operates under DC power or comes into contact with external static electricity (such as static electricity accumulated during preparation, testing, transportation, and assembly), the two vertical light-emitting structures act as static discharge channels for each other, which can be used to improve the anti-static capability of the vertical structure LED chip.

[0151] Those skilled in the art should understand that, in the disclosure of this invention, the terms "lateral", "longitudinal", "upper", "lower", etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are only for the convenience of describing this invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, the above terms should not be construed as limiting this invention.

[0152] It should be noted that the various embodiments in this specification are described in a progressive manner, with each embodiment focusing on the differences from other embodiments. The same or similar parts between the various embodiments can be referred to each other.

[0153] The above description of the disclosed embodiments enables those skilled in the art to make or use the invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the invention. Therefore, the invention is not to be limited to the embodiments shown herein, but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A vertically structured LED chip, characterized in that, include: Conductive substrate; Two vertical light-emitting structures are horizontally arranged on one side of the conductive substrate. The two vertical light-emitting structures are connected in parallel in opposite directions to each other for use in AC power supply or for reverse voltage protection of vertical LED chips. The two vertical light-emitting structures are each other's electrostatic discharge channels. Both of the vertical light-emitting structures include an ohmic contact layer, a metal reflective layer, and an epitaxial stack stacked sequentially along a first direction. The epitaxial stack stack includes a second type semiconductor layer, an active region, and a first type semiconductor layer stacked sequentially along the first direction. The first direction is perpendicular to the conductive substrate and extends from the conductive substrate to the two vertical light-emitting structures. An insulating layer is disposed on the side of the epitaxial stack facing the conductive substrate and covers the exposed surfaces of the ohmic contact layer and the metal reflective layer. The two vertical light-emitting structures are a through-hole type vertical light-emitting structure and a vertical electrode light-emitting structure, separated by an isolation trench. In the vertical electrode light-emitting structure, the insulating layer has a plurality of first through holes on the side facing the conductive substrate, exposing a portion of the ohmic contact layer surface. In the through-hole type vertical light-emitting structure, the epitaxial stack has a groove extending into the first type semiconductor layer on the side facing the conductive substrate, exposing a portion of the first type semiconductor layer surface. The insulating layer extends to the sidewall of the groove and exposes a portion of the ohmic contact layer surface on the side facing the isolation trench. A metal bonding layer is stacked on the side surface of the insulating layer away from the ohmic contact layer, and is embedded in the groove to form contact with the first type semiconductor layer of the through-hole vertical light-emitting structure, and is embedded in each of the first through holes to form contact with the ohmic contact layer of the vertical electrode light-emitting structure, and the conductive substrate is stacked on the side surface of the metal bonding layer away from the epitaxial stack. A passivation layer covers the exposed surface of the epitaxial stack and extends to the isolation trench and the sidewall of the epitaxial stack to connect to the insulating layer, and the passivation layer has a second via exposing a portion of the surface of the first type semiconductor layer of the vertical electrode light-emitting structure. The first electrode is connected to the exposed surface of the ohmic contact layer of the through-hole vertical light-emitting structure and extends to the second through-hole to form contact with the first type semiconductor layer of the vertical electrode light-emitting structure. The first electrode is insulated from the sidewall of the epitaxial stack through the passivation layer.

2. The vertical structure LED chip according to claim 1, characterized in that: The first electrode is disposed on a step and is connected to the through-hole type vertical light-emitting structure and the vertical electrode light-emitting structure by a stepped extension.

3. The vertical structure LED chip according to claim 2, characterized in that: The passivation layer between the vertical electrode light-emitting structure and the isolation groove is arranged in a downward-extending stepped manner, forming the step.

4. The vertical structure LED chip according to claim 2, characterized in that: The epitaxial stack of the vertical electrode light-emitting structure has a trench extending toward the isolation trench on one side surface facing the conductive substrate. The insulating layer extends to the sidewall of the trench, and the metal bonding layer is embedded in the trench to form the step.

5. The vertical structure LED chip according to claim 1, characterized in that: The vertical electrode light-emitting structure and the through-hole type vertical light-emitting structure are located at the same horizontal height and are set at the same height.

6. A method for fabricating a vertically structured LED chip, characterized in that, The manufacturing method includes the following steps: S01, Provide a growth substrate; S02. An epitaxial stack is formed on one side surface of the growth substrate. The epitaxial stack includes a first type semiconductor layer, an active region, and a second type semiconductor layer stacked sequentially along the growth direction. The epitaxial stack is divided into a through-hole type vertical light-emitting structure preset region, a vertical electrode light-emitting structure preset region, and an isolation trench preset region located between the two light-emitting structure preset regions. S03. A groove and a light-emitting platform are formed in the epitaxial stack, the groove exposes a portion of the surface of the first type semiconductor layer, and the groove is located in a preset area of ​​the through-hole type vertical light-emitting structure; S04. Deposit an insulating layer, the insulating layer covering the surface of the epitaxial stack, the sidewalls and bottom surface of the groove, and pattern the insulating layer so that both the preset area of ​​the vertical electrode light-emitting structure and the preset area of ​​the through-hole type vertical light-emitting structure have a portion of the surface of the light-emitting platform exposed. S05. A metal reflective layer is formed on the exposed surface of the light-emitting platform; S06. Fabricate an ohmic contact layer that covers the surface of the metal reflective layer and extends to a portion of the surface of the insulating layer; S07. Deposit an insulating layer again to cover the exposed surfaces of the ohmic contact layer and the metal reflective layer, and pattern the insulating layer to expose the bottom of the groove, and form a plurality of first through holes exposing a portion of the surface of the ohmic contact layer, each of the first through holes being located in a preset area of ​​the vertical electrode light-emitting structure. S08. A metal bonding layer is deposited by vapor deposition, wherein the metal bonding layer is stacked on the surface of the insulating layer and is embedded in the groove to form contact with the first type semiconductor layer of the preset area of ​​the through-hole vertical light-emitting structure, and is embedded in each of the first through holes to form contact with the ohmic contact layer of the preset area of ​​the vertical electrode light-emitting structure. S09. The chip structure formed in step S08 is fixed to a conductive substrate by a bonding process, and the conductive substrate is formed on the side surface of the metal bonding layer away from the epitaxial stack. S10. Peel off the growth substrate to expose the first type of semiconductor layer; S11. Form an isolation groove and a cutting channel, and form a through-hole type vertical light-emitting structure and a vertical electrode light-emitting structure through the isolation groove, and expose part of the ohmic contact layer of the through-hole type vertical light-emitting structure through the isolation groove. Specifically, through an etching process, the upper surface of the first type of semiconductor layer is etched along the preset area of ​​the isolation trench, so that at least part of the ohmic contact layer is etched away on the side facing the vertical electrode light-emitting structure, exposing part of the insulating layer, and at least part of the ohmic contact layer is exposed on the side facing the through-hole type vertical light-emitting structure, thus forming the isolation trench. Simultaneously, etching is performed along the edge of the upper surface of the first type semiconductor layer to expose a portion of the insulating layer, forming the cutting path; S12. A passivation layer is deposited, which covers the exposed surface of the epitaxial stack and extends to the isolation trench and the sidewall of the epitaxial stack to connect with the insulating layer; S13. The passivation layer is patterned by photolithography and etching to form a second via that exposes a portion of the surface of the first type semiconductor layer in the vertical electrode light-emitting structure. S14. Fabricate a first electrode, which is connected to the exposed surface of the ohmic contact layer of the through-hole vertical light-emitting structure and extends to the second through-hole to form contact with the first type semiconductor layer of the vertical electrode light-emitting structure. The first electrode is insulated from the sidewall of the epitaxial stack through the passivation layer. The through-hole type vertical light-emitting structure and the vertical electrode light-emitting structure are connected in parallel in opposite directions for use with AC power supply or for reverse voltage protection of vertical structure LED chips. The through-hole type vertical light-emitting structure and the vertical electrode light-emitting structure serve as electrostatic discharge channels for each other.

7. The method for manufacturing a vertical structure LED chip according to claim 6, characterized in that: The first electrode is disposed on a step and is connected to the through-hole type vertical light-emitting structure and the vertical electrode light-emitting structure by a stepped extension.

8. The method for manufacturing a vertical structure LED chip according to claim 7, characterized in that: The passivation layer between the vertical electrode light-emitting structure and the isolation groove is arranged in a downward-extending stepped manner, forming the step.

9. The method for manufacturing a vertical structure LED chip according to claim 7, characterized in that: The epitaxial stack of the vertical electrode light-emitting structure has a trench extending toward the isolation trench on one side surface facing the conductive substrate. The insulating layer extends to the sidewall of the trench, and the metal bonding layer is embedded in the trench to form the step.

10. The method for manufacturing a vertical structure LED chip according to claim 6, characterized in that: The vertical electrode light-emitting structure and the through-hole type vertical light-emitting structure are located at the same horizontal height and are set at the same height.

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