Scan driving circuit and display panel

By optimizing the structural design of the scanning drive circuit and utilizing cascaded scanning drive units and switching transistor control logic, the problems of excessively large size and high power consumption of the scanning drive unit were solved, resulting in a display panel with narrow bezels and low power consumption.

CN117174048BActive Publication Date: 2025-12-26CHANGSHA HKC OPTOELECTRONICS CO LTD +1
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Patent Information

Application Number
CN202311108266.3
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2023-08-30
Publication Date
2025-12-26
Estimated Expiration
2043-08-30

AI Technical Summary

Technical Problem

How to reduce the size of the scan drive unit to achieve a narrow bezel effect while maintaining the driving capability of the scan drive unit, and reduce the space occupation and power consumption of the scan drive circuit.

Method used

By designing n cascaded scan drive units in the scan drive circuit, each unit includes a pull-up module, an output module, a hold module, a pull-down module, and a reset module, the transmission of the scan signal is optimized by utilizing the control logic of the switching transistors, thereby reducing the number of switching transistors in each module to reduce space occupation and power consumption.

Benefits of technology

This achieves a reduction in the space occupied and power consumption of the scanning drive circuit while maintaining driving capability, thereby reducing the risk of circuit overheating and achieving an extremely narrow bezel effect.

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Abstract

Embodiments of the present application disclose a scanning driving circuit and a display panel, comprising n cascaded scanning driving units, the n scanning driving units are used for sequentially outputting corresponding scanning signals, and are used for controlling pixel units to receive data signals for image display to perform image display. The a-th scanning driving unit comprises a pull-up module, a first node and an output module, the pull-up module is connected to a driving voltage end and the first node, and is used for pulling up the first node to a preset potential from the driving voltage end receiving a driving voltage, the output module is connected to the first node, and the output module outputs a scanning signal when the first node is at the preset potential. By simplifying the scanning driving unit, the space occupation of the scanning driving circuit is reduced, and the display panel realizes the effect of narrow frame.
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Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of display, in particular to a scan driving circuit and a display panel. BACKGROUND

[0002] Gate Driver Less (GDL) technology is to use the original array process of a display panel to manufacture a driving circuit of a horizontal scan line on a substrate around a display area, so that the driving circuit can replace an external integrated circuit board (IC) to complete the driving of the horizontal scan line. The GDL technology can reduce the welding process of the external IC, and can make the display panel more suitable for manufacturing narrow-frame or frameless display products.

[0003] At present, the scan driving circuit is arranged at a frame position of the display panel, so the size of the scan driving circuit determines the size of the frame space occupied, and the scan driving circuit is composed of a plurality of cascaded scan driving units, which is used to output a plurality of scan signals to scan lines in the display panel to control pixel units to perform image display. Therefore, how to maintain the driving capability of the scan driving unit while reducing the size of the scan driving unit to reduce the space occupation of the scan driving circuit, so as to realize the narrow frame effect is a problem to be solved. SUMMARY

[0004] In view of the deficiencies of the prior art, the present application provides a scan driving circuit and a display panel which can effectively improve the driving capability and reduce the space occupation.

[0005] The present application provides a scan driving circuit, comprising n cascaded scan driving units, n is an integer greater than 1, and the n scan driving units are used to sequentially output corresponding scan signals, the scan signals are used to control pixel units to receive data signals for image display to perform image display. The a-th scan driving unit comprises a pull-up module, a first node and an output module, wherein 3≤a≤n, the pull-up module is connected to the driving voltage end and the first node, and is used to pull up the first node to a preset potential from the driving voltage end receiving the driving voltage, and the output module is connected to the first node, and the output module outputs the scan signal when the first node is at the preset potential.

[0006] Optionally, the a-th scan driving circuit further comprises a maintaining module and a second node, the maintaining module is connected to the driving voltage end and the second node, and is used to receive the driving voltage from the driving voltage end and charge the second node, so as to maintain the second node at the first potential.

[0007] Optionally, the a-th scan driving circuit further comprises a first pull-down module and a second pull-down module, the first pull-down module is connected to the first node and the second node, when the first node is at the preset potential, the second node is controlled to be at the second potential, the second pull-down module is connected to the second node and the output module, when the second node is at the first potential, the second pull-down module outputs a low-level signal to the output module, when the second node is at the second potential, the second pull-down module stops outputting the low-level signal to the output module.

[0008] Optionally, the pull-up module comprises a first switch tube, a gate of the first switch tube is connected to the a-2-th scan driving unit, a source of the first switch tube is connected to the driving voltage end, a drain of the first switch tube is connected to the first node, for being turned on under control of a scan signal output by the a-2-th scan driving unit, to control the driving voltage end to charge the first node to the preset potential.

[0009] Optionally, the output module comprises a second switch tube, a voltage stabilizing capacitor and a scan signal output end, a gate of the second switch tube is connected to the first node, a source of the second switch tube is connected to the clock signal end, a drain of the second switch tube is connected to the scan signal output end, when the first node is at the preset potential, the second switch tube is turned on, a clock signal output by the clock signal end is output from the scan signal output end according to the clock signal. The voltage stabilizing capacitor is connected to the gate and the drain of the second switch tube, for maintaining stability of the second switch tube voltage and stability of the scan signal output when the second switch tube is turned on.

[0010] Optionally, the maintaining module comprises a third switch tube and a fourth switch tube, a gate and a source of the third switch tube are connected to the driving voltage end, a drain of the third switch tube is connected to a gate of the fourth switch tube, a source of the fourth switch tube is connected to the driving voltage end, a drain of the fourth switch tube is connected to the second node, the third switch tube and the fourth switch tube are used for being turned on under control of the driving voltage, to control the second node to maintain at the first potential.

[0011] Optionally, the first pull-down module comprises a fifth switch tube, the second pull-down module comprises a sixth switch tube, a gate of the fifth switch tube is connected to the first node, a source of the fifth switch tube is connected to the second node, a drain of the fifth switch tube is connected to a low-voltage end, when the first node is at the preset potential, the fifth switch tube is turned on, connecting the second node and the low-voltage end, to pull down the second node to the second potential. A gate of the sixth switch tube is connected to the second node, a source of the sixth switch tube is connected to the scan signal output end, a drain of the sixth switch tube is connected to the low-voltage end, when the second node is at the first potential, the sixth switch tube is turned on, the low-voltage end provides a low level for the scan signal output end, when the second node is at the second potential, the sixth switch tube is cut off, the low-voltage end stops providing the low level for the scan signal output end.

[0012] Optionally, the scan driving circuit further comprises a reset module, the reset module comprises a seventh switch tube, a gate of the seventh switch tube is connected to the a+2th scan driving unit, a source of the seventh switch tube is connected to the first node, and a drain of the seventh switch tube is connected to the low-voltage end, for turning on when receiving the scan signal output by the a+2th scan driving unit, so as to turn on the charge of the first node to the low-voltage end, for resetting the first node.

[0013] Optionally, the scan driving unit outputs the scan signal in a frame image display process, which comprises a continuous first period, a second period and a third period. In the first period, the a-2th scan driving unit outputs the scan signal, the first switch tube is turned on, the driving voltage end outputs the driving voltage to the first node, and the second switch tube and the fifth switch tube are turned on, and the scan signal output end receives the clock signal from the clock signal end. In the second period, the a-2th scan driving unit stops outputting the scan signal, the first switch tube is turned off, the first node is maintained at the first preset potential, the scan signal output end outputs the scan signal according to the clock signal, and the first node rises from the first preset potential to the second preset potential. In the third period, the a+2th scan driving unit outputs the scan signal, the seventh switch tube is turned on, the first node is connected to the low-voltage end, the potential of the first node is lowered, the second switch tube and the fifth switch tube are turned off, the scan signal output end stops receiving the clock signal, and the sixth switch tube is turned on, and the scan signal output end is connected to the low-voltage end.

[0014] The application further provides a display panel, comprising a plurality of pixel units arranged in a matrix in a display area, a data driving circuit arranged in a non-display area, and the aforementioned scan driving circuit, wherein the scan driving circuit is configured to output a scan signal, and the scan signal is configured to control the pixel units to receive a data signal output by the data driving circuit for image display.

[0015] Compared with the prior art, by maintaining the driving capability of the scan driving unit and reducing the space occupation of the functional modules in the scan driving unit, the space occupation of the scan driving circuit is reduced, the effect of extremely narrow frame of the display panel is achieved, and due to the simplified circuit structure of the scan driving unit, the power consumption of the scan driving circuit is effectively reduced, and the risk of line heating is reduced. BRIEF DESCRIPTION OF DRAWINGS

[0016] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings needed in the embodiments will be briefly introduced below. Obviously, the drawings in the following description are some embodiments of the present application, and other drawings can also be obtained by those skilled in the art without creative labor.

[0017] Figure 1 FIG. 1 is a structural schematic diagram of a display device provided by the first embodiment of the present application;

[0018] Figure 2 for Figure 1 schematic diagram of side structure of display panel in

[0019] Figure 3 for Figure 2 schematic diagram of plane layout structure of display panel in

[0020] Figure 4 for Figure 3 schematic diagram of circuit structure of scan driving circuit in

[0021] Figure 5 for Figure 4 schematic diagram of equivalent circuit of scan driving unit in

[0022] Figure 6 for Figure 5 equivalent circuit diagram of scan driving unit in

[0023] Figure 7 for Figure 6 timing diagram of scan signal output in

[0024] Figure 8 for Figure 6 simulation diagram of node voltage change of scan driving unit in

[0025] BRIEF DESCRIPTION OF DRAWINGS display device-100, display panel-10, power supply module-20, support frame 30, display area-10a, non-display area-10b, timing control circuit-11, data driving circuit-12, scan driving circuit-13, pixel unit-P, backlight module-17, array substrate-10c, display medium layer-10e, opposite substrate-10d, first direction-F1, second direction-F2, m data lines-S1~Sm, n scan lines-G1~Gn, clock signal-CLK, start signal-STV, reset signal-R, scan driving unit-GDL, pull-up module 131, output module-132, maintenance module-133, first pull-down module-134, second pull-down module-135, reset module-136, driving voltage end-VDD, first switch tube-T1, second switch tube-T2, third switch tube-T3, fourth switch tube-T4, fifth switch tube-T5, sixth switch tube-T6, seventh switch tube-T7, first node-Q1, second node-Q2, voltage stabilizing capacitor-C, scan signal output end-Gout, first potential-V1, second potential-V2, first preset potential-VD1, second preset potential-VD2. DETAILED DESCRIPTION

[0026] For the purposes of the present application, a more complete description of which will follow, reference will be made to the accompanying drawings referenced below. The drawings illustrate preferred embodiments of the application. However, the application can be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and fully convey the scope of the application to those skilled in the art.

[0027] The following description of several embodiments with reference to the additional drawings is used to illustrate specific embodiments in which the present application can be implemented. The numbers of components in this document, such as "first", "second", etc., are only used to distinguish the described objects and do not have any sequential or technical meaning. The terms "connected", "coupled" in the present application, unless otherwise specified, include direct and indirect connections (couplings). The direction terms mentioned in the present application, such as "up", "down", "front", "back", "left", "right", "inner", "outer", "side" and the like, are only the direction of the additional drawings, therefore, the direction terms used are for better, clearer illustration and understanding of the present application, and are not indicative or implied that the device or element referred to must have a particular orientation, be constructed and operated in a particular orientation, and therefore cannot be understood as limiting the present application.

[0028] In the description of the present application, it should be noted that unless otherwise explicitly specified and limited, the terms "mounting", "connected", "connected" should be broadly understood, for example, it can be fixedly connected, or it can be detachably connected, or integrally connected; it can be mechanically connected; it can be directly connected, or indirectly connected through an intermediate medium; it can be the communication inside two elements. For those skilled in the art, the specific meaning of the above terms in the present application can be understood according to the specific circumstances. It should be noted that the terms "first", "second" and the like in the specification and claims of the present application and the drawings are used to distinguish different objects, and are not used to describe a specific order.

[0029] In addition, the terms "include", "may include", "contain" or "may contain" used in the present application indicate the presence of the corresponding functions, operations, elements, etc. disclosed, and do not limit other one or more functions, operations, elements, etc. In addition, the terms "include" or "contain" indicate the presence of the corresponding features, numbers, steps, operations, elements, components or combinations thereof disclosed in the specification, and do not exclude the presence or addition of one or more other features, numbers, steps, operations, elements, components or combinations thereof, and are intended to cover non-exclusive inclusion. In addition, when describing the embodiments of the present application, "may" is used to indicate "one or more embodiments of the present application". And the term "exemplary" is intended to refer to an example or illustration.

[0030] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein in the specification of this application is for the purpose of describing particular embodiments only and is not intended to be limiting of this application.

[0031] Please see Figure 1 , Figure 1 This is a schematic diagram of a display device according to the first embodiment of this application. The display device 100 includes a display panel 10, a power module 20, and a support frame 30. The display panel 10 and the power module 20 are fixed to the support frame 30. The power module 20 is disposed on the back of the display panel 10, that is, the non-display surface of the display panel 10. The power module 20 is used to provide power voltage for the display panel 10 to display images, and the support frame 30 provides fixation and protection for the display panel 10 and the power module 20.

[0032] In other embodiments of this application, the display device 100 may not require the support frame 30, for example, it may be a portable electronic device, such as a mobile phone or tablet computer.

[0033] Please see Figure 2 , Figure 2 for Figure 1 A schematic diagram of the side structure of the central display panel.

[0034] The display panel 10 includes an array substrate 10c and a counter substrate 10d, and a display medium layer 10e sandwiched between the array substrate 10c and the counter substrate 10d. Driving elements are disposed on the array substrate 10c and the counter substrate 10d to generate corresponding electric fields according to data signals, thereby driving the display medium layer 10e to emit light of corresponding brightness to perform image display. The display medium can be liquid crystal molecules, miniLED, Micro-LED, OLED, etc., and this application does not limit its use.

[0035] Taking a liquid crystal display panel as an example, the display medium in the display medium layer 10e is liquid crystal molecules. The display panel 10 also includes a back light module 17 (BM), wherein the back light module 17 is used to provide light for display to the display medium layer 10e. The liquid crystal molecules deflect relative angles according to the data signal so as to emit the light transmitted by the back light module 17 to the opposing substrate to perform image display.

[0036] Please refer to the following: Figure 3 , Figure 3 for Figure 2 A schematic diagram of the planar layout structure of the central display panel.

[0037] like Figure 3As shown, the display panel 10 further comprises a timing control circuit 11, a data driving circuit 12 and a scan driving circuit 13. The timing control circuit 11, the data driving circuit 12 and the scan driving circuit 13 are arranged in the non-display area 10b of the display panel 10.

[0038] In the display area 10a of the display panel 10, m data lines (Source lines) S1-Sm and n scan lines (Gate lines) G1-Gn are arranged in a grid pattern. The m data lines S1-Sm extend along a first direction F1, and the n scan lines G1-Gn extend along a second direction F2. The first direction F1 and the second direction F2 are perpendicular to each other. The intersections of the n scan lines G1-Gn and the data lines S1-Sm correspond to the pixel units P.

[0039] The timing control circuit 11 receives an image signal representing image information from an external signal source, obtains a clock signal CLK, a horizontal synchronization signal Hsyn and a vertical synchronization signal Vsyn for synchronization, and outputs a gate output control signal Cg for controlling the scan driving circuit 13, a source output control signal Cs for controlling the data driving circuit 12, and a data signal representing image information. In this embodiment, the timing control circuit 11 obtains the data signal by performing data adjustment processing on the original data signal, and transmits the data signal to the data driving circuit 12.

[0040] The m data lines S1-Sm are connected to the data driving circuit 12 for receiving the data signal provided by the data driving circuit 12 in the form of gray scale values, and the n scan lines G1-Gn are connected to the scan driving circuit 13 for receiving the scan signal from the scan driving circuit 13.

[0041] The pixel units P receive the data voltage of the gray scale value in the corresponding data signal provided by the data lines S1-Sm under the control of the n scan lines G1-Gn in a predetermined time period, and drive the display medium layer 10e to deflect to a corresponding angle accordingly, so that the received backlight is emitted as light rays of a corresponding brightness according to the deflection angle, so as to achieve image display according to the image signal.

[0042] The scan driving circuit 13 receives the gate output control signal Cg output by the timing control circuit 11 and outputs the scan signal to each scan line G1-Gn. The data driving circuit 12 receives the source output control signal Cs output by the timing control circuit 11 and outputs the data signal used by the driving element in each pixel unit P in the display area 10a to perform image display. The data signal provided to the display panel 10 is an analog gray scale voltage. The scan driving circuit 13 outputs the scan signal to control the pixel units P to receive the data signal output by the data driving circuit 12, so as to control the pixel units P to display the corresponding image.

[0043] Referring to Figure 4 , Figure 4 for Figure 3 a circuit structure diagram of a scan driving circuit in FIG. 1.

[0044] As Figure 4 shown, the scan driving circuit 13 includes n cascaded scan driving units GDL1-GDLn, eight clock signals CLK1-CLK8, an enable signal STV, a reset signal R, and a low voltage end Vss, where n is an integer greater than or equal to 1.

[0045] In exemplary embodiments, the clock signals can also be set to other numbers as needed, which is not limited in the present application.

[0046] Each GDL unit in the scan driving circuit 13 outputs one scan signal to one scan line in the display area 10a, and n GDL units output n scan signals G(1)-G(n) in sequence in one frame of image display.

[0047] The eight clock signals CLK1-CLK8 are used to provide scan driving timing for the GDL units to output scan signals. The enable signal STV is the enable signal of the first scan driving unit GDL1, and the other scan driving units use the cascade signal output by the cascaded scan unit as the enable signal. The low voltage end VSS is used to provide low voltage for the nodes in the scan driving unit.

[0048] Referring to Figure 5 , Figure 5 for Figure 4 an equivalent circuit diagram of a scan driving unit in FIG. 2.

[0049] As Figure 5 shown, taking the a-th scan driving unit as an example, where 3≤a≤n, the scan driving unit GDL includes a pull-up module 131, an output module 132, and a first node Q1. The pull-up module 131 is connected to the scan signal output end Gout(a-2) of the (a-2)-th scan driving unit and the first node Q1, and is used to pull up the first node Q1 to a preset potential under the control of the scan signal output by the (a-2)-th scan driving unit. The output module 132 is connected to the first node Q1 and the scan signal output end Gout(a), and is used to output a scan signal under the control of the first node Q1.

[0050] The scan driving unit GDL also includes a maintenance module 133, a first pull-down module 134, a second pull-down module 135, a reset module 136, and a second node Q2. The maintenance module 133 is connected to the driving voltage end VDD and the second node Q2, and is used to maintain the potential of the second node Q2 at a first potential under the control of the driving voltage.

[0051] The first pull-down module 134 is connected to the first node Q1 and the second node Q2, and controls the second node Q2 to be at the second potential when the first node is at the preset potential.

[0052] The second pull-down module 135 is connected to the second node Q2 and the output module 132, and controls the output module 132 to stop outputting the scan signal, i.e., controls the output module 132 to output the scan signal at low level, when the second node Q2 is at the second potential.

[0053] The reset module 136 is connected to the first node Q1 and the scan signal output end Gout(a+4) of the a+4th scan driving unit, and is used to pull down the potential of the first node Q1 from the preset potential to the low potential under the control of the scan signal output by the a+4th scan driving unit.

[0054] Please refer to Figure 6 , Figure 6 for the equivalent circuit diagram of the scan driving unit. Figure 5

[0055] As shown in Figure 6 , the pull-up module includes a first switch tube T1, the gate of the first switch tube T1 is connected to the scan signal output end Gout(a-2) of the a-2th scan driving unit, the source is connected to the driving voltage end VDD, and the drain is connected to the first node Q1, which is used to conduct under the control of the scan signal output by the a-2th scan driving unit, so as to provide the driving voltage to the first node Q1, and pull up the potential of the first node Q1 to the first preset potential.

[0056] The output module 132 includes a second switch tube T2, a voltage stabilizing capacitor C and a scan signal output end Gout(a), the gate of the first switch tube T1 is connected to the first node Q1, the source is connected to the clock signal end CK, and the drain is connected to the scan signal output end Gout(a), which is used to conduct when the first node Q1 is at the preset potential, so as to receive the clock signal from the clock signal end CK and output the scan signal from the scan signal output end Gout(a) according to the clock signal. The voltage stabilizing capacitor C is connected between the gate and the drain of the second switch tube T2, which is used to maintain the stability of the voltage of the second switch tube T2 when the second switch tube conducts.

[0057] By directly charging the first node Q1 with the driving voltage, the charging speed of the first node Q1 to the preset potential is faster, i.e., the conducting speed of the second switch tube T2 is faster, so as to improve the driving capability.

[0058] ​The maintaining module 133 comprises a third switch tube T3 and a fourth switch tube T4. The gate and the source of the third switch tube T3 are connected to the driving voltage terminal VDD, and the drain is connected to the gate of the fourth switch tube T4, for conducting under the control of the driving voltage and providing the driving voltage to the gate of the fourth switch tube T4.

[0059] The source of the fourth switch tube T4 is connected to the driving voltage terminal VDD, and the drain is connected to the second node Q2, for providing the driving voltage to the second node Q2 to charge the second node Q2, and controlling the second node Q2 to be at the first potential.

[0060] The first pull-down module 134 comprises a fifth switch tube T5. The gate of the fifth switch tube T5 is connected to the first node Q1, the source is connected to the second node Q2, and the drain is connected to the low voltage terminal VSS. When the first node Q1 is at the preset potential, the fifth switch tube T5 is turned on, so as to connect the second node Q2 with the low voltage terminal VSS, that is, to pull down the second node Q2 to the second potential.

[0061] The second pull-down module 135 comprises a sixth switch tube T6. The gate of the sixth switch tube T6 is connected to the second node Q2, the source is connected to the scanning signal output terminal Gout(a), and the drain is connected to the low voltage terminal VSS. When the second node Q2 is at the first potential, the sixth switch tube T6 is turned on, so as to connect the scanning signal output terminal Gout(a) with the low voltage terminal VSS, so that the scanning signal output terminal Gout(a) outputs a low-level signal, that is, the scanning signal output terminal Gout(a) does not output the scanning signal. When the second node Q2 is at the second potential, the sixth switch tube T6 is turned off, so as to disconnect the scanning signal output terminal Gout(a) from the low voltage terminal VSS, for the scanning signal output terminal Gout(a) to output the scanning signal.

[0062] In other words, when the first switch tube T1 does not receive the scanning signal from the scanning signal output terminal Gout(a-2) of the a-2th scanning driving unit, the first switch tube T1 is in the off state, the third switch tube T3 and the fourth switch tube T4 are turned on, so as to maintain the second node Q2 at the first potential, and the second node Q2 controls the sixth switch tube T6 to be turned on, so as to control the scanning signal output terminal Gout(a) to be connected with the low voltage terminal VSS, so that the scanning signal output terminal Gout(a) outputs a low-level signal.

[0063] When the first switch tube T1 receives the scanning signal from the scanning signal output terminal Gout(a-2) of the a-2th scanning driving unit, the first switch tube T1 is turned on, the driving voltage terminal VDD outputs the driving voltage to the first node Q1 to pull up the potential of the first node Q1 to the preset potential, when the first node Q1 is at the preset potential, the fifth switch tube T5 is turned on to pull down the potential of the second node Q2 to the second potential, thereby controlling the sixth switch tube T6 to be turned off, and the second switch tube T2 is turned on, so that the scanning signal output terminal Gout(a) outputs the scanning signal.

[0064] The reset module 136 includes a seventh switch tube T7, the gate of the seventh switch tube T7 is connected to the scanning signal output terminal Gout(a+2) of the a+2th scanning driving unit, the source is connected to the first node Q1, and the drain is connected to the low voltage terminal VSS, for receiving the scanning signal from the a+2th scanning driving unit and being turned on under the control of the scanning signal, to connect the first node Q1 with the low voltage terminal VSS, pull down the first node Q1 to the low potential, and at the same time, the residual charge is conducted to the low voltage terminal VSS, to reset the first node Q1.

[0065] By reducing the number of switch tubes in each module in the scanning driving unit, the space occupation of the scanning driving unit can be effectively reduced, and at the same time, due to the reduction of the number of switch tubes, the power consumption of the scanning driving unit can be effectively reduced, thereby reducing the risk of line heating.

[0066] Please refer to Figure 7 , Figure 7 for Figure 6 the scanning signal output timing diagram.

[0067] As shown in Figure 7 , the scanning driving unit GDL outputs the scanning signal including the continuous first period t1, the second period t2 and the third period t3 when displaying a frame of image, wherein the first period t1 is the pre-charge period of the scanning driving unit GDL, in the first period t1, the scanning signal output terminal Gout(a-2) of the a-2th scanning driving unit outputs the scanning signal, the first switch tube T1 is turned on, the driving voltage terminal VDD outputs the driving voltage to the first node Q1 for pre-charging to the first preset potential VD1, at this time, the second switch tube T2 and the fifth switch tube T5 are turned on, the second node Q2 is connected to the low voltage terminal VSS, the sixth switch tube T6 is turned off, and the scanning signal output terminal Gout(a) is connected to the clock signal terminal CK for receiving the ath clock signal CLK(a), at this time, the ath clock signal CLK(a) is at the first level, i.e. the low level, and the scanning signal output terminal Gout(a) outputs the scanning signal of the first level.

[0068] In the second time period t2, the scan signal output end Gout(a-2) of the a-2th scan driving unit stops outputting the scan signal, the first switch tube T1 is cut off, the first node Q1 is maintained at the first preset potential VD1, the ath clock signal CLK(a) is at the second level, i.e., the high level, and the scan signal output end Gout(a) outputs the scan signal of the second level. At this time, the first node Q1 is raised from the first preset potential VD1 to the second preset potential VD2 due to the coupling of the voltage stabilizing capacitor C.

[0069] In the third time period t3, the scan signal output end Gout(a+2) of the a+2th scan driving unit outputs the scan signal, the seventh switch tube T7 is turned on, the first node Q1 is connected to the low voltage end VSS, the first node Q1 is lowered to the low potential, the second switch tube T2 is cut off, the scan signal output end Gout(a) stops receiving the clock signal from the clock signal end CK, the fifth switch tube T5 is cut off, the second node Q2 is charged to the first potential by the driving voltage output from the driving voltage end VDD to control the sixth switch tube T6 to be turned on, so that the scan signal output end Gout(a) is turned on with the low voltage end VSS for transmitting the residual charge of the scan signal output end Gout(a) to the low voltage end VSS.

[0070] By setting the driving voltage to charge the first node and control the second switch tube to be turned on, the speed of the second switch tube being turned on can be effectively improved to improve the driving capability. Meanwhile, the number of switch tubes in each module is reduced while the functions of the modules are maintained, which can effectively reduce the loss of signals in the transmission process and reduce the space occupation of the scan driving unit, thereby reducing the frame occupation of the scan driving circuit on the display panel and achieving the effect of extremely narrow frame.

[0071] Please refer to Figure 8 , Figure 8 for Figure 6 the simulation diagram of the voltage change of the node of the scan driving unit in the display panel.

[0072] As shown in Figure 8 , when the first node Q1 is raised from the low potential to the first preset potential VD1, the first node Q1 controls the fifth switch tube T5 to be turned on, so that the second node Q2 is lowered from the first potential V1 to the second potential V2. When the first node Q1 is raised from the first preset potential VD1 to the second preset potential VD2, the scan signal output end Gout(a) outputs the high level signal, i.e., the scan signal. Since the number of switch tubes in the scan driving unit GDL is reduced, the potential change of the first node Q1 and the second node Q2 and the opening and closing speed of the switch tubes are faster, the response speed of the scan driving unit GDL is improved, the first node Q1 is charged faster by the direct current power supply, and the second switch tube T2 is turned on more quickly, thereby improving the driving capability of the scan driving unit.

[0073] It is to be understood that the application is not limited to the examples described above, which can be modified or adapted in several ways by those skilled in the art without departing from the scope of the present application, as defined by the appended claims.

Claims

1. A scan driving circuit, comprising n cascaded scan driving units, n being an integer greater than 1, the n scan driving units being used to output corresponding scan signals in sequence, the scan signals being used to control pixel units to receive data signals for image display and display images; characterized in that an a-th scan driving unit, 3≤a≤n, comprising a pull-up module, a first node, a maintaining module, a second node, a reset module and an output module, the pull-up module being connected to an a-2-th scan driving unit, a driving voltage terminal and the first node, the pull-up module being used to receive a driving voltage from the driving voltage terminal and pull up the first node to a preset potential under the control of a scan signal output by the a-2-th scan driving unit, the output module being connected to the first node and a scan signal output terminal, the output module outputting a scan signal from the scan signal output terminal when the first node is at the preset potential; the maintaining module being connected to the same driving voltage terminal and the second node as the pull-up module, the maintaining module being used to receive a driving voltage from the driving voltage terminal and charge the second node, so as to maintain the second node at a first potential, and control the scan signal output terminal to stop outputting the scan signal when the second node is at the first potential; the reset module being connected to an a+2-th scan driving unit, the first node and a low voltage terminal, the reset module being used to conduct charges of the first node to the low voltage terminal when receiving a scan signal output by the a+2-th scan driving unit, so as to reset the first node.

2. The scan driving circuit according to claim 1, wherein the a-th scan driving circuit further comprising a first pull-down module and a second pull-down module, the first pull-down module being connected to the first node and the second node, the first pull-down module being used to control the second node to be at a second potential when the first node is at the preset potential, the second pull-down module being connected to the second node and the output module, the second pull-down module outputting a low level signal to the output module when the second node is at the first potential, the second pull-down module stopping outputting the low level signal to the output module when the second node is at the second potential.

3. The scan driving circuit according to claim 1, wherein the pull-up module comprising a first switch tube, a gate of the first switch tube being connected to the a-2-th scan driving unit, a source of the first switch tube being connected to the driving voltage terminal, a drain of the first switch tube being connected to the first node, the first switch tube being used to conduct under the control of a scan signal output by the a-2-th scan driving unit, so as to control the driving voltage terminal to charge the first node to the preset potential.

4. The scan driving circuit according to claim 1, wherein the output module comprising a second switch tube, a voltage stabilizing capacitor and a scan signal output terminal, a gate of the second switch tube being connected to the first node, a source of the second switch tube being connected to a clock signal terminal, a drain of the second switch tube being connected to the scan signal output terminal, the second switch tube conducting when the first node is at the preset potential, the scan signal output terminal outputting a scan signal according to a clock signal output by the clock signal terminal; The voltage stabilizing capacitor is connected to the gate and the drain of the second switch tube, and is used for maintaining the stability of the second switch tube voltage and the stability of the scan signal output when the second switch tube is turned on.

5. The scan driving circuit according to claim 1, wherein The maintaining module comprises a third switch tube and a fourth switch tube, the gate and the source of the third switch tube are connected to the driving voltage terminal, the drain of the third switch tube is connected to the gate of the fourth switch tube, the source of the fourth switch tube is connected to the driving voltage terminal, and the drain of the fourth switch tube is connected to the second node, and the third switch tube and the fourth switch tube are used for being turned on under the control of the driving voltage to control the second node to be maintained at the first potential.

6. The scan driving circuit according to claim 2, wherein The first pull-down module comprises a fifth switch tube, and the second pull-down module comprises a sixth switch tube, the gate of the fifth switch tube is connected to the first node, the source of the fifth switch tube is connected to the second node, and the drain of the fifth switch tube is connected to a low voltage terminal, when the first node is at the preset potential, the fifth switch tube is turned on to connect the second node with the low voltage terminal, and the second node is pulled down to the second potential; the gate of the sixth switch tube is connected to the second node, the source of the sixth switch tube is connected to the scan signal output terminal, and the drain of the sixth switch tube is connected to the low voltage terminal, when the second node is at the first potential, the sixth switch tube is turned on, the low voltage terminal provides a low level for the scan signal output terminal, when the second node is at the second potential, the sixth switch tube is turned off, and the low voltage terminal stops providing the low level for the scan signal output terminal.

7. The scan driving circuit according to any one of claims 1 to 2, wherein The reset module comprises a seventh switch tube, the gate of the seventh switch tube is connected to the a+2th scan driving unit, the source of the seventh switch tube is connected to the first node, and the drain of the seventh switch tube is connected to the low voltage terminal, and the seventh switch tube is used for being turned on when receiving the scan signal output by the a+2th scan driving unit to conduct the charge of the first node to the low voltage terminal, and is used for resetting the first node.

8. The scan driving circuit according to any one of claims 1 to 2, wherein The ath scan driving unit outputs a scan signal in a frame image display process, and the scan signal comprises a continuous first period, a second period and a third period, in the first period, an a-2th scan driving unit outputs a scan signal, a first switch tube is turned on, a driving voltage terminal outputs a driving voltage to the first node, a second switch tube and a fifth switch tube are turned on, and the scan signal output terminal receives a clock signal from a clock signal terminal; in the second period, the a-2th scan driving unit stops outputting the scan signal, the first switch tube is turned off, the first node is maintained at a first preset potential, the scan signal output terminal outputs the scan signal according to the clock signal, and the first node rises from the first preset potential to a second preset potential; in the third period, the a-2th scan driving unit outputs the scan signal, the first switch tube is turned on, the driving voltage terminal outputs the driving voltage to the first node, the second switch tube and the fifth switch tube are turned off, the first node is pulled down to the second preset potential, and the scan signal output terminal outputs the scan signal according to the clock signal. In the third time period, the a+2th scan driving unit outputs a scan signal, the seventh switch tube is turned on, the first node is connected to a low voltage end, the potential of the first node is lowered, the second switch tube and the fifth switch tube are turned off, the scan signal output end stops receiving a clock signal, the sixth switch tube is turned on, and the scan signal output end is connected to the low voltage end.

9. A display panel, characterized by, The display panel comprises a plurality of pixel units arranged in a matrix in a display area, a data driving circuit arranged in a non-display area, and a scan driving circuit as claimed in any one of claims 1-8, the scan driving circuit being configured to output a scan signal for controlling the pixel units to receive a data signal output by the data driving circuit for image display.

Citation Information

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