Display panel, preparation method thereof and display device

Abstract

This invention provides a display panel, its fabrication method, and a display device. The display panel includes a substrate, a light-emitting functional layer, a privacy anode layer, a shared anode layer, a driving circuit layer, and a light modulation film layer. Multiple privacy anodes in the privacy anode layer correspond one-to-one with multiple privacy sub-pixels in the light-emitting functional layer; multiple shared anodes in the privacy anode layer correspond one-to-one with multiple shared sub-pixels in the light-emitting functional layer; the privacy driving circuit of the driving circuit layer is electrically connected to the privacy anodes, and the shared driving circuit of the driving circuit layer is electrically connected to the shared anodes; the light modulation film layer is located on the side of the light-emitting functional layer away from the substrate, and the orthographic projection of the light modulation film layer on the substrate covers the orthographic projections of the privacy sub-pixels and the shared sub-pixels on the substrate. The display panel of this application embodiment has both a privacy mode and a sharing mode, and can meet the display requirements for privacy or non-privacy modes without the need for an external privacy film, making it convenient to use.

Description

Technical Field

[0001] This invention relates to the field of display technology, and in particular to a display panel, its manufacturing method, and a display device. Background Technology

[0002] With the wider application of display devices, the privacy of display devices is gradually gaining importance. Related technologies typically use external privacy screen protectors. When screen privacy is needed, the privacy screen protector must be manually attached to the screen; when privacy is not needed, it must be manually removed, which is inconvenient. Summary of the Invention

[0003] The purpose of this invention is to provide a display panel and its manufacturing method, as well as a display device, which can meet both privacy-protected and non-privacy-protected display requirements without the need for an external privacy film, and is convenient to use. The specific technical solution is as follows:

[0004] An embodiment of the first aspect of this application provides a display panel, which includes a substrate, a light-emitting functional layer, a privacy-protecting anode layer, a shared anode layer, a driving circuit layer, and a light modulation film layer. The light-emitting functional layer is disposed on one side of the substrate; the light-emitting functional layer includes multiple pixel units, each pixel unit including a privacy-protecting sub-pixel and a shared sub-pixel; the privacy-protecting anode layer is located between the substrate and the light-emitting functional layer; the privacy-protecting anode layer includes multiple privacy-protecting anodes spaced apart; the multiple privacy-protecting anodes are arranged one-to-one with the multiple privacy-protecting sub-pixels; the shared anode layer is located between the substrate and the light-emitting functional layer; the shared anode layer includes multiple shared anodes spaced apart; the multiple shared anodes are arranged one-to-one with the multiple shared sub-pixels; the driving circuit layer is located between the substrate and the privacy-protecting anode layer and the shared anode layer; the driving circuit layer includes a privacy-protecting driving circuit and a shared driving circuit; the privacy-protecting driving circuit is electrically connected to the privacy-protecting anode, and the shared driving circuit is electrically connected to the shared anode; the light modulation film layer is located on the side of the light-emitting functional layer away from the substrate; the orthographic projection of the light modulation film layer on the substrate covers the orthographic projections of the privacy-protecting sub-pixels and the shared sub-pixels on the substrate.

[0005] In some embodiments of this application, the privacy anode and the shared anode are spaced apart by their orthogonal projections onto the substrate;

[0006] The privacy-protecting anode layer and the shared anode layer are disposed on the same layer, or the shared anode layer is located on the side of the privacy-protecting anode layer away from the substrate.

[0007] In some embodiments of this application, the privacy-protecting anode layer and the shared anode layer are disposed on the same layer; the display panel further includes: a first pixel defining layer;

[0008] The first pixel limiting layer is disposed between the privacy anode layer and the shared anode layer and the light modulation film layer;

[0009] The first pixel defining layer has a plurality of pixel openings; each pixel opening is divided into a privacy pixel opening and a shared pixel opening by a first partition structure.

[0010] The privacy pixel opening exposes the privacy anode portion, and the privacy sub-pixel is disposed within the privacy pixel opening; the shared pixel opening exposes the shared anode portion, and the shared sub-pixel is disposed within the shared pixel opening.

[0011] In some embodiments of this application, the first partition structure includes: a first passivation layer, a first barrier layer, and a second passivation layer sequentially stacked along a direction away from the substrate;

[0012] The first barrier layer and the first pixel limiting layer are an integral structure;

[0013] The first barrier layer is recessed inward relative to the first passivation layer and the second passivation layer in the circumferential direction to form an undercut structure; the undercut structure causes the light-emitting functional layer to be disconnected at the first barrier structure.

[0014] In some embodiments of this application, the privacy-protecting anode layer and the shared anode layer are disposed on the same layer; the display panel further includes: a second pixel defining layer and a third pixel defining layer stacked together;

[0015] The second pixel defining layer is disposed between the privacy anode layer and the shared anode layer and the light modulation film layer; the third pixel defining layer is disposed between the second pixel defining layer and the light modulation film layer;

[0016] Multiple pixel openings penetrating the second pixel defining layer and the third pixel defining layer are formed thereon; each pixel opening is divided into a privacy pixel opening and a shared pixel opening by a second partition structure;

[0017] The privacy pixel opening penetrates the second pixel limiting layer and the third pixel limiting layer, exposing the privacy anode portion, and the privacy sub-pixel is disposed within the privacy pixel opening; the shared pixel opening penetrates the second pixel limiting layer and the third pixel limiting layer, exposing the shared anode portion, and the shared sub-pixel is disposed within the shared pixel opening.

[0018] In some embodiments of this application, the second barrier structure includes: a second barrier layer, a third passivation layer, and a third barrier layer disposed sequentially along a direction away from the substrate;

[0019] The second barrier layer and the second pixel defining layer are integral structures; the third barrier layer and the third pixel defining layer are integral structures.

[0020] The second barrier layer and the third barrier layer are recessed inward relative to the third passivation layer in the circumferential direction to form an undercut structure; the undercut structure causes the light-emitting functional layer to be disconnected at the second barrier structure.

[0021] In some embodiments of this application, the shared anode layer is located on the side of the privacy anode layer away from the substrate; the display panel further includes: a fourth pixel defining layer and a fifth pixel defining layer stacked together;

[0022] The fourth pixel defining layer is disposed between the privacy anode layer and the light modulation film layer; the shared anode layer is located between the fourth pixel defining layer and the light modulation film layer; the fifth pixel defining layer is disposed between the shared anode layer and the light modulation film layer;

[0023] Multiple pixel openings penetrating the fourth pixel defining layer and the fifth pixel defining layer are formed thereon; each pixel opening is divided into a privacy pixel opening and a shared pixel opening by a third partition structure;

[0024] The privacy pixel opening penetrates the fourth pixel limiting layer and the fifth pixel limiting layer, exposing the privacy anode portion, and the privacy sub-pixel is disposed within the privacy pixel opening; the shared pixel opening penetrates the fifth pixel limiting layer, exposing the shared anode portion, and the shared sub-pixel is disposed within the shared pixel opening.

[0025] In some embodiments of this application, the third barrier structure includes: a fourth barrier layer, a fourth passivation layer, and a fifth barrier layer disposed sequentially along a direction away from the substrate;

[0026] The fourth barrier layer and the fourth pixel defining layer are integral structures; the fifth barrier layer and the fifth pixel defining layer are integral structures.

[0027] The fourth and fifth barrier layers are recessed inward relative to the fourth passivation layer on the side facing the privacy pixel opening, forming an undercut structure; the undercut structure causes the light-emitting functional layer to be disconnected at the third partition structure.

[0028] In some embodiments of this application, the privacy pixel opening and the shared pixel opening have the same shape and width, or the width of the privacy pixel opening is smaller than the width of the shared pixel opening.

[0029] In some embodiments of this application, the light modulation film layer includes: a first black matrix, a first organic layer, and a second black matrix sequentially disposed along a direction away from the substrate;

[0030] The first black matrix includes multiple first privacy openings and multiple first shared openings; the second black matrix includes multiple second privacy openings and multiple second shared openings.

[0031] The plurality of first privacy openings and the plurality of second privacy openings are each configured to correspond one-to-one with the plurality of privacy sub-pixels; the orthogonal projections of the first privacy openings and the second privacy openings on the substrate cover the orthogonal projections of the privacy pixel openings on the substrate.

[0032] The plurality of first shared openings and the plurality of second shared openings are each configured to correspond one-to-one with the plurality of shared sub-pixels; the orthogonal projections of the first shared openings and the second shared openings on the substrate cover the orthogonal projections of the shared pixel openings on the substrate.

[0033] The width of the first privacy opening is smaller than the width of the first shared opening; the width of the second privacy opening is smaller than the width of the second shared opening.

[0034] In some embodiments of this application, the orthographic projection of the first privacy opening on the substrate coincides with the orthographic projection of the second privacy opening on the substrate; or, the orthographic projection of the first privacy opening on the substrate covers the orthographic projection of the second privacy opening on the substrate.

[0035] The orthographic projection of the first shared opening on the substrate coincides with the orthographic projection of the second shared opening on the substrate; or, the orthographic projection of the second shared opening on the substrate covers the orthographic projection of the first shared opening on the substrate.

[0036] In some embodiments of this application, the light modulation film layer further includes: a plurality of lens structures and a second organic layer;

[0037] The plurality of lens structures are configured in a one-to-one correspondence with the plurality of second privacy openings; the plurality of lens structures are disposed on the side of the second black matrix away from the substrate, and are at least partially located within the second privacy openings; the orthogonal projection of the lens structure on the substrate covers the orthogonal projection of the corresponding second privacy opening on the substrate;

[0038] The second organic layer is located on the side of the plurality of lens structures away from the substrate, and the second organic layer covers the lens structures and the second black matrix;

[0039] The refractive index of the lens structure is greater than that of the second organic layer.

[0040] In some embodiments of this application, the privacy sub-pixels and shared sub-pixels of the plurality of pixel units are arranged in the same way;

[0041] The number of privacy sub-pixels in each pixel unit is one or more.

[0042] The second aspect of this application provides a method for manufacturing a display panel, used to manufacture the display panel of any embodiment of the first aspect, comprising:

[0043] Provide substrate;

[0044] A driving circuit layer is fabricated on a substrate; the driving circuit layer includes a privacy driving circuit and a shared driving circuit.

[0045] A privacy-protecting anode layer and a shared anode layer are fabricated on the driving circuit layer; the privacy-protecting anode layer includes a plurality of privacy-protecting anodes spaced apart; the shared anode layer includes a plurality of shared anodes spaced apart.

[0046] A light-emitting functional layer is fabricated on a privacy anode layer and a shared anode layer; the light-emitting functional layer includes multiple pixel units, each pixel unit including a privacy sub-pixel and a shared sub-pixel; the multiple privacy sub-pixels are configured one-to-one with the multiple privacy anodes, and the multiple shared sub-pixels are configured one-to-one with the multiple shared anodes;

[0047] A light modulation film layer is prepared on the light-emitting functional layer; the orthographic projection of the light modulation film layer on the substrate covers the orthographic projection of the privacy-protecting sub-pixel and the shared sub-pixel on the substrate.

[0048] An embodiment of the third aspect of this application provides a display device including a display panel according to any embodiment of the first aspect.

[0049] Beneficial effects of the embodiments of the present invention:

[0050] In this embodiment, the privacy driving circuit of the display panel is electrically connected to the privacy anode, and multiple privacy anodes are configured one-to-one with multiple privacy sub-pixels. A shared driving circuit is electrically connected to the shared anode, and multiple shared anodes are configured one-to-one with multiple shared sub-pixels, thereby enabling individual driving of the privacy sub-pixels and shared sub-pixels. The orthographic projection of the light modulation film layer on the substrate covers the orthographic projections of the privacy sub-pixels and shared sub-pixels on the substrate. The light modulation film layer modulates the light emitted by the privacy sub-pixels and shared sub-pixels. The light modulation film layer is configured such that the maximum value of the emission angle of the light emitted by the privacy sub-pixels from the display panel is less than the maximum value of the light emitted by the shared sub-pixels. The maximum value of the emission angle of the light emitted from the display panel is the angle between the emitted light and the direction perpendicular to the substrate. The light modulation film layer, in conjunction with the separate driving of the privacy sub-pixel and the shared sub-pixel, allows the emission angle of the light emitted from the display panel to be controlled. When only the privacy sub-pixel is lit, the display panel is in privacy mode. When only the shared sub-pixel is lit or both the privacy sub-pixel and the shared sub-pixel are lit, the display panel is in sharing mode and does not have privacy function. The display panel of this embodiment has privacy mode and sharing mode by itself, and can meet the display needs of privacy or non-privacy without the need for an external privacy film, which is convenient to use.

[0051] The display panel prepared by the method of preparing the display panel according to the embodiments of this application has a privacy mode and a sharing mode. It can meet the display needs of privacy or non-privacy without the need for an external privacy film, and is convenient to use.

[0052] The display device of this application embodiment includes a display panel according to any embodiment of the first aspect. The light modulation film layer, in conjunction with the separate driving of the privacy sub-pixel and the shared sub-pixel, allows the emission angle of the light emitted from the display panel to be controlled. When only the privacy sub-pixel is lit, the display panel is in privacy mode. When only the shared sub-pixel is lit or both the privacy sub-pixel and the shared sub-pixel are lit, the shared sub-pixel supplements the light emission angle, and the display panel is in shared mode, without privacy function. It can meet the display needs of privacy or non-privacy without the need for an external privacy film, and is convenient to use.

[0053] Of course, implementing any product or method of the present invention does not necessarily require achieving all of the advantages described above at the same time. Attached Figure Description

[0054] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other embodiments can be obtained based on these drawings.

[0055] Figure 1 This is a schematic diagram of the structure of the display panel according to the first embodiment of this application;

[0056] Figure 2 This is a schematic diagram of the light emission of the display panel in privacy mode according to the first embodiment of this application;

[0057] Figure 3 This is a schematic diagram of light emission in the display panel sharing mode according to the first embodiment of this application;

[0058] Figure 4 This is a layout diagram of the pixel units in the embodiments of this application (the pixel units are rectangular);

[0059] Figure 5 This is a layout diagram of the pixel units in the embodiments of this application (the pixel units are hexagonal);

[0060] Figure 6 This is a diagram showing the arrangement of pixel units and partition structures in the embodiments of this application;

[0061] Figure 7 This is a partially enlarged schematic diagram of the light-emitting functional layer in the embodiments of this application;

[0062] Figure 8 This is a partial view of the display panel of the first embodiment of this application (showing two pixel units);

[0063] Figure 9 This is a schematic diagram of the structure of the first pixel defining layer in the first embodiment of this application;

[0064] Figure 10 This is a schematic diagram of the structure of the first pixel limiting layer and the first partition structure in the second embodiment of this application;

[0065] Figure 11 This is a schematic diagram of the structure of a display panel according to a second embodiment of this application (driving circuit layer not shown);

[0066] Figure 12 This is a schematic diagram of the light emission of the display panel in privacy mode according to the second embodiment of this application;

[0067] Figure 13 This is a schematic diagram of light emission in the display panel sharing mode according to the second embodiment of this application;

[0068] Figure 14 This is a schematic diagram of the structure of a display panel according to a second embodiment of this application (showing the driving circuit layer);

[0069] Figure 15 This is a schematic diagram of the display panel structure according to the third embodiment of this application;

[0070] Figure 16This is a schematic diagram of the display panel structure according to the fourth embodiment of this application;

[0071] Figure 17 This is a flowchart illustrating the method for manufacturing a display panel according to an embodiment of this application;

[0072] Figure 18 This is a schematic diagram of the structure after the privacy-protecting anode layer and the shared anode layer are fabricated using the display panel fabrication method of the embodiments of this application;

[0073] Figure 19a The first part of the process diagram for preparing the display panel of the second embodiment of this application;

[0074] Figure 19b This is the second part of a process diagram illustrating the fabrication process of the display panel according to the second embodiment of this application;

[0075] Figure 20 A process diagram illustrating the fabrication of the display panel according to the third embodiment of this application;

[0076] Figure 21 This is a process diagram illustrating the fabrication of the display panel according to the fourth embodiment of this application.

[0077] Explanation of reference numerals in the drawings: Substrate 100; Light-emitting functional layer 200; First hole transport layer 201; First light-emitting layer 202; First electron transport layer 203; Charge generation layer 204; Second hole transport layer 205; Second light-emitting layer 206; Second electron transport layer 207; Pixel unit 210; Privacy-proof sub-pixel 211; Shared sub-pixel 212; Red pixel unit 213; Green pixel unit 214; Blue pixel unit 215; Privacy-proof anode layer 310; Privacy-proof anode 311; Shared anode Layer 320; Shared anode 321; Drive circuit layer 400; Privacy drive circuit 410; Privacy thin film transistor 411; Shared drive circuit 420; Shared thin film transistor 421; First electrode 401; Second electrode 402; Gate 403; Active layer 404; Buffer layer 430; Gate insulating layer 440; Interlayer insulating layer 450; Planarization layer 460; Optical modulation film layer 500; First black matrix 510; First privacy opening W11; First shared opening W12; Second black matrix 520; Second privacy opening W21; Second shared opening W22; Lens structure 530; First organic layer 540; Second organic layer 550; First pixel limiting layer 610; Second pixel limiting layer 620; Third pixel limiting layer 630; Fourth pixel limiting layer 640; Fifth pixel limiting layer 650; First organic film layer 601; Second organic film layer 602; Third organic film layer 603; Fourth organic film layer 604; First partition structure 710; First passivation layer 711; First barrier layer 712; Second passivation layer 713; second isolation structure 720; second barrier layer 721; third passivation layer 722; third barrier layer 723; third isolation structure 730; fourth barrier layer 731; fourth passivation layer 732; fifth barrier layer 733; cathode layer 810; encapsulation layer 820; color filter layer 840; color filter unit 841; touch layer 850; polarizer 860; third organic layer 870; cover plate 880; photoresist 910; pixel aperture P; privacy pixel aperture P1; shared pixel aperture P2. Detailed Implementation

[0078] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art based on this application are within the scope of protection of the present invention.

[0079] In related technologies, external privacy screen protectors are commonly used. When screen privacy needs to be protected, such as when processing confidential company information or entering personal data on a mobile phone, the privacy screen protector can be manually attached to the screen. When screen privacy does not need to be protected, the privacy screen protector can be manually removed, which is inconvenient. In order to solve the above technical problems, this application provides a display panel and its manufacturing method, as well as a display device.

[0080] like Figure 1 As shown, Figure 1 This is a schematic diagram of the structure of a display panel according to a first embodiment of this application. The first aspect of this application proposes a display panel including a substrate 100, a light-emitting functional layer 200, a privacy anode layer 310, a shared anode layer 320, a driving circuit layer 400, and a light modulation film layer 500. Optionally, the light-emitting functional layer 200 is disposed on one side of the substrate 100; the light-emitting functional layer 200 includes a plurality of pixel units 210, each pixel unit 210 including a privacy sub-pixel 211 and a shared sub-pixel 212; the privacy anode layer 310 is located between the substrate 100 and the light-emitting functional layer 200; the privacy anode layer 310 includes a plurality of privacy anodes 311 (AND1) spaced apart; the plurality of privacy anodes 311 are correspondingly arranged one-to-one with the plurality of privacy sub-pixels 211; the shared anode layer 320 is located between the substrate 100 and the light-emitting functional layer 200; the shared anode layer 320 includes at least one shared anode 321 (AND2), and may also include a plurality of shared anodes 321 (AND2) spaced apart; the plurality of shared... Anode 321 is configured to correspond one-to-one with multiple shared sub-pixels 212; driving circuit layer 400 is located between substrate 100 and privacy anode layer 310 and shared anode layer 320; driving circuit layer 400 includes privacy driving circuit 410 and shared driving circuit 420; privacy driving circuit 410 is electrically connected to privacy anode 311, and shared driving circuit 420 is electrically connected to shared anode 321, so as to drive privacy sub-pixels 211 and shared sub-pixels 212 respectively based on privacy or sharing requirements; light modulation film layer 500 is located on the side of light emitting functional layer 200 away from substrate 100, and the orthographic projection of light modulation film layer 500 on substrate 100 covers the orthographic projection of privacy sub-pixels 211 and shared sub-pixels 212 on substrate 100.

[0081] In this embodiment, the privacy driving circuit 410 of the display panel is electrically connected to the privacy anode 311. Multiple privacy anodes 311 are configured one-to-one with multiple privacy sub-pixels 211. The shared driving circuit 420 is electrically connected to the shared anode 321. Multiple shared anodes 321 are configured one-to-one with multiple shared sub-pixels 212, thereby enabling individual driving of the privacy sub-pixels 211 and the shared sub-pixels 212. The orthographic projection of the light modulation film layer 500 on the substrate 100 covers the orthographic projections of the privacy sub-pixels 211 and the shared sub-pixels 212 on the substrate 100. The light modulation film layer 500 modulates the light emitted by the privacy sub-pixel 211 and the shared sub-pixel 212. The maximum value of the emission angle of the light emitted from the privacy sub-pixel 211 from the display panel is less than the maximum value of the emission angle of the light emitted from the shared sub-pixel 212 from the display panel. The emission angle is the angle between the emitted light and the direction perpendicular to the substrate 100. The light modulation film layer 500, in conjunction with the individual driving of the privacy sub-pixel 211 and the shared sub-pixel 212, allows the emission angle of the light emitted from the display panel to be controlled. Figure 2 As shown, Figure 2 This is a schematic diagram of the display panel in privacy mode according to the first embodiment of this application. When only the privacy sub-pixel 211 is illuminated, the display panel is in privacy mode; as shown... Figure 3 As shown, Figure 3 This is a schematic diagram of the light emission in the shared mode of the display panel according to the first embodiment of this application. When only the shared sub-pixel 212 is lit or when both the privacy sub-pixel 211 and the shared sub-pixel 212 are lit, the shared sub-pixel 212 supplements the light emission angle, and the display panel is in the shared mode and does not have a privacy function. The display panel of this embodiment has both a privacy mode and a shared mode, and does not require an external privacy film to meet the display needs of privacy or non-privacy, making it convenient to use.

[0082] In some embodiments of this application, the light modulation film layer 500 can be used to make the angle of light emitted from the privacy pixel 211 exiting the display panel less than or equal to 30 degrees. In other embodiments of this application, the angle of light emitted from the privacy pixel 211 exiting the display panel can also be other values, which can be set according to actual needs. This application does not limit this.

[0083] Specifically, the substrate 100 can be made of glass or a flexible material, such as polyimide (PI), polyethylene naphthalate (PEN), or polyethylene terephthalate (PET). The substrate 100 can be a single-layer or multi-layer structure. If it is a multi-layer structure, a buffer layer can be added between the layers. The buffer layer is an inorganic thin film, such as SiN. x Layer, SiO xLayer or its composite layer.

[0084] In some embodiments of this application, such as Figures 1 to 3 As shown, the privacy anode 311 and the shared anode 321 are spaced apart on the substrate 100 by their orthogonal projections; this can prevent abnormal light emission of the pixel unit 210 caused by mutual interference between the privacy anode 311 and the shared anode 321.

[0085] In the first embodiment of this application, as Figures 1 to 3 As shown, the privacy anode layer 310 and the shared anode layer 320 are disposed in the same layer; the display panel also includes a first pixel limiting layer 610 (PDL); the first pixel limiting layer 610 is disposed between the privacy anode layer 310 and the shared anode layer 320 and the light modulation film layer 500; the first pixel limiting layer 610 forms a plurality of pixel openings P; each pixel opening P is divided into a privacy pixel opening P1 and a shared pixel opening P2; the privacy pixel opening P1 exposes part of the privacy anode 311, and a privacy sub-pixel 211 is disposed within the privacy pixel opening P1; the shared pixel opening P2 exposes part of the shared anode 321, and a shared sub-pixel 212 is disposed within the shared pixel opening P2. Specifically, the privacy pixel opening P1 and the shared pixel opening P2 can be formed in a single patterning process when the first pixel limiting layer 610 is fabricated, that is, the pixel openings P are divided by the structure of the first pixel limiting layer 610 itself; the privacy anode layer 310 and the shared anode layer 320 can be formed in a single patterning process without the need for additional process steps, and the fabrication process is simple.

[0086] In the first embodiment of this application, such as Figures 1 to 3 As shown, the privacy pixel opening P1 and the shared pixel opening P2 have the same shape and width. In some other embodiments of this application, the width of the privacy pixel opening P1 is smaller than the width of the shared pixel opening P2. This arrangement ensures that the light emitted by the privacy sub-pixel 211 is less than or equal to the light emitted by the shared sub-pixel 212, which is beneficial for realizing the privacy function of the display panel; it is understood that the width refers to the... Figures 1 to 3 The dimension in the direction shown by the cross section.

[0087] In the first embodiment of this application, as Figures 1 to 3As shown, the privacy driving circuit 410 includes multiple privacy thin-film transistors 411, which are connected one-to-one with multiple privacy anodes 311; the shared driving circuit 420 includes multiple shared thin-film transistors 421, which are connected one-to-one with multiple shared anodes 321; both the privacy thin-film transistors 411 and the shared thin-film transistors 421 include a first electrode 401, a second electrode 402, a gate 403, and an active layer 404 (p-si); wherein, the first electrode 401 can be the source (S), and the second electrode 402 corresponds to the drain (D), or the first electrode 401 is the drain, and the second electrode 402 corresponds to the source. The driving circuit layer 400 further includes a buffer layer 430, a gate insulating layer 440 (GI), an interlayer insulating layer 450 (ILD), and a planarization layer 460 (PLN) arranged sequentially along a direction away from the substrate 100; the gate 403 is located between the gate insulating layer 440 and the interlayer insulating layer 450; the active layer 404 is located between the buffer layer 430 and the gate insulating layer 440; the first electrode 401 and the second electrode 402 are arranged on the same layer and spaced apart, and are located between the planarization layer 460 and the interlayer insulating layer 450; vias are formed on the interlayer insulating layer 450 and the gate insulating layer 440, and the first electrode 401 and the second electrode 402 are respectively connected to the active layer 404 through different vias, thereby realizing the individual control of the privacy sub-pixel 211 and the shared sub-pixel 212.

[0088] In the first embodiment of this application, as Figures 1 to 3 As shown, the light modulation film layer 500 includes a first black matrix 510 (BM), a first organic layer 540 (IJP), and a second black matrix 520 sequentially disposed along a direction away from the substrate 100; the first black matrix 510 includes a plurality of first privacy openings W11 and a plurality of first shared openings W12; the second black matrix 520 includes a plurality of second privacy openings W21 and a plurality of second shared openings W22; the plurality of first privacy openings W11 and the plurality of second privacy openings W21 are each corresponding to a plurality of privacy sub-pixels 211; the first privacy openings W11 and the second privacy... The orthographic projection of the opening W21 on the substrate 100 covers the orthographic projection of the privacy pixel opening P1 on the substrate 100; the plurality of first shared openings W12 and the plurality of second shared openings W22 are each corresponding to the plurality of shared sub-pixels 212; the orthographic projections of the first shared openings W12 and the second shared openings W22 on the substrate 100 cover the orthographic projection of the shared pixel opening P2 on the substrate 100; the width of the first privacy opening W11 is smaller than the width of the first shared opening W12; the width of the second privacy opening W21 is smaller than the width of the second shared opening W22.

[0089] Since the first black matrix 510 and the second black matrix 520 have light-absorbing functions and block light, by reasonably setting the size of the first privacy opening W11 and the second privacy opening W21, the angle of light passing through the first black matrix 510 and the second black matrix 520 can be controlled. This allows smaller-angle light emitted from the privacy sub-pixel 211 to exit the display panel through the first privacy opening W11 and the second privacy opening W21, while larger-angle light is absorbed by the first black matrix 510 or the second black matrix 520; the first privacy opening W11... The width of the first shared opening W12 is smaller than the width of the second privacy opening W21, and the width of the second privacy opening W22 is smaller than the width of the second shared opening W22. This makes the maximum value of the angle of light emitted through the first shared opening W12 and the second shared opening W22 greater than the maximum value of the angle of light emitted through the first privacy opening W11 and the second privacy opening W21. This makes the maximum value of the emission angle of light emitted from the privacy sub-pixel 211 from the display panel less than the maximum value of the emission angle of light emitted from the shared sub-pixel 212 from the display panel.

[0090] Optionally, either the first black matrix 510 or the second black matrix 520 can be set, or both can be set. When both are set, they can better absorb light from a wide angle, which helps to improve the privacy protection effect.

[0091] In the first embodiment of this application, as Figures 1 to 3 As shown, the orthographic projection of the first privacy opening W11 on the substrate 100 coincides with the orthographic projection of the second privacy opening W21 on the substrate 100, thus achieving a better privacy protection effect. The orthographic projection of the second shared opening W22 on the substrate 100 covers the orthographic projection of the first shared opening W12 on the substrate 100, ensuring that the presence of the second black matrix 520 does not affect the light emission of the shared sub-pixel 212. In other embodiments of this application, the orthographic projection of the first privacy opening W11 on the substrate 100 may cover the orthographic projection of the second privacy opening W21 on the substrate 100, and the orthographic projections of the first shared opening W12 and the second shared opening W22 on the substrate 100 may coincide. This can be set according to actual needs, and this application does not limit this. For example, the projected area of ​​the first shared opening W12 on the substrate 100 is smaller than the projected area of ​​the second shared opening W22 on the substrate 100, and the projected area of ​​the first privacy opening W11 on the substrate 100 can be equal to the projected area of ​​the second privacy opening W21 on the substrate 100.

[0092] In the first embodiment of this application, as Figures 1 to 3As shown, the display panel also includes an encapsulation layer 820 (TFE) and a touch layer 850; the encapsulation layer 820 is located between the light-emitting functional layer 200 and the first black matrix 510; the touch layer 850 is located between the encapsulation layer 820 and the first black matrix 510; the light modulation film layer 500 also includes a color filter layer 840 (CF), the color filter layer 840 includes a plurality of color filter units 841, and the plurality of color filter units 841 are disposed one-to-one in the second privacy opening W21 or the second shared opening W22.

[0093] In some embodiments, such as Figure 1 and 2 As shown, the thickness of the first organic layer 540 (IJP) is greater than the thickness of the touch layer 850 and the encapsulation layer 820. This helps to increase the optical path of light after passing through the first black matrix 510 in the first organic layer 540 (IJP), which is then weakened or absorbed in the privacy sub-pixel 211, thus achieving a better privacy protection effect.

[0094] In the first embodiment of this application, as Figures 4 to 6 As shown, Figure 4 This is a layout diagram of the pixel units 210 in the embodiments of this application (the pixel units 210 are rectangular). Figure 4 In the embodiment shown, multiple privacy-protecting sub-pixels 211 are arranged in several rows, and multiple shared sub-pixels 212 are arranged in several rows. The multiple rows of privacy-protecting sub-pixels 211 and multiple rows of shared sub-pixels 212 are alternately arranged in a matrix distribution. Figure 5 This is a layout diagram of the pixel units 210 in the embodiments of this application (the pixel units 210 are hexagonal). Figure 5 In the embodiment shown, multiple privacy-protecting sub-pixels 211 and multiple shared sub-pixels 212 are alternately arranged in both row and column directions; Figure 6 This diagram illustrates the arrangement of pixel units 210 and partition structures in this embodiment. Multiple pixel units 210 may include red pixel units 213, green pixel units 214, and blue pixel units 215, arranged in a specific order. It is understood that the privacy-protecting sub-pixel 211 and shared sub-pixel 212 in this embodiment can be formed by dividing a single pixel unit 210, for example, dividing a pixel unit 210 into two or four parts; correspondingly, such as... Figure 3 and Figure 4 As shown, the privacy anode 311 and shared anode 321 corresponding to the same pixel unit 210 can also be formed by dividing one anode corresponding to one pixel unit 210. The privacy anode 311 and shared anode 321 of the same pixel unit 210 can be referred to as the same color cut anode.

[0095] In some embodiments of this application, the arrangement of the privacy sub-pixels 211 and shared sub-pixels 212 of the multiple pixel units 210 can be the same, which is beneficial for processing and design; such as Figure 4 and Figure 5 As shown, the privacy sub-pixels 211 of the multiple pixel units 210 are all located on the upper side, and the shared sub-pixels 212 are all located on the lower side.

[0096] In other embodiments of this application, the arrangement of the privacy sub-pixels 211 and shared sub-pixels 212 of the plurality of pixel units 210 can be different; for example, as Figure 6 As shown, the boundary line between the privacy sub-pixel 211 and the shared sub-pixel 212 relative to pixel unit 210 (corresponding to Figure 6 In the M region, the two sides of the boundary line are the first side and the second side, respectively. The privacy pixel 211 of the red pixel unit 213 is formed on the first side of the boundary line, and the privacy pixel 211 of the green pixel unit 214 and the blue pixel unit 215 is formed on the second side of the boundary line; as shown Figure 6 From the view shown, the privacy sub-pixel 211 of the red pixel unit 213 is located on the upper side, and the shared sub-pixel 212 is located on the lower side; the privacy sub-pixel 211 of the green pixel unit 214 and the blue pixel unit 215 is located on the lower side, and the shared sub-pixel 212 is located on the upper side.

[0097] like Figure 5 and Figure 6 As shown, each pixel unit 210 has one or more privacy sub-pixels 211. Figure 5 As shown, when a pixel unit 210 is divided into a privacy sub-pixel 211 and a shared sub-pixel 212, the display panel has both a privacy mode and a shared mode, fulfilling the display requirements for both privacy and non-privacy modes. When higher privacy requirements are needed, the individual privacy sub-pixel 211 can be further divided into multiple privacy sub-pixels 211, making the area of ​​each individual privacy sub-pixel 211 smaller, thereby reducing the viewing angle of the light emitted. Figure 6 As shown, the number of privacy sub-pixels 211 in at least one red pixel unit 213 and the same green pixel unit 214 is less than the number of privacy sub-pixels 211 in the same blue pixel unit 215; for example, the number of privacy sub-pixels 211 in the same red pixel unit 213 and the same green pixel unit 214 is two, and the number of privacy sub-pixels 211 in the same blue pixel unit 215 is four, thereby achieving a better privacy protection effect.

[0098] In some embodiments, such as Figure 5 and Figure 6As shown, the spacing between shared sub-pixels 212 is smaller than the spacing between privacy sub-pixels 211. For example, the spacing between shared sub-pixels 212 of green pixel unit 214 and shared sub-pixels 212 of red pixel unit 213 is smaller than the spacing between privacy sub-pixels 211 of green pixel unit 214 and privacy sub-pixels 211 of red pixel unit 213. Similarly, the spacing between shared sub-pixels 212 of green pixel unit 214 and shared sub-pixels 212 of red pixel unit 213 is smaller than the spacing between privacy sub-pixels 211 of the same red pixel unit 213. This design helps control the light-emitting area of ​​the privacy sub-pixels 211, thereby controlling the light-emitting angle of the privacy sub-pixels 211 and achieving a better privacy protection effect.

[0099] In some embodiments, such as Figure 5 and Figure 6 As shown, the area ratio of each color in the shared sub-pixel 212 is less than or equal to the area ratio of each color in the privacy sub-pixel 211. For example, the area of ​​the shared sub-pixel 212 of the green pixel unit 214: the area of ​​the shared sub-pixel 212 of the red pixel unit 213: the area of ​​the shared sub-pixel 212 of the blue pixel unit 215 = 1:1:3, and the area of ​​the privacy sub-pixel 211 of the green pixel unit 214: the area of ​​the privacy sub-pixel 211 of the red pixel unit 213: the area of ​​the privacy sub-pixel 211 of the blue pixel unit 215 = 1:1:3. This helps to ensure consistent light mixing effects in both privacy and shared states.

[0100] Because the pixel unit 210 is divided, the light-emitting functional layer 200 and anode corresponding to each pixel unit 210 are also divided, realizing two display effects: privacy mode and sharing mode of the display panel; however, this will cause the light-emitting area to be reduced in either mode, resulting in a decrease in the peak brightness in privacy mode. In order to improve the brightness, the light-emitting functional layer 200 can adopt a stacked device tandem device, and the light-emitting devices of the tandem device are connected through a charge-generating layer (CGL). Specifically, as shown in... Figure 7 As shown, Figure 7This is a partially enlarged schematic diagram of the light-emitting functional layer 200 in the embodiments of this application. The light-emitting functional layer 200 may include a first hole transport layer 201 (HTL), a first light-emitting layer 202 (EL), a first electron transport layer 203 (ETL), a charge generation layer 204, a second hole transport layer 205, a second light-emitting layer 206, and a second electron transport layer 207, which are sequentially stacked along the direction away from the substrate 100. The light-emitting functional layer 200 is located between the privacy anode 311 or the shared anode 321 and the cathode layer 810 to drive the light-emitting functional layer 200 to emit light.

[0101] like Figure 6 As shown, to further improve the privacy protection effect, a partition structure (not shown in the figure) that disconnects the light-emitting functional layer 200 can be provided between the privacy sub-pixel 211 and the shared sub-pixel 212 of the same pixel unit 210, that is, in Figure 6 The region M, defined by the three dashed boxes, is equipped with a partition structure. The orthographic projection of the partition structure onto the substrate 100 overlaps with or spaced out the orthographic projections of the privacy sub-pixel 211 and the shared sub-pixel 212 onto the substrate 100. This deconstructs the light-emitting functional layers 200 of the privacy sub-pixel 211 and the shared sub-pixel 212 within the same pixel unit 210, thereby reducing crosstalk. The partition structure can be disconnected as follows: Figure 7 As shown, the structure comprises a first hole transport layer 201 (HTL1), a first light-emitting layer 202 (R / G / B), a first electron transport layer 203 (ETL1), a charge generation layer 204 (CGL), a second hole transport layer 205 (HTL2), a second light-emitting layer 206 (R / G / B), a second electron transport layer 207 (ETL2), and a cathode layer 810 (Cathode). The function of the partition structure will be explained in detail below.

[0102] In the first embodiment of this application, only the light-emitting functional layer 200 is shown. The light-emitting layer is formed within the privacy pixel opening P1 and the shared pixel opening P2. The light-emitting layers within the same pixel unit 210 are connected, while the light-emitting layers between adjacent pixel units 210 are disconnected. The remaining film layers of the light-emitting functional layer 200 are... Figures 1 to 3 Not shown in the text, for example Figure 7 The first hole transport layer 201, the first electron transport layer 203, the charge generation layer 204, the second hole transport layer 205, and the second electron transport layer 207 are shown. The multiple film layers in the light-emitting functional layer 200 of adjacent pixel units 210 are connected to each other, so crosstalk may occur.

[0103] like Figure 8 As shown, Figure 8This is a partial view of the display panel according to the first embodiment of this application (showing two pixel units 210). Figure 8 The diagram shows adjacent red pixel unit 213 and green pixel unit 214. The distance between the privacy anode 311 and the shared anode 321 of the same pixel unit 210 (AND gap) is L1, and the distance between the privacy anode 311 and the shared anode 321 of different pixel units 210 (PDL gap) is L2. Since L1 is smaller than L2, i.e., the AND gap is shorter than the PDL gap, the crosstalk problem caused by lateral leakage between the privacy anode 311 and the shared anode 321 of the same pixel unit 210 is more severe. Figure 8 The direction of the middle arrow indicates the lateral leakage direction, which may cause the shared sub-pixel 212 to be lit up when the privacy sub-pixel 211 is lit up in privacy mode, affecting the privacy effect. Therefore, by setting a partition structure that can disconnect the light-emitting functional layer 200 between the privacy sub-pixel 211 and the shared sub-pixel 212 in the same pixel unit 210 (at the AND gap), crosstalk can be effectively reduced.

[0104] Optionally, a partition structure can be provided between all privacy-protected sub-pixels 211 and shared sub-pixels 212 to further reduce crosstalk.

[0105] like Figure 9 As shown, Figure 9 This is a schematic diagram of the structure of the first pixel limiting layer 610 in the first embodiment of this application. Figure 9 The structure of the first pixel defining layer 610 at the AND gap in the first embodiment of this application is shown, as follows: Figure 10 As shown, Figure 10 This is a schematic diagram of the structure of the first pixel limiting layer 610 and the first partition structure 710 in the second embodiment of this application. Figure 10 The first partition structure 710 shown is for... Figure 9 The structure of the first pixel limiting layer 610 at the AND gap is improved by setting a first passivation layer 711 and a second passivation layer 713 above and below the first pixel limiting layer 610. The first passivation layer 711 and the second passivation layer 713 can be inorganic layers. The first pixel limiting layer 610 at the AND gap is patterned to form a side-etched structure with inorganic layers on the top and bottom. In this way, after the organic conductive film layer of the subsequent light-emitting functional layer 200 is fabricated, it will naturally break at this point, blocking the conduction path and effectively improving the lateral leakage problem between the privacy anode 311 and the shared anode 321 of the same pixel unit 210. The specific structures of several isolation structures are described in detail below.

[0106] In the second embodiment of this application, as Figures 10 to 14 As shown, Figure 11 This is a schematic diagram of the display panel structure according to the second embodiment of this application (driving circuit layer 400 is not shown). Figure 12 This is a schematic diagram of the light emission of the display panel in privacy mode according to the second embodiment of this application. Figure 13 This is a schematic diagram of light emission in the display panel sharing mode according to the second embodiment of this application. Figure 14 This is a schematic diagram of the structure of a display panel according to a second embodiment of this application (showing the driving circuit layer 400); a first passivation layer 711 and a second passivation layer 713 are disposed above and below the first pixel defining layer 610 of the display panel according to the second embodiment of this application, and a first partition structure 710 is formed by a patterning process; specifically, the privacy anode layer 310 and the shared anode layer 320 are disposed on the same layer; the display panel also includes a first pixel defining layer 610; the first pixel defining layer 610 is disposed between the privacy anode layer 310 and the shared anode layer 320 and the light modulation film layer 500; the first pixel defining layer 610 forms a plurality of pixel openings P; each pixel opening P is divided into a privacy pixel opening P1 and a shared pixel opening P2 by the first partition structure 710; the privacy pixel opening P1 exposes the privacy anode 311 partially, and the privacy sub-pixel 211 is disposed in the privacy pixel opening P1; the shared pixel opening P2 exposes the shared anode 321 partially, and the shared sub-pixel 212 is disposed in the shared pixel opening P2.

[0107] In the second embodiment of this application, as Figures 11 to 14 As shown, the first partition structure 710 includes a first passivation layer 711, a first barrier layer 712, and a second passivation layer 713 sequentially stacked along a direction away from the substrate 100; the first barrier layer 712 and the first pixel defining layer 610 are integrally formed; the first barrier layer 712 is recessed inward relative to the first passivation layer 711 and the second passivation layer 713 in the circumferential direction to form an undercut structure; the undercut structure causes the light-emitting functional layer 200 to be disconnected at the first partition structure 710. Figure 11 As shown, the orthographic projection of the first partition structure 710 on the substrate 100 overlaps with the orthographic projections of the privacy sub-pixel 211 and the shared sub-pixel 212 on the substrate 100; as Figure 14 As shown, the orthographic projection of the first partition structure 710 on the substrate 100 is spaced apart from the privacy sub-pixel 211, and has an overlapping area with the orthographic projection of the shared sub-pixel 212 on the substrate 100. It can be understood that whether the partition structure has an overlapping area with the privacy sub-pixel 211 and the shared sub-pixel 212 depends on the structure of the partition structure itself, and can be set according to the actual situation. This application does not limit this.

[0108] Optionally, the first passivation layer 711 is located at the junction of the privacy anode 311 and the shared anode 321 corresponding to the same pixel unit 210, and covers the edges of the privacy anode 311 and the shared anode 321 corresponding to the same pixel unit 210, thereby playing a better isolation role; and a stepped structure is formed at the edge of the first passivation layer 711, which can further disconnect the light-emitting functional layer 200; the second passivation layer 713 is located at the junction of the privacy anode 311 and the shared anode 321 corresponding to the same pixel unit 210. In the width direction, the orthographic projection of the second passivation layer 713 on the substrate 100 coincides with the orthographic projection of the gap between the privacy anode 311 and the shared anode 321 corresponding to the same pixel unit 210 on the substrate 100, so as to effectively disconnect the light-emitting functional layer 200.

[0109] In some embodiments of this application, such as Figures 11 to 14 As shown, the light modulation film layer 500 also includes a plurality of lens structures 530 and a second organic layer 550 (OC2); the plurality of lens structures 530 are arranged one-to-one with a plurality of second privacy openings W21; the plurality of lens structures 530 are disposed on the side of the second black matrix 520 away from the substrate, and are at least partially located within the second privacy openings W21; the orthogonal projection of the lens structure 530 on the substrate 100 covers the orthogonal projection of the corresponding second privacy opening W21 on the substrate 100; the second organic layer 550 is located on the side of the plurality of lens structures 530 away from the substrate 100, and the second organic layer 550 covers the lens structures 530 and the second black matrix 520; the refractive index of the lens structure 530 is greater than the refractive index of the second organic layer 550. Because the refractive index of the lens structure 530 is greater than the refractive index of the second organic layer 550, light is refracted when passing through the interface of the lens structure 530 and the second organic layer 550, and further refracted in the forward direction of the display panel, becoming light at a smaller angle, thereby achieving a better privacy effect; the lens structure 530 can be made of organic materials.

[0110] In the second embodiment of this application, as Figure 14 As shown, the display panel also includes a cathode layer 810, a touch layer 850, a polarizer 860, a third organic layer 870, and a cover plate 880. The cathode layer 810 is located between the light-emitting functional layer 200 and the encapsulation layer 820, and covers the light-emitting functional layer 200. The touch layer 850 is located between the first black matrix 510 and the encapsulation layer 820. The third organic layer 870 is located on the side of the second organic layer 550 away from the substrate 100. The polarizer 860 is located on the side of the third organic layer 870 away from the substrate 100. The cover plate 880 is disposed on the side of the polarizer 860 away from the substrate 100.

[0111] In some embodiments of this application, such as Figure 15 As shown, Figure 15 This is a schematic diagram of the structure of a display panel according to a third embodiment of this application. The privacy anode layer 310 and the shared anode layer 320 are disposed on the same layer. The display panel also includes a second pixel limiting layer 620 and a third pixel limiting layer 630 stacked together. The second pixel limiting layer 620 is disposed between the privacy anode layer 310 and the shared anode layer 320 and the light modulation film layer 500. The third pixel limiting layer 630 is disposed between the second pixel limiting layer 620 and the light modulation film layer 500. Multiple penetrations through the second pixel limiting layer 620 and the third pixel limiting layer 630 are formed on the second pixel limiting layer 620 and the third pixel limiting layer 630. 20 and the pixel opening P of the third pixel limiting layer 630; each pixel opening P is divided into a privacy pixel opening P1 and a shared pixel opening P2 by the second partition structure 720; the privacy pixel opening P1 penetrates the second pixel limiting layer 620 and the third pixel limiting layer 630, so that the privacy anode 311 is partially exposed, and the privacy sub-pixel 211 is disposed in the privacy pixel opening P1; the shared pixel opening P2 penetrates the second pixel limiting layer 620 and the third pixel limiting layer 630, so that the shared anode 321 is partially exposed, and the shared sub-pixel 212 is disposed in the shared pixel opening P2.

[0112] In some embodiments of this application, such as Figure 15 As shown, the second partition structure 720 includes a second barrier layer 721, a third passivation layer 722, and a third barrier layer 723 sequentially disposed along a direction away from the substrate 100; the second barrier layer 721 and the second pixel defining layer 620 are integrally formed; the third barrier layer 723 and the third pixel defining layer 630 are integrally formed; the second barrier layer 721 and the third barrier layer 723 are recessed inward relative to the third passivation layer 722 in the circumferential direction to form an undercut structure; the undercut structure causes the light-emitting functional layer 200 to be disconnected at the second partition structure 720. The second barrier layer 721 and the third barrier layer 723 are recessed inward relative to the third passivation layer 722 in the circumferential direction, that is, the third passivation layer 722 extends outward relative to the second barrier layer 721 and the third barrier layer 723, forming an undercut structure; compared to fabricating only one first pixel limiting layer 610, fabricating two second pixel limiting layers 620 and third pixel limiting layers 630 results in a larger step difference, which is beneficial for disconnecting the light-emitting functional layer 200. For example... Figure 15 As shown, the orthographic projection of the second partition structure 720 on the substrate 100 overlaps with the orthographic projections of the privacy sub-pixel 211 and the shared sub-pixel 212 on the substrate 100.

[0113] Specifically, the third passivation layer 722 is located at the junction of the privacy anode 311 and the shared anode 321 corresponding to the same pixel unit 210, and covers the edges of the privacy anode 311 and the shared anode 321 corresponding to the same pixel unit 210, thereby playing a better isolation role.

[0114] In some embodiments of this application, the privacy-protecting anode layer 310 and the shared anode layer 320 may also be disposed as different layers, such as... Figure 16 As shown, Figure 16 This is a schematic diagram of the structure of a display panel according to the fourth embodiment of this application. The shared anode layer 320 is located on the side of the privacy anode layer 310 away from the substrate 100. The display panel also includes a fourth pixel defining layer 640 and a fifth pixel defining layer 650 stacked together. The fourth pixel defining layer 640 is disposed between the privacy anode layer 310 and the light modulation film layer 500. The shared anode layer 320 is located between the fourth pixel defining layer 640 and the light modulation film layer 500. The fifth pixel defining layer 650 is disposed between the shared anode layer 320 and the light modulation film layer 500. The fourth pixel defining layer 640 and the fifth pixel defining layer 650... Multiple pixel openings P are formed on layer 650, penetrating the fourth pixel limiting layer 640 and the fifth pixel limiting layer 650; each pixel opening P is divided into a privacy pixel opening P1 and a shared pixel opening P2 by a third partition structure 730; the privacy pixel opening P1 penetrates the fourth pixel limiting layer 640 and the fifth pixel limiting layer 650, so that the privacy anode 311 is partially exposed, and the privacy sub-pixel 211 is disposed in the privacy pixel opening P1; the shared pixel opening P2 penetrates the fifth pixel limiting layer 650, so that the shared anode 321 is partially exposed, and the shared sub-pixel 212 is disposed in the shared pixel opening P2.

[0115] Figure 15 and Figure 16 The difference in the display panel of the illustrated embodiment is that, Figure 15 In the embodiment shown, the privacy anode layer 310 and the shared anode layer 320 of the display panel are disposed on the same layer, and the second pixel limiting layer 620 and the third pixel limiting layer 630 are both located on the side of the privacy anode layer 310 and the shared anode layer 320 away from the substrate 100. Figure 16 In the embodiment shown, the shared anode layer 320 of the display panel is located on the side of the privacy anode layer 310 away from the substrate 100, the fourth pixel limiting layer 640 and the fifth pixel limiting layer 650 are both located on the side of the privacy anode layer 310 away from the substrate 100, the fifth pixel limiting layer 650 is located on the side of the shared anode layer 320 away from the substrate 100, and the fourth pixel limiting layer 640 is located on the side of the shared anode layer 320 close to the substrate 100.

[0116] It is understood that in some other embodiments of this application, the privacy anode layer 310 may be located on the side of the shared anode layer 320 away from the substrate 100, depending on the actual situation. When the shared anode layer 320 is located on the side of the privacy anode layer 310 away from the substrate 100, it is more conducive to the wide-viewing-angle light emitted by the shared sub-pixel 212 being emitted from the display panel.

[0117] In the fourth embodiment of this application, such as Figure 16 As shown, the third partition structure 730 includes a fourth barrier layer 731, a fourth passivation layer 732, and a fifth barrier layer 733 sequentially disposed along a direction away from the substrate 100; the fourth barrier layer 731 and the fourth pixel limiting layer 640 are integrally formed; the fifth barrier layer 733 and the fifth pixel limiting layer 650 are integrally formed; the fourth barrier layer 731 and the fifth barrier layer 733 are recessed inward relative to the fourth passivation layer 732 on the side facing the privacy pixel opening P1, forming an undercut structure; the undercut structure causes the light-emitting functional layer 200 to be disconnected at the third partition structure 730. That is, the fourth passivation layer 732 extends toward the privacy sub-pixel 211 relative to the fourth barrier layer 731 and the fifth barrier layer 733 to form an undercut structure; compared with the privacy anode layer 310 and the shared anode layer 320 being set in the same layer, the arrangement of the shared anode layer 320 in the fourth embodiment of this application, which is located on the side of the privacy anode layer 310 away from the substrate 100, can further reduce the mutual influence between the privacy anode 311 and the shared anode 321, and help improve the working stability of the display panel.

[0118] Specifically, the fourth passivation layer 732 is located at the junction of the privacy anode 311 and the shared anode 321 corresponding to the same pixel unit 210. The orthogonal projection of the fourth passivation layer 732 on the substrate 100 covers the edge of the orthogonal projection of the privacy anode 311 and the shared anode 321 corresponding to the same pixel unit 210 on the substrate 100, thereby playing a better isolation role.

[0119] It is understood that in the above embodiments, the partition structure includes at least one passivation layer, and the passivation layer is located above the pixel defining layer to form an undercut structure.

[0120] like Figure 17 As shown, Figure 17 This is a flowchart illustrating a method for fabricating a display panel according to an embodiment of this application. An embodiment of the second aspect of this application provides a method for fabricating a display panel according to any embodiment of the first aspect, comprising:

[0121] S1. Provide substrate 100;

[0122] S2. A driving circuit layer 400 is fabricated on the substrate 100;

[0123] The driving circuit layer 400 includes a privacy driving circuit 410 and a shared driving circuit 420;

[0124] S3. An anti-spy anode layer 310 and a shared anode layer 320 are fabricated on the driving circuit layer 400;

[0125] The privacy anode layer 310 includes a plurality of privacy anodes 311 spaced apart; the shared anode layer 320 includes a plurality of shared anodes 321 spaced apart.

[0126] After completing step S3, the result is as follows: Figure 18 The structure shown; Figure 18 This is a schematic diagram of the structure after the privacy-protecting anode layer 310 and the shared anode layer 320 are fabricated using the display panel fabrication method of the present application embodiment;

[0127] S4. A light-emitting functional layer 200 is prepared on the privacy anode layer 310 and the shared anode layer 320. The light-emitting functional layer 200 includes a plurality of pixel units 210, each pixel unit 210 including a privacy sub-pixel 211 and a shared sub-pixel 212. The plurality of privacy sub-pixels 211 are configured in a one-to-one correspondence with the plurality of privacy anodes 311, and the plurality of shared sub-pixels 212 are configured in a one-to-one correspondence with the plurality of shared anodes 321.

[0128] S5. A light modulation film layer 500 is prepared on the light-emitting functional layer 200; the orthogonal projection of the light modulation film layer 500 on the substrate 100 covers the orthogonal projections of the privacy sub-pixel 211 and the shared sub-pixel 212 on the substrate 100.

[0129] The display panel prepared by the method of preparing the display panel according to the embodiments of this application has a privacy mode and a sharing mode. It can meet the display needs of privacy or non-privacy without the need for an external privacy film, and is convenient to use.

[0130] The manufacturing methods of the display panels in the four embodiments described above will be explained one by one below.

[0131] The display panel of the first embodiment of this application ( Figures 1 to 3 The preparation method of the embodiment shown includes the following steps:

[0132] Step 111: Provide substrate 100;

[0133] Step 112: Fabricating a driving circuit layer 400 on the substrate 100; specifically, step 112, fabricating a driving circuit layer 400 on the substrate 100, includes:

[0134] Step 1121: Prepare a buffer layer 430 on the substrate 100;

[0135] Step 1122: Fabricate a patterned active layer 404 on the buffer layer 430;

[0136] Step 1123: Prepare a gate insulating layer 440 on the active layer 404;

[0137] Step 1124: Fabricate gate 403 on gate insulating layer 440;

[0138] Step 1125: Prepare an interlayer insulating layer 450 on the gate 403; the interlayer insulating layer 450 covers the gate 403 of a plurality of privacy-protected thin-film transistors 411 and a plurality of shared thin-film transistors 421;

[0139] Step 1126: Etch the interlayer insulating layer 450 and the gate insulating layer 440 to form multiple vias;

[0140] Step 1127: Fabricate a first electrode 401 and a second electrode 402 on the interlayer insulating layer 450; the first electrode 401 and the second electrode 402 are respectively connected to the corresponding active layer 404 through different vias to form multiple privacy-protected thin-film transistors 411 and multiple shared thin-film transistors 421;

[0141] Step 1128: Prepare a planarization layer 460 on the first electrode 401 and the second electrode 402; the planarization layer 460 covers the first electrode 401, the second electrode 402 and the interlayer insulating layer 450;

[0142] Step 113: Fabricate a privacy-protecting anode layer 310 and a shared anode layer 320 on the driving circuit layer 400;

[0143] Specifically, a privacy anode layer 310 and a shared anode layer 320 are fabricated on a planarization layer 460; the privacy anode layer 310 and the shared anode layer 320 are disposed on the same layer; the privacy anode layer 310 includes a plurality of privacy anodes 311 disposed at intervals, and the shared anode layer 321 includes a plurality of shared anodes 321 disposed at intervals; a plurality of vias are formed on the planarization layer 460, and the privacy anodes 311 are electrically connected to the privacy thin-film transistor 411 through the vias, and the shared anodes 321 are electrically connected to the shared thin-film transistor 421 through the vias;

[0144] Step 114: Prepare a first pixel limiting layer 610 on the privacy anode layer 310 and the shared anode layer 320; the first pixel limiting layer 610 has a plurality of privacy pixel openings P1 and shared pixel openings P2;

[0145] Step 115: Prepare a light-emitting functional layer 200; the light-emitting functional layer 200 includes a plurality of pixel units 210, each pixel unit 210 including a privacy sub-pixel 211 and a shared sub-pixel 212; the privacy sub-pixel 211 is disposed in the privacy pixel opening P1, and the shared sub-pixel 212 is disposed in the shared pixel opening P2;

[0146] Step 116: Fabricate an encapsulation layer 820 on the light-emitting functional layer 200;

[0147] Step 117: Fabricating an optical modulation film layer 500 on the encapsulation layer 820; specifically, step 117, fabricating an optical modulation film layer 500 on the encapsulation layer 820, includes:

[0148] Step 1171: Prepare a first black matrix 510 on the encapsulation layer 820; the first black matrix 510 has a plurality of first privacy openings W11 and a plurality of first shared openings W12; the plurality of first privacy openings W11 are configured to correspond one-to-one with the plurality of privacy pixel openings P1, and the plurality of first shared openings W12 are configured to correspond one-to-one with the plurality of shared pixel openings P2.

[0149] Step 1172: Prepare a first organic layer 540 on the first black matrix 510; the first organic layer 540 covers the first black matrix 510;

[0150] Step 1173: Prepare a second black matrix 520 on the first organic layer 540; the second black matrix 520 has a plurality of second privacy openings W21 and a plurality of second shared openings W22; the plurality of second privacy openings W21 are configured in a one-to-one correspondence with the plurality of first privacy openings W11, and the plurality of second shared openings W22 are configured in a one-to-one correspondence with the plurality of first shared openings W12.

[0151] Step 1174: Prepare color filter layer 840; Color filter layer 840 includes multiple color filter units 841, and each second privacy opening W21 and second shared opening W22 is provided with a color filter unit 841;

[0152] Preparation complete.

[0153] The display panel of the second embodiment of this application ( Figures 11 to 14 The preparation method of the embodiment shown includes the following steps:

[0154] Step 211: Provide substrate 100;

[0155] Step 212: Prepare a driving circuit layer 400 on the substrate 100. Step 212: Prepare a driving circuit layer 400 on the substrate 100. This step is the same as step 112 in the method for preparing a display panel in the first embodiment of this application, which is to prepare a driving circuit layer 400 on the substrate 100. The specific steps are the same and will not be repeated here.

[0156] Step 213: Fabricate a privacy-protecting anode layer 310 and a shared anode layer 320 on the driving circuit layer 400;

[0157] Specifically, a privacy anode layer 310 and a shared anode layer 320 are fabricated on a planarization layer 460; the privacy anode layer 310 and the shared anode layer 320 are disposed on the same layer; the privacy anode layer 310 includes a plurality of privacy anodes 311 disposed at intervals, and the shared anode layer 321 includes a plurality of shared anodes 321 disposed at intervals; a plurality of vias are formed on the planarization layer 460, and the privacy anodes 311 are electrically connected to the privacy thin-film transistor 411 through the vias, and the shared anodes 321 are electrically connected to the shared thin-film transistor 421 through the vias;

[0158] Step 214: Prepare a first passivation layer 711 on the privacy anode layer 310 and the shared anode layer 320; the first passivation layer 711 is located at the junction of the privacy anode 311 and the shared anode 321 corresponding to the same pixel unit 210, and covers the edges of the privacy anode 311 and the shared anode 321 corresponding to the same pixel unit 210.

[0159] like Figure 19a and Figure 19b As shown, Figure 19a This is the first part of a process diagram illustrating the fabrication process of the display panel according to the second embodiment of this application. Figure 19b This is the second part of a process diagram illustrating the fabrication process of the display panel according to the second embodiment of this application;

[0160] Step 215: Prepare a first organic film layer 601 on the first passivation layer 711; the first organic film layer 601 covers the privacy-protecting anode layer 310, the shared anode layer 320 and the first passivation layer 711;

[0161] Step 216: Prepare a second passivation layer 713 on the first organic film layer 601; the second passivation layer 713 is located at the junction of the privacy anode 311 and the shared anode 321 corresponding to the same pixel unit 210. In the width direction, the orthographic projection of the second passivation layer 713 on the substrate 100 coincides with the orthographic projection of the gap between the privacy anode 311 and the shared anode 321 corresponding to the same pixel unit 210 on the substrate 100.

[0162] Step 217: Apply photoresist 910 and form an opening at the location where the privacy anode 311 and the shared anode 321 overlap with the first passivation layer 711 (PVX-1) (AND / PVX-1 projection);

[0163] Step 218: Etch the first organic film layer 601 to form the first barrier structure 710; specifically, O2 Plasma can be used for dry etching, because plasma has the ability to laterally etch the first organic film layer 601, so the etched holes form an inverted trapezoidal shape, and the first barrier layer 712 is recessed inward in the circumferential direction compared with the first passivation layer 711 and the second passivation layer 713 to form an undercut structure;

[0164] Step 219: Remove photoresist 910;

[0165] Step 220: Continue to perform patterning process on the first organic film layer 601 to form a first pixel limiting layer 610. The first pixel limiting layer 610 has multiple pixel openings P. The pixel openings P are divided into privacy pixel openings P1 and shared pixel openings P2 by the first partition structure 710.

[0166] Step 221: Fabricate the light-emitting functional layer 200 (OLED process); the undercut structure of the first partition structure 710 causes the light-emitting layer to be disconnected at the first partition structure 710; the light-emitting functional layer 200 includes a plurality of pixel units 210, each pixel unit 210 including a privacy sub-pixel 211 and a shared sub-pixel 212; the privacy sub-pixel 211 is disposed in the privacy pixel opening P1, and the shared sub-pixel 212 is disposed in the shared pixel opening P2;

[0167] Step 222: Prepare cathode layer 810; cathode layer 810 covers light-emitting functional layer 200 and is disconnected at first partition structure 710;

[0168] Specifically, a light-emitting functional layer 200 and a cathode layer 810 can be formed on a substrate 100 using a vacuum evaporation process. The light-emitting functional layer 200 includes, but is not limited to, a hole injection layer, a hole transport layer, a light-emitting layer, and an electron transport layer. The light-emitting device composed of the above film layers can be a stack structure or a single-layer structure. The EL material of the light-emitting device layer does not form a continuous film at the partition structure.

[0169] Step 223: Prepare the encapsulation layer 820; the encapsulation layer 820 includes an inorganic thin film layer (CVD1 / CVD2) that blocks water and oxygen and an organic layer (IJP) that provides stress relief and planarization; the inorganic layer can be prepared by chemical vapor deposition or atomic layer deposition, and the material can be silicon nitride, silicon oxide, silicon oxynitride, aluminum oxide, titanium oxide, etc., but is not limited to these. The organic layer can be prepared by inkjet printing, screen printing, dispensing, etc.; for example, deposit an inorganic layer (CVD1) on the light-emitting functional layer 200, the inorganic layer can be one of the aforementioned materials or a combination of multiple overlapping materials; the protected area of ​​the inorganic layer should be larger than the area of ​​the display area; the coverage area of ​​the organic layer (IJP) should be smaller than that of the inorganic layer (CVD1), and its vertical projection should be at least larger than that of the cathode layer 810; prepare an inorganic layer (CVD2) on the organic layer (IJP), the preparation method and materials of CVD2 are the same as CVD1, and its coverage area can be the same as or larger than that of CVD1. Similarly, it can be composed of a single inorganic material or a combination of the aforementioned inorganic layers.

[0170] Step 224: Prepare an optical modulation film layer 500 on the encapsulation layer 820;

[0171] Specifically, step 224, preparing an optical modulation film layer 500 on the encapsulation layer 820, includes:

[0172] Step 2241: Prepare a first black matrix 510 on the encapsulation layer 820; the first black matrix 510 has a plurality of first privacy openings W11 and a plurality of first shared openings W12; the plurality of first privacy openings W11 are configured to correspond one-to-one with the plurality of privacy pixel openings P1, and the plurality of first shared openings W12 are configured to correspond one-to-one with the plurality of shared pixel openings P2.

[0173] Step 2242: Prepare a first organic layer 540 on the first black matrix 510; the first organic layer 540 covers the first black matrix 510;

[0174] Step 2243: Prepare a second black matrix 520 on the first organic layer 540; the second black matrix 520 has a plurality of second privacy openings W21 and a plurality of second shared openings W22; the plurality of second privacy openings W21 are configured in a one-to-one correspondence with the plurality of first privacy openings W11, and the plurality of second shared openings W22 are configured in a one-to-one correspondence with the plurality of first shared openings W12.

[0175] Step 2244: Prepare multiple lens structures 530; the multiple lens structures 530 are arranged one-to-one with multiple second privacy openings W21; the multiple lens structures 530 are arranged on the side of the second black matrix 520 away from the substrate, and are at least partially located in the second privacy openings W21; the orthogonal projection of the lens structure 530 on the substrate 100 covers the orthogonal projection of the corresponding second privacy opening W21 on the substrate 100.

[0176] Step 2245: Prepare a second organic layer 550; the second organic layer 550 is located on the side of the plurality of lens structures 530 away from the substrate 100, and the second organic layer 550 covers the lens structure 530 and the second black matrix 520; the refractive index of the lens structure 530 is greater than the refractive index of the second organic layer 550.

[0177] Step 225: Prepare a third organic layer 870 on the second organic layer 550;

[0178] Step 226: Prepare a polarizer 860 on the third organic layer 870;

[0179] Step 227: Prepare a cover plate 880 on the polarizer 860;

[0180] Preparation complete.

[0181] The display panel of the third embodiment of this application ( Figure 15 The preparation method of the embodiment shown includes the following steps:

[0182] Step 311: Provide substrate 100;

[0183] Step 312: Prepare a driving circuit layer 400 on the substrate 100. Step 312: Prepare a driving circuit layer 400 on the substrate 100. The specific steps are the same as those in the method for preparing a display panel in the first embodiment of this application, which is to prepare a driving circuit layer 400 on the substrate 100. The details will not be repeated here.

[0184] Step 313: Fabricate a privacy-protecting anode layer 310 and a shared anode layer 320 on the driving circuit layer 400;

[0185] Specifically, a privacy anode layer 310 and a shared anode layer 320 are fabricated on a planarization layer 460; the privacy anode layer 310 and the shared anode layer 320 are disposed on the same layer; the privacy anode layer 310 includes a plurality of privacy anodes 311 disposed at intervals, and the shared anode layer 321 includes a plurality of shared anodes 321 disposed at intervals; a plurality of vias are formed on the planarization layer 460, and the privacy anodes 311 are electrically connected to the privacy thin-film transistor 411 through the vias, and the shared anodes 321 are electrically connected to the shared thin-film transistor 421 through the vias;

[0186] like Figure 20 As shown, Figure 20 A process diagram illustrating the fabrication of the display panel according to the third embodiment of this application;

[0187] Step 314: Prepare a second organic film layer 602 on the privacy anode layer 310 and the shared anode layer 320; the second organic film layer 602 covers the privacy anode layer 310 and the shared anode layer 320;

[0188] Step 315: Prepare a third passivation layer 722 on the second organic film layer 602; the third passivation layer 722 is located at the junction of the privacy anode 311 and the shared anode 321 corresponding to the same pixel unit 210, and covers the edges of the privacy anode 311 and the shared anode 321 corresponding to the same pixel unit 210.

[0189] Step 316: Prepare a third organic film layer 603 on the third passivation layer 722; the third organic film layer 603 covers the second passivation layer 713;

[0190] Step 317: Coat photoresist 910 and form openings at the locations where the privacy anode 311 and the shared anode 321 overlap with the third passivation layer 722 and in a portion of the area above the privacy anode 311 and the shared anode 321;

[0191] Step 318: Etch the second organic film layer 602 and the third organic film layer 603 to form the second partition structure 720 and the pixel opening P; the second partition structure 720 divides the pixel opening P into a privacy pixel opening P1 and a shared pixel opening P2; after protection by photoresist 910, etching is performed to form an inverted trapezoidal opening. Since the etching rates of the second organic film layer 602 and the third organic film layer 603 are different from those of the third passivation layer 722, the second barrier layer 721 and the third barrier layer 723 are recessed inward in the circumferential direction relative to the third passivation layer 722 to form an undercut structure.

[0192] Step 319: Remove photoresist 910;

[0193] Step 320: Fabrication of the light-emitting functional layer 200 (OLED process); The undercut structure of the second partition structure 720 causes the light-emitting layer to be interrupted at the second partition structure 720, that is, the OLED material is a discontinuous film layer at the second partition structure 720; The light-emitting functional layer 200 includes a plurality of pixel units 210, each pixel unit 210 including a privacy sub-pixel 211 and a shared sub-pixel 212; The privacy sub-pixel 211 is disposed in the privacy pixel opening P1, and the shared sub-pixel 212 is disposed in the shared pixel opening P2;

[0194] Step 321: Prepare cathode layer 810; cathode layer 810 covers light-emitting functional layer 200 and is disconnected at second partition structure 720;

[0195] Step 322: Prepare the encapsulation layer 820;

[0196] Step 323: Prepare a light modulation film layer 500 on the encapsulation layer 820. Step 323: Prepare a light modulation film layer 500 on the encapsulation layer 820. This step is the same as step 224: Prepare a light modulation film layer 500 on the encapsulation layer 820 in the method for preparing a display panel in the second embodiment of this application. The specific steps are the same and will not be repeated here.

[0197] Step 324: Prepare a third organic layer 870 on the second organic layer 550;

[0198] Step 325: Prepare a polarizer 860 on the third organic layer 870;

[0199] Step 326: Prepare a cover plate 880 on the polarizer 860;

[0200] Preparation complete.

[0201] The display panel of the fourth embodiment of this application ( Figure 16 The preparation method of the embodiment shown includes the following steps:

[0202] Step 411: Provide substrate 100;

[0203] Step 412: Prepare a driving circuit layer 400 on the substrate 100. Step 412: Prepare a driving circuit layer 400 on the substrate 100. This step is the same as step 112 in the method for preparing a display panel in the first embodiment of this application, which is to prepare a driving circuit layer 400 on the substrate 100. The specific steps are the same and will not be repeated here.

[0204] like Figure 21 As shown, Figure 21 A process diagram illustrating the fabrication of the display panel according to the fourth embodiment of this application;

[0205] Step 413: Prepare a privacy anode layer 310 on the driving circuit layer 400; that is, prepare a privacy anode layer 310 on the planarization layer 460. The privacy anode layer 310 includes a plurality of privacy anodes 311 spaced apart. A plurality of vias are formed on the planarization layer 460. The privacy anodes 311 are electrically connected to the privacy thin film transistor 411 through the vias.

[0206] Step 414: Prepare a fourth organic film layer 604 on the privacy anode layer 310, and the fourth organic film layer 604 covers the privacy anode layer 310; Prepare the privacy anode layer 310 on the drive circuit layer 400;

[0207] Step 415: Prepare the fourth passivation layer 732 on the fourth mechanical film layer;

[0208] Step 416: A shared anode layer 320 is prepared on the fourth passivation layer 732; the shared anode layer 320 includes a plurality of spaced-apart shared anodes 321; a plurality of vias are formed on the planarization layer 460 and the fourth organic film layer 604, and the shared anodes 321 are electrically connected to the shared thin film transistors 421 through the vias; the fourth passivation layer 732 is located at the junction of the privacy anode 311 and the shared anode 321 corresponding to the same pixel unit 210, and the orthogonal projection of the fourth passivation layer 732 on the substrate 100 covers the edges of the orthogonal projections of the privacy anode 311 and the shared anode 321 corresponding to the same pixel unit 210 on the substrate 100;

[0209] Step 417: Prepare a fifth organic film layer on the shared anode layer 320, and pattern the fifth organic film layer to form a fifth barrier layer 733, so that the shared anode 321, the fourth passivation layer 732 and the fourth organic film layer 604 are partially exposed.

[0210] Step 418: Coat photoresist 910, which covers the shared anode 321; the photoresist 910 protects the shared anode 321, and O2 plasma dry etching is performed. At this time, the fourth organic film layer 604 above the privacy anode 311 is partially etched to form the undercut structure of the third partition structure 730; specifically, the photoresist 910 protects the shared anode 321 and O2 plasma dry etching is performed, but the fourth organic film layer 604 above the privacy anode 311 is not completely etched away.

[0211] Step 419: Remove the photoresist 910 and continue etching the fourth organic film layer 604 to form the fourth pixel limiting layer 640, the fifth pixel limiting layer 650, and the third partition structure 730, forming multiple pixel openings P. The pixel openings P are divided into privacy pixel openings P1 and shared pixel openings P2 by the third partition structure 730. The fourth barrier layer 731 and the fifth barrier layer 733 are recessed inward relative to the fourth passivation layer 732 on the side facing the privacy pixel opening P1, forming an undercut structure. The privacy pixel opening P1 penetrates the fourth pixel limiting layer 640 and the fifth pixel limiting layer 650. The shared pixel opening P2 penetrates the fifth pixel limiting layer 650. Specifically, after removing the photoresist 910, photolithography is used to remove the fourth organic film layer 604 above the privacy anode 311, thereby avoiding damage to the privacy anode 311 by plasma dry etching.

[0212] Step 420: Prepare the light-emitting functional layer 200; the undercut structure of the third partition structure 730 causes the light-emitting layer to be broken at the third partition structure 730; the light-emitting functional layer 200 includes a plurality of pixel units 210, each pixel unit 210 including a privacy sub-pixel 211 and a shared sub-pixel 212; the privacy sub-pixel 211 is disposed in the privacy pixel opening P1, and the shared sub-pixel 212 is disposed in the shared pixel opening P2;

[0213] Step 421: Prepare cathode layer 810; cathode layer 810 covers light-emitting functional layer 200 and is disconnected at third partition structure 730;

[0214] Step 422: Prepare the encapsulation layer 820;

[0215] Step 423: Prepare an optical modulation film layer 500 on the encapsulation layer 820. Step 423: Prepare an optical modulation film layer 500 on the encapsulation layer 820. This step is the same as step 224: Prepare an optical modulation film layer 500 on the encapsulation layer 820 in the method for preparing a display panel in the second embodiment of this application. The specific steps are the same and will not be repeated here.

[0216] Step 424: Prepare a third organic layer 870 on the second organic layer 550;

[0217] Step 425: Prepare a polarizer 860 on the third organic layer 870;

[0218] Step 426: Prepare a cover plate 880 on the polarizer 860;

[0219] Preparation complete.

[0220] An embodiment of the third aspect of this application provides a display device including a display panel according to any embodiment of the first aspect.

[0221] The display device of this application embodiment includes a display panel according to any embodiment of the first aspect. The light modulation film layer 500, in conjunction with the individual driving of the privacy sub-pixel 211 and the shared sub-pixel 212, allows the emission angle of the light emitted from the display panel to be controlled. When only the privacy sub-pixel 211 is lit, the display panel is in privacy mode. When only the shared sub-pixel 212 is lit, or when both the privacy sub-pixel 211 and the shared sub-pixel 212 are lit, the shared sub-pixel 212 supplements the light emission angle, and the display panel is in shared mode, without privacy function. It can meet the display needs of privacy or non-privacy without the need for an external privacy film, and is convenient to use.

[0222] It should be noted that, in this document, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0223] The various embodiments in this specification are described in a related manner. Similar or identical parts between embodiments can be referred to mutually. Each embodiment focuses on describing the differences from other embodiments. In particular, the system embodiments are basically similar to the method embodiments, so the description is relatively simple; relevant parts can be referred to the descriptions of the method embodiments.

[0224] The above description is merely a preferred embodiment of the present invention and is not intended to limit the scope of protection of the present invention. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention are included within the scope of protection of the present invention.

Claims

1. A display panel, characterized in that, include: substrate; A light-emitting functional layer is disposed on one side of the substrate; the light-emitting functional layer includes a plurality of pixel units, each pixel unit including a privacy sub-pixel and a shared sub-pixel; A privacy anode layer is located between the substrate and the light-emitting functional layer; the privacy anode layer includes a plurality of privacy anodes spaced apart; the plurality of privacy anodes are arranged one-to-one with a plurality of privacy sub-pixels; A shared anode layer is located between the substrate and the light-emitting functional layer; the shared anode layer includes a plurality of shared anodes spaced apart; the plurality of shared anodes are configured in one-to-one correspondence with a plurality of shared sub-pixels; A driving circuit layer is located between the substrate and the privacy anode layer and the shared anode layer; the driving circuit layer includes a privacy driving circuit and a shared driving circuit; the privacy driving circuit is electrically connected to the privacy anode, and the shared driving circuit is electrically connected to the shared anode; A light modulation film layer is located on the side of the light-emitting functional layer away from the substrate; the orthographic projection of the light modulation film layer on the substrate covers the orthographic projections of the privacy sub-pixel and the shared sub-pixel on the substrate. The privacy anode and the shared anode are spaced apart by their orthogonal projections onto the substrate; The shared anode layer is located on the side of the privacy anode layer away from the substrate; The display panel further includes: a fourth pixel limiting layer and a fifth pixel limiting layer stacked together; The fourth pixel defining layer is disposed between the privacy anode layer and the light modulation film layer; the shared anode layer is located between the fourth pixel defining layer and the light modulation film layer; the fifth pixel defining layer is disposed between the shared anode layer and the light modulation film layer; Multiple pixel openings penetrating the fourth pixel defining layer and the fifth pixel defining layer are formed thereon; each pixel opening is divided into a privacy pixel opening and a shared pixel opening by a third partition structure; The privacy pixel opening penetrates the fourth pixel limiting layer and the fifth pixel limiting layer, exposing the privacy anode portion, and the privacy sub-pixel is disposed within the privacy pixel opening; the shared pixel opening penetrates the fifth pixel limiting layer, exposing the shared anode portion, and the shared sub-pixel is disposed within the shared pixel opening; The third partition structure includes: a fourth barrier layer, a fourth passivation layer, and a fifth barrier layer disposed sequentially along a direction away from the substrate; The fourth barrier layer and the fourth pixel defining layer are integral structures; the fifth barrier layer and the fifth pixel defining layer are integral structures. The fourth and fifth barrier layers are recessed inward relative to the fourth passivation layer on the side facing the privacy pixel opening, forming an undercut structure; the undercut structure causes the light-emitting functional layer to be disconnected at the third partition structure.

2. The display panel according to claim 1, characterized in that, The privacy pixel opening and the shared pixel opening have the same shape and width, or the width of the privacy pixel opening is smaller than the width of the shared pixel opening.

3. The display panel according to claim 1, characterized in that, The light modulation film layer includes: a first black matrix, a first organic layer, and a second black matrix sequentially disposed along a direction away from the substrate; The first black matrix includes multiple first privacy openings and multiple first shared openings; the second black matrix includes multiple second privacy openings and multiple second shared openings. The plurality of first privacy openings and the plurality of second privacy openings are each configured to correspond one-to-one with the plurality of privacy sub-pixels; the orthogonal projections of the first privacy openings and the second privacy openings on the substrate cover the orthogonal projections of the privacy pixel openings on the substrate. The plurality of first shared openings and the plurality of second shared openings are each configured to correspond one-to-one with the plurality of shared sub-pixels; the orthogonal projections of the first shared openings and the second shared openings on the substrate cover the orthogonal projections of the shared pixel openings on the substrate. The width of the first privacy opening is smaller than the width of the first shared opening; the width of the second privacy opening is smaller than the width of the second shared opening.

4. The display panel according to claim 3, characterized in that, The orthographic projection of the first privacy opening on the substrate coincides with the orthographic projection of the second privacy opening on the substrate; Alternatively, the orthographic projection of the first privacy opening on the substrate covers the orthographic projection of the second privacy opening on the substrate; The orthographic projection of the first shared opening on the substrate coincides with the orthographic projection of the second shared opening on the substrate; Alternatively, the orthographic projection of the second shared opening on the substrate may overlap the orthographic projection of the first shared opening on the substrate.

5. The display panel according to claim 3, characterized in that, The optical modulation film layer further includes: multiple lens structures and a second organic layer; The plurality of lens structures are configured one-to-one with the plurality of second privacy openings; the plurality of lens structures are disposed on the side of the second black matrix away from the substrate, and are at least partially located within the second privacy openings; the orthographic projection of the lens structure on the substrate covers the orthographic projection of the corresponding second privacy opening on the substrate; The second organic layer is located on the side of the plurality of lens structures away from the substrate, and the second organic layer covers the lens structures and the second black matrix; The refractive index of the lens structure is greater than that of the second organic layer.

6. The display panel according to claim 1, characterized in that, The privacy sub-pixels and shared sub-pixels of the multiple pixel units are arranged in the same way; The number of privacy sub-pixels in each pixel unit is one or more.

7. A method for manufacturing a display panel, characterized in that, The method for preparing the display panel according to any one of claims 1 to 6 comprises: Provide substrate; A driving circuit layer is fabricated on a substrate; the driving circuit layer includes a privacy driving circuit and a shared driving circuit. A third isolation structure, a privacy anode layer, and a shared anode layer are fabricated on the driving circuit layer; the privacy anode layer includes multiple privacy anodes spaced apart; the shared anode layer includes multiple shared anodes spaced apart. A light-emitting functional layer is fabricated on a privacy anode layer and a shared anode layer; the light-emitting functional layer includes multiple pixel units, each pixel unit including a privacy sub-pixel and a shared sub-pixel; the multiple privacy sub-pixels are configured one-to-one with the multiple privacy anodes, and the multiple shared sub-pixels are configured one-to-one with the multiple shared anodes; A light modulation film layer is fabricated on the light-emitting functional layer; the orthogonal projection of the light modulation film layer on the substrate covers the orthogonal projections of the privacy-protecting sub-pixels and the shared sub-pixels on the substrate. The fabrication of the third isolation structure, the privacy anode layer, and the shared anode layer on the driving circuit layer includes: A privacy-protecting anode layer is fabricated on the driving circuit layer; A fourth organic film layer is prepared on the privacy-protecting anode layer; A fourth passivation layer is prepared on the fourth organic film layer; A shared anode layer is fabricated on the fourth passivation layer; A fifth organic film layer is prepared on the shared anode layer and patterned to form a fifth barrier layer, thereby exposing the shared anode, the fourth passivation layer and the fourth organic film layer. The fourth organic film layer is etched to form the fourth pixel limiting layer, the fifth pixel limiting layer, and the third partition structure.

8. A display device, characterized in that, Includes the display panel as described in any one of claims 1 to 6.

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