A lin optocoupler isolation device

Abstract

This invention relates to a LIN optical coupling isolation device, belonging to the field of LIN optical coupling isolation technology, to solve the problem that LIN signal transmission via metal wires cannot effectively isolate conductive sources inside and outside an anechoic chamber. The LIN optical coupling isolation device includes: a LIN transceiver, a transmission limiting logic circuit, an optical transmitter, and an optical receiver; wherein, the LIN transceiver is used to realize the mutual conversion between the LIN signal and its corresponding data stream; the transmission limiting logic circuit is used to perform Boolean operations based on the output signal of the optical receiver and the data stream output by the LIN transceiver to generate a logic output signal; the logic output signal is unaffected by the output signal of the optical receiver within a set time delay; the optical transmitter is used to convert the logic output signal into an optical signal and emit it; the optical receiver is used to receive and process optical signals emitted from the optical transmitters of other LIN optical coupling isolation devices to obtain the current output signal of the optical receiver.

Description

Technical Field

[0001] This invention relates to the field of LIN optocoupler isolation technology, and more particularly to a LIN optocoupler isolation device. Background Technology

[0002] As electronic devices become more widely used and diverse, and as a product integrates more and more electronic components, communication between these devices requires bus technology. However, many devices do not need to use a relatively stable differential bus like the CAN bus. For example, many devices in automobiles use the LIN bus for communication between devices.

[0003] Automotive electronic devices have very high requirements for electromagnetic compatibility (EMC). Once a product design is completed, it needs to meet certain EMC standards to be considered a qualified product. If, during EMC testing, a metallic LIN (Linear Interference) conductor is directly used to connect the device under test (DUT) from the outside of the anechoic chamber to the DUT inside, then, assuming the DUT's own radiation level is just at the critical point of compliance, the additional electromagnetic interference from the external environment introduced into the anechoic chamber through the LIN conductor will cause the DUT's test results to fail to meet the standards. Therefore, isolating the conductive sources inside and outside the anechoic chamber is crucial.

[0004] There is a lack of technical solutions in the current technology to solve the problem of isolating conductive sources inside and outside the dark room by improving the LIN optical coupler isolation device. Summary of the Invention

[0005] Based on the above analysis, the present invention aims to provide a LIN optocoupler isolation device to solve the problem that transmitting LIN signals via metal wires cannot effectively isolate conductive sources inside and outside a dark room.

[0006] This invention discloses a LIN optical coupling isolation device, the device comprising: a LIN transceiver, a transmission limiting logic circuit, an optical transmitter, and an optical receiver; wherein,

[0007] The LIN transceiver is used to convert between LIN signals and their corresponding data streams.

[0008] The transmission limiting logic circuit is used to perform Boolean operations based on the output signal of the optical receiver and the data stream output by the LIN transceiver to generate a logic output signal; the logic output signal is not affected by the output signal of the optical receiver within a set time delay.

[0009] The optical transmitter is used to convert the logic output signal into an optical signal and emit it;

[0010] The optical receiver is used to receive and process optical signals emitted from optical transmitters of other LIN optically isolated devices to obtain the output signal of the current optical receiver.

[0011] Based on the above solution, this solution also makes the following improvements:

[0012] Furthermore, the transmission restriction logic circuit includes an OR gate, a NAND gate, and a delay circuit; wherein,

[0013] The RXD pin of the LIN transceiver is connected to one input of the OR gate, and the RXD pin of the LIN transceiver is used to output the data stream corresponding to the LIN signal; the output of the NAND gate is connected to the other input of the OR gate; the output of the OR gate is used to output the logic output signal.

[0014] The output of the optical receiver is connected to one input of the NAND gate; the output of the optical receiver is also connected to the input of the delay circuit, and the output of the delay circuit is connected to the other input of the NAND gate.

[0015] The delay time of the delay circuit is equal to the set delay.

[0016] Furthermore, the device also includes a pull-up resistor R12 and a filter capacitor C13; wherein,

[0017] A pull-up resistor R12 is connected between the output terminal of the optical receiver and the power supply VCC2;

[0018] A filter capacitor C13 is connected between the output terminal of the optical receiver and ground.

[0019] The output of the optical receiver is also connected to the TXD pin of the LIN transceiver.

[0020] Furthermore, the delay circuit includes a resistor R8 and a capacitor C10; wherein,

[0021] One end of resistor R8 serves as the input terminal of the delay circuit, and the other end of resistor R8 serves as the output terminal of the delay circuit.

[0022] The other end of the resistor R8 is also connected to a capacitor C10 and then grounded.

[0023] Furthermore, the device also includes a current limiting circuit; the current limiting circuit includes resistors R5 and R6; wherein,

[0024] One end of resistor R5 is connected to the EN pin of the LIN transceiver; the other end of resistor R5 is connected to one end of resistor R6, and the other end of resistor R5 is also connected to power supply VCC2.

[0025] The other end of resistor R6 is connected to the RXD pin of the LIN transceiver.

[0026] Furthermore, the device also includes a compensation circuit; the compensation circuit includes a resistor R4 and a diode D1, wherein,

[0027] One end of resistor R4 is connected to the LIN pin of the LIN transceiver;

[0028] The other end of resistor R4 is connected to the negative terminal of diode D1, and the positive terminal of diode D1 is connected to VCC1.

[0029] Furthermore, the device includes two or more LIN transceivers, each of which processes LIN signals with a different baud rate range;

[0030] Select the appropriate LIN transceiver based on the baud rate of the LIN signal received by the LIN transceiver.

[0031] Furthermore, the device also includes a terminal block, through which different wiring methods of the terminal block are used to connect the RXD pin of the working LIN transceiver to one input of the OR gate and enable the EN pin of the working LIN transceiver.

[0032] Furthermore, the CATHODE pin of the light emitter is connected to one end of resistor R1 and one end of resistor R3;

[0033] The other end of resistor R1 is grounded, and the other end of resistor R3 is connected to one end of capacitor C1 and one end of resistor R2.

[0034] The other end of capacitor C1 and the other end of resistor R2 are used to receive the logic output signal.

[0035] Furthermore, the device also includes a power input circuit for outputting power supplies VCC1 and VCC2; the power input circuit includes: capacitors C16-C19, resistor R11, reverse polarity protection diode D2, ESD diode D3, and inductor L2; wherein,

[0036] The positive terminal of the power supply is connected to one end of capacitor C16, one end of resistor R11, and the positive terminal of diode D2;

[0037] The other end of capacitor C16 is grounded;

[0038] The other end of resistor R11 is connected to the negative terminal of ESD diode D3, and the anode of ESD diode D3 is grounded.

[0039] The negative terminal of diode D2 is connected to one end of capacitor C19, and the other end of capacitor C19 is grounded.

[0040] The negative terminal of diode D2 is also connected to one end of inductor L2, and capacitors C17 and C18 are connected in parallel between the other end of inductor L2 and ground.

[0041] The other end of the inductor L2 outputs power supply VCC1;

[0042] Power supply VCC1 is converted to power supply VCC2.

[0043] Compared with the prior art, the present invention can achieve at least one of the following beneficial effects:

[0044] The LIN optocoupler isolation device provided by this invention has the following advantages:

[0045] First, LIN communication isolation was achieved through basic logic circuit design, effectively preventing mutual interference between LIN optocoupler isolation devices. Especially when used for EMC testing, it effectively prevents the optical signal emitted by the slave device's optical transmitter from affecting the TXD transmission signal of the host's LIN transceiver. This disconnects the direct electrical signal connection between the optical transmitter of one device and the optical receiver of another, effectively solving the problem that metal wire transmission of LIN signals cannot adequately isolate conduction sources inside and outside the anechoic chamber.

[0046] Secondly, compared to other products, it reduces production costs and product size.

[0047] Third, when the LIN optocoupler isolation device circuit is used for EMC testing, it can effectively isolate electromagnetic interference from the dark outdoor communication host computer and the air environment, improve the anti-interference capability of the test system, and reduce the test cost and the difficulty of troubleshooting in the EMC test process.

[0048] In this invention, the above-described technical solutions can be combined with each other to achieve more preferred combinations. Other features and advantages of this invention will be set forth in the following description, and some advantages may become apparent from the description or be learned by practicing the invention. The objects and other advantages of this invention can be realized and obtained from what is particularly pointed out in the description and drawings. Attached Figure Description

[0049] The accompanying drawings are for illustrative purposes only and are not intended to limit the invention. Throughout the drawings, the same reference numerals denote the same parts.

[0050] Figure 1 This is a circuit schematic diagram of the LIN optocoupler isolation device provided in Embodiment 1 of the present invention;

[0051] Figure 2 This is a schematic diagram of the electromagnetic compatibility testing system based on a LIN optocoupler isolation device provided in Embodiment 2 of the present invention;

[0052] Figure 3 This is a schematic diagram of the slave transmission restriction logic principle provided in Embodiment 2 of the present invention;

[0053] Figure 4 The logic level relationship of each node in the transmission restriction logic circuit provided in Embodiment 2 of the present invention. Detailed Implementation

[0054] Preferred embodiments of the present invention will now be described in detail with reference to the accompanying drawings, which form part of this application and are used together with the embodiments of the present invention to illustrate the principles of the present invention, but are not intended to limit the scope of the present invention.

[0055] Example 1

[0056] Embodiment 1 of this invention discloses a LIN optocoupler isolation device, the circuit schematic of which is shown below. Figure 1 As shown, the device includes: a LIN transceiver U1, a transmission limiting logic circuit, an optical transmitter, and an optical receiver; wherein, the LIN transceiver U1 is used to realize the mutual conversion between LIN signals and their corresponding data streams; the transmission limiting logic circuit is used to perform Boolean operations based on the output signal of the optical receiver and the data stream output by the LIN transceiver to generate a logic output signal; the logic output signal is not affected by the output signal of the optical receiver within a set time delay; the optical transmitter is used to convert the logic output signal into an optical signal and emit it; the optical receiver is used to receive and process the optical signals emitted by the optical transmitters of other LIN optical coupling isolation devices to obtain the output signal of the current optical receiver.

[0057] Compared with the prior art, the LIN optical coupler isolation device provided in this embodiment, by designing a transmission limiting logic circuit, ensures that the logic output signal is not affected by the output signal of the optical receiver within a set time delay, thereby ensuring that the optical signal emitted by the optical transmitter within a set time period is not affected by the output signal of the optical receiver within the same time period, thus effectively solving the problem of isolating external conductive sources.

[0058] The functions of a LIN transceiver include:

[0059] 1) Convert the TXD input data stream into a LIN signal with slew rate control and waveform shaping to minimize electromagnetic emission (EME);

[0060] 2) Detect the LIN signal on the LIN bus input pin and output the corresponding data stream through the RXD pin.

[0061] The LIN signal has a similar high / low variation pattern to the corresponding data stream, but the amplitude may be slightly different. The output signal has a certain transmission delay compared to the input signal.

[0062] Preferably, in this embodiment, the transmission limiting logic circuit includes an OR gate U4, a NAND gate U3, and a delay circuit; wherein, the RXD pin of the LIN transceiver is connected to one input of the OR gate, and the RXD pin of the LIN transceiver is used to output the data stream corresponding to the LIN signal; the output of the NAND gate is connected to the other input of the OR gate; the output of the OR gate is used to output the logic output signal; the output of the optical receiver is connected to one input of the NAND gate; the output of the optical receiver is also connected to the input of the delay circuit, and the output of the delay circuit is connected to the other input of the NAND gate; the delay time of the delay circuit is equal to the set delay; the output of the optical receiver is used to output the output signal of the optical receiver. The function of the transmission limiting logic circuit in isolating electrical signals is described in detail in Embodiment 2.

[0063] Preferably, the device further includes a pull-up resistor R12 and a filter capacitor C13; wherein, the pull-up resistor R12 is also connected between the output terminal of the optical receiver and the power supply VCC2; the filter capacitor C13 is also connected between the output terminal of the optical receiver and ground; and the output terminal of the optical receiver is also connected to the TXD pin of the LIN transceiver. By designing the pull-up resistor R12 and the filter capacitor C13, the output signal of the optical receiver can be pulled up and filtered, ensuring the stability of the output signal of the optical receiver.

[0064] Preferably, the delay circuit includes a resistor R8 and a capacitor C10; wherein one end of the resistor R8 serves as the input terminal of the delay circuit, and the other end of the resistor R8 serves as the output terminal of the delay circuit; the other end of the resistor R8 is also connected to the capacitor C10 and then grounded. In this embodiment, the delay time of the delay circuit is equal to the aforementioned set delay, and the value of the set delay needs to meet the following requirements: greater than the transmission delay of the LIN transceiver, and less than the bit time of the LIN baud rate (i.e., the hold time of one low level obtained by converting the maximum baud rate of the LIN signal). The transmission delay of the LIN transceiver refers to the delay of bidirectional transmission of the LIN transceiver, i.e., Figure 3 The diagram shows the physical transmission delay of the TXD→LIN→RXD signal. For example, if the transmission delay of the LIN transceiver is 6µs and the bit time of the LIN baud rate is 50µs, then the set delay is between 6µs and 50µs. In one implementation, the set delay was set to 8µs.

[0065] Preferably, the device further includes a current-limiting circuit; the current-limiting circuit includes resistors R5 and R6; wherein one end of resistor R5 is connected to the EN pin of the LIN transceiver; the other end of resistor R5 is connected to one end of resistor R6, and the other end of resistor R5 is also connected to power supply VCC2; the other end of resistor R6 is connected to the RXD pin of the LIN transceiver. In the current-limiting circuit, resistors R5 and R6 are both current-limiting resistors; wherein resistor R5 limits the current of the EN pin in the LIN transceiver, and R6 limits the current of the RXD pin.

[0066] Preferably, when the LIN signal line is long and the signal attenuation is severe, the device further includes a compensation circuit; the compensation circuit includes a resistor R4 and a diode D1, wherein one end of the resistor R4 is connected to the LIN pin of the LIN transceiver; the other end of the resistor R4 is connected to the negative terminal of the diode D1, and the positive terminal of the diode D1 is connected to VCC1. Therefore, this embodiment designs a pull-up resistor at the LIN signal input terminal to compensate for signal attenuation when the host computer signal weakens after long-distance transmission.

[0067] A preferred embodiment is as follows Figure 1 As shown, the positive terminal of the diode is connected to the power supply VCC1 via terminal P1. When signal compensation is required, the compensation circuit can be activated by shorting pins 1 and 2 of terminal P1. That is, by shorting pins 1 and 2, the positive terminal of the diode is connected to the power supply VCC1.

[0068] Preferably, the CATHODE pin of the optical transmitter is connected to one end of resistor R1 and one end of resistor R3; the other end of resistor R1 is grounded, and the other end of resistor R3 is connected to one end of capacitor C1 and one end of resistor R2; the other end of capacitor C1 and the other end of resistor R2 are used to receive the logic output signal. In addition, capacitors C5 and C6 are connected in parallel between the ANODE pin of the optical transmitter and ground.

[0069] In addition, the device also includes a power input circuit; the power input circuit includes: capacitors C16-C19, resistor R11, reverse polarity protection diode D2, ESD diode D3, and inductor L2; wherein, the positive terminal of the power supply is connected to one end of capacitor C16, one end of resistor R11, and the positive terminal of diode D2; the other end of capacitor C16 is grounded; the other end of resistor R11 is connected to the negative terminal of ESD diode D3, and the anode of ESD diode D3 is grounded; the negative terminal of diode D2 is connected to one end of capacitor C19, and the other end of capacitor C19 is grounded; the negative terminal of diode D2 is also connected to one end of inductor L2, and capacitors C17 and C18 are connected in parallel between the other end of inductor L2 and ground; the other end of inductor L2 outputs power supply VCC1; and power supply VCC1 is then converted to power supply VCC2. Specifically, the rated power supply is 12V, and the allowable input voltage range is 10V to 18V. In the power input circuit provided in this embodiment, resistor R11 and ESD diode D3 provide ESD protection.

[0070] Preferably, the power input circuit further includes a power conversion sub-circuit for converting power supply VCC1 to power supply VCC2. The power conversion sub-circuit includes capacitors C7-C9, inductor L1, resistors R7 and R9, and a voltage regulator chip; wherein the input terminal of the voltage regulator chip is connected to power supply VCC1; the input terminal of the voltage regulator chip is also grounded via capacitor C7; the output terminal of the voltage regulator chip is connected to one end of inductor L1 and one end of capacitor C9; the other end of capacitor C9 is grounded; a capacitor C8 is placed between the other end of inductor L1 and ground; the other end of inductor L1 outputs power supply VCC2; the output terminal of the voltage regulator chip is also grounded via resistors R7 and R9 connected in series; the connection point of resistors R7 and R9 is also connected to the AD terminal of the voltage regulator chip.

[0071] In this embodiment, considering the power supply voltage requirements of each device, the power supply voltage of power supply VCC1 is 12V, and the power supply voltage of power supply VCC2 is 5V, that is, VCC1 is 12V and VCC2 is 5V. The power supply voltages of power supplies VCC1 and VCC2 are allowed to vary within a certain range without affecting the normal operation of the devices.

[0072] Preferably, the device includes two or more LIN transceivers, each processing a different range of LIN signals with varying baud rates; the appropriate LIN transceiver is selected based on the baud rate of the LIN signals received. Specifically, the device also includes terminal blocks, through which different wiring methods are used to connect the RXD pin of the operating LIN transceiver to one input of the OR gate, and to enable the EN pin of the operating LIN transceiver. For example, as... Figure 1As shown, the system includes LIN transceivers U1 and U2. When LIN transceiver U1 is used, pins 1 and 2 of terminal P2 are connected to enable the EN pin of LIN transceiver U1. Simultaneously, pins 1 and 2 of terminal P3 are connected, and pin 1 of terminal P3 is connected to the RXD pin of LIN transceiver U1, thus connecting the RXD pin of LIN transceiver U1 to one input of an OR gate. When LIN transceiver U2 is used, pins 2 and 3 of terminals P2 and P3 are shorted. Therefore, U1 and U2 are two LIN transceivers with different baud rates. The appropriate LIN transceiver can be selected by shorting the jumper wires according to the actual LIN signal requirements.

[0073] It should be noted that the above description has already covered the schematic diagram. Figure 1 Most of the connections are explained. Any omissions refer to the standard settings for the relevant devices to achieve their functions. Figure 1 That's all; no further explanation is needed.

[0074] For example, in one implementation, the LIN transceiver was selected as TJA1028, the optical transmitter as HFBR-1414Z, and the optical receiver as HFBR-2412TZ.

[0075] Example 2

[0076] Embodiment 2 of this invention discloses a process for electromagnetic compatibility testing based on the LIN optocoupler isolation device described in Embodiment 1, to verify the effectiveness of the LIN optocoupler isolation device. A schematic diagram of the electromagnetic compatibility testing (EMC testing) system based on the LIN optocoupler isolation device is shown below. Figure 2 As shown, it includes, in sequence: a host computer, a master computer, a slave computer, and the device under test; wherein, both the master computer and the slave computer use the LIN optocoupler isolation device as described in Example 1. Figure 2 Pins 1, 2, and 3 shown in the example represent the LIN pin of the LIN transceiver, the output of the optical transmitter, and the input of the optical receiver, respectively. When used for electromagnetic interference performance testing, the master unit is placed outside the anechoic chamber and connected to the host computer via the LIN pin of the LIN transceiver; the slave unit is placed inside the anechoic chamber and connected to the device under test via the LIN pin of the LIN transceiver; the master and slave units exchange signals via optical fiber, realizing bidirectional information transmission of LIN signals. Due to the poor conductor effect of the optical fiber medium on electromagnetic signals, it can isolate electromagnetic interference signals outside the anechoic chamber.

[0077] The following describes the electromagnetic compatibility testing process to verify the effectiveness of the LIN optocoupler isolation device.

[0078] Step S1: The LIN pin of the LIN transceiver in the host computer receives and processes the LIN signal sent by the host computer;

[0079] After receiving the LIN signal, the host executes:

[0080] The LIN signal is converted into a corresponding data stream and sent through the RXD pin; there is a fixed LIN transmission delay between the data stream and the LIN signal;

[0081] The signal output from the RXD pin is transmitted to terminal B of the OR gate U4;

[0082] Assuming the optical receiver outputs a high level (default high level, low level active), after processing by the NAND gate, the output of NAND gate U3 remains low; therefore, the level of the NAND gate output to terminal A of OR gate U4 is also low.

[0083] At this time, the signal output (O terminal) of OR gate U4 (i.e., the logic output signal) is consistent with the signal output of RXD pin;

[0084] The logic output signal is processed by the optical transmitter, converted into an optical signal, and sent to the slave device.

[0085] Step S2: The optical receiver in the slave device receives and processes the optical signal emitted by the host device;

[0086] After receiving the optical signal from the host, the slave device executes:

[0087] After the slave optical receiver converts the received optical signal (from the master) into an electrical signal,

[0088] On one hand: connected to terminal A of U3, terminal B of U3 is the signal after RC delay of terminal A signal, and the signal after logical operation of signals A and B is C; signal C is used as one input of OR gate, and the other input signal D comes from the RXD pin of the LIN transceiver of the slave device;

[0089] On the other hand: the TXD pin of the LIN transceiver connected to the slave device is used to process the signal from the LIN pin in the slave device's LIN transceiver; the signal from the LIN pin in the slave device is then processed through a transmission delay to obtain the corresponding RXD signal, which forms the input signal D, such as... Figure 3 As shown. The maximum delay time is 6µs. Assume the set delay is 8s (i.e., the discharge time of the delay circuit). Therefore, the waveforms of signals A, B, D, and E in the slave circuit are as follows: Figure 4 As shown:

[0090] During time t1-t2: The slave device's optical receiver outputs a high level (active low); at this time, the outputs of signals A, B, and D are all high; after logic operation, signal E is also high.

[0091] At times t2-t3: The slave optical receiver receives a low level signal; at this time, signal A is low. Due to the delay circuit, signal B remains low. Figure 3 Due to the physical delay in the transmission of the TXD→LIN→RXD signal, signal D remains at a low level; at this time, after logical operation, signal E is also at a high level.

[0092] At times t3-t4: The slave optical receiver is still receiving a low level, so signal A is low; due to the existence of the delay circuit (the delay time of the delay circuit has not been reached), signal B remains high; because Figure 3 The physical delay of the TXD→LIN→RXD signal transmission is less than the delay time of the delay circuit. After processing by TXD→LIN→RXD, signal D becomes low at time t3; at this time, after logical operation, signal E also becomes high.

[0093] At time t4-t5: The slave optical receiver is still receiving a low level, and signal A is low. Due to the delay time of the delay circuit, signal B becomes low. Signal D remains low. At this time, after logic operation, signal E is also high.

[0094] At time t5-t6: Signal A returns to high level, while signals B and D remain low; at this time, after logical operation, signal E also becomes high.

[0095] At time t6-t7: Signal A remains high. At this time, signal D first becomes high, while signal B remains low. After logical operation, signal E also becomes high.

[0096] At time t7: Signal A remains high, signal D remains high, and signal B becomes low; at this time, after logical operation, signal E also becomes high.

[0097] The state at time t7 remains the same as the state at time t1; when signal A goes low, it switches back to the state at time t2. That is, the process of t1-t7 is repeated.

[0098] As can be seen, the logic output signal from the slave device will remain high, thus ensuring that the optical signal emitted by the slave device's optical transmitter also remains high. Therefore, during subsequent operation, the optical signal received by the master device's optical receiver from the slave device will also remain high (invalid signal). Consequently, the optical signal emitted by the slave device's optical transmitter has no effect on the TXD transmission signal of the master device's LIN transceiver, thus disconnecting the direct electrical signal connection between the optical transmitter of one device and the optical receiver of another.

[0099] Similarly, the principle is the same when LIN signals are transmitted in the slave-to-master direction.

[0100] Step S3: The LIN signal output by the slave device is also transmitted to the device under test.

[0101] In summary, LIN signals are a bus transmission method that uses a single wire for transmission. When the transmission line is a metal wire, both the master and slave devices can pull the bus low. When using optocouplers to achieve LIN bus isolation, the conversion process needs to consider the delay characteristics of bus transmission. The purpose of this embodiment is to find a way to achieve optocoupler-isolated LIN communication using basic logic circuit design. By using basic logic circuit design, it can achieve the electrical signal isolation function of LIN communication isolation while reducing production costs and product size compared to other products.

[0102] In EMC testing, if traditional metal conductor wire communication is used, the LIN bus itself acts as an electromagnetic interference source during electromagnetic interference testing. It can transmit ambient noise to the test equipment, causing the system noise floor to exceed limits and ultimately preventing the test from continuing. If the final test result exceeds the limits, and the EMC performance of the device under test cannot be ruled out, the manufacturer of the device under test will accept the deviation. This deviation acceptance process increases procedures and costs. The LIN optocoupler isolation device provided in this embodiment effectively isolates electromagnetic interference from the dark outdoor communication host computer and the ambient air, improving the anti-interference capability of the test system. Simultaneously, it reduces the testing cost and the difficulty of troubleshooting in the EMC testing process.

[0103] Those skilled in the art will understand that all or part of the processes of the methods described in the above embodiments can be implemented by a computer program instructing related hardware, and the program can be stored in a computer-readable storage medium. The computer-readable storage medium may be a disk, optical disk, read-only memory, or random access memory, etc.

[0104] The above description is only a preferred embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any changes or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in the present invention should be included within the scope of protection of the present invention.

Claims

1. A LIN optocoupler isolation device, characterized in that, The device includes: a LIN transceiver, transmission limiting logic circuitry, an optical transmitter, and an optical receiver; wherein... The LIN transceiver is used to convert between LIN signals and their corresponding data streams. The transmission limiting logic circuit is used to perform Boolean operations based on the output signal of the optical receiver and the data stream output by the LIN transceiver to generate a logic output signal; the logic output signal is not affected by the output signal of the optical receiver within a set time delay. The optical transmitter is used to convert the logic output signal into an optical signal and emit it; The optical receiver is used to receive and process optical signals emitted from optical transmitters of other LIN optical coupling isolation devices to obtain the output signal of the current optical receiver. The transmission restriction logic circuit includes an OR gate, a NAND gate, and a delay circuit; wherein... The RXD pin of the LIN transceiver is connected to one input of the OR gate, and the RXD pin of the LIN transceiver is used to output the data stream corresponding to the LIN signal; the output of the NAND gate is connected to the other input of the OR gate; the output of the OR gate is used to output the logic output signal. The output of the optical receiver is connected to one input of the NAND gate; the output of the optical receiver is also connected to the input of the delay circuit, and the output of the delay circuit is connected to the other input of the NAND gate. The delay time of the delay circuit is equal to the set delay.

2. The LIN optocoupler isolation device according to claim 1, characterized in that, The device also includes a pull-up resistor R12 and a filter capacitor C13; wherein... A pull-up resistor R12 is connected between the output terminal of the optical receiver and the power supply VCC2; A filter capacitor C13 is connected between the output terminal of the optical receiver and ground. The output of the optical receiver is also connected to the TXD pin of the LIN transceiver.

3. The LIN optocoupler isolation device according to claim 1, characterized in that, The delay circuit includes a resistor R8 and a capacitor C10; wherein... One end of resistor R8 serves as the input terminal of the delay circuit, and the other end of resistor R8 serves as the output terminal of the delay circuit. The other end of the resistor R8 is also connected to a capacitor C10 and then grounded.

4. The LIN optocoupler isolation device according to claim 1, characterized in that, The device further includes a current-limiting circuit; the current-limiting circuit includes resistors R5 and R6; wherein... One end of resistor R5 is connected to the EN pin of the LIN transceiver; the other end of resistor R5 is connected to one end of resistor R6, and the other end of resistor R5 is also connected to power supply VCC2. The other end of resistor R6 is connected to the RXD pin of the LIN transceiver.

5. The LIN optocoupler isolation device according to claim 1, characterized in that, The device further includes a compensation circuit; the compensation circuit includes a resistor R4 and a diode D1, wherein, One end of resistor R4 is connected to the LIN pin of the LIN transceiver; The other end of resistor R4 is connected to the negative terminal of diode D1, and the positive terminal of diode D1 is connected to VCC1.

6. The LIN optocoupler isolation device according to any one of claims 1-5, characterized in that, The device includes two or more LIN transceivers, each of which processes LIN signals with a different baud rate range. Select the appropriate LIN transceiver based on the baud rate of the LIN signal received by the LIN transceiver.

7. The LIN optocoupler isolation device according to claim 6, characterized in that, The device also includes a terminal block, through which different wiring methods of the terminal block are used to connect the RXD pin of the working LIN transceiver to one input of the OR gate and enable the EN pin of the working LIN transceiver.

8. The LIN optocoupler isolation device according to claim 1, characterized in that, The CATHODE pin of the optical transmitter is connected to one end of resistor R1 and one end of resistor R3. The other end of resistor R1 is grounded, and the other end of resistor R3 is connected to one end of capacitor C1 and one end of resistor R2. The other end of capacitor C1 and the other end of resistor R2 are used to receive the logic output signal.

9. The LIN optocoupler isolation device according to claim 1, characterized in that, The device further includes a power input circuit for outputting power supplies VCC1 and VCC2; the power input circuit includes: capacitors C16-C19, resistor R11, reverse polarity protection diode D2, ESD diode D3, and inductor L2; wherein... The positive terminal of the power supply is connected to one end of capacitor C16, one end of resistor R11, and the positive terminal of diode D2; The other end of capacitor C16 is grounded; The other end of resistor R11 is connected to the negative terminal of ESD diode D3, and the anode of ESD diode D3 is grounded. The negative terminal of diode D2 is connected to one end of capacitor C19, and the other end of capacitor C19 is grounded. The negative terminal of diode D2 is also connected to one end of inductor L2, and capacitors C17 and C18 are connected in parallel between the other end of inductor L2 and ground. The other end of the inductor L2 outputs power supply VCC1; Power supply VCC1 is converted to power supply VCC2.

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