A method and system for redundant network address accelerated storage lookup in the industry

Abstract

The application discloses a redundant network address acceleration storage searching method and system in the industry, relates to the power system and the industrial control technical field, and comprises the following steps: receiving redundant Ethernet messages and rejecting specific redundant messages; marking and counting source MAC addresses through a PRP / HSR protocol redundant network; judging whether the MAC of the node and most of the marked MAC addresses have a common part according to the marked MAC address condition, and replacing the source MAC address according to the common part; reducing and converging the source MAC address according to the marked source MAC address; redundantly communicating the converged source MAC address, storing the common part of the source MAC address after the reduction and convergence and the message sequence number; searching according to the converged source MAC address and the message sequence number; and restoring the source MAC address for the source MAC address message with replacement. The application realizes the redundant network address acceleration storage searching as a whole, and improves the processing efficiency of searching and discarding redundant messages.

Description

Technical Field

[0001] This invention relates to the fields of power systems and industrial control technology, and in particular to a method and system for accelerating the storage and lookup of redundant network addresses in the industrial control industry. Background Technology

[0002] Redundant networks are frequently used in power systems and industrial control to achieve dual-network or ring-network redundancy communication between multiple devices. In the event of a network failure, the redundant network provides stable communication between devices. In 2008, IEC SC65 WG15 released the IEC 62439 High Availability Automation Network Protocol. IEC 62439-3 specifies the Parallel Redundancy Protocol (PRP) and the High Reliability Seamless Ring Network Redundancy Protocol (HSR), which decentralizes redundant network processing to the underlying dedicated chip or FPGA logic, improving the efficiency of upper-layer software processing. The underlying dedicated chip or FPGA logic selects the first arriving message data and discards subsequent messages from the same path. In the event of a network failure, the redundant network can switch over.

[0003] The algorithm for finding and discarding redundant packets in dual-network communication is crucial to the PRP / HSR protocol. This discarding algorithm utilizes a lookup table for storing and retrieving judgment information. The lookup table stores packet judgment information, including the PRP / HSR Ethernet packet source MAC address (SA) and data frame sequence number (SEQ). This information is used for node and redundant packet identification, as well as for the lookup and discarding algorithm to process redundant Ethernet packets. The information storage and retrieval mechanism directly impacts the real-time performance and reliability of the PRP / HSR protocol.

[0004] Currently, most manufacturers use direct RAM storage for MAC addresses and data frame sequence numbers, and use circular lookup or hash lookup methods for searching. However, due to the 6-byte width of the MAC address, it consumes a lot of FPGA storage resources and has a long access time, making it difficult to balance FPGA resources and costs. At the same time, the MAC address information obtained by storing the lookup table in direct RAM is time-consuming, which affects the decision time of the lookup and discard processing algorithm. Summary of the Invention

[0005] In view of the problems existing in the storage of MAC addresses and / or data frame sequence numbers as described above and / or in existing systems, this invention is proposed.

[0006] Therefore, the problem to be solved by this invention is how to provide a method that saves FPGA storage resources, saves MAC address storage time, quickly converges the source MAC address lookup range, speeds up the source MAC address lookup, and realizes accelerated storage lookup of redundant network addresses.

[0007] To solve the above-mentioned technical problems, the present invention provides the following technical solution:

[0008] In a first aspect, embodiments of the present invention provide a method for accelerating the storage and lookup of redundant network addresses in the industrial control industry. The method includes: receiving redundant Ethernet packets and rejecting specific redundant packets; statistically marking source MAC addresses using a PRP / HSR protocol for redundant network access; determining whether to replace the MAC address based on the marked MAC addresses; performing dimensionality reduction and convergence of source MAC addresses based on the marked source MAC addresses; performing redundant data communication on the converged source MAC addresses; storing the common portion of the converged source MAC addresses and the packet sequence number using a BLACKRAM fragmentation storage method according to protocol rules; performing a lookup based on the converged source MAC addresses and the packet sequence number; and, according to protocol rules, when receiving packets with the same sequence number, receiving the first arriving packet and discarding the later arriving packet.

[0009] As a preferred embodiment of the redundant network address acceleration storage and lookup method for the industrial control industry described in this invention, when receiving redundant Ethernet packets, the source MAC address is statistically marked through the PRP / HSR protocol redundant network, the source MAC address of all nodes is recorded, the same byte in the 6 bytes of the source MAC address of each node device in the redundant network is found, and the different bytes in the 6 bytes of the source MAC address of the node device are marked.

[0010] As a preferred embodiment of the redundant network address acceleration storage lookup method for industrial control industries described in this invention, the process of looking up based on the converged source MAC address and message sequence number is as follows: multiple BlockRAMs inside the FPGA are used to store the converged source MAC address and message sequence number information of multi-node devices in segments, forming multiple segmented lookup tables to realize parallel high-speed lookup of multi-node source MAC addresses.

[0011] As a preferred embodiment of the redundant network address acceleration storage and lookup method for industrial control industries described in this invention, the process of determining whether to replace the MAC address involves determining whether the MAC address of the current node has a common part with the marked MAC address. If there is no common part, then the MAC address is replaced.

[0012] As a preferred embodiment of the redundant network address acceleration storage and lookup method for the industrial control industry described in this invention, the MAC address replacement includes: when a node receives a message, after confirming receipt through a lookup table and a discard algorithm, if the source MAC addresses of the node device and other devices in the redundant network have no commonality in the 6 bytes, and if the target MAC address of this message is a MAC address that has been modified and replaced by this device node according to the MAC address statistical marking, then the FPGA restores the target MAC address in the received message to the original MAC address of this node according to the mapping relationship of automatically allocated replacement MAC addresses through the MAC address self-recovery mechanism; when sending a message, the source MAC address in the sent message is replaced with the same form as the marked source MAC address, that is, a MAC address with commonality and difference in the 6 bytes, and at the same time, combined with the source MAC address anti-collision mechanism, it is kept different from other nodes.

[0013] As a preferred embodiment of the industrial control industry redundant network address acceleration storage lookup method described in this invention, the rejection of specific redundant messages is achieved by using FPGA to perform front-end processing on specific redundant messages in the PRP / HSR redundant network, excluding the reception of irrelevant network messages of this node, and reducing unnecessary redundant message input.

[0014] As a preferred embodiment of the industrial control industry redundant network address acceleration storage and lookup method described in this invention, when the source MAC addresses have no commonality, the source MAC addresses need to be replaced; otherwise, MAC address dimensionality reduction and convergence cannot be performed.

[0015] Secondly, to further address the existing problems in the storage of MAC addresses and data frame sequence numbers, this invention provides an accelerated storage and lookup system for redundant network addresses in the industrial control sector. The system includes an Ethernet transceiver module for receiving and sending redundant packets; a module for rejecting specific redundant packets, used to filter input packets and exclude irrelevant redundant packets; a source MAC address statistics and marking module for statistically marking source MAC addresses to achieve source MAC address dimensionality reduction statistics; a local MAC address replacement module for determining whether to perform source MAC address replacement, achieving source MAC address dimensionality reduction replacement; and a MAC address dimensionality reduction convergence module for determining the source MAC address based on the marking statistics results and M... The AC address replacement result is used to perform dimensionality reduction and convergence of the source MAC address; the BLOCKRAM segmented storage module is used to establish a lookup table of converged source MAC address and packet sequence number information using the FPGA's segmented storage method; the MAC address timed aging and elimination module is used to periodically eliminate infrequently used MAC address information in the BlockRAM, reducing the number of source MAC addresses and packet sequence numbers in the lookup table; the MAC address dimensionality reduction lookup judgment and redundant packet discarding algorithm module is used to perform redundant packet lookup and discarding processing based on the stored source MAC address and packet sequence number information, receiving the first packet in the same redundant packet and discarding the later packets.

[0016] Thirdly, embodiments of the present invention provide a computer device, including a memory and a processor, wherein the memory stores a computer program, and the computer program, when executed by the processor, implements any step of the industrial control industry redundant network address accelerated storage lookup method as described in the first aspect of the present invention.

[0017] Fourthly, embodiments of the present invention provide a computer-readable storage medium having a computer program stored thereon, wherein: when the computer program is executed by a processor, it implements any step of the industrial control industry redundant network address accelerated storage lookup method as described in the first aspect of the present invention.

[0018] The beneficial effects of this invention are as follows: it saves FPGA storage resources, reduces MAC address storage time, quickly converges the source MAC address lookup range, and through BlockRAM fragmented storage, it can find more node information when looking for the same address. At the same time, rejecting specific redundant packets and periodically removing infrequently used MAC address information in BlockRAM can also reduce the storage and lookup of source MAC address information. Overall, it realizes accelerated storage and lookup of redundant network addresses and improves the processing efficiency of finding and discarding redundant packets. Attached Figure Description

[0019] To more clearly illustrate the technical solutions of the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort. Wherein:

[0020] Figure 1 This is a block diagram of dual-network redundant message processing in the redundant network address acceleration storage lookup method for industrial control systems in Example 1.

[0021] Figure 2 This is the original MAC address lookup table for the redundant network address acceleration lookup method in the industrial control industry in Example 2.

[0022] Figure 3 This is the MAC address optimized storage lookup table for the redundant network address accelerated storage lookup method in the industrial control industry in Example 2. Detailed Implementation

[0023] To make the above-mentioned objects, features and advantages of the present invention more apparent and understandable, the specific embodiments of the present invention will be described in detail below with reference to the accompanying drawings.

[0024] Many specific details are set forth in the following description in order to provide a full understanding of the invention. However, the invention may also be practiced in other ways different from those described herein, and those skilled in the art can make similar extensions without departing from the spirit of the invention. Therefore, the invention is not limited to the specific embodiments disclosed below.

[0025] Secondly, the term "one embodiment" or "embodiment" as used herein refers to a specific feature, structure, or characteristic that may be included in at least one implementation of the present invention. The phrase "in one embodiment" appearing in different places in this specification does not necessarily refer to the same embodiment, nor is it a single or selective embodiment that is mutually exclusive with other embodiments.

[0026] Example 1

[0027] Reference Figure 1 This is the first embodiment of the present invention, which provides a method for accelerating the storage and lookup of redundant network addresses in the industrial control industry, including the following steps:

[0028] S1: Receive redundant Ethernet messages and reject specific redundant messages.

[0029] Furthermore, when receiving redundant Ethernet messages, the source MAC address is statistically marked through the PRP / HSR protocol redundancy network. The source MAC address of all nodes is recorded, the same 6 bytes of the source MAC address of each node device in the redundancy network are found, and the different 6 bytes of the source MAC address of the node device are marked.

[0030] Rejecting specific redundant packets involves using FPGA to perform front-end processing on specific redundant packets in the PRP / HSR redundant network, excluding the reception of irrelevant network packets from the local node, thereby minimizing the received traffic of the redundant network, reducing unnecessary redundant packet input, reducing the storage and lookup of MAC address information, and improving the efficiency of finding and discarding redundant packets. Examples include packets with target MAC addresses other than the local node, multicasts based on relevant rules, or network storms. This minimizes the received traffic of the redundant network, reduces unnecessary redundant packet input, reduces the storage and lookup of MAC address information, and improves the efficiency of finding and discarding redundant packets.

[0031] S2: Statistical marking of source MAC addresses through a redundant network using the PRP / HSR protocol.

[0032] S3: Determine whether to replace the MAC address based on the marked MAC address.

[0033] Furthermore, the process for determining whether to replace the MAC address involves checking whether the MAC address of this node has any common parts with the marked MAC address. If there are no common parts, then the MAC address is replaced.

[0034] Preferably, when a node receives a message, after confirming receipt through a lookup table and a discard algorithm, if the source MAC address of the node device and other devices in the redundant network has no commonality in the 6 bytes, and if the target MAC address of this message is a MAC address that has been modified and replaced by this device node according to the MAC address statistical marker, then the FPGA restores the target MAC address in the received message to the original MAC address of this node through the MAC address self-recovery mechanism, based on the mapping relationship of automatically allocated replacement MAC addresses.

[0035] When sending a message, the source MAC address in the message is replaced with a 6-byte MAC address that has both commonalities and differences. At the same time, the source MAC address anti-collision mechanism is combined to keep it different from other nodes.

[0036] It should be noted that when sending messages, the source MAC address in the sent message is replaced with the same format as the marked source MAC address, that is, a 6-byte MAC address with commonalities and differences. At the same time, combined with the source MAC address anti-collision mechanism, it is kept different from other nodes.

[0037] like Figure 1As shown, taking a DCS system as an example, the system contains DCS devices, servers, and monitoring terminals, assuming a maximum of 256 such nodes. When the system devices first start working, the FPGA's Ethernet transceiver module receives relevant messages sent to the local node. When receiving messages, the PRP / HSR protocol redundancy network statistically marks the source MAC addresses, recording the source MAC addresses of all nodes. It identifies the identical bytes in the 6 bytes of the source MAC addresses of each node in the redundancy network and marks the differing bytes. Typically, each node in the system has 5 identical bytes and 1 different byte in its source MAC address. This differing byte is stored in a BlockRAM fragment lookup table.

[0038] S4: Perform dimensionality reduction and convergence of the source MAC addresses based on the marked source MAC addresses.

[0039] Preferably, the source MAC address of Ethernet packets in the PRP / HSR redundant network is statistically marked by the FPGA of each node device in the power system or industrial control system. The common part of the 6 bytes of the source MAC address is removed, and the difference part of the 6 bytes of the source MAC address is stored to form a lookup table. This reduces the dimensionality of storing source MAC addresses. The same storage space can store more converged source MAC addresses of nodes, saving FPGA storage resources. At the same time, each node only needs to store the bytes of source MAC that are different, saving storage time.

[0040] It should be noted that when the source MAC addresses have no commonalities, the source MAC addresses need to be replaced; otherwise, MAC address dimensionality reduction and convergence cannot be achieved.

[0041] For example, based on the results of the previous source MAC address statistics, most nodes in the statistical system have 5 bytes of the same source MAC address and 1 byte that is different. However, the MAC address of this node does not match this result. The FPGA replaces the MAC address of this node with a MAC address that is consistent with the results of the statistics: 5 bytes of the same and 1 byte that is different (keeping it different from other nodes). The source MAC address in the sent message is replaced with a 6-byte MAC address that has both commonalities and differences, making it convenient for other receiving nodes to store and find the different MAC addresses.

[0042] Rapidly narrow the MAC address lookup range and improve lookup and discard speed: By rapidly iterating MAC addresses and reducing the dimensionality of MAC addresses, only the source MAC address portions that differ are stored and searched. This saves the time and resources of FPGA in storing the source MAC addresses of each node, rapidly narrows the source MAC address lookup range, improves the speed of finding key information in redundant packets, and increases the lookup and discard speed.

[0043] S5: The converged source MAC addresses are used for redundant data communication. According to the protocol rules, the common part of the converged source MAC addresses and the message sequence number are stored using the BLACKRAM fragmentation storage method.

[0044] S6: Search based on the converged source MAC address and message sequence number. According to the protocol rules, when receiving the same message with the same sequence number, receive the message that arrives first and discard the message that arrives later.

[0045] Preferably, the process of searching based on the converged source MAC address and message sequence number is as follows: Multiple BlockRAMs within the FPGA are used to store the converged source MAC address and message sequence number information of multiple node devices, forming multiple fragmented lookup tables. This enables parallel high-speed searching of source MAC addresses from multiple nodes, allowing for parallel storage and searching of source MAC addresses from up to 64 BlockRAM nodes. This improves access efficiency, allows searching for the same address to retrieve more node information, and solves the problem that directly storing MAC address information from the lookup table in RAM is time-consuming and affects the decision-making time of the discarding algorithm. Simultaneously, infrequently used MAC addresses and message sequence numbers in the BlockRAM are periodically removed, reducing the number of source MAC addresses and message sequence numbers in the lookup tables and improving real-time hit efficiency.

[0046] It should be noted that this method supports Ethernet message rates of 10M, 100M and 1000M, depending on the different requirements of the application environment; this method is applicable to both optical fiber and electrical cable transmission media.

[0047] The embodiment also provides an accelerated storage and lookup system for redundant network addresses in the industrial control industry, including an Ethernet transceiver module for receiving and sending redundant packets; a specific redundant packet rejection module for filtering input packets and excluding irrelevant redundant packets; a source MAC address statistics and marking module for statistically marking source MAC addresses to achieve source MAC address dimensionality reduction statistics; a local MAC address replacement module for determining whether to perform source MAC address replacement to achieve source MAC address dimensionality reduction replacement; and a MAC address dimensionality reduction convergence module for reducing the source MAC address dimensionality based on the marking statistics results and MAC address replacement results. The system includes: a dimensionality reduction and redundant packet discarding algorithm module; a BlockRAM segmented storage module, which uses the FPGA's segmented storage method to establish a lookup table for converged source MAC addresses and packet sequence numbers; a MAC address timed aging and elimination module, which periodically eliminates infrequently used MAC address information in the BlockRAM to reduce the number of source MAC addresses and packet sequence numbers in the lookup table; and a MAC address dimensionality reduction lookup judgment and redundant packet discarding algorithm module, which performs redundant packet lookup and discarding based on the stored source MAC address and packet sequence number information, receiving the first packet in the same redundant packet set and discarding the later packets.

[0048] This embodiment also provides a computer device applicable to the industrial control industry's method for accelerating the storage and lookup of redundant network addresses, including: a memory and a processor; the memory is used to store computer-executable instructions, and the processor is used to execute the computer-executable instructions to implement the industrial control industry's method for accelerating the storage and lookup of redundant network addresses as proposed in the above embodiment; it also includes an industrial control device, including an FPGA and a memory, wherein the memory stores an FPGA program.

[0049] The computer device can be a terminal, comprising a processor, memory, communication interface, display screen, and input devices connected via a system bus. The processor provides computing and control capabilities. The memory includes non-volatile storage media and internal memory. The non-volatile storage media stores the operating system and computer programs. The internal memory provides an environment for the operation of the operating system and computer programs stored in the non-volatile storage media. The communication interface is used for wired or wireless communication with external terminals; wireless communication can be achieved through Wi-Fi, carrier networks, NFC (Near Field Communication), or other technologies. The display screen can be an LCD screen or an e-ink screen. The input devices can be a touch layer covering the display screen, buttons, a trackball, or a touchpad on the computer device's casing, or an external keyboard, touchpad, or mouse.

[0050] This embodiment also provides a storage medium storing a computer program. When executed by a processor, the program implements the method for accelerating storage lookup of redundant network addresses in industrial control systems as proposed in the above embodiments. The storage medium can be implemented by any type of volatile or non-volatile storage device or a combination thereof, such as Static Random Access Memory (SRAM), Electrically Erasable Programmable Read-Only Memory (EEPROM), Erasable Programmable Read Only Memory (EPROM), Programmable Red-Only Memory (PROM), Read-Only Memory (ROM), magnetic storage, flash memory, magnetic disk, or optical disk.

[0051] In summary, this invention saves FPGA storage resources, reduces MAC address storage time, quickly converges the source MAC address lookup range, and uses BlockRAM fragmented storage to search for more node information at the same address. At the same time, rejecting specific redundant packets and periodically removing infrequently used MAC address information from BlockRAM also reduces the storage and search of source MAC address information. Overall, it accelerates the storage and search of redundant network addresses and improves the processing efficiency of searching and discarding redundant packets.

[0052] Example 2

[0053] Reference Figure 2 and Figure 3 This is the second embodiment of the present invention. Based on the first embodiment, in order to verify its beneficial effects, a comparison table of the industrial control industry redundant network address acceleration storage lookup method of the present invention with the prior art is provided.

[0054] The following table shows a comparison between the present invention and the prior art:

[0055] Table 1

[0056]

[0057] The MAC address replacement mechanism of this invention automatically replaces MAC addresses based on address commonalities, maintaining differentiation while increasing commonalities; the segmented parallel lookup table utilizes the Block RAM of the FPGA to achieve segmented storage and parallel lookup; the front-end rejection mechanism uses the FPGA to filter irrelevant and redundant packets, which can effectively reduce input traffic; and the MAC address dimensionality reduction and convergence stores only the common part of the address, which can reduce storage dimensionality and save resources.

[0058] like Figure 2 The diagram shown is a raw storage lookup chart of the source MAC address provided in this embodiment. Before optimization (6 bytes for the source MAC address), different BlockRAMs at the same address can only store source MAC address information for 16 nodes.

[0059] like Figure 3 The diagram shows the optimized MAC address lookup table provided by this method. It significantly increases the number of nodes with different source MAC addresses stored in the FPGA. When querying the source MAC address at the same address, it can obtain 6 times more source MAC address information, increasing the query speed by 6 times and improving access efficiency. It can also find more node information when searching for the same address, solving the problem that the MAC address information obtained by directly storing the lookup table in RAM is time-consuming and affects the decision time of the discard processing algorithm. At the same time, it periodically removes infrequently used MAC address information from the BlockRAM, reducing the number of source MAC addresses and packet sequence numbers in the lookup table and improving real-time hit efficiency.

[0060] It can be seen that this invention saves FPGA storage resources, reduces MAC address storage time, quickly converges the source MAC address lookup range, and uses BlockRAM fragmented storage to look up more node information for the same address. At the same time, rejecting specific redundant packets and periodically removing infrequently used MAC address information in BlockRAM can also reduce the storage and lookup of source MAC address information. Overall, it realizes accelerated storage and lookup of redundant network addresses and improves the processing efficiency of finding and discarding redundant packets.

[0061] It should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention and are not intended to limit it. Although the present invention has been described in detail with reference to preferred embodiments, those skilled in the art should understand that modifications or equivalent substitutions can be made to the technical solutions of the present invention without departing from the spirit and scope of the technical solutions of the present invention, and all such modifications or substitutions should be covered within the scope of the claims of the present invention.

Claims

1. A method for accelerating the storage and lookup of redundant network addresses in the industrial control industry, characterized in that: include: Accept redundant Ethernet packets and reject specific redundant packets; When receiving redundant Ethernet messages, the source MAC addresses are statistically marked through the PRP / HSR protocol redundancy network. The source MAC addresses of all nodes are recorded, the same bytes in the 6 bytes of the source MAC addresses of each node device in the redundancy network are found, and the bytes that are different in the 6 bytes of the source MAC addresses of the node devices are marked. Statistical marking of source MAC addresses is achieved through a redundant network using the PRP / HSR protocol. Based on the marked MAC address, determine whether to replace the MAC address; The process for determining whether to replace the MAC address involves checking whether the MAC address of this node has any common parts with the marked MAC address. If there are no common parts, then the MAC address is replaced. Based on the marked source MAC addresses, perform dimensionality reduction and convergence of the source MAC addresses; The converged source MAC addresses are used for redundant data communication. According to the protocol rules, the common part of the converged source MAC addresses and the message sequence number are stored using the BLACKRAM fragment storage method. The search is performed based on the converged source MAC address and message sequence number. According to the protocol rules, when the same message sequence number is received, the message that arrives first is received and the message that arrives later is discarded. The process of searching based on the converged source MAC address and message sequence number is as follows: multiple BlockRAMs inside the FPGA are used to store the converged source MAC address and message sequence number information of the multi-node devices in segments, forming multiple segmented lookup tables to realize parallel high-speed search of multi-node source MAC addresses.

2. The method for accelerating storage and lookup of redundant network addresses in the industrial control industry as described in claim 1, characterized in that: The replaced MAC address includes, When a node receives a message, after confirming receipt through a lookup table and a discarding algorithm, if the source MAC address of the node device and other devices in the redundant network has no commonality in the 6 bytes, and if the target MAC address of this message is a MAC address that this device node has modified and replaced according to the MAC address statistics mark, then the FPGA restores the target MAC address in the received message to the original MAC address of this node through the MAC address self-recovery mechanism and according to the mapping relationship of automatically allocated and replaced MAC addresses. When sending a message, the source MAC address in the message is replaced with the same format as the marked source MAC address, that is, a 6-byte MAC address with commonalities and differences. At the same time, combined with the source MAC address anti-collision mechanism, it is kept different from other nodes.

3. The method for accelerating storage and lookup of redundant network addresses in the industrial control industry as described in claim 2, characterized in that: The specific redundant messages that are rejected are: By using FPGA to perform front-end processing on redundant messages in the PRP / HSR redundant network, the reception of irrelevant network messages at this node is eliminated, reducing unnecessary redundant message input.

4. The method for accelerating storage and lookup of redundant network addresses in the industrial control industry as described in claim 3, characterized in that: When source MAC addresses have no commonalities, the source MAC addresses need to be replaced; otherwise, MAC address dimensionality reduction and convergence cannot be achieved.

5. A redundant network address acceleration storage and lookup system for industrial control systems, based on the redundant network address acceleration storage and lookup method for industrial control systems according to any one of claims 1 to 4, characterized in that: It also includes, The Ethernet transceiver module is responsible for receiving and sending redundant messages; The "Reject Specific Redundant Messages" module is used to filter input messages and exclude irrelevant redundant messages. The source MAC address statistics and tagging module is used to statistically tag source MAC addresses, thereby achieving dimensionality reduction statistics of source MAC addresses; The local MAC address replacement module is used to determine whether to perform source MAC address replacement and to achieve source MAC address dimensionality reduction replacement. The MAC address dimensionality reduction and convergence module is used to perform dimensionality reduction and convergence of the source MAC address based on the tagging statistics and MAC address replacement results. The BLOCKRAM segmented storage module is used to establish a lookup table for the converged source MAC address and message sequence number information using the FPGA's segmented storage method. The MAC address timed aging and elimination module is used to periodically eliminate infrequently used MAC address information in BlockRAM, reducing the number of source MAC addresses and packet sequence numbers to look up in the table; The MAC address dimensionality reduction lookup and redundant packet discarding algorithm module is used to search for and discard redundant packets based on the stored source MAC address and packet sequence number information. It receives the first packet in the same redundant packet and discards the later packets.

6. A computer device comprising a memory and a processor, wherein the memory stores a computer program, characterized in that: When the processor executes the computer program, it implements the steps of the industrial control industry redundant network address accelerated storage lookup method according to any one of claims 1 to 4.

7. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by the processor, it implements the steps of the industrial control industry redundant network address accelerated storage lookup method according to any one of claims 1 to 4.

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