Packaging substrate, packaging structure and manufacturing method thereof

Abstract

The present application proposes a packaging substrate, including a carrier, a first solder mask and a first solder ball, the carrier including a first circuit layer, the first circuit layer including a plurality of solder pads arranged at intervals, the first solder mask covering the first circuit layer, the first solder mask being provided with a plurality of first openings and a second opening, the solder pads being exposed from the bottom of the first openings, the second openings being provided at opposite sides of each of the solder pads, the second openings being connected to the first openings; the first solder ball being provided on the solder pads, the first solder ball closing the first openings to form a cavity; wherein the cavity is used to shield the electromagnetic signal transmitted by the first solder ball. The packaging substrate is provided with a "convex" shaped cavity in the first solder mask, which is beneficial to the shielding of the conductive signal and improves the electrical performance of the subsequent packaging structure. The present application also provides a packaging structure including the packaging substrate, and a manufacturing method of the packaging substrate and the packaging structure.

Description

Technical Field

[0001] The present application relates to the technical field of circuit board manufacturing, and in particular to a packaging substrate, a packaging structure and a manufacturing method thereof. Background Art

[0002] Functional components (such as chips, etc.) are usually set on the packaging substrate through solder bumps. As the electrical requirements of electronic products become higher and higher, cavities also need to be designed in the solder bump part to improve signal shielding and enhance the electrical performance of the overall packaging structure.

[0003] In the existing packaging structure, a solder mask is usually arranged on the surface of the carrier board, and a plurality of openings are opened on the solder mask. The solder pads on the carrier board are exposed from the openings, and the solder balls are arranged on the solder pads. The cross section of the opening is usually in the shape of a "mouth", that is, the width of the upper and lower parts of the opening is consistent. Two gaps are formed between the two sides of the solder ball and the solder mask, and the width of the gap is usually greater than 20μm. In the subsequent functional element packaging process, the packaging material is easy to fill into the opening through the gap, thereby affecting the uniform integrity of the closed cavity, and the width of the gap is too large, which is not conducive to forming a closed cavity inside the packaging substrate, so that the signal shielding effect cannot be achieved. In addition, because the solder ball will melt and deform during the reflow process, it is difficult to control its size, so that the width of the gap cannot be effectively controlled, and it is also easy to cause the size of the cavity to be inconsistent, affecting the signal shielding effect of the entire packaging structure. Summary of the invention

[0004] In order to solve the problems in the background technology, the present application provides a packaging substrate and a packaging structure including the packaging substrate.

[0005] In addition, it is also necessary to provide a method for manufacturing the packaging substrate and the packaging structure.

[0006] The present application provides a packaging substrate, comprising:

[0007] A carrier board, comprising a first circuit layer, wherein the first circuit layer comprises a plurality of welding pads arranged at intervals;

[0008] A first solder resist layer, wherein the first solder resist layer covers the first circuit layer, and the first solder resist layer is provided with a plurality of first openings and a second opening, wherein the solder pads are exposed from the bottoms of the first openings; the second openings are provided at opposite sides of each of the solder pads, and the second openings are connected to the first openings;

[0009] A first solder ball is disposed on the solder pad, and the first solder ball closes the first opening to form a cavity;

[0010] Wherein, the cavity is used to shield the electromagnetic signal transmitted by the first solder ball.

[0011] Furthermore, a gap is formed between two sides of the first solder ball and the first solder resist layer respectively, and a width of the gap is less than 20 μm.

[0012] Furthermore, the package substrate further comprises a second solder mask layer, the carrier further comprises a base material layer, a second circuit layer and a conductive body, and the first circuit layer and the second circuit layer are respectively arranged on opposite sides of the base material layer;

[0013] The first circuit layer further includes a plurality of first connection pads spaced apart from the welding pads, the second circuit layer includes a plurality of second connection pads spaced apart, the conductive body is disposed through the substrate layer, one end of the conductive body is connected to the first connection pad, and the other end is connected to the second connection pad;

[0014] The second solder resist layer covers the second circuit layer.

[0015] Furthermore, the package substrate further includes a second solder ball, a plurality of third openings are provided on the second solder resist layer, and a portion of the second connection pads are exposed from the bottom of the third openings;

[0016] The second solder ball is disposed in the third opening, and the second solder ball is connected to the second connection pad.

[0017] The present application also provides a packaging structure, including the packaging substrate, a chip and a packaging body, wherein the chip is electrically connected to the first solder ball, and the packaging body is disposed on a surface of the packaging substrate and covers the chip.

[0018] The present application also provides a method for manufacturing a packaging substrate, which comprises at least the following steps:

[0019] Providing a carrier board, comprising a first circuit layer, wherein the first circuit layer comprises a plurality of welding pads arranged at intervals;

[0020] The body to be removed is respectively arranged on two opposite sides of each of the welding pads;

[0021] A first solder resist layer is disposed on the first circuit layer, wherein the first solder resist layer covers a portion of the object to be removed, and a plurality of first openings are disposed on the first solder resist layer, wherein the solder pad and another portion of the object to be removed are exposed from the bottom of the first openings;

[0022] removing the object to be removed to form a second opening, wherein the second opening is communicated with the first opening;

[0023] A first solder ball is arranged on the solder pad, and the first solder ball closes the first opening to form a cavity, thereby obtaining the packaging substrate; wherein the cavity is used to shield the electromagnetic signal transmitted by the solder ball.

[0024] Furthermore, the step of “arranging the object to be removed on two opposite sides of each of the welding pads” includes:

[0025] A photosensitive pattern is arranged on the first circuit layer, and an electroplating tank is arranged on two opposite sides of each pad on the photosensitive pattern;

[0026] Nickel is electroplated in the electroplating bath to form the object to be removed.

[0027] Furthermore, a gap is formed between two sides of the first solder ball and the first solder resist layer respectively, and a width of the gap is less than 20 μm.

[0028] Furthermore, before the step of "arranging the object to be removed on two opposite sides of each of the welding pads", the step further includes: arranging a metal layer on two opposite sides of each of the welding pads, and the object to be removed is arranged on the metal layer;

[0029] After the step of “removing the object to be removed to form a second opening”, the method further includes: removing the metal layer.

[0030] The present application also provides a method for manufacturing a packaging structure, including the manufacturing method of the above-mentioned packaging substrate, and arranging a packaging body and a chip on a surface of the packaging substrate, wherein the chip is electrically connected to the first solder ball, and the packaging body covers the chip.

[0031] The packaging substrate provided in the present application is provided with a connected first opening and a second opening in the first solder mask layer, and a first solder ball is arranged on the solder pad to close the first opening to form a "convex" shaped cavity, which is beneficial to control the closure of the cavity and further beneficial to the shielding of the conducted signal.

[0032] Furthermore, by controlling the width of the first opening, the width of the gap between the two sides of the first solder ball and the first solder mask can be controlled to prevent the packaging material from falling through the gap into the cavity during the subsequent packaging process, thereby ensuring the uniformity and integrity of the cavity and further improving the electrical performance of the subsequent packaging structure. BRIEF DESCRIPTION OF THE DRAWINGS

[0033] Figure 1 A schematic cross-sectional view of a carrier provided in accordance with an embodiment of the present application.

[0034] Figure 2 for Figure 1 The cross-sectional view of the carrier shown is after the first metal layer and the second metal layer are provided.

[0035] Figure 3 for Figure 2 The cross-sectional schematic diagram of the carrier after the photosensitive pattern is set is shown.

[0036] Figure 4 for Figure 3 A cross-sectional schematic diagram of a second opening in which a body to be removed is arranged

[0037] Figure 5 for Figure 4 A schematic cross-sectional view of the carrier plate after removing the photosensitive pattern is shown.

[0038] Figure 6 for Figure 5 The cross-sectional schematic diagram shown is after the first solder mask layer and the second solder mask layer are arranged on the carrier.

[0039] Figure 7 for Figure 6 The cross-sectional schematic diagram of removing the object to be removed from the carrier is shown.

[0040] Figure 8 A schematic cross-sectional view of a packaging substrate provided in accordance with an embodiment of the present application.

[0041] Fig. 9 A schematic cross-sectional view of a packaging structure provided in one embodiment of the present application.

[0042] Fig.10 for Fig. 9 The enlarged cross-sectional schematic diagram of the local structure in the packaging structure shown is shown.

[0043] Main component symbols

[0044] Package substrate 100

[0045] Package structure 200

[0046] Carrier board 10

[0047] Base material layer 11

[0048] First surface 111

[0049] Second surface 112

[0050] First circuit layer 12

[0051] First connection pad 121

[0052] Solder pad 122

[0053] The first opening 123

[0054] The second circuit layer 13

[0055] Second connection pad 131

[0056] The second opening 132

[0057] Conductor 14

[0058] The first metal layer 15

[0059] Part 1151

[0060] Part 2152

[0061] The second metal layer 16

[0062] Photosensitive pattern 20

[0063] Plating tank 21

[0064] Body to be removed 30

[0065] The third opening 31

[0066] Second opening 32

[0067] The first solder resist layer 40

[0068] The third surface 401

[0069] First opening 41

[0070] Second solder resist layer 42

[0071] The third opening 43

[0072] Cavity 44

[0073] First solder ball 50

[0074] Gap 51

[0075] Second solder ball 52

[0076] Chip 60

[0077] Conductive column 70

[0078] Package 80

[0079] The following specific implementation methods will further illustrate the present application in conjunction with the above-mentioned drawings. DETAILED DESCRIPTION

[0080] The technical solutions in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all of the embodiments.

[0081] It should be noted that when an element is considered to be "connected" to another element, it can be directly connected to the other element or can be simultaneously present in a central element. When an element is considered to be "disposed on" another element, it can be directly disposed on the other element or can be simultaneously present in a central element.

[0082] See also Figures 1 to 9The present embodiment of the present application provides a method for manufacturing a packaging structure 200, comprising the steps of:

[0083] Step S1: See Figure 1 A carrier board 10 is provided, the carrier board 10 includes a substrate layer 11, a first circuit layer 12, a second circuit layer 13 and a conductive body 14. The substrate layer 11 includes a first surface 111 and a second surface 112 arranged opposite to the first surface 111, the first circuit layer 12 is arranged on the first surface 111, the second circuit layer 13 is arranged on the second surface 112, and the conductive body 14 is arranged through the substrate layer 11.

[0084] The first circuit layer 12 includes a plurality of first connection pads 121 and solder pads 122 arranged at intervals. A first opening 123 is arranged between the first connection pads 121 and the solder pads 122, and a portion of the first surface 111 is exposed from the bottom of the first opening 123. The second circuit layer 13 includes a plurality of second connection pads 131 arranged at intervals. A second opening 132 is arranged between two adjacent second connection pads 131, and a portion of the second surface 112 is exposed from the bottom of the second opening 132. The conductive body 14 electrically connects the first connection pad 121 and the second connection pad 131.

[0085] In this embodiment, the carrier 10 can be prepared by laser drilling and copper plating on the substrate layer 11, followed by dry film formation, exposure and development, etching, and film removal.

[0086] Step S2: See Figure 2 , a first metal layer 15 is disposed on the first surface 111 corresponding to the first opening 123; a second metal layer 16 is disposed on the second surface 112 corresponding to the second opening 132. The thickness of the first metal layer 15 is less than the depth of the first opening 123, and the thickness of the second metal layer 16 is less than the depth of the second opening 132.

[0087] In this embodiment, magnetron sputtering can be used to form the first metal layer 15 on the first surface 111, and the second metal layer 16 on the second surface 112. In other embodiments of the present application, the first metal layer 15 and the second metal layer 16 can also be formed by electroplating.

[0088] Step S3: See Figure 3A photosensitive pattern 20 is disposed on the first circuit layer 12, and the photosensitive pattern 20 covers the first circuit layer 12 and a portion of the first metal layer 15. The photosensitive pattern 20 has a plurality of electroplating tanks 21, and the electroplating tanks 21 are disposed corresponding to the first openings 123, and a portion of the first metal layer 15 and a portion of the pads 122 are exposed from the bottom of the electroplating tanks 21.

[0089] In this embodiment, the photosensitive pattern 20 is formed by forming a first dry film (not shown) on the first circuit layer 12 and then forming the electroplating tank 21 through exposure and development.

[0090] In this embodiment, a second dry film (not shown) is further provided on the second circuit layer 13, and the second dry film covers the second circuit layer 13 and the second metal layer 16. At the same time, the first dry film and the second dry film are respectively pressed on opposite sides of the carrier 10, which is beneficial to reduce the risk of crushing the carrier 10.

[0091] Step S4: See Figure 4 , a to-be-removed object 30 is formed in the electroplating tank 21 , and the to-be-removed object 30 covers a portion of the first metal layer 15 and a portion of the bonding pad 122 .

[0092] In this embodiment, the material of the object to be removed 30 is nickel (Ni), and a object to be removed 30 is formed in each electroplating tank 21 by electroplating nickel. The object to be removed 30 divides the first metal layer 15 into two parts, namely a first part 151 corresponding to the object to be removed 30 and a second part 152 other than the first part 151.

[0093] Step S5: See Figure 4 and Figure 5 , remove the photosensitive pattern 20 and the second portion 152 on the first surface 111.

[0094] Step S5 also includes: removing the second dry film and the second metal layer 16 on the second surface 112 .

[0095] In this embodiment, after the photosensitive pattern 20 is removed, a third opening 31 is formed between two adjacent objects 30 to be removed, and a portion of the solder pad 122 is exposed from the bottom of the third opening 31 .

[0096] Step S6: See Figure 6 , a first solder mask layer 40 is disposed on the first circuit layer 12 , and a second solder mask layer 42 is disposed on the second circuit layer 13 .

[0097] Specifically, the first solder resist layer 40 includes a third surface 401 facing away from the first circuit layer 12, the first solder resist layer 40 covers the first connection pad 121 and part of the object to be removed 30, the first solder resist layer 40 is provided with a plurality of first openings 41, the first openings 41 are connected to the third openings 31, and part of the object to be removed 30 and the solder pad 122 are exposed from the bottom of the first openings 41. The second solder resist layer 42 covers the second connection pad 131, the second solder resist layer 42 is provided with a plurality of third openings 43, and part of the second connection pad 131 is exposed from the bottom of the third openings 43.

[0098] In the present embodiment, the material of the first solder mask layer 40 and the second solder mask layer 42 may be green paint, and the formation method may be dry film lamination, and a plurality of the first openings 41 are formed on the first solder mask layer 40 and a plurality of the third openings 43 are formed on the second solder mask layer 42 through an exposure and development process.

[0099] Step S7: See Figure 6 and Figure 7 , the object to be removed 30 is removed to expose the second opening 32 .

[0100] Specifically, nickel is etched with chemical solution to remove the object to be removed 30 , thereby forming the second opening 32 , the pad 122 is completely exposed from the bottom of the first opening 41 , and the second opening 32 and the first opening 41 are connected to each other.

[0101] It can be understood that each of the second openings 32 corresponds to each of the electroplating tanks 21 one by one.

[0102] Step S8: See Figure 7 and Figure 8 , remove the first portion 151 , and set a first solder ball 50 on the solder pad 122 . The first solder ball 50 closes the first opening 41 to form a cavity 44 , thereby obtaining a packaging substrate 100 .

[0103] Step S8 also includes: disposing a second solder ball 52 on the second connection pad 131 .

[0104] In this embodiment, the first solder ball 50 and the second solder ball 52 are both tin balls, and the cavity 44 is substantially in a “convex” shape.

[0105] Step S9: Please refer to Fig. 9 and Fig.10 A chip 60 and a package body 80 are arranged on a surface of the first solder mask 40 away from the substrate layer 11 , the chip 60 is electrically connected to the first solder ball 50 , and the package body 80 covers the chip 60 , thereby obtaining the package structure 200 .

[0106] Specifically, the first solder ball 50 is partially contained in the cavity 44 and partially exposed to the third surface 401, and a gap 51 is formed between the two sides of the first solder ball 50 and the first solder resist 40. Fig.10 As shown, in this embodiment, the maximum width of the first solder ball 50 is substantially flush with the third surface 401 , and the width W of the gap 51 is less than 20 μm.

[0107] In this embodiment, a conductive column 70 is disposed between the chip 60 and the first solder ball 50, and the chip 60 and the first solder ball 50 are electrically connected through the conductive column 70. The package body 80 covers the chip 60, the conductive column 70 and a portion of the first solder ball 50 exposed on the third surface 401.

[0108] In the present application, by first setting the body to be removed 30, the width of the first opening 41 can be controlled when the first solder mask 40 is set later, and after etching the body to be removed 30, a uniform cavity 44 is formed in the packaging substrate 100 to shield the electromagnetic signal transmitted by the first solder ball 50. In this way, when the first solder ball 50 is set on the pad 122, the width W of the gap 51 between the first solder ball 50 and the first solder mask 40 can be controlled to be less than 20μm, so that in the subsequent packaging process, the packaging material cannot fall into the cavity 44 through the gap 51, thereby maintaining a uniform and complete cavity structure, and further improving the electrical performance of the entire packaging structure 200.

[0109] Please refer again Fig. 9 and Fig.10 An embodiment of the present application also provides a packaging structure 200 prepared by the above-mentioned manufacturing method, wherein the packaging structure 200 includes a packaging substrate 100, a chip 60, a conductive column 70 and a packaging body 80, wherein the chip 60 and the first solder ball 50 are electrically connected through the conductive column 70, and the packaging body 80 covers the chip 60, the conductive column 70 and a portion of the first solder ball 50.

[0110] The package substrate 100 includes a base material layer 11, a first circuit layer 12, a second circuit layer 13, a conductive body 14, a first solder mask 40, a second solder mask 42, a first solder ball 50 and a second solder ball 52. The base material layer 11 includes a first surface 111 and a second surface 112 arranged opposite to the first surface 111. The first circuit layer 12 is arranged on the first surface 111, and the second circuit layer 13 is arranged on the second surface 112. The conductive body 14 penetrates the base material layer 11. The first circuit layer 12 includes a plurality of first connection pads 121 and solder pads 122 arranged at intervals, the second circuit layer 13 includes a plurality of second connection pads 131 arranged at intervals, and the conductive body 14 electrically connects the first connection pads 121 and the second connection pads 131.

[0111] The first solder resist layer 40 covers the first circuit layer 12. The first solder resist layer 40 is provided with a first opening 41 and a second opening 32. The pads 122 are exposed from the bottom of the first opening 41. The second openings 32 are provided at opposite sides of each pad 122. The second openings 32 are connected to the first openings 41. The first solder balls 50 are provided on the pads 122. The first solder balls 50 close the first openings 41 to form a cavity 44. The cavity 44 is substantially in the shape of a "convex" character. The first solder balls 50 are partially exposed to the third surface 401. A gap 51 is formed between the two sides of the first solder balls 50 and the first solder resist layer 40 respectively. The maximum width of the first solder balls 50 is substantially flush with the third surface 401. The width W of the gap 51 is less than 20 μm.

[0112] The second solder resist layer 42 covers the second circuit layer 13. The second solder resist layer 42 is provided with a plurality of third openings 43. Part of the second connection pads 131 are exposed from the bottom of the third openings 43. The second solder balls 52 are disposed on the second connection pads 131 through the third openings 43.

[0113] In addition, those skilled in the art may also make other changes within the spirit of the present application. Of course, these changes made according to the spirit of the present application should be included in the scope of protection required by the present application.

Claims

1. A packaging substrate, characterized in that: include: A carrier board, comprising a first circuit layer, wherein the first circuit layer comprises a plurality of welding pads arranged at intervals; A first solder resist layer, wherein the first solder resist layer covers the first circuit layer, and the first solder resist layer is provided with a plurality of first openings and a second opening, wherein the solder pads are exposed from the bottoms of the first openings; the second openings are provided at opposite sides of each of the solder pads, and the second openings are connected to the first openings; A first solder ball is arranged on the solder pad, and the first solder ball closes the first opening to form a convex-shaped cavity. A gap is formed between the two sides of the first solder ball and the first solder mask layer respectively, and the width of the gap between the first solder ball and the first solder mask layer at the maximum width is less than 20μm.

2. The packaging substrate according to claim 1, wherein: The package substrate further includes a second solder mask layer, the carrier further includes a base material layer, a second circuit layer and a conductive body, and the first circuit layer and the second circuit layer are respectively arranged on opposite sides of the base material layer; The first circuit layer further includes a plurality of first connection pads spaced apart from the welding pads, the second circuit layer includes a plurality of second connection pads spaced apart, the conductive body is disposed through the substrate layer, one end of the conductive body is connected to the first connection pad, and the other end is connected to the second connection pad; The second solder resist layer covers the second circuit layer.

3. The packaging substrate according to claim 2, wherein: The packaging substrate further includes a second solder ball, a plurality of third openings are provided on the second solder resist layer, and a portion of the second connection pads are exposed from the bottom of the third openings; The second solder ball is disposed in the third opening, and the second solder ball is connected to the second connection pad.

4. A packaging structure, characterized in that: The invention comprises a chip, a package body and a package substrate as claimed in any one of claims 1 to 3, wherein the chip is electrically connected to the first solder ball, and the package body is disposed on a surface of the package substrate and covers the chip.

5. A method for manufacturing a packaging substrate, characterized in that: At least the following steps are included: Providing a carrier board, comprising a first circuit layer, wherein the first circuit layer comprises a plurality of welding pads arranged at intervals; The body to be removed is respectively arranged on two opposite sides of each of the welding pads; A first solder resist layer is disposed on the first circuit layer, wherein the first solder resist layer covers a portion of the object to be removed, and a plurality of first openings are disposed on the first solder resist layer, wherein the solder pad and another portion of the object to be removed are exposed from the bottom of the first openings; removing the object to be removed to form a second opening, wherein the second opening is communicated with the first opening; A first solder ball is arranged on the solder pad, and the first solder ball closes the first opening to form a convex-shaped cavity to obtain the packaging substrate; wherein the cavity is used to shield the electromagnetic signal transmitted by the solder ball, and a gap is formed between the two sides of the first solder ball and the first solder mask respectively, and the width of the gap between the first solder ball and the first solder mask at the maximum width is less than 20μm.

6. The manufacturing method according to claim 5, characterized in that: The step of "arranging the object to be removed on two opposite sides of each of the welding pads" includes: A photosensitive pattern is arranged on the first circuit layer, and an electroplating tank is arranged on two opposite sides of each pad on the photosensitive pattern; Nickel is electroplated in the electroplating bath to form the object to be removed.

7. The manufacturing method according to claim 5, characterized in that: Before the step of "arranging the object to be removed on the two opposite sides of each of the welding pads", the method further includes: arranging a metal layer on the two opposite sides of each of the welding pads, and the object to be removed is arranged on the metal layer; After the step of "removing the object to be removed to form a second opening", the method further includes: removing the metal layer.

8. A method for manufacturing a packaging structure, characterized in that: A method for manufacturing a packaging substrate according to any one of claims 5 to 7, and A packaging body and a chip are arranged on a surface of the packaging substrate. The chip is electrically connected to the first solder ball, and the packaging body covers the chip.

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