Pixel circuit, driving method thereof and display panel

Abstract

The application relates to a pixel circuit, a driving method thereof and a display panel. The pixel circuit comprises a data writing module, an energy storage module, a driving transistor and an isolation module. The control end of the data writing module is used for receiving a first scanning signal, the first end is used for receiving a data signal, and the second end is connected with the first end of the energy storage module. The gate of the driving transistor is connected with the second end of the energy storage module, the first end is used for receiving a first power voltage signal, the second end is directly or indirectly connected with a light emitting element, the second end of the driving transistor outputs a driving current to the element and drives the light emitting element to emit light. The isolation module is arranged between the data writing module and the energy storage module, is used for reducing the influence of voltage fluctuation generated by the data writing module on the energy storage module, thereby reducing the influence on the gate of the driving transistor, improving the stability of the driving current generated by the driving transistor, keeping the brightness of the light emitting element stable, and improving the brightness uniformity problem.

Description

Technical Field

[0001] This application relates to the field of display technology, and in particular to a pixel circuit and its driving method, and a display panel. Background Technology

[0002] With the continuous development of display technology, AMOLED (Active-matrix organic light-emitting diode) display products are occupying an increasingly larger proportion of people's lives. However, as display brightness increases, the problem of brightness uniformity becomes particularly prominent, seriously affecting display quality. Summary of the Invention

[0003] Therefore, it is necessary to provide a pixel circuit and its driving method, as well as a display panel, which can stabilize the potential of the gate of the driving transistor in the pixel circuit, keep the brightness of the light-emitting element stable, and improve the brightness uniformity problem.

[0004] In a first aspect, embodiments of the present invention provide a pixel circuit, including a light-emitting element, and

[0005] A data writing module, wherein the control terminal of the data writing module is used to receive a first scan signal, and the first terminal of the data writing module is used to receive a data signal, the data signal being from a data line;

[0006] An energy storage module, wherein a first end of the energy storage module is connected to a second end of the data writing module;

[0007] A driving transistor, the gate of which is connected to the second terminal of the energy storage module, the first terminal of which is used to receive a first power supply voltage signal, the second terminal of which is directly or indirectly connected to the light-emitting element, and the second terminal of which outputs a driving current to the light-emitting element and drives the light-emitting element to emit light;

[0008] An isolation module is provided, which is disposed between the second end of the data writing module and the first end of the energy storage module, to reduce the impact of voltage fluctuations generated by the data writing module on the energy storage module, thereby reducing the impact on the gate of the driving transistor.

[0009] In some embodiments, the isolation module includes an isolation transistor, the gate of which is used to receive an isolation control signal, a first terminal of which is connected to a second terminal of the data writing module, and a second terminal of which is connected to a first terminal of the energy storage module. The isolation transistor is in an on state under the action of the isolation control signal.

[0010] Preferably, the isolation transistor is a P-type transistor, and the voltage value of the isolation control signal is less than zero or other constant low-level signal;

[0011] Preferably, the isolation transistor is an N-type transistor, and the isolation control signal is the first power supply voltage signal or other positive voltage signal.

[0012] In some embodiments, the isolation module includes an isolation capacitor, the first end of which is connected to the first end of the energy storage module, and the second end of which is used to receive an isolation control signal.

[0013] In some embodiments, the pixel circuit further includes:

[0014] A voltage stabilization module, wherein the control terminal of the voltage stabilization module is used to receive a second scan signal, the first terminal of the voltage stabilization module is used to receive a first initialization signal, and the second terminal of the voltage stabilization module is connected to the second terminal of the data writing module;

[0015] The isolation module is also used to reduce the impact of voltage fluctuations generated by the voltage stabilization module on the energy storage module when the second scanning signal undergoes a jump during the coupling completion stage.

[0016] Preferably, the voltage stabilization module includes a voltage stabilization transistor, the gate of which is used to receive the second scan signal, the first terminal of which is used to receive the first initialization signal, and the second terminal of which is connected to the second terminal of the data writing module;

[0017] Preferably, the data writing module includes a writing transistor, the gate of which is used to receive the first scan signal, the first terminal of which is used to receive the data signal, and the second terminal of which is connected to the isolation module;

[0018] Preferably, the energy storage module includes a storage capacitor, a first end of which is connected to the isolation module, and a second end of which is connected to the gate of the driving transistor.

[0019] In some embodiments, the pixel circuit further includes a light-emitting control module, a first terminal of which is connected to a second terminal of the driving transistor; the second terminal of the light-emitting control module is used to connect to a light-emitting element, and the control terminal of the light-emitting control module is used to receive the second scanning signal;

[0020] Preferably, the light-emitting control module includes a light-emitting control transistor, a first terminal of which is used to receive the driving current, a second terminal of which is used to connect to the light-emitting element, and a gate of which is used to receive the second scanning signal.

[0021] In some embodiments, the pixel circuit further includes a light emission initialization module, wherein the control terminal of the light emission initialization module is used to receive a third scanning signal, the first terminal of the light emission initialization module is used to receive a second initialization signal, and the second terminal of the light emission initialization module is connected to the second terminal of the light emission control module;

[0022] Preferably, the third scan signal and the first scan signal are the same signal;

[0023] Preferably, the isolation control signal used to control the isolation module is the same signal as the second initialization signal;

[0024] Preferably, the light-emitting initialization module includes a first initialization transistor, the gate of the first initialization transistor is used to receive the third scan signal, the first terminal of the first initialization transistor is used to receive the second initialization signal, and the second terminal of the first initialization transistor is connected to the second terminal of the light-emitting control module.

[0025] In some embodiments, the pixel circuit further includes:

[0026] A threshold voltage sampling module, wherein the control terminal of the threshold voltage sampling module is used to receive the first scan signal, the first terminal of the threshold voltage sampling module is used to receive the first initialization signal, the second terminal of the threshold voltage sampling module is connected to the gate of the driving transistor, and the third terminal of the threshold voltage sampling module is connected to the second terminal of the driving transistor;

[0027] The threshold voltage sampling module is used to sample the threshold voltage of the driving transistor during the threshold voltage sampling stage, and transmit the collected threshold voltage to the energy storage module for storage, wherein the driving current generated by the driving transistor is independent of the threshold voltage.

[0028] In some embodiments, the threshold voltage sampling module includes a threshold voltage sampling unit and an initialization unit. The control terminal of the initialization unit is used to receive a fourth scan signal, the first terminal of the initialization unit is used to receive a first initialization signal, the second terminal of the initialization unit is connected to the first terminal of the threshold voltage sampling unit, the control terminal of the threshold voltage sampling unit is used to receive the first scan signal, the second terminal of the threshold voltage sampling unit is connected to the gate of the driving transistor, and the third terminal of the threshold voltage sampling unit is connected to the second terminal of the driving transistor.

[0029] The initialization unit is used to disconnect the threshold voltage sampling unit from the first initialization signal during the threshold voltage sampling phase, so that the threshold voltage sampling unit samples the gate voltage of the driving transistor.

[0030] Preferably, the third scan signal and the fourth scan signal are the same signal;

[0031] Preferably, the voltage amplitude of the second initialization signal is smaller than that of the first initialization signal;

[0032] Preferably, the initialization unit includes a second initialization transistor, the gate of the second initialization transistor is used to receive the fourth scan signal, the first terminal of the second initialization transistor is used to receive the first initialization signal, and the second terminal of the second initialization transistor is connected to the first terminal of the threshold voltage sampling module;

[0033] Preferably, the threshold voltage sampling unit includes a first threshold voltage sampling transistor and a second threshold voltage sampling transistor. The gates of the first threshold voltage sampling transistor and the second threshold voltage sampling transistor are both used to receive the first scan signal. The first terminals of the first threshold voltage sampling transistor and the second threshold voltage sampling transistor are both connected to the second terminal of the second initialization transistor. The second terminal of the first threshold voltage sampling transistor is connected to the gate of the driving transistor, and the second terminal of the second threshold voltage sampling transistor is connected to the second terminal of the driving transistor.

[0034] Secondly, embodiments of the present invention provide a method for driving a pixel circuit, comprising:

[0035] During the initialization phase, the data writing module receives a data signal under the control of the first scan signal and transmits the data signal to the energy storage module through the isolation module. The isolation module reduces the impact of voltage fluctuations generated by the data writing module on the energy storage module when the first scan signal changes.

[0036] During the light-emitting stage, the energy storage module outputs the potential of the stored data signal to the gate of the driving transistor, and the driving transistor generates a driving current according to the potential of the data signal and outputs the driving current to the light-emitting element.

[0037] Thirdly, embodiments of the present invention provide a display panel including the pixel circuit described above.

[0038] The aforementioned pixel circuit, pixel circuit driving method, and display panel, due to the presence of the parasitic capacitance of the transistor in the data writing module, when voltage fluctuations occur in the data writing module, the isolation module can reduce the voltage amplitude of the voltage fluctuations transmitted to the energy storage module, thereby improving the impact of voltage fluctuations on the first terminal of the energy storage module. As a result, the voltage stability of the second terminal of the energy storage module can be improved, which in turn improves the stability of the gate voltage of the driving transistor connected to the second terminal of the energy storage module, making the driving current generated by the driving transistor more stable, so as to make the brightness of the light-emitting element more stable and effectively improve the brightness uniformity problem. Attached Figure Description

[0039] To more clearly illustrate the technical solutions in the embodiments of this application or the conventional technology, the drawings used in the description of the embodiments or the conventional technology will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0040] Figure 1 The measured voltage data of the upper plate of the storage capacitor in a certain AMOLED module with ideal data signal voltages of 3V and 1V is presented.

[0041] Figure 2 This is a schematic diagram of the pixel circuit in one embodiment;

[0042] Figure 3 This is a schematic diagram of the pixel circuit in another embodiment;

[0043] Figure 4 This is a schematic diagram of the pixel circuit in yet another embodiment;

[0044] Figure 5 This is a timing diagram of the driving of the pixel circuit in one embodiment;

[0045] Figure 6 This is a timing diagram of the pixel circuit driving in another embodiment;

[0046] Figure 7 This is a schematic diagram of the pixel circuit in yet another embodiment;

[0047] Figure 8This is a schematic diagram of the pixel circuit in yet another embodiment;

[0048] Figure 9 This is a schematic diagram of the pixel circuit in yet another embodiment;

[0049] Figure 10 This is a timing diagram of the driving of the pixel circuit in yet another embodiment;

[0050] Figure 11 To adopt Figure 9 In the embodiment shown, the AMOLED module of the pixel circuit stores the measured voltage data of the upper plate of the capacitor when the ideal voltage of the data signal is 3V and 1V.

[0051] Figure 12 This is a schematic diagram of a display panel in one embodiment;

[0052] Figure 13 This is a flowchart of a pixel circuit driving method in one embodiment.

[0053] Explanation of reference numerals in the attached figures:

[0054] M1 - Driving transistor, 110 - Data writing module, 120 - Energy storage module, 130 - Isolation module, N1~N3 - Nodes, D - Light-emitting element, S1 - First scan signal, DATA - Data signal, ELVDD - First power supply voltage signal, ELVSS - Second power supply voltage signal, M2 - Writing transistor, C1 - Storage capacitor, C2 - Isolation capacitor, M3 - Isolation transistor, VREF1 - Isolation control signal; S2 - Second scan signal, 140 - Voltage stabilization module, M4 - Voltage stabilization transistor, VREF2 - First initialization signal, 150 - Light emission control module, M5 - Light emission control transistor, S3 - Third scan signal, 160 - Light emission initialization module, M6 - First initialization transistor, VREF3 - Second initialization signal, 170 - Threshold voltage sampling module, 171 - Threshold voltage sampling unit, 172 - Initialization unit, M7 - First threshold voltage sampling transistor, M8 - Second threshold voltage sampling transistor, M9 - Second initialization transistor. Detailed Implementation

[0055] To facilitate understanding of this application, a more complete description will be provided below with reference to the accompanying drawings, which illustrate embodiments of the present application. However, the present application can be implemented in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided so that the disclosure of this application will be thorough and complete.

[0056] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the application.

[0057] It is understood that the terms "first," "second," etc., used herein may be used to describe various elements, but these elements are not limited by these terms. These terms are only used to distinguish one element from another. For example, without departing from the scope of this application, a first resistor may be referred to as a second resistor, and similarly, a second resistor may be referred to as a first resistor. Both the first resistor and the second resistor are resistors, but they are not the same resistor.

[0058] It is understood that the term "connection" in the following embodiments should be understood as "electrical connection," "communication connection," etc., if the connected circuits, modules, units, etc., have electrical signal or data transmission with each other.

[0059] It is understandable that "at least one" refers to one or more, and "multiple" refers to two or more. "At least a part of an element" refers to part or all of an element.

[0060] When used herein, the singular forms of “a,” “an,” and “the” may also include the plural forms unless the context clearly indicates otherwise. It should also be understood that the terms “comprising / including” or “having,” etc., specify the presence of the stated features, wholes, steps, operations, components, parts, or combinations thereof, but do not preclude the possibility of the presence or addition of one or more other features, wholes, steps, operations, components, parts, or combinations thereof. Meanwhile, the term “and / or” as used in this specification includes any and all combinations of the associated listed items.

[0061] As described in the background section, display panels in related technologies suffer from brightness uniformity issues. The pixel circuitry of such display panels includes a data writing transistor, a storage capacitor, and a driving transistor. During the light-emitting phase, the potential stored in the storage capacitor is supplied to the gate of the driving transistor. The driving transistor generates a driving current based on the gate voltage to drive the light-emitting element to emit light. However, due to the parasitic capacitance of the data writing transistor, voltage fluctuations inevitably occur when its control signal transitions from low to high. The voltage at the end of the storage capacitor connected to it is also affected, leading to a corresponding change in the voltage at the gate of the driving transistor (the other end of the storage capacitor is connected to the gate of the driving transistor). This results in unstable gate voltage of the driving transistor, causing driving current fluctuations and leading to display uniformity problems. See also... Figure 1 , Figure 1The data presented here are measured values ​​for the voltage across the upper plate connecting the storage capacitor and the data write transistor in a certain AMOLED (Active-matrix organic light-emitting diode) module when the ideal data signal voltage is 3V and 1V. It shows that when the ideal data signal voltage is 3V, the voltage jump between the storage capacitor and the upper plate is approximately 0.3V; when the ideal data signal voltage is 1V, the voltage fluctuation is approximately 0.6V. This voltage fluctuation in the storage capacitor causes voltage fluctuations in the gate of the driving transistor, resulting in display uniformity issues. This problem is particularly severe at low grayscale levels, where human vision is highly sensitive, leading to more pronounced uniformity issues.

[0062] Based on the aforementioned technical problems, the inventors, through long-term research, discovered that reducing the impact of voltage fluctuations generated by the data writing transistor on the storage capacitor can improve the voltage fluctuations at the gate of the driving transistor, thereby improving display uniformity and enhancing display performance. Based on this, the inventors further developed the technical solution of this invention. Specifically, this invention provides a pixel circuit comprising a data writing module, an energy storage module, a driving transistor, and an isolation module. The control terminal of the data writing module receives a first scan signal, and the first terminal of the data writing module receives a data signal. The first terminal of the energy storage module is connected to the second terminal of the data writing module. The gate of the driving transistor is connected to the second terminal of the energy storage module. The first terminal of the driving transistor receives a first power supply voltage signal, and the second terminal of the driving transistor is directly or indirectly connected to a light-emitting element. The second terminal of the driving transistor outputs a driving current to the light-emitting element and drives the light-emitting element to emit light. The isolation module is disposed between the second terminal of the data writing module and the first terminal of the energy storage module to reduce the impact of voltage fluctuations generated by the data writing module on the energy storage module, thereby reducing the impact on the gate of the driving transistor.

[0063] By adopting the above technical solution, when voltage fluctuations occur in the data writing module, the isolation module can reduce the voltage amplitude of the voltage fluctuations transmitted to the energy storage module, improve the impact of voltage fluctuations generated by the transistors in the data writing module on the energy storage module, improve the voltage stability of the second terminal of the energy storage module, and thus improve the stability of the gate voltage of the driving transistor. This makes the driving current generated by the driving transistor more stable, so as to make the brightness of the light-emitting element more stable and effectively improve the brightness uniformity problem.

[0064] The above is the core idea of ​​this invention. The technical solutions in the embodiments of this invention will be clearly and completely described below with reference to the accompanying drawings. Based on the embodiments of this invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this invention.

[0065] Figure 2 A schematic diagram of a pixel circuit provided in an embodiment of the present invention is shown below. Figure 2 As shown, the pixel circuit provided in this embodiment of the invention includes: a data writing module 110, an energy storage module 120, a driving transistor M1, and an isolation module 130. The control terminal of the data writing module 110 is used to receive a first scan signal S1, and the first terminal of the data writing module 110 is used to receive a data signal DATA. The first terminal of the energy storage module 120 is connected to the second terminal of the data writing module 110. The control terminal of the driving transistor M1 is connected to the second terminal of the energy storage module 120. The first terminal of the driving transistor M1 is used to receive a first power supply voltage signal ELVDD, and the second terminal of the driving transistor M1 is connected to a light-emitting element D. The second terminal of the driving transistor M1 outputs a driving current to the light-emitting element D and drives the light-emitting element D. The isolation module 130 is disposed between the second terminal of the data writing module 110 and the first terminal of the energy storage module 120 to reduce the impact of voltage fluctuations generated by the data writing module 110 on the energy storage module 120, thereby reducing the impact on the gate of the driving transistor M1.

[0066] In this design, the light-emitting element D can be a light-emitting diode (LED), and the type of LED is not limited, such as an organic light-emitting diode (OLED). In actual implementation, the anode of the light-emitting element D is connected to the second terminal of the driving transistor M1, and the cathode is connected to the second power supply voltage signal ELVSS. The voltage of the second power supply voltage signal ELVSS is lower than that of the first power supply voltage signal ELVDD.

[0067] The data writing module 110 is controlled by the received first scan signal S1. When the first scan signal S1 is valid, the data writing module 110 transmits the received data signal DATA to the energy storage module 120 through the isolation module 130. The energy storage module 120 is used to store the data signal DATA. The gate of the driving transistor M1 is connected to the energy storage module 120. The first terminal is used to receive the first power supply voltage signal ELVDD, and the second terminal is used to connect to the light-emitting element D, thereby generating a driving current under the control of the gate voltage of the driving transistor M1. That is, the driving current is generated according to the data signal DATA to drive the light-emitting element D to emit light of corresponding brightness.

[0068] In practical implementation, the effective potential state of the first scan signal S1 needs to be determined in conjunction with the specific structural design of the data writing module 110. It can be understood that the data writing module 110 includes transistors, and the effective potential state of the first scan signal S1 needs to be determined in conjunction with the type of transistor in the data writing module 110. When the first scan signal S1 is effective, the transistor in the data writing module 110 is in the on state, transmitting the received data signal DATA to the energy storage module 120 through the isolation module 130. When the first scan signal S1 is ineffective, the transistor in the data writing module 110 is in the off state. For example, as... Figure 3 As shown, the data writing module 110 includes a writing transistor M2. The gate of the writing transistor M2 is used to receive the first scan signal S1, the first terminal of the writing transistor M2 is used to receive the data signal DATA, and the second terminal of the writing transistor M2 is connected to the isolation module 130. Figure 3 In the embodiment shown, the write transistor M2 is a P-type thin-film transistor. Correspondingly, it is effective when the first scan signal S1 is low, that is, when the first scan signal S1 is low, the write transistor M2 is turned on; when the first scan signal S1 is high, the write transistor M2 is turned off.

[0069] During the operation of the pixel circuit, voltage fluctuations occur in the data writing module 110. For example, when the first scan signal S1 undergoes a transition, the data writing isolation module 130 can reduce the impact of the voltage fluctuations generated by the data writing module 110 on the energy storage module 120. For instance, when the first scan signal S1 undergoes a transition during the data writing phase, the transition refers to a change in the potential state of the first scan signal S1. Taking the writing transistor M2 as a P-type thin-film transistor as an example, the transition of the first scan signal S1 during the data writing phase is from a low level to a high level. When the potential of the first scan signal S1 changes, the writing transistor M2 inevitably experiences voltage fluctuations due to its own capacitance, causing a change in the voltage of node N3. Due to the isolation effect of the isolation module 130, the impact of the voltage fluctuations of node N3 on the voltage of node N2 is greatly reduced, thereby reducing the voltage fluctuations of node N1 and decreasing the impact of voltage fluctuations on the gate voltage of the driving transistor M1.

[0070] In the pixel circuit described above, when the transistor in the data writing module 110 generates voltage fluctuations, the isolation module 130 can reduce the voltage amplitude of the voltage fluctuations transmitted to the energy storage module 120, thereby improving the impact of the voltage fluctuations generated by the transistor in the data writing module 110 on the energy storage module 120, improving the voltage stability of the second terminal of the energy storage module 120, and further improving the stability of the gate voltage of the driving transistor M1. This makes the driving current generated by the driving transistor M1 more stable, so that the brightness of the light-emitting element D is more stable, thereby effectively improving the brightness uniformity problem.

[0071] The structure of the energy storage module 120 can be configured according to actual needs. In one embodiment, it still refers to... Figure 3 The energy storage module 120 includes a storage capacitor C1. The first terminal of the storage capacitor C1 is connected to the isolation module 130, and the second terminal of the storage capacitor C1 is connected to the gate of the driving transistor M1. The specific parameters of the storage capacitor C1 need to be determined in actual implementation; this embodiment does not limit this.

[0072] The structure of the isolation module 130 is not unique; in one embodiment, such as... Figure 4 As shown, the isolation module 130 includes an isolation capacitor C2. The first end of the isolation capacitor C2 is connected to the first end of the energy storage module 120, and the second end of the isolation capacitor C2 is used to receive the isolation control signal VREF1.

[0073] The isolation control signal VREF1 is a stable DC signal, and its specific voltage value can be set according to the actual situation. In order to reduce the number of signal lines, the isolation control signal VREF1 can reuse either the first power supply voltage signal ELVDD or the second power supply voltage signal ELVSS, depending on the specific situation.

[0074] In another embodiment, such as Figure 5 As shown, the isolation module 130 includes an isolation transistor M3. The gate of the isolation transistor M3 is used to receive the isolation control signal VREF1. The first terminal of the isolation transistor M3 is connected to the second terminal of the data writing module 110, and the second terminal of the isolation transistor M3 is connected to the first terminal of the energy storage module 120. The isolation transistor M3 is in the conducting state under the action of the isolation control signal VREF1.

[0075] Specifically, the isolation transistor M3 is connected to the write transistor M2 and the storage capacitor C1 respectively. Under the action of the isolation control signal VREF1, it is in a normally conducting state. When the write transistor M2 generates voltage fluctuations that cause the voltage of node N3 to change, the isolation transistor M3, due to its parasitic capacitance, can effectively improve the impact of the voltage change of node N3 on node N2 and reduce the voltage fluctuation of node N2.

[0076] The voltage of the isolation control signal VREF1 needs to be set in conjunction with the selection of the isolation transistor M3. In one embodiment, the isolation transistor M3 is a P-type thin-film transistor, and the isolation control signal VREF1 is a voltage value less than zero or other constant low-level signal, thereby ensuring that the isolation transistor M3 is in a normally conducting state, thus effectively providing continuous isolation. In another embodiment, the isolation transistor M3 is an N-type thin-film transistor, and the isolation control signal VREF1 is a positive voltage signal, so that the isolation transistor M3 is in a normally conducting state, thereby continuously isolating voltage fluctuations at node N3.

[0077] Furthermore, when the isolation transistor M3 is an N-type thin-film transistor, the isolation control signal VREF1 can be the first power supply voltage signal ELVDD. By multiplexing the first power supply voltage signal ELVDD, the number of signal lines can be reduced, and the bezel of the display product can be minimized.

[0078] It should also be noted that since most of the components in the pixel circuit are thin-film transistors, the isolation transistor M3 is used for isolation, which can improve the consistency of the entire circuit and make the gate voltage fluctuation range of the driving transistors in each pixel circuit closer, thereby effectively improving the display consistency problem and improving the overall display effect of the display product.

[0079] In one embodiment, such as Figure 6 As shown, the pixel circuit may also include a voltage stabilization module 140. The control terminal of the voltage stabilization module 140 is used to receive the second scan signal S2. The first terminal of the voltage stabilization module 140 is used to connect to the first initialization signal VREF2. The second terminal of the voltage stabilization module 140 is connected to the second terminal of the data writing module 110.

[0080] The isolation module 130 is also used to reduce the impact of voltage fluctuations generated by the voltage stabilization module 140 on the energy storage module 120 when the second scan signal S2 changes during the coupling completion stage.

[0081] In practical implementation, the effective potential state of the second scan signal S2 also needs to be set in conjunction with the type of transistor in the voltage stabilization module 140. When the second scan signal S2 is effective, the transistor in the voltage stabilization module 140 is in the on state, and the voltage stabilization module 140 transmits the received first initialization signal VREF2 to node N3. Specifically, during the initialization phase, the first initialization signal VREF2 transmitted by the voltage stabilization module 140 is used to initialize the potential of node N3; during the light emission phase, the first initialization signal VREF2 transmitted by the voltage stabilization module 140 is used to compensate the potential of node N3, ultimately achieving the goal of stabilizing the gate voltage of the driving transistor M1.

[0082] When the second scan signal S2 is invalid, the transistor in the voltage stabilization module 140 is in the off state. For example, the voltage stabilization module 140 includes a voltage stabilization transistor M4, the gate of which is used to receive the second scan signal S2, the first terminal of which is used to receive the first initialization signal VREF2, and the second terminal of which is connected to the second terminal of the data writing module 110. Figure 6 In the embodiment shown, the voltage-stabilized transistor M4 is a P-type thin-film transistor, and correspondingly, the second scan signal S2 is active when it is low.

[0083] It is understandable that the second scan signal S2 undergoes a transition during the coupling completion phase, meaning its potential changes from low to high. Due to the parasitic capacitance of the transistors in the voltage stabilization module 140, voltage fluctuations also occur in the voltage stabilization module 140, causing voltage changes at node N3. The isolation module 130 reduces the voltage amplitude of the voltage fluctuations at node N3 transmitted to the energy storage module 120, thereby mitigating the impact of voltage fluctuations generated by the voltage stabilization module 140 on the energy storage module 120, improving the voltage stability at the second terminal of the energy storage module 120, and further improving the stability of the gate voltage of the driving transistor M1. This makes the driving current generated by the driving transistor M1 more stable, resulting in more stable brightness of the light-emitting element D, and further improving the brightness uniformity problem.

[0084] During the operation of the pixel circuit, when the first scan signal S1 changes from low to high, the voltage fluctuation generated by the write transistor M2 will cause a change in the voltage of node N3; when the second scan signal S2 changes from low to high, the voltage fluctuation generated by the voltage stabilizing transistor M4 will also cause a change in the voltage of node N3. Since the isolation module 130 can play a continuous isolation role, when the voltage of node N3 fluctuates, the isolation module 130 can isolate the voltage fluctuation of node N3, improve the influence of voltage fluctuation on node N2, make the gate voltage of the driving transistor M1 more stable, and improve the uniformity of display.

[0085] In one embodiment, such as Figure 7 As shown, the pixel circuit also includes a light-emitting control module 150. The first end of the light-emitting control module 150 is connected to the second end of the driving transistor M1. The second end of the light-emitting control module 150 is used to connect to the light-emitting element D. The control end of the light-emitting control module 150 is used to receive the second scan signal S2.

[0086] Specifically, when the second scan signal S2 is valid, the light-emitting control module 150 connects the driving transistor M1 and the light-emitting element D, and the driving current generated by the driving transistor M1 is supplied to the light-emitting element D, causing the light-emitting element D to emit light of a corresponding brightness. When the second scan signal S2 is invalid, the light-emitting control module 150 disconnects the connection between the driving transistor M1 and the light-emitting element D, causing the light-emitting element D to stop emitting light. Thus, the light-emitting control module 150 can control the light emission of the light-emitting element D.

[0087] For example, the light-emitting control module 150 may include a light-emitting control transistor M5. A first terminal of the light-emitting control transistor M5 is used to receive a drive current, a second terminal of the light-emitting control transistor M5 is used to connect to the light-emitting element D, and the gate of the light-emitting control transistor M5 is used to receive a second scan signal S2. The light-emitting control transistor M5 is turned on under the action of the second scan signal S2, transmitting a drive current to the light-emitting element D, causing the light-emitting element D to emit light of a corresponding brightness.

[0088] In one embodiment, such as Figure 8 As shown, the pixel circuit also includes a light-emitting initialization module 160. The control terminal of the light-emitting initialization module 160 is used to receive the third scan signal S3, the first terminal of the light-emitting initialization module 160 is used to receive the second initialization signal VREF3, and the second terminal of the light-emitting initialization module 160 is connected to the second terminal of the light-emitting control module 150.

[0089] It can be understood that when the third scan signal S3 is valid, the light-emitting initialization module 160, under the action of the third scan signal S3, transmits the second initialization signal VREF3 to the second terminal of the light-emitting initialization module 160, i.e., the anode of the light-emitting element D, thereby initializing the potential of the anode of the light-emitting element D and the second terminal of the light-emitting control transistor M5. This improves the impact of the potential of the anode of the light-emitting element D in the previous timing sequence on the next timing sequence, thus effectively improving the contrast. Simultaneously, initialization can also extend the lifespan of the organic light-emitting diode OLED.

[0090] The third scan signal S3 can be a separately configured control signal, or it can reuse other control signals depending on the actual implementation. For example, the third scan signal S3 can be the same signal as the first scan signal S1, that is, the third scan signal S3 reuses the first scan signal S1, thereby reducing the number of signal lines in the entire pixel circuit.

[0091] The second initialization signal VREF3 can be a DC voltage signal, and the voltage value needs to be set according to the actual circuit. Optionally, the second initialization signal VREF3 can be the same signal as the isolation control signal VREF1 to further reduce the signal lines of the pixel circuit.

[0092] In one embodiment, the light-emitting initialization module 160 includes a first initialization transistor M6, the gate of which is used to receive a third scan signal S3, the first terminal of which is used to receive a second initialization signal VREF3, and the second terminal of which is connected to the second terminal of the light-emitting control module 150.

[0093] Specifically, the second terminal of the first initialization transistor M6 is connected to the second terminal of the light-emitting control transistor M5 and the anode of the light-emitting element D, respectively. When the third scan signal S3 is valid, it is turned on and transmits the second initialization signal VREF3 to the second terminal of the first initialization transistor M6 and the anode of the light-emitting element D, thereby initializing the potential of the anode of the light-emitting element D.

[0094] In one embodiment, such as Figure 9 As shown, the pixel circuit also includes a threshold voltage sampling module 170. The control terminal of the threshold voltage sampling module 170 is used to receive the first scan signal S1. The first terminal of the threshold voltage sampling module 170 is used to receive the first initialization signal VREF2. The second terminal of the threshold voltage sampling module 170 is connected to the gate of the driving transistor M1. The third terminal of the threshold voltage sampling module 170 is connected to the second terminal of the driving transistor M1.

[0095] The threshold voltage sampling module 170 is used to sample the threshold voltage of the driving transistor M1 during the threshold voltage sampling stage, and transmit the collected threshold voltage to the energy storage module 120 for storage. The driving current generated by the driving transistor M1 is independent of the threshold voltage.

[0096] Specifically, during the initialization phase, the threshold voltage sampling module 170 transmits a first initialization signal VREF2 to the gate and the second terminal of the driving transistor M1, restoring them to their initial state. During the threshold voltage sampling phase, the threshold voltage sampling module 170 samples the threshold voltage of the driving transistor M1, enabling the storage capacitor C1 to couple according to this threshold voltage. This ensures that the driving voltage of the driving transistor M1 is independent of its threshold voltage, and the final driving current generated by the driving transistor M1 is unrelated to its threshold voltage, improving the stability of the driving current and thus enhancing the display effect of the light-emitting element D.

[0097] In one embodiment, continue to refer to Figure 9 The threshold voltage sampling module 170 includes a threshold voltage sampling unit 171 and an initialization unit 172. The control terminal of the initialization unit 172 is used to receive a fourth scan signal S4. The first terminal of the initialization unit 172 is used to receive a first initialization signal VREF2. The second terminal of the initialization unit 172 is connected to the first terminal of the threshold voltage sampling unit 171. The control terminal of the threshold voltage sampling unit 171 is used to receive a first scan signal S1. The second terminal of the threshold voltage sampling unit 171 is connected to the gate of the driving transistor M1. The third terminal of the threshold voltage sampling unit 171 is connected to the second terminal of the driving transistor M1.

[0098] The initialization unit 172 is used to disconnect the threshold voltage sampling unit 171 from the first initialization signal VREF2 during the threshold voltage sampling stage, so that the threshold voltage sampling unit 171 samples the threshold voltage of the driving transistor M1.

[0099] Specifically, during the initialization phase, the potentials of both the first scan signal S1 and the fourth scan signal S4 are valid. The initialization unit 172 transmits the first initialization signal VREF2 to the first terminal of the threshold voltage sampling unit 171. The threshold voltage sampling unit 171 then transmits the first initialization signal VREF2 to the gate and the second terminal of the driving transistor M1, completing the initialization. During the threshold voltage sampling phase, the first scan signal S1 transitions to an invalid state. The initialization unit 172 disconnects the threshold voltage sampling unit 171 from the first initialization signal VREF2. At this time, the threshold voltage sampling unit 171 remains connected to the gate and the second terminal of the driving transistor M1, sampling the threshold voltage of the driving transistor M1.

[0100] The effective potential state of the fourth scan signal S4 needs to be determined in conjunction with the specific structural design of the initialization unit 172. For example, the initialization unit 172 includes a second initialization transistor M9, the gate of which is used to receive the fourth scan signal S4, the first terminal of which is used to receive the first initialization signal S1, and the second terminal of which is connected to the first terminal of the threshold voltage sampling module 171. Figure 9 In the embodiment shown, the second initialization transistor M9 is a P-type thin-film transistor, and correspondingly, the fourth scan signal S4 is active when it is low.

[0101] In one embodiment, the third scan signal S3 used to control the first initialization transistor M6 can be multiplexed with the fourth scan signal S4 to reduce the number of signal lines in the circuit.

[0102] In practical implementation, the isolation control signal VREF1, the first initialization signal VREF2, and the second initialization signal VREF3 are all DC voltage signals. Depending on the actual situation, these three signals can be selectively multiplexed or designed with different voltage amplitudes. Preferably, the voltage amplitude of the second initialization signal VREF3 can be smaller than that of the first initialization signal VREF2. The purpose is to make the anode voltage of the light-emitting element D lower, resulting in a better black state effect in the next time sequence and further improving the contrast.

[0103] In one embodiment, the threshold voltage sampling unit 171 includes a first threshold voltage sampling transistor M7 and a second threshold voltage sampling transistor M8. The gate of the first threshold voltage sampling transistor M7 and the gate of the second threshold voltage sampling transistor M8 are both used to receive the first scan signal S1. The first terminal of the first threshold voltage sampling transistor M7 and the first terminal of the second threshold voltage sampling transistor M8 are both connected to the second terminal of the second initialization transistor M9. The second terminal of the first threshold voltage sampling transistor M7 is connected to the gate of the driving transistor M1, and the second terminal of the second threshold voltage sampling transistor M8 is connected to the second terminal of the driving transistor M1.

[0104] It is understandable that transmitting the first initialization signal VREF2 to the node between the first threshold voltage sampling transistor M7 and the second threshold voltage sampling transistor M8 through the second initialization transistor M9 can effectively reduce the leakage current of node N1, making the gate voltage of the driving transistor M1 more stable.

[0105] Those skilled in the art will understand that the types of transistors described above need to be selected based on actual requirements. The first and second terminals of each transistor are not limited to source or drain. For example, the signal input terminal of each transistor is the first terminal, and the signal output terminal is the second terminal.

[0106] The following is combined Figure 10 The timing pairs shown Figure 9 The operation of the pixel circuit in the embodiment is described below. The third scan signal S3 can multiplex either the first scan signal S1 or the fourth scan signal S4. The scan period includes a first time period T1, a second time period T2, a third time period T3, a fourth time period T4, and a fifth time period T5.

[0107] During the first time period T1, i.e., the initialization accuracy phase, the first scan signal S1, the second scan signal S2, and the fourth scan signal S4 are all at a low level, all transistors are turned on, and nodes N1, N3, and N4 are all at the voltage of the first initialization signal VREF2, thereby eliminating the voltage of the previous frame through initialization. At the same time, the anode of the light-emitting element D is at the voltage of the second initialization signal VREF3. Initializing the light-emitting element D can improve its lifespan.

[0108] It should be noted that, since a large number of devices are conducting during this stage, the duration of the first time period T1 can be designed to be very short in order to avoid large current flowing through the devices. If necessary, it can also be designed to be 0 seconds according to the actual situation.

[0109] During the second time period T2, i.e., the initialization phase, the second scan signal S2 goes high, and the voltage stabilizing transistor M4 and the light-emitting control transistor M5 change from being on to being off; the first scan signal S1 and the fourth scan signal S4 are maintained, and the voltage of the data signal DATA is written to node N3, and the voltage V of node N3... N3 =V DATA (Voltage of data signal DATA) DATA (Output from the driver chip). The first threshold voltage sampling transistor M7 and the second threshold voltage sampling transistor M8 remain on, forming a diode structure with the driver transistor M1. The voltage at node N4 is equal to the voltage at node N1, both being the voltage of the first initialization signal VREF2, i.e., V. N4 =V N1 =VREF2, thereby releasing the defect in the voltage of the driving transistor M1. At this stage, all pixels of the display panel return to their initial state.

[0110] During this period, the first initialization transistor M6 remains on, with the purpose of resetting the state of the light-emitting element D and extending its lifespan.

[0111] During the third time period T3, i.e., the threshold voltage sampling phase, the first scan signal S1 and the second scan signal S2 are maintained, the fourth scan signal S4 becomes high, the second initialization transistor M9 changes from on to off, and the voltage of the data signal DATA is written to node N3, and the voltage V of node N3... N3 =V DATA The first threshold voltage sampling transistor M7 and the second threshold voltage sampling transistor M8 remain on, forming a diode structure with the driving transistor M1. They sample the threshold voltage Vth of the driving transistor M1. After sampling, the voltage V at node N1 is... N1 =ELVDD-Vth, node V N4 voltage V N4 =V N1 .

[0112] If the first initialization transistor M6 receives the first scan signal S1, the first initialization transistor M6 remains on, with the purpose of resetting the state of the light-emitting element D; if the first initialization transistor M6 receives the fourth scan signal S4, it changes from being on to being off, completing the resetting action of the light-emitting element D.

[0113] During the fourth time period T4, i.e., the coupling completion stage, the second scan signal S2 and the fourth scan signal S4 are maintained, the first scan signal S1 becomes high, and the write transistor M2, the first threshold voltage sampling transistor M7, and the second threshold voltage sampling transistor M8 change from on to off. The voltage of node N1 is maintained at ELVDD-Vth, the voltage of node N4 is equal to the voltage of node N1, and the voltage of node N3 is V. N3 =V DATA If the first initialization transistor M6 receives the first scan signal S1, it will change from being turned on to being turned off, thus completing the reset operation.

[0114] During the fifth time period T5, i.e., the light-emitting stage, the first scan signal S1 and the fourth scan signal S4 are maintained, while the second scan signal S2 changes from high to low. The voltage stabilizing transistor M4 and the light-emitting control transistor M5 change from the off state to the on state. The voltage at node N3 changes from the voltage of the data signal DATA to the voltage of the first initialization signal VREF2. Due to the coupling effect of the storage capacitor C1, the voltage at node N1 changes by VREF2-V. DATA Voltage V at node N1 N1 =ELVDD-Vth+(VREF2-V DATA Therefore, when the driving transistor M1 is working, the gate-source voltage Vsg-Vth = ELVDD-(ELVDD-Vth+(VREF2-V)). DATA ))-Vth=V DATA -VREF2; its output drive current Ion is: Ion=1 / 2·μ·C ox ·W / L·(Vsg-|Vth|) 2 =1 / 2·μ·C ox ·W / L·(V DATA -VREF2) 2 Where W / L represents the channel width-to-length ratio of the driving transistor M1, μ represents the mobility, and C... ox This represents the gate oxide capacitance per unit area.

[0115] From the above equation, it can be seen that, theoretically, the driving current Ion flowing through the light-emitting element D is related to the voltage V of the data signal. DATAThe voltage VREF2 of the first initialization signal is related to the first power supply voltage signal ELVDD, the second power supply voltage signal ELVSS, and the threshold voltage Vth of the driving transistor M1. Therefore, the pixel circuit compensates for changes in the first power supply voltage signal ELVDD and the threshold voltage Vth. Even if the threshold voltage Vth of the driving transistor M1 deviates, or the first power supply voltage signal ELVDD changes, it will not affect the driving current Ion flowing through the light-emitting element D. Therefore, this pixel circuit can avoid brightness unevenness caused by threshold voltage deviation of the thin-film transistor and power supply voltage changes, thereby improving the display quality of the display product.

[0116] It should also be noted that, in reality, when the voltage stabilizing transistor M4 and the write transistor M1 switch from off to on, their parasitic capacitances will cause voltage fluctuations affecting the voltage of node N3. However, due to the presence of the isolation module 130, the impact on the voltage of node N2 can be reduced. Please refer to [link to relevant documentation]. Figure 11 and Figure 1 , Figure 11 When isolation capacitor C2 is selected for isolation module 130, and the isolation control signal VREF1 reuses the first power supply voltage signal ELVDD, the measured voltage data of the upper plate connected to the storage capacitor C1 and node N2 of a certain AMOLED (Active-matrix organic light-emitting diode) module at ideal data signal voltages of 3V (low grayscale display) and 1V (high grayscale display) show that the voltage change amplitude at the first end of storage capacitor C1 is significantly weakened, thereby reducing the impact of voltage fluctuations on the voltage of node N1, resulting in smaller changes in driving current, which is beneficial to the stable operation of the pixel circuit and the realization of high-quality display. Furthermore, the voltage change within one frame is smaller at low grayscale, with the voltage jump at the first end of storage capacitor C1 reduced by approximately 0.2V, and the voltage jump at the first end of storage capacitor C1 reduced by approximately 0.1V at high grayscale. Therefore, the improvement at low grayscale is more significant.

[0117] Furthermore, as the voltage-stabilized transistor M4 varies with the manufacturing process, its parasitic capacitance also changes, resulting in different voltages coupled to node N3 in each pixel circuit. Since the isolation module 130 is in a continuous isolation state, the impact on node N2 can be reduced, thereby reducing the impact on the voltage of node N1. This helps to reduce the voltage fluctuation range of node N1 in each pixel circuit, thereby improving the display uniformity problem and enhancing the display quality of the display product.

[0118] Based on the same inventive concept, embodiments of the present invention also provide a display panel. The display panel may include, but is not limited to, an OLED display panel, an LCD (Liquid Crystal Display) or a Micro Light Emitting-Diode (Micro Light Emitting-Diode) display panel, etc., and embodiments of the present invention do not impose any special limitations on it.

[0119] Figure 12 This is a schematic diagram of the structure of the display panel 200 provided in an embodiment of the present invention, as shown below. Figure 10 As shown, the display panel 200 includes a pixel circuit 100, which can be configured according to any of the pixel circuits provided in the above embodiments. Therefore, the display panel 200 also has the beneficial effects of the pixel circuits in the above embodiments, and the similarities can be understood with reference to the explanation of the display panel above.

[0120] This invention also provides a driving method for a pixel circuit, which includes an initialization stage and a light emission stage. This driving method can be applied to any of the pixel circuits provided in the above embodiments, such as... Figure 13 As shown, the driving method specifically includes:

[0121] Step 300: During the initialization phase, the data writing module receives the data signal under the control of the first scan signal and transmits the data signal to the energy storage module through the isolation module.

[0122] Among them, the isolation module reduces the impact of voltage fluctuations generated by the data writing module on the energy storage module when the first scan signal changes.

[0123] Step 400: During the light-emitting stage, the energy storage module outputs the potential of the stored data signal to the gate of the driving transistor. The driving transistor generates a driving current according to the potential of the data signal and outputs the driving current to the light-emitting element.

[0124] The pixel circuit driving method provided in this embodiment of the invention, when the first scan signal (such as in the data writing stage) changes, inevitably generates voltage fluctuations in the data writing module. The isolation module can reduce the voltage amplitude of the voltage fluctuations transmitted to the energy storage module, thereby improving the impact of voltage fluctuations on the first terminal of the energy storage module. As a result, the voltage stability of the second terminal of the energy storage module can be improved, which in turn improves the stability of the gate voltage of the driving transistor connected to the second terminal of the energy storage module. This makes the driving current generated by the driving transistor in the light-emitting stage more stable, the brightness of the light-emitting element more stable, and effectively improves the brightness uniformity problem.

[0125] In the description of this specification, references to terms such as "some embodiments," "other embodiments," etc., indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of this application. In this specification, the illustrative descriptions of the above terms do not necessarily refer to the same embodiments or examples.

[0126] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0127] The embodiments described above are merely illustrative of several implementation methods of this application, and while the descriptions are specific and detailed, they should not be construed as limiting the scope of this application. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these modifications and improvements all fall within the protection scope of this application. Therefore, the protection scope of this application should be determined by the appended claims.

Claims

1. A pixel circuit, comprising a light-emitting element, characterized in that, The pixel circuit also includes: A data writing module, wherein the control terminal of the data writing module is used to receive a first scan signal, and the first terminal of the data writing module is used to receive a data signal; An energy storage module, wherein a first end of the energy storage module is connected to a second end of the data writing module; A driving transistor, the gate of which is connected to a second terminal of the energy storage module, a first terminal of which receives a first power supply voltage signal, and a second terminal of which is directly or indirectly connected to the light-emitting element, the second terminal of which outputs a driving current to the light-emitting element and drives the light-emitting element to emit light; and, An isolation module is provided, which is disposed between the second end of the data writing module and the first end of the energy storage module, and is used to reduce the impact of voltage fluctuations generated by the data writing module on the energy storage module, thereby reducing the impact on the gate of the driving transistor. A voltage stabilization module is provided, wherein the control terminal of the voltage stabilization module is used to receive a second scan signal, the first terminal of the voltage stabilization module is used to receive a first initialization signal, and the second terminal of the voltage stabilization module is connected to the second terminal of the data writing module; during the light emission stage, the first initialization signal transmitted by the voltage stabilization module is used to compensate the potential of the node between the data writing module and the isolation module, so as to stabilize the gate voltage of the driving transistor.

2. The pixel circuit according to claim 1, characterized in that, The isolation module includes an isolation transistor, the gate of which is used to receive an isolation control signal. The first terminal of the isolation transistor is connected to the second terminal of the data writing module, and the second terminal of the isolation transistor is connected to the first terminal of the energy storage module. The isolation transistor is in a conducting state under the action of the isolation control signal. The isolation transistor is a P-type transistor or an N-type transistor. When the isolation transistor is a P-type transistor, the voltage value of the isolation control signal is less than zero or other constant low-level signal. When the isolation transistor is an N-type transistor, the isolation control signal is the first power supply voltage signal or other positive voltage signal.

3. The pixel circuit according to claim 1, characterized in that, The isolation module includes an isolation capacitor, the first end of which is connected to the first end of the energy storage module, and the second end of which is used to receive an isolation control signal.

4. The pixel circuit according to claim 1, characterized in that, The isolation module is also used to reduce the impact of voltage fluctuations generated by the voltage stabilization module on the energy storage module when the second scanning signal undergoes a jump during the coupling completion stage.

5. The pixel circuit according to claim 1, characterized in that, The voltage stabilization module includes a voltage stabilization transistor, the gate of which is used to receive the second scan signal, the first terminal of which is used to receive the first initialization signal, and the second terminal of which is connected to the second terminal of the data writing module.

6. The pixel circuit according to claim 1, characterized in that, The data writing module includes a writing transistor, the gate of which is used to receive the first scan signal, the first terminal of which is used to receive the data signal, and the second terminal of which is connected to the isolation module.

7. The pixel circuit according to claim 1, characterized in that, The energy storage module includes a storage capacitor, the first end of which is connected to the isolation module, and the second end of which is connected to the gate of the driving transistor.

8. The pixel circuit according to claim 4, characterized in that, The pixel circuit further includes a light-emitting control module, the first end of which is connected to the second end of the driving transistor; the second end of the light-emitting control module is used to connect to the light-emitting element, and the control end of the light-emitting control module is used to receive the second scanning signal.

9. The pixel circuit according to claim 8, characterized in that, The light-emitting control module includes a light-emitting control transistor. The first terminal of the light-emitting control transistor is used to receive the driving current, the second terminal of the light-emitting control transistor is used to connect to the light-emitting element, and the gate of the light-emitting control transistor is used to receive the second scanning signal.

10. The pixel circuit according to claim 8, characterized in that, The pixel circuit also includes a light emission initialization module. The control terminal of the light emission initialization module is used to receive a third scanning signal, the first terminal of the light emission initialization module is used to receive a second initialization signal, and the second terminal of the light emission initialization module is connected to the second terminal of the light emission control module.

11. The pixel circuit according to claim 10, characterized in that, The third scan signal is the same as the first scan signal.

12. The pixel circuit according to claim 10, characterized in that, The isolation control signal used to control the isolation module is the same as the second initialization signal.

13. The pixel circuit according to claim 10, characterized in that, The light-emitting initialization module includes a first initialization transistor, the gate of which is used to receive the third scan signal, the first terminal of which is used to receive the second initialization signal, and the second terminal of which is connected to the second terminal of the light-emitting control module.

14. The pixel circuit according to claim 10, characterized in that, The pixel circuit also includes: A threshold voltage sampling module, wherein the control terminal of the threshold voltage sampling module is used to receive the first scan signal, the first terminal of the threshold voltage sampling module is used to receive the first initialization signal, the second terminal of the threshold voltage sampling module is connected to the gate of the driving transistor, and the third terminal of the threshold voltage sampling module is connected to the second terminal of the driving transistor; The threshold voltage sampling module is used to sample the threshold voltage of the driving transistor during the threshold voltage sampling stage, and transmit the collected threshold voltage to the energy storage module for storage, wherein the driving current generated by the driving transistor is independent of the threshold voltage.

15. The pixel circuit according to claim 14, characterized in that, The threshold voltage sampling module includes a threshold voltage sampling unit and an initialization unit. The control terminal of the initialization unit is used to receive a fourth scan signal, the first terminal of the initialization unit is used to receive a first initialization signal, the second terminal of the initialization unit is connected to the first terminal of the threshold voltage sampling unit, the control terminal of the threshold voltage sampling unit is used to receive the first scan signal, the second terminal of the threshold voltage sampling unit is connected to the gate of the driving transistor, and the third terminal of the threshold voltage sampling unit is connected to the second terminal of the driving transistor. The initialization unit is used to disconnect the threshold voltage sampling unit from the first initialization signal during the threshold voltage sampling phase, so that the threshold voltage sampling unit samples the threshold voltage of the driving transistor.

16. The pixel circuit according to claim 15, characterized in that, The third scan signal and the fourth scan signal are the same signal.

17. The pixel circuit according to claim 15, characterized in that, The voltage amplitude of the second initialization signal is less than that of the first initialization signal.

18. The pixel circuit according to claim 15, characterized in that, The initialization unit includes a second initialization transistor, the gate of which is used to receive the fourth scan signal, the first terminal of which is used to receive the first initialization signal, and the second terminal of which is connected to the first terminal of the threshold voltage sampling module.

19. The pixel circuit according to claim 18, characterized in that, The threshold voltage sampling unit includes a first threshold voltage sampling transistor and a second threshold voltage sampling transistor. The gates of the first threshold voltage sampling transistor and the second threshold voltage sampling transistor are both used to receive the first scan signal. The first terminals of the first threshold voltage sampling transistor and the second threshold voltage sampling transistor are both connected to the second terminal of the second initialization transistor. The second terminal of the first threshold voltage sampling transistor is connected to the gate of the driving transistor, and the second terminal of the second threshold voltage sampling transistor is connected to the second terminal of the driving transistor.

20. A driving method for a pixel circuit, characterized in that, For the pixel circuit according to any one of claims 1-19, comprising: During the initialization phase, the data writing module receives a data signal under the control of the first scan signal and transmits the data signal to the energy storage module through the isolation module. The isolation module reduces the impact of voltage fluctuations generated by the data writing module on the energy storage module when the first scan signal changes. During the light-emitting stage, the energy storage module outputs the potential of the stored data signal to the gate of the driving transistor, and the driving transistor generates a driving current according to the potential of the data signal and outputs the driving current to the light-emitting element.

21. A display panel, characterized in that, Includes the pixel circuit as described in any one of claims 1-19.

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