A regular matching circuit, matching method, and FPGA chip

Abstract

A regular matching circuit, a matching method, and an FPGA chip provided by an embodiment of the present application include: an input end of a mode judgment module is used to connect to a storage device, and an output end is electrically connected to an enable end of a comparison module, so as to obtain a regular expression signal, and determine whether to send an enable signal according to the regular expression signal; a first input end of the comparison module is used to connect to a storage device, a second input end is used to connect to a cache module, and an output end is electrically connected to a first input end of a processing module, so as to obtain first data and second data upon receiving an enable signal, compare the first data with the second data, and send a comparison result to the processing module; a second input end of the processing module is used to connect to a storage device, and a third input end is used to connect to the cache module, a first output end is electrically connected to the mode judgment module, and a second output end is used to connect to a storage device, so as to obtain a regular expression signal and a comparison result, and determine a data path according to the regular expression signal and the comparison result.

Description

Technical Field

[0001] The present application relates to the field of data processing technology, and specifically to a regular matching circuit, a matching method, and an FPGA chip. Background Art

[0002] A regular expression is a logical formula for operating on strings and special characters. It uses predefined specific characters and combinations of specific characters to form a regular string, which is used to express a logical filter for strings. A regular expression is essentially a text pattern that describes one or more strings to match when searching for text.

[0003] In some technologies, regular expression matching is performed through software algorithms, such as regular expression matching through finite state automata. The above matching method consumes more resources and has a slower matching speed when there is a large amount of matching data. Summary of the invention

[0004] In view of this, the present application provides a regular matching circuit, a matching method, and an FPGA chip to help solve the problems of high resource consumption and slow matching speed in the prior art.

[0005] In the first aspect, an embodiment of the present application provides a regular matching circuit, comprising: a pattern judgment module, a comparison module, and a processing module; wherein the input end of the pattern judgment module is used to connect to a storage device, and the output end of the pattern judgment module is electrically connected to the enable end of the comparison module; the pattern judgment module is used to obtain a regular expression signal, and determine whether to send an enable signal to the comparison module based on the regular expression signal; in this way, the design flexibility of the analog judgment module is high and the resources used are relatively small, thereby reducing the comparison process corresponding to some regular expressions.

[0006] The first input end of the comparison module is used to connect to the storage device, the second input end of the comparison module is used to connect to the cache module, and the output end of the comparison module is electrically connected to the first input end of the processing module; the comparison module is used to obtain the first data from the storage device and the second data from the cache module when receiving the enable signal, compare the first data with the second data and send the comparison result to the processing module; the comparison result is used to indicate whether the first data and the second data match;

[0007] The second input end of the processing module is used to connect to the storage device, the third input end of the processing module is used to connect to the cache module, the first output end of the processing module is electrically connected to the mode judgment module, and the second output end of the processing module is used to connect to the storage device; the processing module is used to receive the comparison result and obtain the regular expression signal, and determine the data path according to the regular expression signal and the comparison result.

[0008] In a possible implementation manner of the first aspect, the mode judgment module is configured to: if the regular expression signal is a first target regular expression signal, not send an enable signal to the comparison module; or, if the regular expression signal is a second target regular expression signal, send an enable signal to the comparison module.

[0009] In a possible implementation of the first aspect, the first target regular expression signal is: any data and unlimited number of times mode, any data and repeated any number of times, any data repeated at most n times, any data repeated at least n times, ignoring n data and not checking, or one or more combinations thereof, where n is an integer greater than 0.

[0010] In a possible implementation of the first aspect, the mode determination module is configured to set the detection tag to a first tag value and send the detection tag to the processing module when the regular expression signal is a first target regular expression signal;

[0011] The processing module is used to receive the detection tag, obtain the first data corresponding to the regular expression signal, obtain the second data in the cache module, and detect whether the second data matches the first data;

[0012] If there is a match, the detection tag is updated to a second tag value, and the first address corresponding to the first data is determined as the next jump address.

[0013] In a possible implementation manner of the first aspect, the processing module is configured to, when the second data does not match the first data, re-acquire the second data from the cache module, and detect whether the second data matches the first data, until the re-acquired second data matches the first data;

[0014] If the re-acquired second data matches the first data, the detection tag is updated to a second tag value, and the first address corresponding to the first data is determined as the next jump address.

[0015] In a possible implementation manner of the first aspect, the method further includes a first counting module;

[0016] The fourth input terminal of the processing module is electrically connected to the output terminal of the first counting module, and the third output terminal of the processing module is electrically connected to the control terminal of the first counting module;

[0017] The processing module is used to update the count value of the first counting module each time the second data of the cache module is obtained; when the second data does not match the first data, determine the execution times of obtaining the second data in the cache module according to the first counting module, if the execution times of obtaining the second data reaches the times set in the regular expression signal, then update the detection tag to the second tag value, and determine the second address corresponding to the first data as the next jump address, and send the next jump address to the storage device; or,

[0018] If the execution times of the second data do not reach the number set in the regular expression signal, the second data is obtained again in the cache module, the count value of the first counting module is updated, and it is detected whether the second data matches the first data until the second data matches the first data or the execution times of the second data reaches the number set in the regular expression signal.

[0019] In a possible implementation of the first aspect, the processing module is used to obtain the n+1th second data in the cache module according to the regular expression signal when the regular expression signal includes a signal to ignore n data and not check; wherein n is an integer greater than 0.

[0020] In a possible implementation of the first aspect, the processing module is used to determine the first address corresponding to the first data as the next jump address when the comparison result indicates that the first data matches the second data and there is no repeated execution parameter in the regular expression signal, and send the next jump address to the storage device; wherein the next jump address refers to the storage address of the first data that needs to be reacquired when the storage device reacquires the first data.

[0021] In a possible implementation of the first aspect, the processing module is used to, when the comparison result indicates that the first data matches the second data, there is a repeated execution parameter in the regular expression signal, and the number of executions of obtaining the second data reaches n times, if the second data obtained n times all have matching first data, determine the first address corresponding to the first data as the next jump address, and send the next jump address to the storage device, wherein n is the value of the repeated execution parameter in the regular expression signal, and n is an integer greater than 0; or,

[0022] If there is at least one unmatched first data in the second data acquired n times, the second address corresponding to the first data is determined as the next jump address, and the next jump address is sent to the storage device; the second address corresponding to the first data is different from the first address corresponding to the first data.

[0023] In a possible implementation of the first aspect, the processing module is used to determine the starting address as the next jump address, send the next jump address to the storage device, send a trigger signal for obtaining the first data to the storage device, send a trigger signal for obtaining the second data to the cache module, and trigger the mode judgment module to re-send an enable signal to the comparison module to trigger the comparison module to re-obtain the first data from the storage device and the second data from the cache module, until the number of executions for obtaining the second data reaches n times, when the comparison result indicates that the first data matches the second data, there is a repeated execution parameter in the regular expression signal, and the number of executions for obtaining the second data has not reached n times, wherein n is the value of the repeated execution parameter in the regular expression signal, n is an integer greater than 0, and the starting address refers to the storage address of the first data obtained for the first time corresponding to the regular expression signal.

[0024] In a possible implementation of the first aspect, the processing module is used to determine the second address corresponding to the first data as the next jump address and send the next jump address to the storage device when the comparison result indicates that the first data does not match the second data, there is no repeated execution parameter in the regular expression signal, and there is no target repeated operation information corresponding to the first data; wherein the target repeated operation information is repeated operation information adjacent to the first data and located after the first data in the regular expression signal; or,

[0025] The processing module is used to update the next jump address according to a preset update method, send the next jump address to the storage device, send a trigger signal for obtaining the first data to the storage device, and trigger the mode judgment module to re-send an enable signal to the comparison module so as to trigger the comparison module to re-acquire the first data from the storage device when the comparison result indicates that the first data does not match the second data, there is no repeated execution parameter in the regular expression signal, and there is target repeated operation information corresponding to the first data. The comparison result indicates that the first data does not match the second data, there is no repeated execution parameter in the regular expression signal, and there is target repeated operation information corresponding to the first data.

[0026] In a possible implementation of the first aspect, the processing module is configured to, when the comparison result indicates that the first data and the second data do not match, there is a repeated execution parameter in the regular expression signal, and there is no target repeated operation information corresponding to the first data, if the number of execution times of obtaining the second data reaches n times, determine the second address of the first data as the next jump address, and send the next jump address to the storage device; or

[0027] The processing module is used for, when the comparison result indicates that the first data does not match the second data, there is a repeated execution parameter in the regular expression signal, and there is no target repeated operation information corresponding to the first data, if the number of execution times of obtaining the second data does not reach n times, then recording that the second data currently obtained does not match the corresponding first data, and determining the starting address as the next jump address, sending the next jump address to the storage device, sending a trigger signal for obtaining the first data to the storage device, sending a trigger signal for obtaining the second data to the cache module, and triggering the mode judgment module to re-send an enable signal to the comparison module to trigger the comparison module to re-obtain the first data from the storage device and the second data from the cache module until the number of execution times of obtaining the second data reaches n times or the second data matches the corresponding first data, wherein n is the value of the repeated execution parameter in the regular expression signal, n is an integer greater than 0, and the starting address refers to the storage address of the first data obtained for the first time corresponding to the regular expression.

[0028] In a possible implementation of the first aspect, the processing module is used to, when the comparison result indicates that the first data does not match the second data, there is a repeated execution parameter in the regular expression signal, and there is target repeated operation information corresponding to the first data, record that the first data currently acquired does not match the second data, and update the next jump address according to a preset update method, send the next jump address to the storage device, send a first data acquisition trigger signal to the storage device, and trigger the mode judgment module to re-send an enable signal to the comparison module so as to trigger the comparison module to re-acquire the first data from the storage device, until there is no target repeated operation information corresponding to the first data in the regular expression signal or the re-acquired first data matches the second data;

[0029] When the target repeated operation information corresponding to the first data does not exist in the regular expression signal, detecting whether the number of executions of obtaining the second data reaches n times; wherein n is the value of the repeated execution parameter in the regular expression signal, and n is an integer greater than 0;

[0030] If the number of executions of obtaining the second data reaches n times, the second address of the first data is determined as the next jump address, and the next jump address is sent to the storage device; or,

[0031] If the number of executions for obtaining the second data does not reach n times, the starting address is determined as the next jump address, the next jump address is sent to the storage device, a trigger signal for obtaining the first data is sent to the storage device, a trigger signal for obtaining the second data is sent to the cache module, and the mode judgment module is triggered to send an enable signal to the comparison module again, so as to trigger the comparison module to re-obtain the first data from the storage device and the second data from the cache module, until the number of executions for obtaining the second data reaches n times or the second data matches the corresponding first data, wherein the starting address refers to the storage address of the first data obtained for the first time corresponding to the regular expression.

[0032] In a possible implementation manner of the first aspect, the method further includes: a second counting module;

[0033] The fifth input terminal of the processing module is electrically connected to the output terminal of the second counting module, and the fourth output terminal of the processing module is electrically connected to the control terminal of the second counting module;

[0034] The processing module is used to update the count value of the second counting module each time the second data is acquired, and determine the number of executions of acquiring the second data according to the count value of the second counting module.

[0035] In a possible implementation manner of the first aspect, the cache module includes at least one of a cache unit and a data capture unit.

[0036] That is, in the embodiment of the present application, the regular expression signal can be any data and unlimited number of patterns, any data and repeated any number of times, any data repeated up to n times, any data repeated at least n times, ignoring n data without checking, one or more combinations, or can be the first data or the second data pattern, the first data or the second data and unlimited number of patterns, the first data or the second data and repeated any number of times, the first data or the second data and repeated up to n times, the first data or the second data and repeated at least n times One or more combinations, wherein the first data is different from the second data. Or the regular expression signal can also be a new pattern formed by any combination of the above patterns. In this way, the regular matching circuit in the embodiment of the present application can realize the matching of multiple regular expression signals, and when the match is successful, the data path when the match is successful can be determined, and when the match fails, the data path when the match fails can be determined, which greatly improves the flexibility of the regular matching circuit, reduces the comparison process corresponding to some regular expressions, thereby reducing the resources used, improving the matching speed, and then improving the matching efficiency.

[0037] In a second aspect, an embodiment of the present application provides a regular matching method, which is applied to the regular matching circuit described in any one of the embodiments of the first aspect above, and the method includes:

[0038] The mode judgment module obtains a regular expression signal, and determines whether to send an enable signal for the comparison module according to the regular expression signal;

[0039] When receiving the enable signal, the comparison module obtains the first data from the storage device and obtains the second data from the cache module, compares the first data with the second data, and sends the comparison result to the processing module; the comparison result is used to indicate whether the first data and the second data match;

[0040] The processing module receives the comparison result and obtains a regular expression signal, and determines a data path according to the regular expression signal and the comparison result.

[0041] In a third aspect, an embodiment of the present application provides an FPGA chip, comprising the regular matching circuit described in any one of the first aspects above.

[0042] By adopting the scheme provided in the embodiment of the present application, when the mode judgment module obtains the regular expression signal, it can determine whether to send an enable signal for the comparison module according to the regular expression signal; when the comparison module receives the comparison signal, it can obtain the first data in the storage device and receive the second data in the cache module, and compare whether the first data and the second data match, and send the comparison result to the processing module. The processing module determines the data path according to the comparison result and the regular expression signal. That is, in the embodiment of the present application, the matching of the regular expression can be realized through the mode judgment module, the comparison module and the processing module, and it is determined that the data path uses fewer resources, has higher flexibility, and has a faster matching speed, thereby improving the matching efficiency of the circuit. BRIEF DESCRIPTION OF THE DRAWINGS

[0043] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings required for use in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative labor.

[0044] Figure 1 A schematic diagram of the structure of a regular matching circuit provided in an embodiment of the present application;

[0045] Figure 2 A schematic diagram of the structure of another regular matching circuit provided in an embodiment of the present application;

[0046] Figure 3 A schematic diagram of the structure of another regular matching circuit provided in an embodiment of the present application;

[0047] Figure 4 A schematic diagram of the structure of another regular matching circuit provided in an embodiment of the present application;

[0048] Figure 5 A schematic diagram of the structure of another regular matching circuit provided in an embodiment of the present application;

[0049] Figure 6 A schematic diagram of the structure of another regular matching circuit provided in an embodiment of the present application;

[0050] Figure 7 A flowchart of a regular matching method provided in an embodiment of the present application. DETAILED DESCRIPTION

[0051] In order to better understand the technical solution of the present application, the embodiments of the present application are described in detail below with reference to the accompanying drawings.

[0052] It should be clear that the described embodiments are only part of the embodiments of the present application, rather than all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in the field without creative work are within the scope of protection of the present application.

[0053] The terms used in the embodiments of the present application are only for the purpose of describing specific embodiments, and are not intended to limit the present application. The singular forms "a", "said" and "the" used in the embodiments of the present application and the appended claims are also intended to include plural forms, unless the context clearly indicates other meanings.

[0054] It should be understood that the term "and / or" used in this article is only a description of the association relationship of associated objects, indicating that there can be three relationships. For example, A and / or B can represent: A exists alone, A and B exist at the same time, and B exists alone. In addition, the character " / " in this article generally indicates that the associated objects before and after are in an "or" relationship.

[0055] In some technologies, regular expression matching is performed through software algorithms, such as regular expression matching through finite state automata. The above matching method consumes more resources and has a slower matching speed when there is a large amount of matching data.

[0056] In response to the above problems, an embodiment of the present application provides a regular matching circuit, which includes a mode judgment module, a comparison module, and a processing module; wherein the input end of the mode judgment module is used to connect to a storage device, and the output end of the mode judgment module is electrically connected to the enable end of the comparison module; the mode judgment module is used to obtain a regular expression signal and determine whether to send an enable signal for the comparison module according to the regular expression signal; the first input end of the comparison module is used to connect to the storage device, the second input end of the comparison module is used to connect to the cache module, and the output end of the comparison module is electrically connected to the first input end of the processing module; the comparison module is used to obtain first data from the storage device and second data from the cache module when receiving the enable signal, compare the first data with the second data and send the comparison result to the processing module; the comparison result is used to characterize whether the first data and the second data match; the second input end of the processing module is used to connect to the storage device, the third input end of the processing module is used to connect to the cache module, the first output end of the processing module is electrically connected to the mode judgment module, and the second output end of the processing module is used to connect to the storage device; the processing module is used to receive the comparison result and obtain the regular expression signal, and determine the data path according to the regular expression signal and the comparison result. In this way, in the embodiment of the present application, when the mode judgment module obtains the regular expression signal, it can determine whether to send an enable signal to the comparison module according to the regular expression signal; when the comparison module receives the comparison signal, it can obtain the first data in the storage device and receive the second data in the cache module, and compare whether the first data and the second data match, and send the comparison result to the processing module. The processing module determines the data path according to the comparison result and the regular expression signal. That is, in the embodiment of the present application, the matching of the regular expression can be achieved through the mode judgment module, the comparison module and the processing module, and it is determined that the data path uses fewer resources, has higher flexibility, and has a faster matching speed, thereby improving the matching efficiency of the circuit. The following is a detailed description.

[0057] See also Figure 1 , is a schematic diagram of a regular matching circuit provided in an embodiment of the present application. Figure 1 As shown, the regular matching circuit includes: a mode judgment module 101, a comparison module 102, and a processing module 103. The regular matching circuit may also include a storage device and a cache module, and the storage mode of the cache module may be FIFO (First Input First Output). The input end of the mode judgment module 101 is used to connect to the storage device, and the output end of the mode judgment module 102 is electrically connected to the enable end of the comparison module 102. The mode judgment module 101 is used to obtain a regular expression signal and determine whether to send an enable signal for the comparison module according to the regular expression signal.

[0058] The first input end of the comparison module 102 is used to connect to the storage device, the second input end of the comparison module 102 is used to connect to the cache module, and the output end of the comparison module 102 is electrically connected to the first input end of the processing module 103. The comparison module 102 is used to obtain the first data from the storage device and the second data from the cache module when receiving the enable signal, compare the first data with the second data, and send the comparison result to the processing module 103.

[0059] The comparison result is used to indicate whether the first data and the second data match.

[0060] The second input end of the processing module 103 is used to connect to the storage device, the third input end of the processing module 103 is used to connect to the cache module, the first output end of the processing module 103 is electrically connected to the mode judgment module 101, and the second output end of the processing module 103 is used to connect to the storage device.

[0061] The processing module 103 is used to receive the comparison result and obtain the regular expression signal, and determine the data path according to the regular expression signal and the comparison result.

[0062] In the embodiment of the present application, since not all regular expression signals need to match the data in the storage device and the data in the cache module, when receiving the regular expression signal, it is necessary to determine whether it is necessary to compare the data in the storage device with the data in the cache module. Based on this, the mode judgment module 101 obtains the regular expression signal and can detect whether the regular expression it obtains needs to perform a matching comparison between the data in the storage device and the data in the cache module. If a match is required, the mode judgment module determines to send an enable signal to the comparison module 102.

[0063] In some embodiments, the mode determination module 101 is configured to not send an enable signal to the comparison module if the regular expression signal is the first target regular expression signal, or to send an enable signal to the comparison module if the regular expression signal is the second target regular expression signal.

[0064] That is, the first target regular expression signal and / or the second target regular expression signal can be pre-set in the mode judgment module 101. Among them, the first target regular expression signal is a regular expression signal that does not need to perform data matching. The second target regular expression signal is a regular expression signal other than the first target regular expression signal. The first target regular expression can be pre-set in the mode judgment module 101, that is, a regular expression signal that does not need to perform data matching can be pre-set. At this time, after the mode judgment module 101 obtains the regular expression signal, it can compare the regular expression signal with the first target regular expression signal pre-set therein. If the obtained regular expression signal is not the first target regular expression signal, it means that the comparison module 102 is required to perform data comparison of the regular expression signal. At this time, the mode judgment module 101 sends an enable signal to the comparison module 102. If the obtained regular expression signal is the first target regular expression signal, it means that the comparison module 102 is not required to perform data comparison of the regular expression signal. At this time, the mode judgment module 101 does not send an enable signal to the comparison module 102.

[0065] And / or, a second target regular expression can be pre-set in the mode judgment module 101, that is, a regular expression signal that needs to be matched with data can be pre-set. At this time, after obtaining the regular expression signal, the mode judgment module 101 can compare the regular expression signal with the second target regular expression signal pre-set therein. If the obtained regular expression signal is not the second target regular expression signal, it means that the comparison module 102 is not required to perform data comparison of the regular expression signal, and at this time, the mode judgment module 101 does not send an enable signal to the comparison module 102. If the obtained regular expression signal is the second target regular expression signal, it means that the comparison module 102 is required to perform data comparison of the regular expression signal, and at this time, the mode judgment module 101 sends an enable signal to the comparison module 102.

[0066] It should be noted that when both the first target regular expression and the second target regular expression are preset in the mode determination module 102 , in order to improve the matching speed, the mode determination module 102 may compare the acquired regular expression signal with one of them.

[0067] As a possible implementation method, the first target regular expression signal is: any data and unlimited number of times, any data and repeated any number of times, any data repeated at most n times, any data repeated at least n times, ignoring n data and not checking, one or more combinations, where n is an integer greater than 0.

[0068] In some embodiments, the regular expression may be set in a storage device, and in this case, the mode determination module 101 may obtain a regular expression signal from the storage device. Alternatively, the user may directly send a regular expression signal to the mode determination module 101. Of course, the mode determination module 101 may also obtain a regular expression signal in other ways, which is not limited in this application.

[0069] In a possible implementation, when the mode judgment module 101 detects that an enable signal needs to be sent to the price comparison module 102, that is, when the mode judgment module 101 detects that the acquired regular expression signal is the second target regular expression signal, the mode judgment module 101 may also detect whether the storage device has prepared the first data and whether the cache module has prepared the second data before sending the enable signal to the comparison module 102. That is, the mode judgment module 101 needs to determine whether the storage device has read out the first data and whether the cache module has read out the second data. In some embodiments, when the storage device reads out the first data, it may send a data ready signal to the mode judgment module 101. Similarly, when the cache module reads out the second data, it may send a data ready signal to the mode judgment module 101. In this way, the mode judgment module 101 can know whether the storage device has prepared the first data by whether it receives a data ready signal sent by the storage device. Whether the cache module has prepared the second data is known by whether it receives a data ready signal sent by the cache module.

[0070] In some embodiments, in order to improve the matching speed, the storage device can store the first data it reads in a preset register, so that the comparison module 102 can read the first data from the preset register. At this time, the comparison module 102, the mode judgment module 101 and the processing module 103 are all electrically connected to the register. Figure 2 shown.

[0071] It should be noted that, in the embodiment of the present application, the data stored in the storage device is collectively referred to as first data, and the data stored in the cache module is collectively referred to as second data.

[0072] After receiving the enable signal, the comparison module 102 indicates that it is necessary to compare whether the first data in the storage device matches the second data in the cache module. At this time, the comparison module 102 obtains the first data from the storage device and obtains the second data from the cache module. The comparison module 102 compares the first data with the second data to determine whether the first data matches the second data. In some embodiments, the comparison module 102 can directly determine whether the first data is the same as the second data. The comparison module 102 sends the comparison result to the processing module 103. When the comparison module 102 compares the first data and the second data to be the same, the comparison result indicates that the first data is the same as the second data. When the comparison module 102 compares the first data and the second data to be different, the comparison result indicates that the first data is different from the second data.

[0073] The first input end of the processing module 103 is electrically connected to the output end of the comparison module 102. At this time, the processing module 103 can receive the comparison result sent by the comparison module 102. The processing module 103 obtains the regular expression signal. The processing module 103 can obtain the regular expression signal from the mode judgment module 101, or the processing module 103 can directly obtain the regular expression signal from the storage device. After obtaining the comparison result and the regular expression signal, the processing module 103 determines the data path according to the comparison result and the regular expression signal, that is, the processing module 103 needs to determine the storage address of the next first data to be read in the storage device. At this time, the processing module 103 can determine according to the comparison result and the regular expression signal.

[0074] When the comparison result indicates that the first data and the second data match, the processing module 103 determines the next hop address according to the regular expression signal in a different manner than when the comparison result indicates that the first data and the second data do not match. The details are as follows.

[0075] When the comparison result indicates that the first data matches the second data, when the processing module 103 determines the next jump address according to the regular expression signal, it is necessary to determine the next jump address according to whether there is a repeated execution parameter in the regular expression signal. In some embodiments, the processing module 103 is used to determine the first address corresponding to the first data as the next jump address when the comparison result indicates that the first data matches the second data and there is no repeated execution parameter in the regular expression signal, and send the next jump address to the storage device.

[0076] The next jump address refers to a storage address of the first data that needs to be reacquired when the storage device reacquires the first data.

[0077] The repetition parameter is a parameter related to the number of executions in the regular expression signal. In the embodiment of the present application, the regular matching circuit actually matches the second data obtained in the cache module with the data in the regular expression signal. The data in the regular expression signal is the first data in the storage device. Therefore, when the repetition parameter is set in the regular expression signal, the data in the cache module needs to be repeated multiple times to match the data in the regular expression signal. At this time, it is necessary to re-acquire the second data from the cache module each time the match is performed. Therefore, the repetition parameter can be a parameter related to the number of times the second data in the cache module is read. In some embodiments, the repetition parameter can characterize the number of executions of obtaining the second data. For example, the regular expression signal is A*, which means that any data is not limited to a number of times. Among them, * is the repetition parameter, and at this time, the second data in the cache module needs to be read an unlimited number of times. Alternatively, the regular expression signal is An, which means that any number is repeated n times, wherein n is the repetition parameter, and it is necessary to read n times any number A from the cache data. Alternatively, the regular expression signal is An+, indicating that any data A is repeated at least n times, wherein n+ is the repetition execution parameter, and at this time, at least n second data need to be read out from the cache data. Alternatively, the regular expression signal is An, indicating that data A is repeated at most n times, wherein -n is the repetition execution parameter, and at this time, at most n second data need to be read out from the cache module. Of course, the regular expression signal can also be other signals, and the repetition execution parameter can also be other parameters related to the number of executions, and this application does not limit this.

[0078] In an embodiment of the present application, after receiving the comparison result, the processing module 103 analyzes the comparison result to find out that the comparison result indicates that the first data and the second data match, which means that the first data obtained from the storage device is correct. At this time, the processing module 103 can further detect whether there is a repeated execution parameter in the regular expression signal. In some embodiments, a variety of possible repeated execution parameters can be pre-set in the processing module 103. At this time, the processing module 103 can parse the regular expression signal to detect whether it contains a repeated execution parameter. When the processing module 103 determines that there is no repeated execution parameter in the regular expression signal, it can be confirmed that the regular expression signal is only executed once. At this time, when the comparison result indicates that the first data and the second data match, the correct address corresponding to the first data can be directly used as the next hop address. That is, the first address corresponding to the first data is determined as the next hop address, and the next hop address is sent to the storage device. In some embodiments, the processing module 103 can achieve the purpose of sending the next hop address to the storage device by changing the pointer data of the storage device. Refer to Figure 2Of course, the processing module 103 can also directly send the next hop address to the storage device, and the storage device itself updates the pointer data so as to read the new first data according to the next hop address.

[0079] It should be noted that the first data stored in the storage device are all pre-set with the corresponding first address and second address. Among them, the first address refers to the correct address corresponding to the first data. The correct address refers to the storage address of the first data to be obtained next when the first data matches the second data. The second address refers to the error address corresponding to the first data. The error address refers to the storage address of the first data to be obtained next when the first data does not match the second data.

[0080] As a possible implementation, a repeat execution parameter may also exist in the regular expression signal. In this case, the processing module 103 is used to determine the first address corresponding to the first data obtained for the nth time as the next jump address, and send the next jump address to the storage device when the comparison result indicates that the first data matches the second data, the repeat execution parameter exists in the regular expression signal, and the number of executions for obtaining the second data reaches n times, if the first data obtained for n times all match the corresponding second data. Or,

[0081] If at least one of the first data acquired n times does not match the corresponding second data, the second address corresponding to the first data acquired the nth time is determined as the next jump address, and the next jump address is sent to the storage device.

[0082] Wherein, n is the value of the repetition parameter in the regular expression signal, and n is an integer greater than 0. The second address corresponding to the first data is different from the first address corresponding to the first data.

[0083] That is, when the processing module 103 determines that the comparison result indicates that the first data matches the second data, it can further parse the regular expression signal to detect whether the regular expression signal has a repeated execution parameter. If it is detected that the regular expression signal has a repeated execution parameter, the processing module 103 needs to first determine the number of executions for obtaining the second data. In some embodiments, the number of executions for obtaining the second data can be updated each time the second data is obtained from the cache module. If the number of executions for obtaining the second data reaches n times, it means that the number of repeated executions set in the regular expression signal has been completed. At this time, the processing module 103 needs to detect whether the second data obtained n times all have matching first data. If the second data obtained n times all have matching first data, it means that the execution process of the regular expression signal is correct. At this time, the first address of the first data currently obtained that matches the nth second data can be determined as the next hop address, and the next hop address is sent to the storage device so that the storage device can read the first data that needs to be obtained next time according to the next hop address.

[0084] Alternatively, when the processing module 103 detects that the number of executions of obtaining the second data reaches n times, if it is detected that there is at least one unmatched first data in the second data obtained for the n times, that is, there is at least one second data obtained for the n times that does not match the obtained first data, then it can be considered that there is an error in the execution of the current regular expression signal. At this time, the second address of the first data currently obtained that matches the nth second data can be determined as the next hop address, and the next hop address can be sent to the storage device so that the storage device can read the first data that needs to be obtained next time according to the next hop address.

[0085] It should be understood that when the processing module 103 sends the next hop address to the storage device, the storage device can re-read the first data according to the next hop address, that is, read the data whose storage address is the next hop address as the first data, and when the comparison module 102 re-acquires the first data, the read first data is sent to the comparison module 102. In this way, in the embodiment of the present application, the processing module 103 can determine the first data to be read by the storage device next time by determining the next hop address of the storage device, so as to control the path of reading data, which has high flexibility and uses fewer resources.

[0086] As a possible implementation, when there is a repeated execution parameter in the regular expression signal, and the number of executions for obtaining the second data has not reached n times, the processing module 103 needs to continue to execute the relevant steps for obtaining the second data. At this time, the processing module 103 is used to determine the starting address as the next jump address, send the next jump address to the storage device, send a trigger signal for obtaining the first data to the storage device, send a trigger signal for obtaining the second data to the cache module, and trigger the mode judgment module to re-send an enable signal to the comparison module, so as to trigger the comparison module to re-obtain the first data from the storage device and obtain the second data from the cache module, until the number of executions for obtaining the second data reaches n times.

[0087] Wherein, n is the value of the repetition parameter in the regular expression signal, n is an integer greater than 0, and the starting address refers to the storage address of the first data obtained for the first time corresponding to the regular expression signal. In some embodiments, the starting address can be stored in a specified location, for example, in the start pointer of the union, referring to Figure 2 At this time, when the processing module 103 needs to determine the start address as the next jump address, the address data recorded by the start pointer of the union set can be determined as the next jump address.

[0088] That is, when the processing module 103 determines that the comparison result indicates that the first data matches the second data, and detects that the regular expression signal has a repeated execution parameter, the processing module 103 needs to determine whether the number of executions for obtaining the second data reaches n times. That is, whether the number of executions for obtaining the second data reaches the number set by the regular expression signal. If not, it means that the above process needs to be repeated. That is, the second data needs to be re-acquired and the second data is compared with the data in the regular expression signal. In an embodiment of the present application, the data in the regular expression signal is the first data acquired from the storage device. The processing module 103 does not store. Therefore, each time the data in the regular expression signal is needed, it needs to be re-acquired from the storage device. Because the repeated execution parameter limits the re-acquisition of the second data in the cache module, and the second data is compared with the data in the regular expression signal. Therefore, in repeating the above process, each re-acquired second data needs to be compared with the data in the regular expression signal, that is, in repeating the above process, the data in the regular expression signal that is compared with the re-acquired second data each time is the same. At this time, there may be multiple data in the regular expression signal, and the data therein can be compared with the second data according to the regular expression. At this time, it is necessary to obtain the first data in the regular expression signal, and the data needs to be obtained from the storage device. The processing module 103 can determine the storage address of the data and use it as the starting address. The processing module 103 can use the storage address of the first data obtained for the first time for the regular expression signal as the starting address. The starting address is used as the next jump address, and the next jump address is sent to the storage device, so that the storage device can obtain the first data whose storage address is the next jump address according to the next jump address when re-acquiring the first data. The processing module 103 can also send a trigger signal for obtaining the first data to the storage device and a trigger signal for obtaining the second data to the cache module. In this way, after receiving the trigger signal for obtaining the first data, the storage device can re-read the first data according to the next jump address. In some embodiments, the storage device can store the first data in a register so that the comparison module 102 can obtain it. Similarly, after receiving the trigger signal for obtaining the second data, the cache module can continue to read the next second data. In some embodiments, the cache module can be a first-in-first-out cache mode, and the cache module can read the second data sequentially. The processing module 103 also needs to trigger the mode determination module 101 to resend an enable signal to the comparison module 102, so as to trigger the comparison module 102 to reacquire the first data from the storage device and reacquire the second data from the cache module. After the processing module 103 sends a trigger signal to the mode determination module 101, the mode determination module 101 can re-determine whether the first data is ready in the storage device and whether the second data is ready in the cache module.When the first data is ready in the storage device and the cache module is ready for the second data, an enable signal is sent to the comparison module 102. At this time, after receiving the enable signal, the comparison module 102 can re-acquire the first data in the storage device, obtain the second data from the cache module, and compare them, and send the comparison result to the processing module 103. At this time, the processing module 103 needs to re-perform the above-mentioned data path determination process based on the comparison result and the regular expression. When the number of executions for obtaining the second data does not reach n times, the above process needs to be repeated until the number of executions for obtaining the second data reaches n times. When the processing module 103 determines that the number of executions for obtaining the second data reaches n times, the process of determining the next jump address can be parameterized by the above process, which will not be repeated here.

[0089] As a possible implementation, when the comparison module 102 compares the first data and the second data to see if they match, there may still be a mismatch. In this case, when the comparison result indicates that the first data and the second data do not match, the processing module 103 needs to determine the next jump address according to the regular expression signal. The details are as follows:

[0090] The processing module 103 is used to determine the second address corresponding to the first data as the next jump address and send the next jump address to the storage device when the comparison result indicates that the first data and the second data do not match, there is no repeated execution parameter in the regular expression signal, and there is no target repeated operation information corresponding to the first data.

[0091] The target repeated operation information is repeated operation information adjacent to the first data and located after the first data in the regular expression signal.

[0092] or,

[0093] The processing module 103 is used to update the next jump address according to a preset update method, send the next jump address to the storage device, send a trigger signal for obtaining the first data to the storage device, and trigger the mode judgment module to re-send an enable signal to the comparison module so as to trigger the comparison module to re-acquire the first data from the storage device, when the comparison result indicates that the first data does not match the second data, there is no repeated execution parameter in the regular expression signal, and there is target repeated operation information corresponding to the first data. The first data is matched with the second data until there is no target repeated operation information corresponding to the first data in the regular expression signal, or the re-acquired first data matches the second data.

[0094] In an embodiment of the present application, a repetition operator refers to an operation symbol that can trigger the processing module 103 to reacquire the first data. In some embodiments, the repetition operator can be a union operation symbol. When the processing module 103 receives a comparison result indicating that the first data does not match the second data, it is necessary to detect whether there is target repetition operation information in the regular expression. That is, whether there is repetition operation information adjacent to the first data after the first data in the regular expression. If not, there is no need to obtain other first data to compare with the current second data, and it can be determined that the first data in the regular expression signal does not match the second data. At this time, the processing module 103 can further detect whether there is a repetition execution parameter in the regular expression signal. If there is no repetition execution parameter, at this time, the processing module 103 completes the processing of the regular expression signal. Since the first data does not match the second data, it can be considered that the currently acquired first data is incorrect, so the second address corresponding to the first data can be determined as the next jump address, and the next jump address is sent to the storage device.

[0095] Alternatively, when the comparison result indicates that the first data does not match the second data, there is no repeated execution parameter in the regular expression signal, and there is target repeated operation information corresponding to the first data, the second data can be compared with other first data in the regular expression signal. At this time, the processing module 103 can update the next jump address according to the preset update method. In some embodiments, the processing module 103 can add 1 to the next jump address as a new next jump address, and send the updated next jump address to the storage device. The processing module 103 can send a trigger signal for obtaining the first data to the storage device, and the storage device can read the first data according to the next jump address after receiving the trigger signal for obtaining the first data. In some embodiments, the storage device can store the read first data in a register. The processing module 103 sends a trigger signal to the mode judgment module 101 so as to trigger the mode judgment module 101 to re-send an enable signal to the comparison module 102, so that the comparison module 102 re-acquires the first data from the storage device when receiving the enable signal, and compares the second data with the newly acquired first data, and sends the comparison result to the processing module 103. When the comparison result indicates that the first data and the second data do not match, if there is target repetition operation information corresponding to the newly acquired first data in the regular expression signal, the processing module 103 needs to re-execute the above process until the target repetition operation information corresponding to the first data does not exist in the regular expression signal, or the re-acquired first data matches the second data.

[0096] When there is no target repeated operation information corresponding to the first data in the regular expression signal, if the newly obtained comparison result indicates that the first data does not match the second data, the processing module 103 can determine the second address of the re-acquired first data as the next jump address and send it to the storage device.

[0097] When the newly obtained comparison result indicates that the first data matches the second data, the processing module 103 may determine the first address of the first data as the next jump address and send it to the storage device.

[0098] It should be noted that the preset update method may also be other methods to update the next hop address, for example, the current next hop address may be increased by 2, or other methods, and this application does not impose any restrictions on this.

[0099] As a possible implementation, there may be a situation where there is a repeated execution parameter in the regular expression signal and there is no target repeated operation information corresponding to the first data. In this case, the processing module 103 is used to determine the second address of the first data as the next jump address and send the next jump address to the storage device if the comparison result indicates that the first data and the second data do not match, there is a repeated execution parameter in the regular expression signal, and there is no target repeated operation information corresponding to the first data, if the number of executions of the second data reaches n times. Or,

[0100] The processing module 103 is used for recording that the second data currently acquired does not match the corresponding first data if the comparison result indicates that the first data and the second data do not match, there is a repeated execution parameter in the regular expression signal, and there is no target repeated operation information corresponding to the first data, and if the number of execution times of acquiring the second data does not reach n times, and determining the starting address as the next jump address, sending the next jump address to the storage device, sending a trigger signal for acquiring the first data to the storage device, sending a trigger signal for acquiring the second data to the cache module, and triggering the mode judgment module to re-send an enable signal to the comparison module, so as to trigger the comparison module to re-acquire the first data from the storage device and the second data from the cache module, until the number of execution times of acquiring the second data reaches n times or the second data matches the corresponding first data.

[0101] Among them, n is the value of the repetition parameter in the regular expression signal, n is an integer greater than 0, and the starting address refers to the storage address of the first data obtained for the first time corresponding to the regular expression.

[0102] That is, when the comparison result indicates that the first data and the second data do not match, the processing module 103 needs to parse the regular expression signal. If it is parsed that the target repeated operation information corresponding to the first data does not exist in the regular expression signal, and there is a number of repeated executions, then the processing module 103 needs to determine whether the number of executions for obtaining the second data has reached n times. That is, whether the number of executions for obtaining the second data has reached the number set by the regular expression signal. If the number of executions for obtaining the second data has reached n times, it means that the number of repeated executions set in the regular expression signal has been completed. At this time, since the second data currently obtained does not match the first data, when the number of executions for obtaining the second data has reached n times, the processing module 103 can directly determine the second address corresponding to the first data as the next jump address and send it to the storage device.

[0103] Alternatively, if the number of executions of obtaining the second data does not reach n times, it means that the above process needs to be repeated. That is, the second data needs to be re-acquired, and the second data is compared with the data in the regular expression signal. In the embodiment of the present application, the data in the regular expression signal is the first data obtained from the storage device. The processing module 103 does not store. Therefore, each time the data in the regular expression signal is needed, it needs to be re-acquired from the storage device. Because the repetition parameter limits the re-acquisition of the second data in the cache module, and the second data is compared with the data in the regular expression signal. Therefore, in repeating the above process, each re-acquired second data needs to be compared with the data in the regular expression signal, that is, in repeating the above process, the data in the regular expression signal that is compared with the re-acquired second data each time is the same. At this time, there may be multiple data in the regular expression signal, and the data therein can be compared with the second data according to the regular expression. At this time, it is necessary to obtain the first data in the regular expression signal, and the data needs to be obtained from the storage device. The processing module 103 can determine the storage address of the data and use it as the starting address. The processing module 103 can use the storage address of the first data acquired for the first time for the regular expression signal as the starting address. The starting address is used as the next jump address, and the next jump address is sent to the storage device, so that when the storage device reacquires the first data, it can obtain the first data whose storage address is the next jump address according to the next jump address. The processing module 103 can also send a trigger signal for acquiring the first data to the storage device, and send a trigger signal for acquiring the second data to the cache module. In this way, after receiving the trigger signal for acquiring the first data, the storage device can re-read the first data according to the next jump address. In some embodiments, the storage device can store the first data in a register so that the comparison module 102 can acquire it. Similarly, after receiving the trigger signal for acquiring the second data, the cache module can continue to read the next second data. In some embodiments, the cache module can be a first-in-first-out cache mode, and the cache module can read the second data sequentially. The processing module 103 also needs the trigger mode judgment module 101 to re-send an enable signal to the comparison module 102, so as to trigger the comparison module 102 to re-acquire the first data from the storage device and re-acquire the second data from the cache module. After the processing module 103 sends a trigger signal to the mode judgment module 101, the mode judgment module 101 can re-determine whether the first data is ready in the storage device and whether the cache module is ready for the second data. When the first data is ready in the storage device and the cache module is ready for the second data, an enable signal is sent to the comparison module 102. At this time, after receiving the enable signal, the comparison module 102 can re-acquire the first data in the storage device, obtain the second data from the cache module, and compare them, and send the comparison result to the processing module 103.At this time, the processing module 103 needs to re-perform the above data path determination process based on the comparison result and the regular expression. When the number of executions for obtaining the second data does not reach n times, the above process needs to be repeated until the number of executions for obtaining the second data reaches n times or the first data and the second data are detected to match. When the processing module 103 determines that the number of executions for obtaining the second data reaches n times or the first data and the second data are detected to match, the process of determining the next jump address can refer to the above process and will not be repeated here.

[0104] As a possible implementation method, there may be repeated execution parameters and target repeated operation information corresponding to the first data in the regular expression signal. At this time, the processing module 103 is used to record that the first data currently acquired does not match the corresponding second data when the comparison result indicates that the first data does not match the second data, there are repeated execution parameters in the regular expression signal, and there is target repeated operation information corresponding to the first data, and update the next jump address according to a preset update method, send the next jump address to the storage device, send a trigger signal for acquiring the first data to the storage device, and trigger the mode judgment module to re-send an enable signal to the comparison module so as to trigger the comparison module to re-acquire the first data from the storage device until the target repeated operation information corresponding to the first data does not exist in the regular expression signal or the re-acquired first data matches the second data.

[0105] When the target repeated operation information corresponding to the first data does not exist in the regular expression signal, it is detected whether the number of executions of obtaining the second data reaches n times. If the number of executions of obtaining the second data reaches n times, the second address of the first data is determined as the next jump address, and the next jump address is sent to the storage device; or, if the number of executions of obtaining the second data does not reach n times, the starting address is determined as the next jump address, the next jump address is sent to the storage device, a trigger signal for obtaining the first data is sent to the storage device, a trigger signal for obtaining the second data is sent to the cache module, and the mode judgment module is triggered to re-send an enable signal to the comparison module, so as to trigger the comparison module to re-obtain the first data from the storage device and obtain the second data from the cache module, until the number of executions of obtaining the second data reaches n times or the second data matches the corresponding first data.

[0106] Wherein, n is the value of the repetition parameter in the regular expression signal, and n is an integer greater than 0; the starting address refers to the storage address of the first data first obtained corresponding to the regular expression.

[0107] In an embodiment of the present application, when the comparison result received by the processing module 103 indicates that the first data does not match the second data, the processing module 103 determines that there is a repeated execution parameter and target repeated operation information corresponding to the first data in the regular expression signal by parsing the regular expression signal. At this time, the processing module 103 needs to first record that the first data obtained at the current time does not match the second data. Since there is target repeated operation information corresponding to the first data in the regular expression signal, it is necessary to further detect whether other first data in the regular expression signal matches the second data. At this time, the processing module 103 can update the next jump address according to the preset update method. In some embodiments, the processing module 103 can add 1 to the next jump address as the new next jump address, and send the updated next jump address to the storage device. The processing module 103 can send a trigger signal for obtaining the first data to the storage device, and the storage device can read the first data according to the next jump address after receiving the trigger signal for obtaining the first data. In some embodiments, the storage device can store the read first data in a register. The processing module 103 sends a trigger signal to the mode judgment module 101 so as to trigger the mode judgment module 101 to resend the enable signal to the comparison module 102, so that the comparison module 102 reacquires the first data from the storage device upon receiving the enable signal, and compares the second data with the newly acquired first data, and sends the comparison result to the processing module 103. When the comparison result indicates that the first data and the second data do not match, if the target repetitive operation information corresponding to the newly acquired first data still exists in the regular expression signal, the processing module 103 needs to re-execute the above process until the target repetitive operation information corresponding to the first data does not exist in the regular expression signal, or the reacquired first data matches the second data.

[0108] When the target repeated operation information corresponding to the first data does not exist in the regular expression signal, it means that the current second data has matched all the corresponding first data in the regular expression signal, and the processing module 103 can read the new second data to process the regular expression signal. The processing module 103 needs to first detect whether the number of executions for obtaining the second data has reached n times. If it reaches n times, it means that the number of times the regular expression signal is set to obtain the second data has been completed, and there is no need to re-acquire the second data for the regular expression signal. Since in the processing of the regular expression signal, there is a case where the second data does not match the first data, at this time, the processing module 103 can directly use the second address of the last obtained first data as the next jump address and send it to the storage device.

[0109] Alternatively, if the number of executions of obtaining the second data does not reach n times, it means that the above process needs to be repeated. That is, the second data needs to be re-acquired, and the second data is compared with the data in the regular expression signal. In the embodiment of the present application, the data in the regular expression signal is the first data obtained from the storage device. The processing module 103 does not store. Therefore, each time the data in the regular expression signal is needed, it needs to be re-acquired from the storage device. Because the repetition parameter limits the re-acquisition of the second data in the cache module, and the second data is compared with the data in the regular expression signal. Therefore, in repeating the above process, each re-acquired second data needs to be compared with the data in the regular expression signal, that is, in repeating the above process, the data in the regular expression signal that is compared with the re-acquired second data each time is the same. At this time, there may be multiple data in the regular expression signal, and the data therein can be compared with the second data according to the regular expression. At this time, it is necessary to obtain the first data in the regular expression signal, and the data needs to be obtained from the storage device. The processing module 103 can determine the storage address of the data and use it as the starting address. The processing module 103 can use the storage address of the first data acquired for the first time for the regular expression signal as the starting address. The starting address is used as the next jump address, and the next jump address is sent to the storage device, so that when the storage device reacquires the first data, it can obtain the first data whose storage address is the next jump address according to the next jump address. The processing module 103 can also send a trigger signal for acquiring the first data to the storage device, and send a trigger signal for acquiring the second data to the cache module. In this way, after receiving the trigger signal for acquiring the first data, the storage device can re-read the first data according to the next jump address. In some embodiments, the storage device can store the first data in a register so that the comparison module 102 can acquire it. Similarly, after receiving the trigger signal for acquiring the second data, the cache module can continue to read the next second data. In some embodiments, the cache module can be a first-in-first-out cache mode, and the cache module can read the second data sequentially. The processing module 103 also needs the trigger mode judgment module 101 to re-send an enable signal to the comparison module 102, so as to trigger the comparison module 102 to re-acquire the first data from the storage device and re-acquire the second data from the cache module. After the processing module 103 sends a trigger signal to the mode judgment module 101, the mode judgment module 101 can re-determine whether the first data is ready in the storage device and whether the cache module is ready for the second data. When the first data is ready in the storage device and the cache module is ready for the second data, an enable signal is sent to the comparison module 102. At this time, after receiving the enable signal, the comparison module 102 can re-acquire the first data in the storage device, obtain the second data from the cache module, and compare them, and send the comparison result to the processing module 103.At this time, the processing module 103 needs to re-perform the above data path determination process based on the comparison result and the regular expression. When the number of executions for obtaining the second data does not reach n times, the above process needs to be repeated until the number of executions for obtaining the second data reaches n times or the first data and the second data are detected to match. When the processing module 103 determines that the number of executions for obtaining the second data reaches n times or the first data and the second data are detected to match, the process of determining the next jump address can refer to the above process and will not be repeated here.

[0110] Exemplarily, when the second data stored in the cache module is A, C and B in sequence, if the regular expression signal is [AUBUC]3, at this time, the mode judgment module 101 receives the regular expression signal, and when it detects that the regular expression signal is not the first target regular expression signal, it sends an enable signal to the comparison module 102. At this time, the comparison module 102 reads the first data from the storage device and reads the second data from the cache module. At this time, the second data read by the comparison module 102 from the cache module is A. Assuming that the first data read by the comparison module 102 from the storage device is also A, the comparison module 102 compares the first data and the second data and finds that they match. The comparison module 102 sends the comparison result to the processing module 103. The processing module 103 can obtain the regular expression signal from the mode judgment module 101, and parse the regular expression signal to learn that there are repeated execution parameters in the regular expression signal. Since the number of repeated executions of obtaining the second data is 1, which is less than 3 times in the regular expression signal, and the comparison result indicates that the first data matches the second data, the processing module 103 can re-acquire the second data to process the regular expression signal. At this time, the processing module 103 uses the storage address of the first data A as the starting address, determines the starting address as the next jump address, and sends the next jump address to the storage device. The processing module 103 sends a trigger signal for obtaining the first data to the storage device, sends a trigger signal for obtaining the second data to the cache module, and triggers the mode judgment module 101 to send an enable signal to the comparison module 102. At this time, after receiving the trigger signal for obtaining the first data, the storage device can re-acquire the first data according to the next jump address. Similarly, after receiving the trigger signal for obtaining the second data, the cache module is a FIFO storage mode in this example, so the cache module can read the second second data therein, that is, read out the second data C. After receiving the trigger signal of the processing module 103, the mode judgment module 101 can send an enable signal to the comparison module 102. At this time, after receiving the enable signal, the comparison module 102 can obtain the first data from the storage device and obtain the second data from the cache module. The first data is compared with the second data. At this time, since the first data is A and the second data is C, the comparison module 102 determines that the first data does not match the second data. The comparison module 102 sends the comparison result representing the mismatch between the first data and the second data to the processing module 103. After receiving the comparison result, the processing module 103 learns that the first data does not match the second data. At this time, the processing module 103 detects that there is a union operator in the regular expression signal, that is, the regular expression signal has repeated execution parameters and repeated operation information.When the first data does not match the second data, the processing module 103 detects that the target repeated operation information corresponding to the first data A exists in the regular expression signal, that is, the union operator exists after the first data A and is adjacent to the first data A, and the processing module 103 can continue to obtain the next first data in the storage device to match the second data. The processing module 103 can update the next jump address according to the preset update method, for example, the storage address of the first data A plus 1 is used as the next jump address, and the next jump address is sent to the storage device. The processing module 103 sends a trigger signal for obtaining the first data to the storage device, and triggers the mode judgment module 101 to send an enable signal to the comparison module 102, so that the comparison module 102 can re-acquire the first data from the storage device. At this time, the first data re-acquired by the comparison module 102 is the first data B, and the comparison module 102 compares the first data with the second data. At this time, since the first data is B and the second data is C, the comparison module 102 determines that the first data does not match the second data. The comparison module 102 sends the comparison result representing the mismatch between the first data and the second data to the processing module 103. After receiving the comparison result, the processing module 103 learns that the first data does not match the second data. At this time, the processing module 103 detects that the target repeated operation information corresponding to the first data B exists in the regular expression signal, that is, the union operator exists after the first data B and is adjacent to the first data B. The processing module 103 can continue to obtain the next first data in the storage device to match the second data. The processing module 103 can update the next jump address according to the preset update method, for example, the storage address of the first data B plus 1 is used as the next jump address, and the next jump address is sent to the storage device. The processing module 103 sends a trigger signal for obtaining the first data to the storage device, and triggers the mode judgment module 101 to send an enable signal to the comparison module 102, so that the comparison module 102 can re-acquire the first data from the storage device. At this time, the first data re-acquired by the comparison module 102 is the first data C. The comparison module 102 compares the first data with the second data. At this time, since the first data is C and the second data is C, the comparison module 102 determines that the first data matches the second data. The comparison module 102 sends the comparison result indicating that the first data matches the second data to the processing module 103. After receiving the comparison result, the processing module 103 learns that the first data matches the second data. Since there is a repeated execution parameter in the regular expression signal, the processing module 103 needs to determine the number of executions for obtaining the second data. At this time, the processing module 103 determines that the number of executions for obtaining the second data is 2 times, which is less than 3 times in the regular expression signal, then the processing module 103 needs to re-acquire the second data and match it with the first data in the regular expression signal.At this time, the processing module 103 can use the storage address of the first data A first obtained for the regular expression signal as the starting address, determine the starting address as the next jump address, and send the next jump address to the storage device. The processing module 103 sends a trigger signal for obtaining the first data to the storage device, sends a trigger signal for obtaining the second data to the cache module, and triggers the mode judgment module 101 to send an enable signal to the comparison module 102. At this time, after receiving the trigger signal for obtaining the first data, the storage device can re-acquire the first data according to the next jump address. Similarly, after receiving the trigger signal for obtaining the second data, the cache module is a FIFO storage method in this example, so the cache module can read the second second data therein, that is, read out the second data B. After receiving the trigger signal of the processing module 103, the mode judgment module 101 can send an enable signal to the comparison module 102. At this time, after receiving the enable signal, the comparison module 102 can obtain the first data from the storage device and obtain the second data from the cache module. The first data is compared with the second data. At this time, since the first data is A and the second data is B, the comparison module 102 determines that the first data does not match the second data. The comparison module 102 sends the comparison result indicating that the first data does not match the second data to the processing module 103. After receiving the comparison result, the processing module 103 learns that the first data does not match the second data. At this time, the processing module 103 detects that there is a union operator in the regular expression signal, that is, there is repeated operation information in the regular expression signal. When the first data does not match the second data, the processing module 103 detects that there is target repeated operation information corresponding to the first data A in the regular expression signal, that is, there is a union operator after the first data A and adjacent to the first data A. The processing module 103 can continue to obtain the next first data in the storage device to match the second data. The processing module 103 can update the next jump address according to the preset update method, for example, the storage address of the first data A plus 1 as the next jump address, and send the next jump address to the storage device. The processing module 103 sends a trigger signal for obtaining the first data to the storage device, and triggers the mode judgment module 101 to send an enable signal to the comparison module 102, so that the comparison module 102 can re-acquire the first data from the storage device. At this time, the first data re-acquired by the comparison module 102 is the first data B, and the comparison module 102 compares the first data with the second data. At this time, since the first data is B and the second data is B, the comparison module 102 determines that the first data matches the second data. The comparison module 102 sends the comparison result representing the match between the first data and the second data to the processing module 103. After receiving the comparison result, the processing module 103 knows that the first data matches the second data. Since there is a repeated execution parameter in the regular expression signal, the processing module 103 needs to determine the number of executions to obtain the second data.At this time, the processing module 103 determines that the number of executions of obtaining the second data is 3 times, which reaches 3 times in the regular expression signal. The processing module 103 determines that the second data obtained 3 times all have corresponding first data, so the first address of the first data corresponding to the second data obtained last time can be determined as the next jump address. That is, the first address corresponding to the first data B is determined as the next jump address and sent to the storage device.

[0111] Assuming that the second data stored in the cache module are A, C and D in sequence, the above process can be referred to for the regular expression signal processing of the second data A, C and D. When the processing module 103 determines that the second data D does not match any of the three first data in the regular expression signal, and the number of executions of obtaining the second data reaches 3 times, since the second data D obtained for the third time does not have matching first data, the processing module 103 can determine the second address corresponding to the first data obtained for the last time as the next jump address, that is, determine the second address corresponding to the first data C as the next jump address.

[0112] Assume that the second data stored in the cache module is A, C, B, A, C and D in sequence, and the regular expression signal is: [AUBUC]*D, where * represents any number. At this time, after the processing module 103 obtains the second data D, it matches the [AUBUC] signal in the regular expression signal. Although the second data D does not match the first data obtained in the [AUBUC] signal, at this time, the processing module 103 determines the first address of the first data C as the next jump address, sends it to the storage device, and sends the storage device a trigger signal for obtaining the first data, and the trigger mode judgment module 101 sends an enable signal to the comparison module 102. At this time, after receiving the enable signal, the comparison module 102 can re-acquire the first data from the storage device and compare the re-acquired first data with the second data D. If the re-acquired first data is D, the comparison module 102 determines that the first data matches the second data, and at this time, the comparison result indicating that the first data matches the second data can be sent to the processing module 103. After receiving the comparison result, the processing module 103 can determine the first address of the first data D as the next jump address.

[0113] If the second data stored in the cache is A, C, and E in sequence, after comparing the second data E with the re-acquired first data D and determining that they do not match, the processing module 103 may determine the second address of the first data D as the next jump address.

[0114] As a possible implementation, Figure 3As shown, the regular matching circuit further includes: a second counting module 104 . The fifth input terminal of the processing module 103 is electrically connected to the output terminal of the second counting module 104 , and the fourth output terminal of the processing module 103 is electrically connected to the control terminal of the second counting module 104 .

[0115] The processing module 103 is used to trigger the second counting module 104 to update the count value each time the second data is acquired, and determine the number of executions of acquiring the second data according to the count value of the second counting module 104 .

[0116] That is, since it is necessary to record the number of executions of obtaining the second data, a second counting module 104 can be provided in the regular matching circuit. At this time, the fourth output terminal of the processing module 103 is electrically connected to the control terminal of the second counting module 104, so that the processing module 103 can update the count value of the second counting module 104 each time the second data is obtained. In some embodiments, the processing module 103 can send an update trigger signal to the second counting module 104 each time the second data is obtained, and the second counting module 104 can update the count value therein according to a preset update method after receiving the update trigger signal. In some embodiments, the second counting module 104 can be updated by adding 1 to the count value therein. The fifth input terminal of the processing module 103 is electrically connected to the output terminal of the second counting module 104, so that when the processing module 103 needs to obtain the count value of the second counting module 104 to determine the number of executions of obtaining the second data, it can be directly obtained from the second counting module 104.

[0117] Alternatively, when the mode judgment module 101 detects that the acquired regular expression signal is the first target regular expression signal, the mode judgment module 101 does not send an enable signal to the comparison module 102. Instead, the processing module 103 is directly triggered to perform corresponding comparison processing. At this time, the mode judgment module 101 is used to set the detection tag to the first tag value when the regular expression signal is the first target regular expression signal, and send the detection tag to the processing module 103.

[0118] The processing module 103 is used to receive the detection tag, obtain the first data corresponding to the regular expression signal, obtain the second data in the cache module, and detect whether the second data matches the first data; if matched, the detection tag is updated to the second tag value, and the first address corresponding to the first data is determined as the next jump address.

[0119] Among them, when the mode judgment module 101 determines that the acquired regular expression signal is the first target regular expression signal, it can be determined that there is no need to send an enable signal to the comparison module 102. The mode judgment module 101 sets the detection tag to the first tag value and sends the detection tag to the processing module 103. At this time, after receiving the detection tag, the processing module 103 knows that it needs to obtain the first data and the second data by itself. At this time, the processing module 103 can determine the first data corresponding to the regular expression signal according to the regular expression signal. In some embodiments, the first data corresponding to the first target regular expression signal can be pre-set in the processing module 103. At this time, when the processing module 103 determines that the acquired regular expression signal is the first target regular expression signal, it can directly obtain the corresponding first data. The processing module 103 needs to obtain the second data from the cache module. The processing module 103 compares the acquired second data with the first data to detect whether the second data matches the first data. If it matches, the first address of the first data can be directly determined as the next jump address, and the detection tag is updated to the second tag value to indicate that the regular expression signal has been processed.

[0120] As a possible method, the processing module 103 is used to re-execute the acquisition of the second data in the cache module when the second data does not match the first data, and detect whether the second data matches the first data until the re-acquired second data matches the first data; if the re-acquired second data matches the first data, the detection tag is updated to the second tag value, and the first address corresponding to the first data is determined as the next jump address.

[0121] That is, when the processing module 103 determines that the first data and the second data do not match, it means that the required second data is not matched. At this time, the processing module 103 can re-read the second data from the cache module, and compare the second data re-read from the cache module with the first data. If the re-acquired second data and the first data still do not match, the second data is re-acquired from the cache module again, and the acquired second data is compared with the first data. If the acquired second data does not match the first data, the above process is re-executed until the first data and the second data match.

[0122] When the re-acquired second data matches the first data, the first address of the first data is determined as the next jump address, and the detection tag is updated to the second tag value.

[0123] The first tag value is different from the second tag value. In some embodiments, the first tag value may be 1, and the second tag value may be 0. Of course, other tag values ​​may also be used, and this application does not limit this.

[0124] As a possible implementation method, it is necessary to search for second data in the cache module that is the same as the number set in the first target regular expression signal. Therefore, the number of repeated executions may not be set in the first target regular expression signal. At this time, the processing module 103 needs to repeatedly obtain the second data in the cache module until the second data matching the first data is found. Of course, the number of repeated executions may also be set in the first target regular expression signal. In some embodiments, the minimum number of repeated executions may be set, and the maximum number of repeated executions may also be set. If the first target regular expression signal sets the maximum number of repeated executions, for example, when the first target regular expression signal is repeated at most n times for any data, the processing module 103 may perform the corresponding regular matching process in the following manner. At this time, in order to facilitate the implementation of the circuit, such as Figure 4 As shown, the regular matching circuit also includes: a first counting module 105.

[0125] The fourth input terminal of the processing module 103 is electrically connected to the output terminal of the first counting module 105 , and the third output terminal of the processing module 103 is electrically connected to the control terminal of the first counting module 105 .

[0126] The processing module 103 is used to update the count value of the first counting module each time the second data of the cache module is obtained; when the second data does not match the first data, the execution times of obtaining the second data in the cache module are determined according to the first counting module 105, and if the execution times of obtaining the second data reaches the times set in the regular expression signal, the detection tag is updated to the second tag value, and the second address corresponding to the first data is determined as the next jump address, and the next jump address is sent to the storage device. Or,

[0127] If the execution times of the second data do not reach the number set in the regular expression signal, re-execute the step of obtaining the second data in the cache module, and then go to the step of detecting whether the second data matches the first data, until the second data matches the first data or the execution times of the second data reaches the number set in the regular expression signal.

[0128] That is, when the number of repeated executions is set in the acquired regular expression signal, the processing module 103 can update the count value of the first counting module each time the second data is acquired from the cache module. When it is detected that the second data does not match the first data, the number of executions of acquiring the second data can be determined according to the count value of the first counting module. When the number of executions of acquiring the second data reaches the number set in the regular expression signal, it means that the number of times set in the regular expression signal has been repeatedly executed. At this time, the processing module 103 can directly determine the second address corresponding to the first data as the next jump address, and update the detection tag from the first tag value to the second tag value.

[0129] Alternatively, when the number of executions of acquiring the second data does not reach the number of times set in the regular expression signal, the processing module 103 needs to acquire the second data again. At this time, the processing module 103 can acquire the second data again in the cache module, and after acquiring the second data again, the count value of the first counting module 105 can be updated, and it is detected whether the reacquired second data matches the first data. If the reacquired second data does not match the first data, the count value of the first counting module is acquired, and it is detected whether the count value of the first counting module reaches the number of times set in the regular expression signal. If not, it continues to re-execute acquiring the second data in the cache module, updating the count value of the first counting module, and detecting whether the second data matches the first data, until the reacquired second data matches the first data or the count value of the first counting module reaches the number of times set in the regular expression signal.

[0130] At this time, when the re-acquired second data matches the first data, the processing module 103 determines the first address corresponding to the first data as the next jump address. Alternatively, when the re-acquired second data does not match the first data and the count value of the first counting module reaches the number of times set in the regular expression signal, the processing module 103 determines the second address corresponding to the first data as the next jump address.

[0131] Alternatively, if the first target regular expression signal sets a minimum number of repeated executions, at this time, the processing module 103 updates the count value of the first counting module 105 each time the second data of the cache module is obtained. If the second data obtained by the processing module 103 matches the first data obtained from the storage device, the processing module 103 cannot directly determine the first address corresponding to the first data as the next jump address. The processing module 103 needs to detect whether the count value of the first counting module reaches the number of times set in the regular expression signal. If not, it continues to re-execute the acquisition of the second data in the cache module, updates the count value of the first counting module, and re-detects whether the second data matches the first data until the count value of the first counting module reaches the number of times set in the regular expression signal. When the count value of the first counting module reaches the number of times set in the regular expression signal, if there are at least m times of the second data obtained n times that match the first data, the first address of the first data can be directly determined as the next jump address. If the second data obtained n times that are greater than m times do not match the first data, the second address of the first data can be determined as the next jump address. Wherein, n is the number of times set in the regular expression signal, and m is an integer not greater than n. In some embodiments, the value of m is the same as that of n. At this time, if the second data acquired n times all match the first data, the first address of the first data can be directly determined as the next jump address. If there is one time in the second data acquired n times that does not match the first data, the second address of the first data can be determined as the next jump address.

[0132] In a possible implementation, the processing module 103 is configured to obtain the (n+1)th second data in the cache module according to the regular expression signal when the regular expression signal includes a signal for ignoring n data and not checking them, where n is an integer greater than 0.

[0133] That is, the regular expression signal obtained by the processing module 103 is set to ignore n data and not check them. The processing module 103 can determine the value of n in the regular expression signal. The processing module 103 can directly obtain the n+1th second data from the cache module, and compare the obtained n+1th second data with the first data to detect whether the n+1th second data matches the first data. If they match, the first address corresponding to the first data is determined as the next jump address. If they do not match, the second data in the cache module is re-acquired. At this time, the storage position of the re-acquired second data in the cache module is located after the second data acquired last time and is adjacent to the second data acquired last time. The re-acquired second data is compared with the first data to detect whether the re-acquired second data matches the first data. If they do not match, the above process is re-executed until the re-acquired second data matches the first data. At this time, the processing module 103 can determine the first address corresponding to the first data as the next jump address.

[0134] In the embodiment of the present application, when the mode judgment module obtains the regular expression signal, it can determine whether to send an enable signal to the comparison module according to the regular expression signal; when the comparison module receives the comparison signal, it can obtain the first data in the storage device and receive the second data in the cache module, and compare whether the first data and the second data match, and send the comparison result to the processing module. The processing module determines the data path according to the comparison result and the regular expression signal. That is, in the embodiment of the present application, the matching of the regular expression can be realized through the mode judgment module, the comparison module and the processing module, and it is determined that the data path uses fewer resources, has higher flexibility, and has a faster matching speed, thereby improving the matching efficiency of the circuit.

[0135] In some embodiments, the cache module may include a cache unit with a storage mode of FIFO, and may also include a data capture unit. Figure 5 , is a schematic diagram of the structure of another regular matching circuit provided in an embodiment of the present application. Figure 5 The regular matching circuit shown is similar to the above Figure 4 Compared with the regular matching circuit, the cache module includes a cache device with a storage mode of FIFO and a data capture unit. Figure 5 In the regular matching circuit shown, the connection relationship among the mode determination module 101, the comparison module 102, the processing module 103, the first counting module 105, and the second counting module 104 can refer to the above embodiment, which will not be repeated here.

[0136] At this time, the mode determination module 101, the comparison module 102, and the processing module 103 are connected to the cache module, that is, the mode determination module 101, the comparison module 102, and the processing module 103 are connected to the data capture unit and the cache unit respectively.

[0137] In an embodiment of the present application, the data stored in the cache unit can be matched with the first data stored in the storage device by a regular expression signal, or the data captured by the data capture unit can be matched with the first data stored in the storage device by a regular expression signal. At this time, the processing module 103 can determine from which unit of the cache module to obtain the data for matching the regular expression signal with the first data stored in the storage device. In some embodiments, a default matching unit can be pre-set in the processing module 103. For example, the cache unit in the cache module can be set as the default matching module, so that when it is necessary to match the regular expression signal with the first data stored in the storage device, it can be directly determined that the data stored in the cache unit is used as the second data to match the regular expression signal with the first data stored in the storage device. At this time, the processing module 103 can send a relevant signal to the comparison module 102 to inform the comparison module 102 to obtain data from the cache unit in the cache module as the second data, and match the regular expression signal with the first data stored in the storage device. Or, in some embodiments, it can be set by the user. At this time, the processing module 103 can determine, according to the user's setting, which unit in the cache module stores the data as the second data, and perform regular expression signal matching with the first data stored in the storage device.

[0138] The process of using the data in the cache unit or the data captured by the data capture unit as the second data and matching the regular expression signal with the first data stored in the storage device can refer to the process described in the above embodiment and will not be repeated here.

[0139] It should be noted that the cache module may also include other units that can realize temporary storage functions, and this application does not limit this.

[0140] In some embodiments, the first counting module 105 and the second counting module 104 may be the same counting module. In this case, the first counting module 105 and the second counting module 104 may be collectively referred to as a counting module in the regular matching circuit. Figure 6 shown.

[0141] That is, in the embodiment of the present application, the regular expression signal can be any data and unlimited number of patterns, any data and repeated any number of times, any data repeated up to n times, any data repeated at least n times, ignoring n data without checking, one or more combinations, or can be the first data or the second data pattern, the first data or the second data and unlimited number of patterns, the first data or the second data and repeated any number of times, the first data or the second data and repeated up to n times, the first data or the second data and repeated at least n times One or more combinations, wherein the first data is different from the second data. Or the regular expression signal can also be a new pattern formed by any combination of the above patterns. In this way, the regular matching circuit in the embodiment of the present application can realize the matching of multiple regular expression signals, and when the match is successful, the data path when the match is successful can be determined, and when the match fails, the data path when the match fails can be determined, which greatly improves the flexibility of the regular matching circuit, reduces the comparison process corresponding to some regular expressions, thereby reducing the resources used, improving the matching speed, and then improving the matching efficiency.

[0142] Furthermore, in the embodiments of the present application, not only can the data in the cache unit be canonically matched with the data in the storage device, but the data captured by the data capture unit can also be canonically matched with the data in the storage device, thereby improving the flexibility of the canonical matching circuit and further improving the matching efficiency.

[0143] Figure 7 A schematic diagram of a regular matching method provided in an embodiment of the present application. Figure 7 As shown, the method is applied to the regular matching circuit described in the above embodiment. The method comprises:

[0144] Step S701: The mode determination module obtains a regular expression signal, and determines whether to send an enable signal for the comparison module according to the regular expression signal.

[0145] Step S702: When receiving the enable signal, the comparison module obtains the first data from the storage device and obtains the second data from the cache module, compares the first data with the second data, and sends the comparison result to the processing module.

[0146] The comparison result is used to indicate whether the first data and the second data match;

[0147] Step S703: The processing module receives the comparison result and obtains the regular expression signal, and determines the data path according to the regular expression signal and the comparison result.

[0148] Among them, the specific implementation of each step in the embodiment of the present application can refer to the functional implementation of the corresponding module in the above embodiment, which will not be repeated here.

[0149] Corresponding to the above embodiments, the present application also provides an FPGA chip, including the regular matching circuit described in the above embodiments.

[0150] Corresponding to the above embodiments, the present application further provides an electronic device, wherein the electronic device comprises the canonical matching circuit or chip described in the above embodiments, and more specifically, the chip is a FPGA (Field Programmable Gate Array) chip.

[0151] Those skilled in the art can clearly understand that the technology in the embodiments of the present invention can be implemented by means of software plus a necessary general hardware platform. Based on this understanding, the technical solution in the embodiments of the present invention is essentially or the part that contributes to the prior art can be embodied in the form of a software product, which can be stored in a storage medium such as ROM / RAM, a disk, an optical disk, etc., and includes a number of instructions for a computer device (which can be a personal computer, a server, or a network device, etc.) to execute the methods described in each embodiment of the present invention or some parts of the embodiments.

[0152] In this specification, the parts matching similarity between the various embodiments can be referred to each other. In particular, for the device embodiment and the terminal embodiment, since they are basically similar to the method embodiment, the description is relatively simple, and the relevant parts can be referred to the description in the method embodiment.

Claims

1. A regular matching circuit, characterized in that: include: Mode judgment module, comparison module, processing module; among them, The input end of the mode determination module is used to connect to the storage device, and the output end of the mode determination module is electrically connected to the enable end of the comparison module; the mode determination module is used to obtain a regular expression signal, and determine whether to send an enable signal to the comparison module according to the regular expression signal; The first input end of the comparison module is used to connect to the storage device, the second input end of the comparison module is used to connect to the cache module, and the output end of the comparison module is electrically connected to the first input end of the processing module; the comparison module is used to obtain the first data from the storage device and the second data from the cache module when receiving the enable signal, compare the first data with the second data and send the comparison result to the processing module; the comparison result is used to indicate whether the first data and the second data match; The second input end of the processing module is used to connect to the storage device, the third input end of the processing module is used to connect to the cache module, the first output end of the processing module is electrically connected to the mode judgment module, and the second output end of the processing module is used to connect to the storage device; the processing module is used to receive the comparison result and obtain the regular expression signal, and determine the data path according to the regular expression signal and the comparison result; The processing module is specifically configured to determine the first address corresponding to the first data as the next jump address when the comparison result indicates that the first data matches the second data and there is no repeated execution parameter in the regular expression signal, and send the next jump address to the storage device; the next jump address refers to the storage address of the first data that needs to be reacquired when the storage device reacquires the first data; The mode judgment module is specifically used for not sending an enable signal to the comparison module if the regular expression signal is a first target regular expression signal, or sending an enable signal to the comparison module if the regular expression signal is a second target regular expression signal; wherein the first target regular expression signal is a pre-set regular expression signal that does not require data matching; and the second target regular expression signal is a regular expression signal other than the first target regular expression signal.

2. The circuit according to claim 1, characterized in that The first target regular expression signal is: any data and unlimited number of times mode, any data and repeated any number of times, any data repeated at most n times, any data repeated at least n times, ignore n data and do not check, one or more combinations, where n is an integer greater than 0.

3. The circuit according to claim 1, characterized in that The mode determination module is used to set the detection tag to a first tag value when the regular expression signal is a first target regular expression signal, and send the detection tag to the processing module; The processing module is used to receive the detection tag, obtain the first data corresponding to the regular expression signal, obtain the second data in the cache module, and detect whether the second data matches the first data; If there is a match, the detection tag is updated to a second tag value, and the first address corresponding to the first data is determined as the next jump address.

4. The circuit according to claim 3, characterized in that The processing module is used for re-acquiring the second data from the cache module when the second data does not match the first data, and detecting whether the second data matches the first data, until the re-acquired second data matches the first data; If the re-acquired second data matches the first data, the detection tag is updated to a second tag value, and the first address corresponding to the first data is determined as the next jump address.

5. The circuit according to claim 4, characterized in that Also includes a first counting module; The fourth input terminal of the processing module is electrically connected to the output terminal of the first counting module, and the third output terminal of the processing module is electrically connected to the control terminal of the first counting module; The processing module is configured to update the count value of the first counting module each time the second data of the cache module is obtained; when the second data does not match the first data, determine the number of executions of obtaining the second data in the cache module according to the first counting module, and if the number of executions of obtaining the second data reaches the number set in the regular expression signal, update the detection tag to a second tag value, determine the second address corresponding to the first data as the next jump address, and send the next jump address to the storage device; or, If the execution times of the second data do not reach the number set in the regular expression signal, the second data is obtained again in the cache module, the count value of the first counting module is updated, and it is detected whether the second data matches the first data until the second data matches the first data or the execution times of the second data reaches the number set in the regular expression signal.

6. The circuit according to claim 3, characterized in that The processing module is used to obtain the (n+1)th second data in the cache module according to the regular expression signal when the regular expression signal includes a signal to ignore n data and not check them; wherein n is an integer greater than 0.

7. The circuit according to claim 1, characterized in that The processing module is used for, when the comparison result indicates that the first data matches the second data, there is a repetition parameter in the regular expression signal, and the number of executions of obtaining the second data reaches n times, if the second data obtained n times all have matching first data, then determining the first address corresponding to the first data as the next jump address, and sending the next jump address to the storage device, wherein n is the value of the repetition parameter in the regular expression signal, and n is an integer greater than 0; or, If there is at least one unmatched first data in the second data acquired n times, the second address corresponding to the first data is determined as the next jump address, and the next jump address is sent to the storage device; the second address corresponding to the first data is different from the first address corresponding to the first data.

8. The circuit according to claim 1, characterized in that The processing module is used to determine the starting address as the next jump address when the comparison result indicates that the first data matches the second data, there is a repeated execution parameter in the regular expression signal and the number of executions for obtaining the second data has not reached n times, send the next jump address to the storage device, send a trigger signal for obtaining the first data to the storage device, send a trigger signal for obtaining the second data to the cache module, and trigger the mode judgment module to re-send an enable signal to the comparison module so as to trigger the comparison module to re-obtain the first data from the storage device and the second data from the cache module until the number of executions for obtaining the second data reaches n times, wherein n is the value of the repeated execution parameter in the regular expression signal, n is an integer greater than 0, and the starting address refers to the storage address of the first data obtained for the first time corresponding to the regular expression signal.

9. The circuit according to claim 1, characterized in that The processing module is used to determine the second address corresponding to the first data as the next jump address and send the next jump address to the storage device when the comparison result indicates that the first data does not match the second data, there is no repeated execution parameter in the regular expression signal, and there is no target repeated operation information corresponding to the first data; wherein the target repeated operation information is repeated operation information adjacent to the first data and located after the first data in the regular expression signal; or, The processing module is used to update the next jump address according to a preset update method, send the next jump address to the storage device, send a trigger signal for obtaining the first data to the storage device, and trigger the mode judgment module to re-send an enable signal to the comparison module so as to trigger the comparison module to re-acquire the first data from the storage device when the comparison result indicates that the first data does not match the second data, there is no repeated execution parameter in the regular expression signal, and there is target repeated operation information corresponding to the first data. The comparison result indicates that the first data does not match the second data, there is no repeated execution parameter in the regular expression signal, and there is target repeated operation information corresponding to the first data.

10. The circuit according to claim 1, characterized in that The processing module is configured to determine the second address of the first data as the next jump address and send the next jump address to the storage device if the number of executions of acquiring the second data reaches n times when the comparison result indicates that the first data and the second data do not match, there is a repeated execution parameter in the regular expression signal, and there is no target repeated operation information corresponding to the first data; or The processing module is used for, when the comparison result indicates that the first data does not match the second data, there is a repeated execution parameter in the regular expression signal, and there is no target repeated operation information corresponding to the first data, if the number of execution times of obtaining the second data does not reach n times, then recording that the second data currently obtained does not match the corresponding first data, and determining the starting address as the next jump address, sending the next jump address to the storage device, sending a trigger signal for obtaining the first data to the storage device, sending a trigger signal for obtaining the second data to the cache module, and triggering the mode judgment module to re-send an enable signal to the comparison module to trigger the comparison module to re-obtain the first data from the storage device and the second data from the cache module until the number of execution times of obtaining the second data reaches n times or the second data matches the corresponding first data, wherein n is the value of the repeated execution parameter in the regular expression signal, n is an integer greater than 0, and the starting address refers to the storage address of the first data obtained for the first time corresponding to the regular expression.

11. The circuit according to claim 1, characterized in that The processing module is used to record that the first data currently acquired does not match the second data when the comparison result indicates that the first data does not match the second data, there is a repeated execution parameter in the regular expression signal, and there is target repeated operation information corresponding to the first data, and update the next jump address according to a preset update method, send the next jump address to the storage device, send a trigger signal for acquiring the first data to the storage device, and trigger the mode judgment module to re-send an enable signal to the comparison module so as to trigger the comparison module to re-acquire the first data from the storage device until there is no target repeated operation information corresponding to the first data in the regular expression signal or the re-acquired first data matches the second data; When the target repeated operation information corresponding to the first data does not exist in the regular expression signal, detecting whether the number of executions of obtaining the second data reaches n times; wherein n is the value of the repeated execution parameter in the regular expression signal, and n is an integer greater than 0; If the number of executions of obtaining the second data reaches n times, the second address of the first data is determined as the next jump address, and the next jump address is sent to the storage device; or, If the number of executions for obtaining the second data does not reach n times, the starting address is determined as the next jump address, the next jump address is sent to the storage device, a trigger signal for obtaining the first data is sent to the storage device, a trigger signal for obtaining the second data is sent to the cache module, and the mode judgment module is triggered to send an enable signal to the comparison module again, so as to trigger the comparison module to re-obtain the first data from the storage device and the second data from the cache module, until the number of executions for obtaining the second data reaches n times or the second data matches the corresponding first data, wherein the starting address refers to the storage address of the first data obtained for the first time corresponding to the regular expression.

12. The circuit according to claim 7 or 8 or 10 or 11, characterized in that: Also includes: A second counting module; The fifth input terminal of the processing module is electrically connected to the output terminal of the second counting module, and the fourth output terminal of the processing module is electrically connected to the control terminal of the second counting module; The processing module is used to update the count value of the second counting module each time the second data is acquired, and determine the number of executions of acquiring the second data according to the count value of the second counting module.

13. A regular matching method, characterized in that: Applied to the regular matching circuit according to any one of claims 1 to 12, the method comprising: The mode judgment module obtains a regular expression signal, and determines whether to send an enable signal for the comparison module according to the regular expression signal; When receiving the enable signal, the comparison module obtains the first data from the storage device and obtains the second data from the cache module, compares the first data with the second data, and sends the comparison result to the processing module; the comparison result is used to indicate whether the first data and the second data match; The processing module receives the comparison result and obtains a regular expression signal, and determines a data path according to the regular expression signal and the comparison result; The processing module determines the data path according to the regular expression signal and the comparison result, including: When the comparison result indicates that the first data matches the second data and there is no repeated execution parameter in the regular expression signal, the processing module determines the first address corresponding to the first data as the next jump address, and sends the next jump address to the storage device; The mode judgment module obtains the regular expression signal, and determines whether to send an enable signal for the comparison module according to the regular expression signal, including: The mode determination module obtains a regular expression signal. If the regular expression signal is a first target regular expression signal, the mode determination module does not send an enable signal to the comparison module. Alternatively, if the regular expression signal is a second target regular expression signal, the mode determination module sends an enable signal to the comparison module. The first target regular expression signal is a pre-set regular expression signal that does not require data matching. The second target regular expression signal is a regular expression signal other than the first target regular expression signal.

14. An FPGA chip, characterized in that: The invention comprises the regular matching circuit as described in any one of claims 1 to 12.

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