Inductor and method of manufacturing the same

Abstract

This invention relates to the field of inductor technology and discloses an inductor and its fabrication method. The inductor includes a substrate, a first external electrode, and a second external electrode. The substrate includes multiple layers stacked sequentially. Each layer includes a first insulating layer, an electrode layer, and a second insulating layer. The electrode layer is disposed on the first insulating layer. The electrode layers of each layer are sequentially electrically connected to form an inner electrode. The second insulating layer is disposed on the first insulating layer and is located on the same side of the first insulating layer as the electrode layer. The second insulating layer has gaps distributed around the periphery of the electrode layer. The distance from the gap to the periphery of the electrode layer is d1, where d1 ≥ 10 μm. The gaps are filled with a low dielectric constant dielectric. The first and second external electrodes are respectively disposed at both ends of the substrate and are electrically connected to the inner electrode. Using the inductor and its fabrication method of this invention, the inductor can simultaneously achieve high current and high self-resonant frequency, has a wide impedance bandwidth, a simple structure, and a high fabrication yield.

Description

Technical Field

[0001] This invention relates to the field of inductance technology, and more particularly to an inductor and its fabrication method. Background Technology

[0002] In related technologies, inductors typically have two structures: horizontal and vertical. Horizontal inductors generally have a higher current draw but a lower self-resonant frequency, while vertical inductors have a lower current draw but a higher self-resonant frequency. To obtain inductors that balance high current and high self-resonant frequency, current methods use low-permeability ferrite materials in horizontal inductors to increase the self-resonant frequency. However, this results in a narrow impedance bandwidth, making it impossible to simultaneously handle low-frequency and high-frequency impedance. Vertical inductors can increase current draw by increasing the number of electrode turns, but this leads to structural complexity and low manufacturing yield.

[0003] In other words, existing inductors struggle to simultaneously handle large current and high self-resonant frequency while avoiding issues such as narrow impedance bandwidth, complex structure, and low fabrication yield. Summary of the Invention

[0004] This invention discloses an inductor and its fabrication method. The inductor can simultaneously handle large current and high self-resonant frequency, and has a wide impedance bandwidth, simple structure, and high fabrication yield.

[0005] In a first aspect, embodiments of the present invention disclose an inductor, including a substrate, a first external electrode, and a second external electrode. The substrate includes a plurality of layers stacked sequentially, each layer including a first insulating layer, an electrode layer, and a second insulating layer. The electrode layer is disposed on the first insulating layer, and the electrode layers of each layer are electrically connected sequentially to form an inner electrode. The second insulating layer is disposed on the first insulating layer and is located on the same side of the first insulating layer as the electrode layer. The second insulating layer has gaps distributed around the periphery of the electrode layer, and the distance from the gap to the periphery of the electrode layer is d1, where d1 ≥ 10 μm. The gaps are filled with a low dielectric constant medium. The first external electrode is disposed at one end of the substrate and electrically connected to the inner electrode. The second external electrode is disposed at the end of the substrate opposite to the first external electrode and electrically connected to the inner electrode.

[0006] As an optional implementation, in this embodiment of the invention, the electrode layer is configured as a coil extending in a straight line around the stacking direction of the substrate, the gap extends along the extension direction of the electrode layer, and the extension length of the gap is greater than or equal to 10% of the extension length of the electrode layer. As an optional implementation, in this embodiment of the invention, the electrode layer is configured as a coil extending in a straight line around the stacking direction of the substrate, the gap extends along the extension direction of the electrode layer from one end of the electrode layer to the other end of the electrode layer. As an optional implementation, in this embodiment of the invention, the electrode layer is configured as a coil extending in a straight line around the stacking direction of the substrate, the peripheral side of the electrode layer includes an outer side facing away from the straight line of the stacking direction, the margin between the outer side and the surface of the substrate is L, and the width of the gap along the peripheral direction of the electrode layer is d2, where 0.1L ≤ d2 ≤ 0.8L. As an optional implementation, in this embodiment of the invention, the electrode layer is configured as a coil extending along a straight line containing the stacking direction of the plurality of substrates. The peripheral side surface of the electrode layer includes opposing inner and outer sides. The inner side surface is disposed facing the straight line containing the stacking direction. The gaps are distributed on the inner peripheral side of the electrode layer, and the distance from the gaps to the inner side surface of the electrode layer is d1. And / or, the gaps are distributed on the outer peripheral side of the electrode layer, and the distance from the gaps to the outer side surface of the electrode layer is d1. As an optional implementation, in this embodiment of the invention, the thickness of the electrode layer along the stacking direction of the plurality of substrates is t1, and the depth of the gaps along the stacking direction is h, where 0.1t1 ≤ h ≤ 1.5t1. As an optional implementation, in this embodiment of the invention, the material of the low dielectric constant dielectric includes one or more of glass, ceramic, and air. As an optional implementation, in this embodiment of the invention, when the material of the low dielectric constant dielectric includes one or more of glass and ceramic, the thickness of the electrode layer along the stacking direction of the plurality of substrates is t1, and the thickness of the low dielectric constant dielectric along the stacking direction is t2, where 0.1t1≤t2≤1.5t1. As an optional implementation, in this embodiment of the invention, when the material of the low dielectric constant dielectric includes one or more of glass and ceramic, the peripheral side of the electrode layer includes an outer side disposed in a straight line opposite to the stacking direction, the margin between the outer side and the surface of the substrate is L, and the width of the low dielectric constant dielectric along the peripheral direction of the electrode layer is d3, where 0.1L≤d3≤0.8L.In a second aspect, embodiments of the present invention disclose a method for fabricating an inductor, comprising: providing a plurality of first insulating layers; forming an electrode layer, a second insulating layer, and a low dielectric constant medium on one side of each of the first insulating layers, wherein the low dielectric constant medium is distributed on the periphery of the electrode layer, and the distance from the low dielectric constant medium to the periphery of the electrode layer is d1, where d1 ≥ 10 μm; sequentially stacking the plurality of first insulating layers having the electrode layer, the second insulating layer, and the low dielectric constant medium to form a substrate, and sequentially electrically connecting the electrode layers formed on each of the first insulating layers to form an inner electrode; providing a first outer electrode and a second outer electrode, wherein the first outer electrode and the second outer electrode are respectively disposed on two opposite sides of the substrate, the first outer electrode being electrically connected to the inner electrode, and the second outer electrode being electrically connected to the inner electrode. As an optional implementation, in this embodiment of the invention, forming an electrode layer, a second insulating layer, and a low-dielectric-constant dielectric on one side of each of the first insulating layers, wherein the low-dielectric-constant dielectric is distributed around the periphery of the electrode layer, and the distance from the low-dielectric-constant dielectric to the periphery of the electrode layer is d1, where d1 ≥ 10 μm, includes: forming the electrode layer and the second insulating layer on one side of each of the first insulating layers, wherein the second insulating layer has gaps distributed around the periphery of the electrode layer, and the distance from the gaps to the periphery of the electrode layer is d1, where d1 ≥ 10 μm; and filling the gaps with the low-dielectric-constant dielectric. As an optional implementation, in this embodiment of the invention, the material of the low-dielectric-constant dielectric includes one or more of glass and ceramic. Thirdly, embodiments of the present invention disclose a method for fabricating an inductor, comprising: providing a plurality of first insulating layers; forming an electrode layer, a second insulating layer, and a first dielectric on one side of each of the first insulating layers, wherein the first dielectric is distributed on the periphery of the electrode layer, and the distance from the first dielectric to the periphery of the electrode layer is d1, d1≥10μm, and the first dielectric includes consumable material; sequentially stacking the plurality of first insulating layers having the electrode layer, the second insulating layer, and the first dielectric to form a substrate, and sequentially electrically connecting the electrode layers formed on each of the first insulating layers to form an inner electrode; sintering the substrate to remove the consumable material; providing a first outer electrode and a second outer electrode, wherein the first outer electrode and the second outer electrode are respectively disposed on two opposite sides of the substrate, the first outer electrode being electrically connected to the inner electrode, and the second outer electrode being electrically connected to the inner electrode.

[0007] As an optional implementation, in this embodiment of the invention, forming an electrode layer, a second insulating layer, and a first dielectric on one side of each of the first insulating layers, wherein the first dielectric is distributed around the periphery of the electrode layer, and the distance from the first dielectric to the periphery of the electrode layer is d1, where d1 ≥ 10 μm, includes:

[0008] The electrode layer and the second insulating layer are formed on one side of each of the first insulating layers. The second insulating layer has a gap, which is distributed on the periphery of the electrode layer. The distance from the gap to the periphery of the electrode layer is d1, where d1 ≥ 10 μm.

[0009] The first medium is filled into the gap.

[0010] As an optional implementation, in this embodiment of the invention, the first medium further includes a low dielectric constant medium.

[0011] As an optional implementation, in this embodiment of the invention, the material of the low dielectric constant medium includes one or more of glass and ceramic.

[0012] Compared with the prior art, the embodiments of the present invention have at least the following beneficial effects:

[0013] In this embodiment of the invention, an electrode layer and a second insulating layer are disposed through a first insulating layer of the substrate, and multiple substrates are stacked sequentially, so that the electrode layers of each substrate are electrically connected to form an inner electrode. Electrical conduction is achieved by connecting the inner electrode to a first and a second outer electrode respectively located at both ends of the substrate. That is, the inductor adopts a horizontal structure, which has a large current capacity, a relatively simple structure, and a high fabrication yield. Simultaneously, a low-dielectric-constant dielectric is filled in the gaps of the second insulating layer to reduce the parasitic capacitance between the inner electrode and the first and second outer electrodes, thereby improving the inductor's self-resonant frequency and bandwidth. In other words, the inductor of this embodiment can simultaneously achieve both high current and high self-resonant frequency, and has a wide impedance bandwidth, a simple structure, and a high fabrication yield.

[0014] Furthermore, the distance d1 from the gap of the second insulating layer to the peripheral side of the electrode layer is ≥10μm. This allows the electrode layer and the gap to be separated by a portion of the second insulating layer, thereby preventing foreign matter (such as water vapor or plating solution from the preparation process) from entering the gap and affecting the performance of the electrode layer. This results in higher reliability of the inductor. Attached Figure Description

[0015] To more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0016] Figure 1 This is a schematic diagram of the structure of an inductor disclosed in Embodiment 1 of the present invention;

[0017] Figure 2This is an exploded structural diagram of an inductor disclosed in Embodiment 1 of the present invention;

[0018] Figure 3 This is a schematic diagram of the structure of the base layer disclosed in Embodiment 1 of the present invention;

[0019] Figure 4 This is a comparison diagram of the impedance spectrum of the comparative example and the embodiment disclosed in Embodiment 1 of the present invention;

[0020] Figure 5 This is a schematic diagram of the structure of the substrate disclosed in Embodiment 1 of the present invention;

[0021] Figure 6 yes Figure 3 A schematic diagram of the AA cross-sectional structure in the diagram;

[0022] Figure 7 This is a schematic flowchart of a method for preparing an inductor disclosed in Embodiment 2 of the present invention;

[0023] Figure 8 This is a schematic diagram of the structure of the first insulating layer disclosed in Embodiment 2 of the present invention;

[0024] Figure 9 This is a schematic diagram of the structure of a first insulating layer having an electrode layer, a second insulating layer, and a low dielectric constant dielectric material as disclosed in Embodiment 2 of the present invention;

[0025] Figure 10 This is a schematic diagram of the structure of the first insulating layer having an electrode layer and a second insulating layer as disclosed in Embodiment 2 of the present invention;

[0026] Figure 11 This is a schematic diagram of the structure of the first insulating layer with a low dielectric constant dielectric material disclosed in Embodiment 2 of the present invention;

[0027] Figure 12 This is a schematic diagram of the structure of the substrate disclosed in Embodiment 2 of the present invention;

[0028] Figure 13 This is a schematic flowchart of another inductor fabrication method disclosed in Embodiment 3 of the present invention;

[0029] Figure 14 This is a schematic diagram of the structure of the first insulating layer having an electrode layer, a second insulating layer, and a first dielectric layer disclosed in Embodiment 3 of the present invention;

[0030] Figure 15 This is a schematic diagram of the structure of the substrate (partially omitted) disclosed in Embodiment 3 of the present invention.

[0031] Explanation of main figure symbols

[0032] 100, Inductor; 10, Substrate; 10a, Base layer; 11, First insulating layer; 12, Electrode layer; 12a, Inner electrode; 121, Peripheral side; 121a, Inner side; 121b, Outer side; 13, Second insulating layer; 13a, Gap; 14, Low dielectric constant dielectric; 15, First dielectric; 15a, Consumable; 20, First outer electrode; 30, Second outer electrode; x, Stacking direction; a, Gap. Detailed Implementation

[0033] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0034] In this invention, the terms "upper," "lower," "left," "right," "front," "rear," "top," "bottom," "inner," "outer," "middle," "vertical," "horizontal," "lateral," and "longitudinal" indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. These terms are primarily for the purpose of better describing the invention and its embodiments, and are not intended to limit the indicated devices, elements, or components to having a specific orientation, or to be constructed and operated in a specific orientation.

[0035] Furthermore, in addition to indicating direction or positional relationship, some of the aforementioned terms may also have other meanings. For example, the term "above" may also be used in certain situations to indicate a dependency or connection. Those skilled in the art can understand the specific meaning of these terms in this invention based on the specific circumstances.

[0036] Furthermore, the terms "installation," "setup," "equipped with," "connection," and "linked" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral structure; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium, or an internal connection between two devices, components, or parts. Those skilled in the art can understand the specific meaning of these terms in this invention based on the specific circumstances.

[0037] Furthermore, the terms "first," "second," etc., are primarily used to distinguish different devices, elements, or components (which may be the same or different in specific type and construction), and are not intended to indicate or imply the relative importance or quantity of the indicated devices, elements, or components. Unless otherwise stated, "a plurality of" means two or more.

[0038] This invention discloses an inductor and its fabrication method. The inductor can simultaneously handle large current and high self-resonant frequency, and has a wide impedance bandwidth, simple structure, and high fabrication yield.

[0039] Example 1

[0040] Please see Figures 1 to 3 This is a schematic diagram of the structure of an inductor 100 provided in Embodiment 1 of the present invention. The inductor 100 includes a substrate 10, a first external electrode 20, and a second external electrode 30. The substrate 10 includes a plurality of layers 10a stacked sequentially. Each layer 10a includes a first insulating layer 11, an electrode layer 12, and a second insulating layer 13. The electrode layer 12 is disposed on the first insulating layer 11. The electrode layers 12 of each layer 10a are electrically connected sequentially to form an inner electrode 12a. The second insulating layer 13 is disposed on the first insulating layer 11 and is located adjacent to the electrode layer 12. On the same side of the first insulating layer 11, the second insulating layer 13 has a gap 13a, which is distributed around the periphery of the electrode layer 12. The distance from the gap 13a to the periphery 121 of the electrode layer 12 is d1, where d1 ≥ 10 μm. The gap 13a is filled with a low dielectric constant medium 14. The first external electrode 20 is disposed on one side of the substrate 10 and is electrically connected to the inner electrode 12a. The second external electrode 30 is disposed on the side of the substrate 10 away from the first external electrode 20 and is electrically connected to the inner electrode 12a.

[0041] like Figure 3 As shown, to facilitate the distinction between electrode layer 12, second insulating layer 13, and low dielectric constant dielectric 14, in Figure 3 The low dielectric constant dielectric 14 is shown in the cross-sectional view. Other views are only for better showing the low dielectric constant dielectric 14 and will not be described in detail later.

[0042] In this embodiment, an electrode layer 12 and a second insulating layer 13 are disposed on the first insulating layer 11 of the substrate 10a, and multiple substrates 10a are stacked sequentially, so that the electrode layers 12 of each substrate 10a are sequentially electrically connected to form an inner electrode 12a. Electrical conduction is achieved by connecting the inner electrode 12a to the first outer electrode 20 and the second outer electrode 30 respectively located at both ends of the substrate 10. That is, the inductor 100 adopts a horizontal structure, which has a large current capacity, a relatively simple structure, and a high fabrication yield. Simultaneously, a low-dielectric-constant dielectric 14 is filled in the gaps 13a of the second insulating layer 13 to reduce the parasitic capacitance between the inner electrode 12a and the first and second outer electrodes 20 and 30, thereby improving the self-resonant frequency and bandwidth of the inductor 100. In other words, the inductor 100 of this embodiment can simultaneously achieve both large current and high self-resonant frequency, and has a wide impedance bandwidth, a simple structure, and a high fabrication yield.

[0043] Furthermore, the distance d1 from the gap 13a of the second insulating layer 13 to the peripheral side surface 121 of the electrode layer 12 is ≥10μm. This allows the electrode layer 12 and the gap 13a to be separated by a portion of the second insulating layer 13, thereby preventing foreign matter (such as water vapor or plating solution from the preparation process) from entering the gap 13a and affecting the performance of the electrode layer 12. As a result, the inductor 100 has high reliability.

[0044] Optionally, such as Figure 3 As shown, the distance d1 from the gap 13a of the second insulating layer 13 to the peripheral side surface 121 of the electrode layer 12 can be 10μm, 12μm, 14μm, 16μm, 18μm, 20μm, etc., and this embodiment does not make a specific limitation on this.

[0045] One of the inventive points of this embodiment is that the second insulating layer 13 has gaps 13a, which are distributed around the periphery of the electrode layer 12 and are filled with a low-dielectric-constant dielectric 14. This is also one of the differences between this embodiment and the existing horizontal structure inductor 100. Using the existing horizontal structure inductor 100 as a comparative example, various parameters of the inductor 100 were tested, and the experimental data are shown in Table 1 below. Figure 4 ( Figure 4 This is a comparison diagram of the impedance spectrum of the comparative example and the embodiment. Figure 4 The horizontal axis represents frequency, and the vertical axis represents impedance.

[0046] parameter Comparative Example Example Increase ratio Dimensions (Length x Width x Height / Unit: mm) 2.0x1.25x0.85 2.0x1.25x0.85 completely consistent Impedance (@100MHz / Ω) 55 50 -10％ Self-resonant frequency (SRF) in MHz 655 1200 +83％ Bandwidth (Z > 70Ω / MHz) 831 2213 +166％ DC resistance DCR (unit: mΩ) 7 7 completely consistent Temperature rise current (unit: A) 6 6 completely consistent

[0047] Table 1 Comparison of parameters between comparative examples and implementation examples

[0048] According to Table 1 and Figure 4 It can be seen that, under the same size conditions, the inductor 100 of the embodiment has significantly improved self-resonant frequency and bandwidth compared to the comparative example. Except for a slight decrease in low-frequency impedance, other parameters are completely identical, and high-frequency impedance has also been improved. That is, the inductor 100 of the embodiment, while using the existing horizontal structure, can maintain a large current, a relatively simple structure, and a high fabrication yield. By using a low-dielectric-constant dielectric 14, the inductor 100 of this embodiment achieves a significant improvement in self-resonant frequency and bandwidth without deteriorating other indicators.

[0049] Optionally, such as Figure 3 and Figure 5As shown, the electrode layer 12 is configured as a coil extending along a straight line containing the stacking direction x of the plurality of base layers 10a. The peripheral surface 121 of the electrode layer 12 includes opposing inner surface 121a and outer surface 121b. The inner surface 121a is arranged facing the straight line containing the stacking direction x. Gap 13a is distributed on the inner peripheral side of the electrode layer 12, and the distance from the gap 13a to the inner surface 121a of the electrode layer 12 is d1. And / or, gap 13a is distributed on the outer peripheral side of the electrode layer 12, and the distance from the gap 13a to the outer surface 121b of the electrode layer 12 is d1. Thus, this embodiment provides three distribution methods for the gap 13a: distributed on the inner peripheral side of the electrode layer 12, distributed on the outer peripheral side of the electrode layer 12, and simultaneously distributed on both the inner and outer peripheral sides of the electrode layer 12. Depending on the distribution method, the self-resonant frequency and bandwidth enhancement of the inductor 100 are different, and can be selected according to the actual situation. This embodiment does not make specific limitations on this.

[0050] For example, the electrode layer 12 is configured as a coil extending along a straight line containing the stacking direction x of the base layer 10a, and the gap 13a extends along the extension direction of the electrode layer 12, with the extension length of the gap 13a being greater than or equal to 10% of the extension length of the electrode layer 12. If the extension length of the gap 13a is less than 10% of the extension length of the electrode layer 12, then the extension length of the gap 13a is smaller, the overall volume of the gap 13a is smaller and its proportion is lower, the volume of the low-dielectric-constant dielectric 14 that can be filled by the gap 13a is smaller, and the improvement in the self-resonant frequency and bandwidth of the inductor 100 is smaller. Therefore, the extension length of the gap 13a can be greater than or equal to 10% of the extension length of the electrode layer 12, the overall volume of the gap 13a is larger and its proportion is higher, the volume of the low-dielectric-constant dielectric 14 that can be filled by the gap 13a is larger, and the improvement in the self-resonant frequency and bandwidth of the inductor 100 is larger. Furthermore, the extension length of the gap 13a can be 10%, 20%, 30%, 40%, 50%, 60%, 70%, 80%, 90%, 100% of the extension length of the electrode layer 12, etc. This embodiment does not make a specific limitation on this.

[0051] In some embodiments, the electrode layer 12 is configured as a coil extending along a straight line in the stacking direction x of the base layer 10a, and the gap 13a extends from one end of the electrode layer 12 to the other end along the extension direction of the electrode layer 12. Thus, the extension length of the gap 13a is approximately equal to the extension length of the electrode layer 12, and the gap 13a extends continuously without interruption. This allows for a larger volume of the gap 13a while keeping other dimensions constant, enabling the gap 13a to fill a larger volume of the low-dielectric-constant dielectric 14, thereby further improving the self-resonant frequency and bandwidth of the inductor 100.

[0052] In other embodiments, the gap 13a can be configured as discontinuous and intermittent, that is, multiple gaps 13a are sequentially spaced along the extension direction of the electrode layer 12. This embodiment does not specifically limit this. When the gap 13a is configured as discontinuous and intermittent, compared with a continuous and uninterrupted extension, the overall volume ratio of the gap 13a is lower, resulting in a poorer effect on improving the self-resonant frequency and bandwidth of the inductor 100.

[0053] For example, such as Figure 5 As shown, the electrode layer 12 is configured as a coil extending along the straight line of the stacking direction x of the substrate 10a. The peripheral side surface 121 of the electrode layer 12 includes an outer side surface 121b disposed opposite to the straight line of the stacking direction x. The margin between the outer side surface 121b and the surface of the substrate 10 is L. The width of the gap 13a along the peripheral direction of the electrode layer 12 is d2, where 0.1L≤d2≤0.8L. If the width d2 of the gap 13a along the peripheral direction of the electrode layer 12 is <0.1L, then the width d2 is small, the volume of the low dielectric constant medium 14 that can be filled in the gap 13a is small, and the improvement in the self-resonant frequency and bandwidth of the inductor 100 is small. If the width d2 of the gap 13a along the circumferential direction of the electrode layer 12 is greater than 0.8L, then the width d2 is relatively large, and there is a risk of cracking at the gap 13a. For example, when the substrate 10 is subjected to isostatic pressing with warm water, the stress at the gap 13a is relatively large, and there is a risk of stretching and cracking, resulting in a low manufacturing yield. Therefore, the width d2 of the gap 13a along the circumferential direction of the electrode layer 12 can be 0.1L≤d2≤0.8L. The gap 13a can fill a larger volume of low dielectric constant medium 14, resulting in a greater improvement in the self-resonant frequency and bandwidth of the inductor 100, and can avoid cracking at the gap 13a, resulting in a higher manufacturing yield. Furthermore, the width d2 of the gap 13a along the circumferential direction of the electrode layer 12 can be 0.1L, 0.2L, 0.3L, 0.4L, 0.5L, 0.6L, 0.7L, 0.8L, etc., and this embodiment does not specifically limit it.

[0054] For example, in this embodiment, the width d2 of the gap 13a along the circumferential direction of the electrode layer 12 is preferably 0.5L.

[0055] Optionally, such as Figure 6As shown, the thickness of the electrode layer 12 along the stacking direction x of the multiple base layers 10a is t1, and the depth of the gap 13a along the stacking direction x is h, where 0.1t1 ≤ h ≤ 1.5t1. If the depth h of the gap 13a along the stacking direction x is less than 0.1t1, then the depth h is small, the volume of the low dielectric constant medium 14 that can be filled in the gap 13a is small, and the improvement in the self-resonant frequency and bandwidth of the inductor 100 is small. If the depth h of the gap 13a along the stacking direction x is greater than 1.5t1, then the depth h is large, the thickness of the second insulating layer 13 is large, and while keeping the overall thickness of the base layer 10a unchanged, the thickness of the first insulating layer 11 is small, the distance between the electrode layers 12 of two adjacent base layers 10a is small, and the insulation effect of the first insulating layer 11 is poor. Therefore, the depth h of the gap 13a along the stacking direction x can be 0.1t1≤h≤1.5t1. The gap 13a can fill a larger volume of low dielectric constant medium 14, resulting in a greater increase in the self-resonant frequency and bandwidth of the inductor 100. Furthermore, the thickness of the first insulating layer 11 is larger, the distance between the electrode layers 12 of two adjacent base layers 10a is larger, and the insulation effect of the first insulating layer 11 is better. The depth h of the gap 13a along the stacking direction x can be 0.1t1, 0.3t1, 0.5t1, 0.7t1, 0.9t1, t1, 1.1t1, 1.3t1, or 1.5t1; this embodiment does not specifically limit this value.

[0056] For example, in this embodiment, the depth h of the gap 13a along the stacking direction x is preferably t1.

[0057] The dielectric constant of the low dielectric constant medium 14 is ε, where 1≤ε≤14. It can be selected according to the actual situation. The dielectric constant ε of the low dielectric constant medium 14 can be 1, 3, 5, 7, 9, 11, 13, 14, etc. This embodiment does not make a specific limitation on this.

[0058] In some embodiments, the material of the low dielectric constant dielectric 14 includes one or more of glass, ceramic, and air. This embodiment provides a variety of materials for dielectric constants, which can be selected according to actual conditions, and this embodiment does not make specific limitations in this regard.

[0059] For example, the low dielectric constant dielectric 14 is made of one or more materials, including glass and ceramic. Thus, the low dielectric constant dielectric 14 is solid and its shape matches the shape of the gap 13a.

[0060] When the material of the low dielectric constant dielectric 14 includes one or more of glass and ceramic, the dimensions of the low dielectric constant dielectric 14 are as follows:

[0061] Optionally, the thickness of the electrode layer 12 along the stacking direction x of the plurality of substrates 10a is t1, and the thickness of the low dielectric constant dielectric 14 along the stacking direction x is t2, where 0.1t1≤t2≤1.5t1. If the thickness t2 of the low dielectric constant dielectric 14 along the stacking direction x is <0.1t1, then the thickness t2 is small, the volume of the low dielectric constant dielectric 14 is small, and the improvement in the self-resonant frequency and bandwidth of the inductor 100 is small. If the thickness t2 of the low dielectric constant dielectric 14 along the stacking direction x is >1.5t1, then the thickness t2 is large, and part of the low dielectric constant dielectric 14 protrudes outside the gap 13a. Alternatively, the thickness of the second insulating layer 13 is large. While keeping the overall thickness of the substrates 10a unchanged, the thickness of the first insulating layer 11 is small, the distance between the electrode layers 12 of two adjacent substrates 10a is small, and the insulation effect of the first insulating layer 11 is poor. Therefore, the thickness t2 of the low dielectric constant dielectric 14 along the stacking direction x can be 0.1t1≤t2≤1.5t1. The low dielectric constant dielectric 14 has a larger volume, resulting in a greater increase in the self-resonant frequency and bandwidth of the inductor 100. Furthermore, the thickness of the first insulating layer 11 is larger, leading to a larger distance between the electrode layers 12 of two adjacent base layers 10a, and thus better insulation performance of the first insulating layer 11. The thickness t2 of the low dielectric constant dielectric 14 along the stacking direction x can be 0.1t1, 0.3t1, 0.5t1, 0.7t1, 0.9t1, 1.1t1, 1.3t1, or 1.5t1; this embodiment does not impose a specific limitation on this.

[0062] For example, in this embodiment, the thickness t2 of the low dielectric constant dielectric 14 along the stacking direction x is preferably t1.

[0063] In some embodiments, such as Figure 5As shown, the electrode layer 12 is configured as a coil extending along a straight line in the stacking direction x of the substrate 10a. The peripheral side surface 121 of the electrode layer 12 includes an outer side surface 121b, with a margin of L between the outer side surface 121b and the surface of the substrate 10. The width of the low dielectric constant dielectric 14 along the peripheral direction of the electrode layer 12 is d3, where 0.1L ≤ d3 ≤ 0.8L. If the width of the low dielectric constant dielectric 14 along the peripheral direction of the electrode layer 12 is d3 < 0.1L, then the width d3 is relatively small, the volume of the low dielectric constant dielectric 14 is relatively small, and the improvement in the self-resonant frequency and bandwidth of the inductor 100 is relatively small. If the width of the low dielectric constant dielectric 14 along the circumferential direction of the electrode layer 12 is d3 > 0.8L, then this width d3 is relatively large, and there is a risk of cracking at the low dielectric constant dielectric 14. For example, when the substrate 10 is subjected to isostatic pressing with warm water, the stress at the low dielectric constant dielectric 14 is relatively large, and there is a risk of stretching and cracking, resulting in a low fabrication yield. Therefore, the width d3 of the low dielectric constant dielectric 14 along the circumferential direction of the electrode layer 12 can be 0.1L ≤ d2 ≤ 0.8L. The volume of the low dielectric constant dielectric 14 is larger, which greatly improves the self-resonant frequency and bandwidth of the inductor 100, and can avoid cracking at the low dielectric constant dielectric 14, resulting in a higher fabrication yield. Furthermore, the width d3 of the low dielectric constant dielectric 14 along the circumferential direction of the electrode layer 12 can be 0.1L, 0.2L, 0.3L, 0.4L, 0.5L, 0.6L, 0.7L, 0.8L, etc., and this embodiment does not make a specific limitation on it.

[0064] For example, in this embodiment, the width d3 of the low dielectric constant dielectric 14 along the circumferential direction of the electrode layer 12 is preferably 0.5L.

[0065] Embodiment 1 of the present invention provides an inductor 100. An electrode layer 12 and a second insulating layer 13 are disposed on a first insulating layer 11 of a base layer 10a. Multiple base layers 10a are stacked sequentially, such that the electrode layers 12 of each base layer 10a are sequentially electrically connected to form an inner electrode 12a. Electrical conduction is achieved by connecting the inner electrode 12a to a first outer electrode 20 and a second outer electrode 30 respectively located at both ends of a substrate 10. That is, the inductor 100 adopts a horizontal structure, resulting in a large current capacity, a relatively simple structure, and a high fabrication yield. Simultaneously, a low-dielectric-constant dielectric 14 is filled in the gaps 13a of the second insulating layer 13 to reduce the parasitic capacitance between the inner electrode 12a and the first and second outer electrodes 20 and 30, thereby improving the self-resonant frequency and bandwidth of the inductor 100. In other words, the inductor 100 of this embodiment can simultaneously achieve both large current and high self-resonant frequency, and has a wide impedance bandwidth, a simple structure, and a high fabrication yield.

[0066] Furthermore, the distance d1 from the gap 13a of the second insulating layer 13 to the peripheral side surface 121 of the electrode layer 12 is ≥10μm. This allows the electrode layer 12 and the gap 13a to be separated by a portion of the second insulating layer 13, thereby preventing foreign matter (such as water vapor or plating solution from the preparation process) from entering the gap 13a and affecting the performance of the electrode layer 12. As a result, the inductor 100 has high reliability.

[0067] Example 2

[0068] Please see Figure 7 This is a schematic flowchart of a method for fabricating an inductor according to Embodiment 2 of the present invention. The method includes:

[0069] 201. Provide multiple first insulating layers 11.

[0070] Specifically, step 101 can be as follows: A roll of ferrite ceramic green tape is formed on a PET film (Polyethylene Glycol Terephthalate) using a casting method; the ferrite ceramic green tape is then cut to form a single-layer green tape of a certain size, such as... Figure 8 As shown, that is, the first insulating layer 11.

[0071] 203. An electrode layer 12, a second insulating layer 13, and a low dielectric constant medium 14 are formed on one side of each first insulating layer 11. The low dielectric constant medium 14 is distributed on the periphery of the electrode layer 12, and the distance from the low dielectric constant medium 14 to the periphery of the electrode layer 12 is d1, where d1 ≥ 10 μm.

[0072] like Figure 9 As shown, Figure 9 The first insulating layer 11 is formed after step 203, which includes an electrode layer 12, a second insulating layer 13, and a low dielectric constant dielectric 14.

[0073] In this embodiment, the material of the low dielectric constant dielectric 14 in step 203 includes one or more of glass and ceramic. This embodiment provides a variety of dielectric constant materials, which can be selected according to actual conditions, and this embodiment does not make specific limitations on them.

[0074] In this way, after the low dielectric constant medium 14 is formed in step 203, the compactness of the substrate 10 formed in step 205 can be maintained in subsequent processing steps. Compared with not forming the low dielectric constant medium 14 and leaving a gap (gap 13a) here, the risk of substrate 10 cracking can be reduced and the inductor preparation yield is higher.

[0075] Specifically, forming an electrode layer 12 on one side of the first insulating layer 11 can be achieved by covering the first insulating layer 11 with a conductive electrode material (such as silver, copper, graphite, etc.) to form the electrode layer 12.

[0076] Optionally, the process of covering the conductive electrode material onto the first insulating layer 11 can be screen printing, vapor deposition, spin coating, or pressure drying film, etc., and this embodiment does not specifically limit this.

[0077] For example, forming a second insulating layer 13 on one side of the first insulating layer 11 can specifically be achieved by printing ferrite printing paste on the non-electrode area (i.e., the area where the electrode layer 12 is not formed) of the first insulating layer 11.

[0078] Optionally, the process for forming the low dielectric constant medium 14 on the first insulating layer 11 can be screen printing, vapor deposition, spin coating, or pressure drying film, etc., and this embodiment does not specifically limit this.

[0079] The formation of the electrode layer 12, the second insulating layer 13, and the low dielectric constant medium 14 does not have a specific order; the order of their formation can be changed according to the actual situation.

[0080] As an optional implementation, step 203 can be: such as Figure 10 As shown, an electrode layer 12 and a second insulating layer 13 are formed on one side of each first insulating layer 11. The second insulating layer 13 has gaps 13a distributed around the periphery of the electrode layer 12, and the distance from the gaps 13a to the periphery of the electrode layer 12 is d1, where d1 ≥ 10 μm. Figure 9 As shown, a low dielectric constant dielectric 14 is filled in the gap 13a.

[0081] The formation of the electrode layer 12 and the second insulating layer 13 does not have a specific order; the order of their formation can be changed according to the actual situation.

[0082] As another alternative implementation, step 203 can be: as follows Figure 11 As shown, a low dielectric constant dielectric 14 is formed on one side of each first insulating layer 11, such as... Figure 9 As shown, an electrode layer 12 and a second insulating layer 13 are formed on one side of each first insulating layer 11. A low dielectric constant dielectric 14 is distributed on the periphery of the electrode layer 12, and the distance from the low dielectric constant dielectric 14 to the periphery of the electrode layer 12 is d1, where d1 ≥ 10 μm. The second insulating layer 13 is distributed on both opposite sides of the low dielectric constant dielectric 14.

[0083] The formation of the electrode layer 12 and the second insulating layer 13 does not have a specific order; the order of their formation can be changed according to the actual situation.

[0084] 205. A substrate 10 is formed by sequentially stacking a plurality of first insulating layers 11 having an electrode layer 12, a second insulating layer 13 and a low dielectric constant medium 14, and the electrode layers 12 formed on each of the first insulating layers 11 are sequentially electrically connected to form an inner electrode.

[0085] like Figure 12 As shown, Figure 12 The substrate 10 is formed after step 205.

[0086] For example, after step 205, the preparation method may include the following steps: isostatic pressing with warm water, cutting, debinding, sintering, and chamfering. In this way, isostatic pressing with warm water makes the substrate 10 more compact, improving its overall strength. Cutting allows the substrate 10 to be cut into multiple pieces of a certain size. Debinding removes organic matter (e.g., adhesive) present in the first insulating layer 11 and the second insulating layer 13, thereby making the substrate 10 more compact and improving its overall strength. Sintering makes the substrate 10 magnetic and improves its strength. Chamfering refers to forming rounded corners on the substrate 10.

[0087] 207. Provide a first external electrode and a second external electrode, and respectively place the first external electrode and the second external electrode on two opposite sides of the substrate 10. The first external electrode is electrically connected to the internal electrode, and the second external electrode is electrically connected to the internal electrode.

[0088] For example, after step 207, the fabrication method may include the following steps: electroplating the first external electrode and the second external electrode to form solder joints on the first external electrode and the second external electrode for electrically connecting the inductor to other components.

[0089] Using the preparation method of this embodiment two, the inductor of embodiment one can be prepared. The gap of the prepared inductor is filled with a low dielectric constant medium, and the material of the low dielectric constant medium includes one or more of glass and ceramic.

[0090] Furthermore, the inductor prepared by the preparation method of this embodiment has the beneficial effects of the inductor of embodiment one. For example, the preparation method of embodiment two can prepare an inductor with the same dimensional parameters as that of embodiment one (e.g., the thickness and width of the low dielectric constant medium). That is, the structure and dimensions of the prepared inductor can be referred to that of embodiment one, and will not be repeated in this embodiment.

[0091] Embodiment 2 of the present invention provides a method for fabricating an inductor. The inductor fabricated by this method can simultaneously achieve high current and high self-resonant frequency, and has a wide impedance bandwidth, simple structure, and high fabrication yield.

[0092] Example 3

[0093] Please see Figure 13 This is a schematic flowchart of another inductor fabrication method provided in Embodiment 3 of the present invention. The fabrication method includes:

[0094] 301. Provide multiple first insulating layers 11.

[0095] Specifically, step 101 can be as follows: A roll of ferrite ceramic green tape is formed on a PET film (Polyethylene Glycol Terephthalate) using a casting method; the ferrite ceramic green tape is then cut to form a single-layer green tape of a certain size, such as... Figure 8 As shown, that is, the first insulating layer 11.

[0096] 303. An electrode layer 12, a second insulating layer 13 and a first dielectric 15 are formed on one side of each first insulating layer 11. The first dielectric 15 is distributed on the periphery of the electrode layer 12, and the distance from the first dielectric 15 to the periphery of the electrode layer 12 is d1, where d1 ≥ 10 μm. The first dielectric 15 includes consumable material 15a.

[0097] like Figure 14 As shown, Figure 14 The first insulating layer 11, which has an electrode layer 12, a second insulating layer 13 and a first dielectric 15, is formed after step 303.

[0098] For example, consumable 15a may include a substance such as resin that is volatile at high temperatures. In this way, during sintering in a subsequent process, consumable 15a can be removed, thereby creating a void a at the original position of consumable 15a. This void a is filled with air, which has a low dielectric constant and can improve the self-resonant frequency and bandwidth of the inductor.

[0099] In some embodiments, the first dielectric 15 further includes a low dielectric constant dielectric 14. Optionally, the low dielectric constant dielectric 14 may be made of one or more of glass and ceramic. This embodiment provides a variety of dielectric constant dielectric materials, which can be selected according to actual conditions, and this embodiment does not impose specific limitations on them.

[0100] In this way, during the subsequent sintering process, the consumable 15a can be removed while the low dielectric constant medium 14 is retained. The air filling the void a formed at the original position of the consumable 15a, together with the low dielectric constant medium 14, can improve the self-resonant frequency and bandwidth of the inductor.

[0101] Furthermore, after the low dielectric constant dielectric 14 is formed in step 303, the compactness of the substrate formed in step 305 can be maintained until the subsequent sintering process. Compared with not forming the low dielectric constant dielectric 14 and leaving a gap here, the risk of substrate cracking can be reduced and the inductor manufacturing yield is higher.

[0102] Specifically, forming an electrode layer 12 on one side of the first insulating layer 11 can be achieved by covering the first insulating layer 11 with a conductive electrode material (such as silver, copper, graphite, etc.) to form the electrode layer 12.

[0103] Optionally, the process of covering the conductive electrode material onto the first insulating layer 11 can be screen printing, vapor deposition, spin coating, or pressure drying film, etc., and this embodiment does not specifically limit this.

[0104] For example, forming a second insulating layer 13 on one side of the first insulating layer 11 can specifically be achieved by printing ferrite printing paste on the non-electrode area (i.e., the area where the electrode layer 12 is not formed) of the first insulating layer 11.

[0105] Optionally, the process for forming the first dielectric 15 on the first insulating layer 11 can be screen printing, vapor deposition, spin coating, or pressure drying film, etc., and this embodiment does not specifically limit this.

[0106] The formation of the electrode layer 12, the second insulating layer 13, and the first dielectric 15 does not have a specific order; the order in which they are formed can be changed according to the actual situation.

[0107] As an optional implementation, step 303 may be: forming an electrode layer 12 and a second insulating layer 13 on one side of each first insulating layer 11, the second insulating layer 13 having gaps distributed around the periphery of the electrode layer 12, and the distance from the gap to the periphery of the electrode layer 12 being d1, where d1 ≥ 10 μm, and filling the gaps with a first dielectric 15.

[0108] The formation of the electrode layer 12 and the second insulating layer 13 does not have a specific order; the order of their formation can be changed according to the actual situation.

[0109] As another optional implementation, step 303 may be: forming a first dielectric 15 on one side of each first insulating layer 11, forming an electrode layer 12 and a second insulating layer 13 on one side of each first insulating layer 11, the first dielectric 15 being distributed on the periphery of the electrode layer 12, and the distance from the first dielectric 15 to the periphery of the electrode layer 12 being d1, where d1 ≥ 10 μm, and the second insulating layer 13 being distributed on two opposite sides of the first dielectric 15.

[0110] The formation of the electrode layer 12 and the second insulating layer 13 does not have a specific order; the order of their formation can be changed according to the actual situation.

[0111] 305. A substrate is formed by sequentially stacking a plurality of first insulating layers 11 having an electrode layer 12, a second insulating layer 13 and a first dielectric 15, and the electrode layers 12 formed on each of the first insulating layers 11 are sequentially electrically connected to form an inner electrode.

[0112] For example, after step 305, the preparation method may include the following steps: isostatic pressing with warm water, cutting, and glue removal.

[0113] 307. Sinter the substrate to remove consumable 15a. In this way, by sintering the substrate, the substrate becomes magnetic and its strength is improved. At the same time, the heat of sintering can be used to volatilize consumable 15a, thereby achieving the purpose of removing consumable 15a, which is a win-win situation.

[0114] like Figure 15 As shown, Figure 15 This refers to the substrate after step 307 (partial base layer omitted). Compared to... Figure 14 , Figure 14 Consumable 15a is volatilized and removed during sintering, and the position of consumable 15a is formed as vacancy a.

[0115] For example, after step 307, the preparation method may include chamfering.

[0116] 309. Provide a first external electrode and a second external electrode, and respectively place the first external electrode and the second external electrode on two opposite sides of the substrate. The first external electrode is electrically connected to the internal electrode, and the second external electrode is electrically connected to the internal electrode.

[0117] For example, after step 309, the fabrication method may include the following steps: electroplating the first external electrode and the second external electrode to form solder joints on the first external electrode and the second external electrode for electrically connecting the inductor to other components.

[0118] Using the preparation method of this embodiment three, the inductor of embodiment one can be prepared. The gap of the prepared inductor is filled with a low dielectric constant medium and air, and the material of the low dielectric constant medium includes one or more of glass and ceramic.

[0119] Furthermore, the inductor prepared by the preparation method of this embodiment has the beneficial effects of the inductor of embodiment one. For example, the preparation method of embodiment two can prepare an inductor with the same dimensional parameters as that of embodiment one (e.g., the thickness and width of the low dielectric constant medium). That is, the structure and dimensions of the prepared inductor can be referred to that of embodiment one, and will not be repeated in this embodiment.

[0120] The main difference between the inductor prepared by the preparation method in Example 3 and the inductor prepared by the preparation method in Example 2 is that the material filling the gap of the inductor is different. The gap of the inductor prepared by Example 3 is filled with air, while the gap of the inductor prepared by Example 2 does not contain air.

[0121] Embodiment 3 of the present invention provides a method for fabricating an inductor. The inductor fabricated by this method can simultaneously achieve high current and high self-resonant frequency, and has a wide impedance bandwidth, simple structure, and high fabrication yield.

[0122] The present invention has provided a detailed description of an inductor and its preparation method disclosed in the embodiments above. This article uses specific examples to illustrate the principles and implementation methods of the present invention. The description of the above embodiments is only for the purpose of helping to understand the inductor and its preparation method and its core ideas. At the same time, for those skilled in the art, there will be changes in the specific implementation methods and application scope based on the ideas of the present invention. Therefore, the content of this specification should not be construed as a limitation of the present invention.

Claims

1. An inductor, characterized in that, include: The substrate comprises a plurality of layers stacked sequentially. Each layer comprises a first insulating layer, an electrode layer, and a second insulating layer. The electrode layer is disposed on the first insulating layer. The electrode layers of each layer are electrically connected sequentially to form an inner electrode. The second insulating layer is disposed on the first insulating layer and is located on the same side of the first insulating layer as the electrode layer. The second insulating layer has gaps distributed around the periphery of the electrode layer. The distance from the gaps to the periphery of the electrode layer is d1, where d1 ≥ 10 μm. The gaps are filled with a low dielectric constant medium. A first external electrode is disposed at one end of the substrate and is electrically connected to the internal electrode; as well as The second external electrode is disposed at one end of the substrate away from the first external electrode, and the second external electrode is electrically connected to the internal electrode.

2. The inductor according to claim 1, characterized in that, The electrode layer is configured as a coil extending in a straight line around the stacking direction of the base layer, the gap extending along the extension direction of the electrode layer, and the extension length of the gap being greater than or equal to 10 percent of the extension length of the electrode layer.

3. The inductor according to claim 1, characterized in that, The electrode layer is configured as a coil extending in a straight line around the stacking direction of the base layer, and the gap extends from one end of the electrode layer to the other end along the extension direction of the electrode layer.

4. The inductor according to claim 1, characterized in that, The electrode layer is configured as a coil extending in a straight line around the stacking direction of the substrate. The peripheral side of the electrode layer includes an outer side facing away from the straight line of the stacking direction. The margin between the outer side and the surface of the substrate is L. The width of the gap along the peripheral direction of the electrode layer is d2, where 0.1L≤d2≤0.8L.

5. The inductor according to claim 1, characterized in that, The electrode layer is configured as a coil extending around a straight line containing the stacking direction of the plurality of base layers. The peripheral side of the electrode layer includes opposing inner and outer sides. The inner side is oriented toward the straight line containing the stacking direction. The gaps are distributed on the inner peripheral side of the electrode layer, and the distance from the gaps to the inner side of the electrode layer is d1. And / or, the gaps are distributed on the outer peripheral side of the electrode layer, and the distance from the gaps to the outer side of the electrode layer is d1.

6. The inductor according to claim 1, characterized in that, The thickness of the electrode layer along the stacking direction of the plurality of substrates is t1, and the depth of the gap along the stacking direction is h, where 0.1t1≤h≤1.5t1.

7. The inductor according to any one of claims 1 to 6, characterized in that, The material of the low dielectric constant medium includes one or more of glass, ceramics, and air.

8. The inductor according to claim 7, characterized in that, When the material of the low dielectric constant dielectric includes one or more of glass and ceramic, the thickness of the electrode layer along the stacking direction of the plurality of substrates is t1, and the thickness of the low dielectric constant dielectric along the stacking direction is t2, where 0.1t1≤t2≤1.5t1.

9. The inductor according to claim 1, characterized in that, The material of the low dielectric constant dielectric includes one or more of glass and ceramic. The peripheral side of the electrode layer includes an outer side arranged in a straight line opposite to the stacking direction of the substrate. The margin between the outer side and the surface of the substrate is L. The width of the low dielectric constant dielectric along the peripheral direction of the electrode layer is d3, where 0.1L≤d3≤0.8L.

10. A method for fabricating an inductor, characterized in that, include: Provide multiple first insulating layers; An electrode layer, a second insulating layer, and a low dielectric constant medium are formed on one side of each of the first insulating layers. The low dielectric constant medium is distributed on the periphery of the electrode layer, and the distance from the low dielectric constant medium to the periphery of the electrode layer is d1, where d1 ≥ 10 μm. A substrate is formed by sequentially stacking multiple first insulating layers having the electrode layer, the second insulating layer, and the low dielectric constant medium, and the electrode layers formed on each of the first insulating layers are sequentially electrically connected to form an inner electrode; A first external electrode and a second external electrode are provided, and the first external electrode and the second external electrode are respectively disposed on two opposite sides of the substrate. The first external electrode is electrically connected to the inner electrode, and the second external electrode is electrically connected to the inner electrode.

11. The preparation method according to claim 10, characterized in that, The step of forming an electrode layer, a second insulating layer, and a low-dielectric-constant dielectric on one side of each of the first insulating layers, wherein the low-dielectric-constant dielectric is distributed on the periphery of the electrode layer, and the distance from the low-dielectric-constant dielectric to the periphery of the electrode layer is d1, where d1 ≥ 10 μm, includes: The electrode layer and the second insulating layer are formed on one side of each of the first insulating layers. The second insulating layer has a gap, which is distributed on the periphery of the electrode layer. The distance from the gap to the periphery of the electrode layer is d1, where d1 ≥ 10 μm. The gap is filled with the low dielectric constant medium.

12. The preparation method according to claim 10 or 11, characterized in that, The material of the low dielectric constant dielectric includes one or more of glass and ceramics.

13. A method for fabricating an inductor, characterized in that, include: Provide multiple first insulating layers; An electrode layer, a second insulating layer, and a first dielectric are formed on one side of each of the first insulating layers. The first dielectric is distributed on the periphery of the electrode layer, and the distance from the first dielectric to the periphery of the electrode layer is d1, where d1 ≥ 10 μm. The first dielectric includes consumables. A substrate is formed by sequentially stacking multiple first insulating layers on which the electrode layer, the second insulating layer, and the first dielectric are formed, and the electrode layers formed on each first insulating layer are sequentially electrically connected to form an inner electrode; The substrate is sintered to remove the consumables; A first external electrode and a second external electrode are provided, and the first external electrode and the second external electrode are respectively disposed on two opposite sides of the substrate. The first external electrode is electrically connected to the inner electrode, and the second external electrode is electrically connected to the inner electrode.

14. The preparation method according to claim 13, characterized in that, The step of forming an electrode layer, a second insulating layer, and a first dielectric on one side of each of the first insulating layers, wherein the first dielectric is distributed on the periphery of the electrode layer and the distance from the first dielectric to the periphery of the electrode layer is d1, where d1 ≥ 10 μm, includes: The electrode layer and the second insulating layer are formed on one side of each of the first insulating layers. The second insulating layer has a gap, which is distributed on the periphery of the electrode layer. The distance from the gap to the periphery of the electrode layer is d1, where d1 ≥ 10 μm. The first medium is filled into the gap.

15. The preparation method according to claim 13 or 14, characterized in that, The first medium also includes a low dielectric constant medium.

16. The preparation method according to claim 15, characterized in that, The material of the low dielectric constant dielectric includes one or more of glass and ceramics.

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