Circuit reliability processing method and device, storage medium and electronic equipment

Abstract

The application provides a circuit reliability processing method, device, storage medium and electronic equipment. The circuit reliability processing method comprises the following steps: obtaining the failure rate and the corresponding failure coefficient of each first device in a preset circuit; determining the failure expectation value of each first device according to the failure rate and the corresponding failure coefficient of each first device; comparing a plurality of failure expectation values to determine a target first device to be modified in the preset circuit, and replacing the first device with a second device according to the failure coefficient of the target first device. The technical scheme of the application can improve the technical problem that the reliability of an insulation detection circuit cannot be quantified and a high-reliability design direction is obtained.

Description

Technical Field

[0001] This invention relates to the field of detection circuit technology, and more specifically to a method, apparatus, storage medium, and electronic device for processing circuit reliability. Background Technology

[0002] In related technologies, it is impossible to quantify the reliability of insulation detection circuits through a unified calculation method. Even when faced with existing insulation resistance detection circuits, it is impossible to quantify their reliability into specific values ​​to assess whether the reliability of the insulation resistance detection circuit is high or low. Furthermore, it is impossible to determine how to modify the circuit to increase its reliability and reduce the possibility of the insulation resistance detection circuit failing during operation. Summary of the Invention

[0003] Embodiments of the present invention provide a method, apparatus, storage medium, and electronic device for processing circuit reliability, which can improve the technical problem that the reliability of insulation detection circuits cannot be quantified and that it is impossible to determine how to modify the circuits to increase their reliability.

[0004] In a first aspect, embodiments of the present invention provide a method for processing circuit reliability, the method comprising:

[0005] Obtain the failure rate and corresponding failure coefficient of each first device in the preset circuit;

[0006] Based on the failure rate of each first device and its corresponding failure coefficient, the expected failure value of each first device is determined.

[0007] Multiple expected failure values ​​are compared to determine a target first device in a preset circuit to be modified. Based on the failure coefficient of the target first device, the first device is replaced with a second device.

[0008] The failure coefficient of the second device is less than that of the first device.

[0009] In one embodiment, obtaining the failure coefficient corresponding to each device in the preset circuit includes:

[0010] According to the preset standard failure mode, obtain all failure situations existing in each of the first devices, and the failure percentage corresponding to each failure situation;

[0011] Obtain the circuit connection method of each of the first devices in the preset circuit, and determine the various target failure conditions of the first device during operation based on the circuit connection method;

[0012] The failure coefficient of the first device is determined by summing the failure rates of the various target failure scenarios corresponding to each first device.

[0013] In one embodiment, replacing the first device with a second device based on the failure coefficient of the first device includes:

[0014] Obtain the various failure scenarios of the target first device corresponding to its failure coefficient;

[0015] The second device to be replaced is determined based on the multiple target failure conditions remaining after removing one or more target failure conditions.

[0016] In one embodiment, the first target device is an opto-MOSFET, and the second device is a relay. Determining the second device to be replaced based on the remaining multiple target failure conditions after removing one or more target failure conditions includes:

[0017] If the first device is a MOS transistor, then the target failure condition of the optical MOS transistor is determined to include at least one of switch drift and switch open circuit;

[0018] The target failure condition is determined to be a relay, which does not include either switch drift or switch open circuit, and the relay is designated as the second device.

[0019] In one embodiment, replacing the first device with a second device based on the failure condition in the failure coefficient of the first device includes:

[0020] The failure rates corresponding to the various target failure conditions of the target first device are sorted from largest to smallest to obtain a sorted queue.

[0021] According to the order of the queue, the target failure cases corresponding to the failure percentages that are greater than the preset ranking are taken as the target failure cases to be modified.

[0022] The second device to be replaced is determined based on the failure rate of the various target failure conditions after reducing one or more of the target failure conditions to be modified.

[0023] In one embodiment, after comparing multiple expected failure values ​​to determine the target first device to be modified in the preset circuit, the method further includes:

[0024] Based on the failure rate of the first target device, the first device is replaced with a third device; wherein...

[0025] The failure rate of the third device is lower than that of the first device.

[0026] In one embodiment, after determining the expected failure value of each of the first devices based on the failure rate of each device and its corresponding failure coefficient, the method further includes:

[0027] Based on the expected failure value, failure rate and corresponding failure coefficient of each of the first devices, the total expected failure value of the preset circuit is obtained;

[0028] Based on the relationship between the total expected failure value of the preset circuit and the expected threshold, it is determined whether the preset circuit should be modified.

[0029] Secondly, embodiments of the present invention provide a circuit reliability processing apparatus, comprising:

[0030] The parameter acquisition module is used to acquire the failure rate of each device in the preset circuit and its corresponding failure coefficient.

[0031] The processing module is used to determine the expected failure value of each device based on the failure rate of each device and its corresponding failure coefficient.

[0032] The comparison module is used to compare multiple expected failure values ​​to determine the target device in the preset circuit.

[0033] Thirdly, embodiments of the present invention provide a storage medium storing a computer program that, when run on a computer, causes the computer to perform the circuit reliability processing method described above.

[0034] Fourthly, embodiments of the present invention provide an electronic device, including a processor and a memory, wherein the memory has a computer program, and the processor executes the above-described circuit reliability processing method by calling the computer program.

[0035] The beneficial effects of the embodiments of the present invention are as follows:

[0036] In embodiments of the present invention, by obtaining the failure rate and corresponding failure coefficient of each first device in the preset circuit, and determining the expected failure value of each first device based on the failure rate and corresponding failure coefficient, the reliability of the insulation detection circuit is quantified through a unified calculation method. Furthermore, by determining the first devices that need optimization based on multiple expected failure values, and replacing the first devices based on their failure coefficients, the reliability of each first device in the preset circuit can be quantified. This allows the reliability of each first device to be directly reflected by the magnitude of its expected failure value. Moreover, by comparing multiple expected failure values, it is possible to determine which devices in the preset circuit primarily affect its reliability, and to pinpoint the modification to specific devices. This allows for a more direct and concise determination of the direction of modification to the preset circuit, resulting in a more reliable circuit during operation. This addresses the technical problem of being unable to quantify the reliability of the insulation detection circuit and determine how to modify the circuit to increase its reliability. Attached Figure Description

[0037] To more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0038] Figure 1 This is a schematic flowchart of a circuit reliability processing method provided in an embodiment of the present invention;

[0039] Figure 2 This is a flowchart illustrating step S100 provided in an embodiment of the present invention;

[0040] Figure 3 This is a flowchart illustrating one embodiment of step S300 provided in the embodiments of the present invention.

[0041] Figure 4 This is a flowchart illustrating step S320 provided in an embodiment of the present invention;

[0042] Figure 5 This is a flowchart illustrating another embodiment of step S300 provided in the embodiments of the present invention;

[0043] Figure 6 This is a schematic flowchart of another embodiment of the circuit reliability processing method provided by the embodiments of the present invention;

[0044] Figure 7 This is a circuit connection diagram of a preset circuit provided in an embodiment of the present invention;

[0045] Figure 8 This is a circuit connection diagram of the modified circuit provided in an embodiment of the present invention;

[0046] Figure 9 This is a circuit block diagram of a circuit reliability processing device provided in an embodiment of the present invention. Detailed Implementation

[0047] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention. Furthermore, it should be understood that the specific embodiments described herein are only for illustration and explanation of the present invention and are not intended to limit the present invention. In the present invention, unless otherwise stated, directional terms such as "upper" and "lower" generally refer to the upper and lower positions of the device in actual use or operation, specifically the drawing directions in the accompanying drawings; while "inner" and "outer" refer to the outline of the device.

[0048] Embodiments of the present invention provide a method for improving circuit reliability.

[0049] Reference Figure 1 In one embodiment, the method for processing circuit reliability includes:

[0050] S100: Obtain the failure rate of each first device in the preset circuit and its corresponding failure coefficient;

[0051] In this embodiment, the preset circuit is the circuit to be processed, which is input by the user through a PC or other device, and the first device is the original device in the preset circuit, that is, the device that has not been replaced.

[0052] The failure rate is obtained by the processing equipment according to existing device failure rate standards. In this embodiment, standard SN29500 is used. In other cases, other device failure rate standards, such as IEC62380, can be used as needed. The failure coefficient is the proportion of possible failure situations of each first device in all failure situations. For example, for a switching transistor, all failure situations include parameter drift, short circuit and open circuit. In the off state, the possible failure situations include parameter drift and short circuit. At this time, the failure coefficient of the switching transistor is the sum of the probabilities of parameter drift and short circuit.

[0053] When optimizing the reliability of an insulation detection circuit, the user first determines the required device failure rate standard. Based on the standard, the failure rate of each first device in the existing insulation detection circuit is determined. For example, when calculating the failure rate of switching transistors and resistors according to standard SN29500, the failure rate of the switching transistors is 40 FIT; the failure rate of the resistors is 1.26 FIT. The total probability of the target failure situation that will occur for each first device is determined as a parameter for calculating the failure situation of the first device.

[0054] S200. Determine the expected failure value of each first device based on the failure rate of each first device and its corresponding failure coefficient.

[0055] In this embodiment, the expected failure value is the proportion of each device's failure to the total number of failures in the circuit. Figure 7 For example, Figure 7 For the preset circuit, Figure 7 The expected failure value of the first switching transistor K1 in the circuit is calculated as follows: P K1_1 =a*F K1 / (F R1 +F R2 +a*F K1 +b*F K2 ), where a is the failure coefficient of the first switching transistor K1, b is the failure coefficient of the second switching transistor K2, and F R1 F is the failure rate of the first resistor R1. R2 F is the failure rate of the second resistor R2. K1 F is the failure rate of the first switch K1. K2 The failure rate of the second switch K2, (F R1 +F R2 +a*F K1 +b*F K2 () represents the target failure condition of the overall circuit.

[0056] S300: Compare multiple expected failure values ​​to determine a target first device to be modified in a preset circuit, and replace the first device with a second device according to the failure coefficient of the target first device; wherein,

[0057] The failure coefficient of the second device is different from that of the first device.

[0058] It should be noted that circuit failure rate is mainly composed of the number of components, inherent failure rate, failure modes, and circuit architecture. Components with the same function may exhibit different failure scenarios due to differences in component type. Taking an ambient temperature of 40℃ and considering only single-point failures, using Birolini Failure Modes as an example, in this case, short circuit, open circuit, and drift account for 10%, 50%, and 40% of all failure scenarios for optical MOSFETs, respectively; while short circuit and functional failure account for 20% and 80% of relay failures, respectively. It is evident that even though both relays and optical MOSFETs have switching functions, the failure scenarios and the proportions of each failure scenario differ. Consequently, the failure coefficients in calculations will also differ, and therefore, the expected failure values ​​obtained after applying them to a circuit will also differ.

[0059] In this embodiment, after obtaining the failure rate and failure coefficient of each device, and calculating the expected failure value of each first device based on these parameters, multiple expected failure values ​​are compared. When the expected failure value of a first device is higher than that of other first devices, it indicates that the first device is more likely to fail and malfunction. Therefore, the first device is addressed. Specifically, when the failure coefficient of a first device is mainly affected by open circuit, its connection relationship with surrounding first devices can be modified to reduce the situation where multiple identical first devices are closed at the same time.

[0060] This invention provides a solution that quantifies the reliability of an insulation detection circuit by obtaining the failure rate and corresponding failure coefficient of each device in a preset circuit, determining the expected failure value of each device based on its failure rate and corresponding failure coefficient, and using a unified calculation method to quantify the reliability of the insulation detection circuit. Furthermore, by determining the first device requiring optimization based on multiple expected failure values ​​and replacing the first device according to its failure coefficient, the reliability of each first device in the preset circuit can be quantified. This allows the reliability of each first device to be directly reflected by the magnitude of its expected failure value. By comparing multiple expected failure values, it can determine which devices in the preset circuit primarily affect its reliability, thus pinpointing modifications to specific devices. This more directly and concisely determines the direction of modification to the preset circuit, resulting in a more reliable circuit during operation. This addresses the technical problem of being unable to quantify the reliability of an insulation detection circuit and determine how to modify the circuit to increase its reliability.

[0061] Reference Figures 1 to 2 In one embodiment, obtaining the failure coefficient corresponding to each device in the preset circuit includes:

[0062] S110. Obtain all failure scenarios of each first device according to the preset standard failure mode, and the failure percentage corresponding to each failure scenario.

[0063] S120. Obtain the circuit connection method of each first device in the preset circuit, and determine at least one target failure condition of the first device when it is working based on the circuit connection method.

[0064] S130. Determine the failure coefficient of the first device based on the sum of the failure ratios of at least one of the target failure conditions corresponding to each of the first devices.

[0065] In this embodiment, each first device can be identified by the standard failure modes. However, due to different circuit connections, not every failure mode will occur. For example, a switch in the open state has three states in the standard failure modes: short circuit, open circuit, and parameter drift. However, for an open switch, an open circuit will not affect its operation. Therefore, this failure condition cannot be included in the calculation. Thus, when calculating the failure coefficient of each device, the connection state of its circuit must first be determined to determine whether there is a failure condition that will not affect the operation. Failure conditions that affect the operation are taken as target failure conditions, and the probabilities corresponding to at least one target failure condition are accumulated as the failure coefficient of the first device.

[0066] Furthermore, the operating states of each component in the insulation detection circuit are not always constant during operation. In order to obtain the resistance values ​​of the positive and negative ground resistances in the insulation detection circuit, there are usually at least two operating states, and each operating state corresponds to a connection circuit. Therefore, when calculating the expected failure value of the components in the insulation detection circuit, it is necessary to calculate the expected failure value of each component in multiple operating states simultaneously.

[0067] like Figure 7 As shown, according to standard SN29500:

[0068] The failure rate of the resistors in the preset circuit is: F R1 =F R2 =F R3 =F R4 =1.26 FIT;

[0069] The failure rate of the switching transistor in the preset circuit is: F K1 =F K2 =40 FIT;

[0070] The preset circuit includes a first working state and a second working state;

[0071] When the preset circuit is in the first working state, the first switch is closed and the second switch is open;

[0072] When the preset circuit is in the second working state, both the first switch and the second switch are closed.

[0073] (1) When the first switch K1 is closed and the second switch K2 is open, the failure calculation of the insulation detection circuit is as follows:

[0074] P R1_1 =P R2_1 =F R1 / (F R1 +F R2 +0.9*F K1 +0.5*F K2 ) = 0.0215;

[0075] P K1_1 =0.9*F K1 / (F R1 +F R2 +0.9*F K1 +0.5*F K2 ) = 0.6152;

[0076] P K2_1 =0.5*F R2 / (F R1 +F R2 +0.9*F K1 +0.5*F K2 = 0.3418.

[0077] At this point, the total expected failure value of the preset circuit in its first operating state is:

[0078] F1 = F R1 *P R1_1 +F R1 *P R2_1 +0.9*F K1 *P K1_1 +0.5*F K2 *P K2_1 =29.03738 FIT.

[0079] (2) When both the first switch K1 and the second switch K2 are closed, the failure calculation of the insulation detection circuit is as follows:

[0080] P R1_2 =P R2_2 =P R3_2 =P R4_2 =F R1 / (F R1 +F R2 +FR3 +F R4 +0.9*F K1 +0.9*F K2 ) = 0.0164;

[0081] P K1_2 =P K2_2 =0.9*F K1 / (F R1 +F R2 +F R3 +F R4 +0.9*F K1 +0.9*F K2 = 0.4672.

[0082] At this point, the total expected failure value of the preset circuit in its second operating state is:

[0083] F2 = F R1 *P R1_2 +F R2 *P R2_2 +F R3 *P R3_2 +F R4 *P R4_2 +0.9*F K1 *P K1_2 +0.9*F K2 *P K2_2 =33

[0084] .721056FIT.

[0085] Reference Figure 1 and Figure 3 In one embodiment, replacing the first device with a second device based on the failure coefficient of the first device includes:

[0086] S310. Obtain various target failure scenarios corresponding to the failure coefficient of the target first device;

[0087] S320. Determine the second device to be replaced based on at least one of the target failure conditions remaining after removing one or more target failure conditions.

[0088] In this embodiment, the circuit failure rate is mainly composed of the number of devices, the self-failure rate, the failure mode and the circuit architecture. When calculating the expected failure value of the first device in the preset circuit, the target failure situation that has the main influence on the value of the failure coefficient is determined according to the failure coefficient corresponding to the target first device. These target failure situations are then removed, and the second device is determined from the pre-stored standard failure situations based on the remaining target failure situations.

[0089] Reference Figure 1 and Figure 4 In one embodiment, the first target device is an opto-MOSFET, and the second device is a relay. Determining the second device to be replaced based on the remaining multiple target failure conditions after removing one or more target failure conditions includes:

[0090] S321. If the first device is a MOS transistor, then the target failure condition of the optical MOS transistor is determined to include at least one of switching transistor drift and switching transistor open circuit.

[0091] S322. Determine that the target failure condition does not include either switch drift or switch open circuit, and identify the corresponding device as a relay, and designate the relay as the second device.

[0092] In this embodiment, for Figure 7 Optimize the circuit architecture, such as Figure 8 As shown. Since the coefficients for calculating the expected failure value of the optical MOS device are mainly affected by the optical MOS open circuit and the optical MOS parameter drift, these two main failure conditions are removed. Then, based on the remaining short circuit, the second device is determined from the pre-stored standard failure conditions, that is, the relay with only two failure conditions: short circuit and functional failure.

[0093] Based on the failure modes mentioned that relay short circuits and functional failures account for 20% and 80% respectively, it can be concluded that when the relay is in the open state, the target failure scenario only includes relay short circuits, and the failure rate of relay short circuits is 20%. Therefore, the failure coefficient in the expected failure value of the relay at this time is 0.2. When the relay is in the closed state, the target failure scenario only includes relay functional failures, and the failure rate of relay functional failures is 80%. Therefore, the failure coefficient in the expected failure value of the relay at this time is 0.8.

[0094] Specifically, (1) when the first relay K3 is closed and the second relay K4 is open, the failure calculation of the insulation detection circuit is as follows:

[0095] P R5_1 =P R6_1 =F R5 / (F R5 +F R6 +0.8*F K3 +0.2*F K4 );

[0096] P K3_1 =0.8*F K3 / (F R5 +F R6 +0.8*F K3 +0.2*F K4 );

[0097] P K4_1 =0.2*F K4 / (F R5 +F R6 +0.8*F K3 +0.2*F K4 ).

[0098] (2) When both the first relay K3 and the second relay K4 are closed, the failure calculation of the insulation detection circuit is as follows:

[0099] P R5_2 =P R6_2 =P R7_2 =F R5 / (F R5 +F R6 +F R7 +0.8*F K3 +0.8*F K4 ) = 0.2342;

[0100] P K3_2 =P K4_2 =0.8*F K3 / (F R5 +F R6 +F R7 +0.8*F K3 +0.8*F K4 ).

[0101] According to the above formula for calculating expected value, it can be seen that after replacing the optical MOSFET with a relay, the failure coefficient in the expected failure value of the switching device decreases. After the first switching transistor K1 is replaced with the first relay K3, under the same connection method, the failure coefficient in the expected failure value decreases from 0.9 to 0.8, which can significantly reduce the expected failure value of the switching device at this position.

[0102] Furthermore, the failure rate of the second device after replacement must be lower than that of the first device being replaced, and the failure coefficient of the second device under different connection states must also be lower than that of the first device being replaced.

[0103] Therefore, refer to Figure 1 and Figure 8 In one embodiment, after comparing multiple expected failure values ​​to determine the target first device to be modified in the preset circuit, the method further includes:

[0104] S400. Based on the failure rate of the first target device, replace the first device with a third device;

[0105] in,

[0106] The failure rate of the third device is lower than that of the first device.

[0107] Redesign the circuit based on the design direction given above, and recalculate the expected failure value of each component.

[0108] According to standard SN29500:

[0109] The failure rate of the resistors in the modified circuit is: F R5 =F R6 =F R7 =1.26 FIT;

[0110] The failure rate of the switching transistor in the modified circuit is: F K3 =F K4 =1FIT.

[0111] As can be seen, according to the device failure rate standard, the failure rate of relays is much lower than that of optical MOS. Therefore, the failure rate of relays is substituted into the above formula for expected failure value:

[0112] (1) When the first relay K3 is closed and the second relay K4 is open, the failure calculation of the insulation detection circuit is as follows:

[0113] P R5_1 =P R6_1 =F R5 / (F R5 +F R6 +0.8*F K3 +0.2*F K4 ) = 0.3580;

[0114] P K3_1 =0.8*F K3 / (F R5 +F R6 +0.8*F K3 +0.2*F K4 ) = 0.2272;

[0115] P K4_1 =0.2*F K4 / (F R5 +F R6 +0.8*F K3 +0.2*F K4 = 0.0568.

[0116] At this point, the total expected failure value of the preset circuit in its first operating state is:

[0117] F3 = F R5 *P R5_1 +F R6 *P R6_1+0.8*F K3 *P K3_1 +0.2*F K4 *P K4_1 =1.09528 FIT.

[0118] (2) When both the first relay K3 and the second relay K4 are closed, the failure calculation of the insulation detection circuit is as follows:

[0119] P R5_2 =P R6_2 =P R7_2 =F R5 / (F R5 +F R6 +F R7 +0.8*F K3 +0.8*F K4 ) = 0.2342;

[0120] P K3_2 =P K4_2 =0.9*F K3 / (F R5 +F R6 +F R7 +0.8*F K3 +0.8*F K4 ) = 0.1487;

[0121] At this point, the total expected failure value of the preset circuit in its first operating state is:

[0122] F4 = F R5 *P R5_2 +F R6 *P R6_2 +F R7 *P R7_2 +0.8*F K3 *P K3_2 +0.8*F K4 *P K4_2 =1.12320 FIT.

[0123] Based on the above calculation results, it can be concluded that, for a single device, P K1_1 >P K3_1 P K2_1 >P K4_1 P K1_2 >P K3_2 P K2_2 >P K4_2 Therefore, the expected failure value of the switching device at each position is significantly reduced. For the circuit as a whole, F1>F3, F2>F4, so the total expected failure value of the circuit is also significantly reduced, thereby improving the overall reliability of the circuit and reducing the possibility of circuit failure.

[0124] Reference Figure 1 and Figure 5 In one embodiment, replacing the first device with a second device based on the failure condition in the failure coefficient of the first device includes:

[0125] S330. Sort the failure percentages corresponding to the various target failure conditions of the target first device from largest to smallest to obtain a sorted queue.

[0126] S340. According to the order of the queue, the target failure situation corresponding to the failure ratio that is greater than the preset ranking is taken as the target failure situation to be modified.

[0127] S350. Based on the failure rate of the various target failure conditions after reducing one or more of the target failure conditions to be modified, determine the second device to be replaced.

[0128] In this embodiment, devices of the same type may have different manufacturing processes, resulting in varying failure rates. Therefore, after obtaining the expected failure value for each device, these expected failure values ​​are sorted from largest to smallest to determine which devices in the preset circuit have a greater impact on the circuit. These devices are then addressed by selecting devices with different manufacturing processes. Among devices with the same function, if one or more devices have a lower target failure rate than the target first device, they are used as the second device to replace the corresponding target first device. Specifically, for example... Figure 7 The insulation detection circuit, because P is in the first working state of the preset circuit, R1_1 =P R2_1 =0.0215, P K1_1 =0.6152, P K2_1 =0.3418, at this point the expected failure value ranking P K1_1 >P K2_1 >P R1_1 =P R2_1 When the preset circuit is in the second operating state, P R1_2 =P R2_2 =P R3_2 =P R4_2 =0.0164, P K1_2 =P K2_2 =0.4672, at this point the expected failure value ranking P K1_2 =P K2_2 >P R1_2 =P R2_2 =P R3_2 =P R4_2 .

[0129] Therefore, based on the failure expectation value ranking of the first device mentioned above, the first switch K1 is usually selected to be replaced. Similarly, in order to further reduce the total failure expectation value of the circuit, the first switch K1 and the second switch K2, which rank first in the second state, can be replaced at the same time.

[0130] It should be noted that the preset ranking can be related to the number of first components in the preset circuit and / or the number of components with a larger expected value. The more first components in the preset circuit, the higher the preset ranking can be, and thus the more first components can be replaced. Similarly, the more first components with a larger expected value, the higher the preset ranking can be.

[0131] Reference Figure 1 and Figure 6 In one embodiment, after determining the expected failure value of each first device based on its failure rate and corresponding failure coefficient, the method further includes:

[0132] S500. Based on the expected failure value, failure rate and corresponding failure coefficient of each of the first devices, obtain the total expected failure value of the preset circuit.

[0133] S600. Based on the relationship between the total expected failure value of the preset circuit and the expected threshold, determine whether to modify the preset circuit.

[0134] In this embodiment, since the circuit of the input device does not necessarily need to be modified and may have high reliability in some cases, it is necessary to first determine the total expected failure value of the circuit of the input device and pre-store the expected threshold in the device. The expected threshold is a critical value for classifying the total expected failure value. For example, when the total expected failure value is lower than the expected threshold, the circuit does not need to be modified.

[0135] The first total expected failure value of the optimized circuit is determined based on the failure rate, the expected failure value, and the failure coefficient corresponding to the plurality of first devices;

[0136] The second total expected failure value of the optimized circuit is determined based on the failure rate, expected failure value and failure coefficient of the plurality of first devices, and the failure rate, expected failure value and failure coefficient of at least one replaced second device.

[0137] Reference Figure 9 The present invention also proposes a circuit reliability processing device, comprising:

[0138] The parameter acquisition module 710 is used to acquire the failure rate of each first device in the preset circuit and its corresponding failure coefficient.

[0139] The processing module 720 is used to determine the expected failure value of each of the first devices based on the failure rate of each of the first devices and its corresponding failure coefficient.

[0140] The comparison module 730 is used to compare multiple failure expectation values ​​to determine the target first device to be modified in the preset circuit.

[0141] In this embodiment, the parameter acquisition module 710 may include a memory; the processing module 720 may include a main control chip, a processor, etc.; and the comparison module 730 may include a comparison circuit integrated in the main control chip.

[0142] The circuit reliability processing device can be connected to an industrial control computer, a home PC, etc. When processing circuit reliability, the circuit to be modified is input as a preset circuit into the processing device via an interactive device such as an industrial control computer or a home PC. This allows the processing device to identify each first device in the preset circuit. The parameter acquisition module 710, based on the identified device type, acquires the failure rate and corresponding failure coefficient of each first device in the preset circuit, and outputs the failure rate and corresponding failure coefficient of each first device to the processing module 720. The processing module 720 then determines the expected failure value of each first device based on its failure rate and corresponding failure coefficient. After determining the expected failure value of each first device through the processing module 720, the comparison module 730 compares these expected failure values ​​to determine the target first device in the preset circuit that needs modification.

[0143] The present invention also proposes a storage medium storing a computer program thereon. When the computer program is run on a computer, it causes the computer to execute the circuit reliability processing method described above. The specific structure of the circuit reliability processing method is as described in the above embodiments. Since this storage medium adopts all the technical solutions of all the above embodiments, it has at least all the beneficial effects brought about by the technical solutions of the above embodiments, which will not be described in detail here.

[0144] The present invention also proposes an electronic device, including a processor and a memory, wherein the memory has a computer program, and the processor executes the above-described circuit reliability processing method by calling the computer program. The specific structure of the circuit reliability processing method is as described in the above embodiments. Since the electronic device adopts all the technical solutions of all the above embodiments, it has at least all the beneficial effects brought about by the technical solutions of the above embodiments, which will not be elaborated here.

[0145] The embodiments of the present invention have been described in detail above. Specific examples have been used to illustrate the principles and implementation methods of the present invention. The description of the above embodiments is only for the purpose of helping to understand the method and core ideas of the present invention. At the same time, for those skilled in the art, there will be changes in the specific implementation methods and application scope based on the ideas of the present invention. Therefore, the content of this specification should not be construed as a limitation of the present invention.

Claims

1. A method for handling circuit reliability, characterized in that, The method for handling circuit reliability includes: Obtain the failure rate and corresponding failure coefficient of each first device in the preset circuit; According to the preset standard failure mode, obtain all failure situations existing in each of the first devices, and the failure percentage corresponding to each failure situation; Obtain the circuit connection method of each of the first devices in the preset circuit, and determine the various target failure conditions of the first device during operation based on the circuit connection method; The failure coefficient of the first device is determined by summing the failure rates of the various target failure scenarios corresponding to each first device. The failure status of the first device is determined by multiplying the failure rate of each first device by its corresponding failure coefficient. The failure status of the preset circuit is determined by summing the failure statuses of each first device in the preset circuit. The expected failure value of each first device is determined by the proportion of the failure status of each first device to the failure status of the preset circuit. Multiple expected failure values ​​are compared to determine a target first device in a preset circuit to be modified. Based on the failure coefficient of the target first device, the first device is replaced with a second device. The failure coefficient of the second device is less than that of the first device.

2. The circuit reliability processing method as described in claim 1, characterized in that, The step of replacing the first device with the second device based on the failure coefficient of the first device includes: Obtain the various failure scenarios of the target first device corresponding to its failure coefficient; The second device to be replaced is determined based on the multiple target failure conditions remaining after removing one or more target failure conditions.

3. The circuit reliability processing method as described in claim 2, characterized in that, The first target device is an opto-MOSFET, and the second device is a relay. The process of determining the second device to be replaced based on the remaining various target failure conditions after removing one or more of these failure conditions includes: If the first device is an optical MOS transistor, then the target failure condition of the optical MOS transistor is determined to include at least one of switching transistor drift and switching transistor open circuit; The target failure condition is determined to be a relay, which does not include either switch drift or switch open circuit, and the relay is designated as the second device.

4. The circuit reliability processing method as described in claim 1, characterized in that, The step of replacing the first device with the second device based on the failure status in the failure coefficient of the first device includes: The failure rates corresponding to the various target failure conditions of the target first device are sorted from largest to smallest to obtain a sorted queue. According to the order of the queue, the target failure cases corresponding to the failure percentages that are greater than the preset ranking are taken as the target failure cases to be modified. The second device to be replaced is determined based on the failure rate of the various target failure conditions after reducing one or more of the target failure conditions to be modified.

5. The circuit reliability processing method as described in claim 1, characterized in that, After comparing multiple expected failure values ​​to determine the target first device to be modified in the preset circuit, the method further includes: Based on the failure rate of the first target device, the first device is replaced with a third device; wherein... The failure rate of the third device is lower than that of the first device.

6. The circuit reliability processing method as described in claim 1, characterized in that, After determining the expected failure value of each first device based on its failure rate and corresponding failure coefficient, the method further includes: Based on the expected failure value, failure rate and corresponding failure coefficient of each of the first devices, the total expected failure value of the preset circuit is obtained; Based on the relationship between the total expected failure value of the preset circuit and the expected threshold, it is determined whether the preset circuit should be modified.

7. A circuit reliability processing device, characterized in that, include: The parameter acquisition module is used to acquire the failure rate of each first device in the preset circuit and its corresponding failure coefficient. According to the preset standard failure mode, obtain all failure situations existing in each of the first devices, and the failure percentage corresponding to each failure situation; Obtain the circuit connection method of each first device in the preset circuit, and determine multiple target failure conditions of the first device when it is working based on the circuit connection method; determine the failure coefficient of the first device based on the sum of the failure ratios of the multiple target failure conditions corresponding to each first device. The processing module is used to determine the failure status of the first device based on the product of the failure rate of each first device and its corresponding failure coefficient, determine the failure status of the preset circuit based on the sum of the failure status of each first device in the preset circuit, and determine the expected failure value of each first device based on the proportion of the failure status of each first device to the failure status of the preset circuit. The comparison module is used to compare multiple failure expectation values ​​to determine the target first device to be modified in the preset circuit.

8. A storage medium having a computer program stored thereon, characterized in that, When the computer program is run on a computer, it causes the computer to perform the circuit reliability processing method as described in any one of claims 1 to 6.

9. An electronic device comprising a processor and a memory, wherein the memory has a computer program, characterized in that, The processor invokes the computer program to execute the circuit reliability processing method as described in any one of claims 1 to 6.

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