A current-sharing silicon carbide power module

Abstract

The present invention relates to a current-sharing silicon carbide power module, comprising: a substrate, a plurality of first power chips, a plurality of second power chips, a plurality of first power terminals, a plurality of second power terminals and a plurality of third power terminals, the substrate comprising a first power conductive surface, a second power conductive surface and a third power conductive surface, the first power conductive surface, the third power conductive surface and the second power conductive surface are arranged at intervals, and the third power conductive surface and the second power conductive surface are tilted and staggered; a plurality of first power chips are distributed on the first power conductive surface; a plurality of second power chips are distributed in parallel on the second power conductive surface; a plurality of first power terminals are distributed on the first power conductive surface; a plurality of second power terminals are distributed on the second power conductive surface; a plurality of third power terminals are distributed on the third power conductive surface. The power module reduces the parasitic inductance of the power loop and improves the current-sharing degree between chips.

Description

Technical Field

[0001] The present invention belongs to the technical field of semiconductor power modules, and in particular relates to a current-sharing silicon carbide power module. Background Art

[0002] In the field of high-temperature and high-power power electronics applications, silicon carbide devices have attracted much attention from the industry due to their outstanding performance characteristics. Their high junction temperature characteristics ensure stability under extreme working conditions, their high rated power enables them to withstand larger loads, and their low switching losses help improve system efficiency. These advantages have made silicon carbide devices widely used in the fields of new energy power generation, smart grids, and transportation electrification, especially in medium and high power applications, where their application potential is even more significant.

[0003] In high-power power electronics applications, SiC power modules often use multi-chip parallel connection to meet the needs of high-power applications. However, SiC devices have higher switching speeds and are therefore more sensitive to parasitic parameters during the switching process. Existing module packaging technology is prone to causing serious voltage overshoot and electromagnetic interference problems when dealing with high-speed switching, resulting in increased switching losses and reduced device reliability. In addition, due to the mismatch of branch parameters within the module, the internal parallel chips may produce current imbalance, which in turn causes thermal failure of a single chip.

[0004] Therefore, the traditional silicon carbide power module has the problem of large parasitic inductance of the power circuit and mismatched parameters of the chip parallel branches, which leads to chip thermal mismatch. Summary of the invention

[0005] In order to solve the above problems existing in the prior art, the present invention provides a current-sharing silicon carbide power module. The technical problem to be solved by the present invention is achieved through the following technical solutions:

[0006] An embodiment of the present invention provides a current-sharing silicon carbide power module, comprising: a substrate, a plurality of first power chips, a plurality of second power chips, a plurality of first power terminals, a plurality of second power terminals and a plurality of third power terminals, wherein the substrate comprises a first power conductive surface, a second power conductive surface and a third power conductive surface, wherein:

[0007] The first power conductive surface, the third power conductive surface, and the second power conductive surface are arranged in sequence and spaced apart from each other, and the third power conductive surface and the second power conductive surface are staggered obliquely so that current paths at the staggered positions are parallel and staggered to each other and in opposite directions;

[0008] The plurality of first power chips are distributed in parallel on the first power conductive surface, and the source pads of the plurality of first power chips are connected to the second power conductive surface;

[0009] The plurality of second power chips are distributed in parallel on the second power conductive surface, the plurality of second power chips correspond to the plurality of first power chips one by one and are symmetrically distributed along the horizontal central axis of the silicon carbide power module, and the source pads of the plurality of second power chips are connected to the third power conductive surface;

[0010] The plurality of first power terminals are distributed on the first power conductive surface and on both sides of the plurality of first power chips; the plurality of second power terminals are distributed on the second power conductive surface and on both sides of the plurality of second power chips, and are arranged in parallel with the plurality of first power terminals in a one-to-one correspondence;

[0011] The plurality of third power terminals are distributed on the third power conductive surface, and are arranged in parallel with the plurality of first power terminals in a one-to-one correspondence and close to each other.

[0012] In one embodiment of the present invention, the plurality of first power chips include upper-bridge-arm tube chips, and the plurality of second power chips include lower-bridge-arm tube chips.

[0013] In one embodiment of the present invention, the number of the plurality of first power chips and the number of the plurality of second power chips are both 4;

[0014] The number of the first power terminals, the number of the second power terminals and the number of the third power terminals are all eight.

[0015] In one embodiment of the present invention, the substrate further includes a first driving conductive surface, a second driving conductive surface, a third driving conductive surface, and a fourth driving conductive surface, and the silicon carbide power module further includes a plurality of first driving terminals, a plurality of second driving terminals, a plurality of third driving terminals, and a plurality of fourth driving terminals, wherein:

[0016] The second driving conductive surface and the first driving conductive surface are sequentially arranged at intervals on one side of the first power conductive surface;

[0017] The source pads of the plurality of first power chips are connected to the second driving conductive surface by Kelvin source connection, and the gate pads are connected to the plurality of first driving conductive surfaces;

[0018] The plurality of first driving terminals are distributed on the second driving conductive surface, and the plurality of second driving terminals are distributed on the first driving conductive surface;

[0019] The third driving conductive surface and the fourth driving conductive surface are sequentially arranged at intervals on one side of the second power conductive surface;

[0020] The source pads of the plurality of second power chips are connected to the third driving conductive surface by Kelvin source connection, and the gate pads are connected to the plurality of fourth driving conductive surfaces;

[0021] The plurality of third driving terminals are distributed on the third driving conductive surface, and the plurality of fourth driving terminals are distributed on the fourth driving conductive surface.

[0022] In one embodiment of the present invention, the number of the first driving terminals, the number of the second driving terminals, the number of the third driving terminals and the number of the fourth driving terminals are all 2.

[0023] In one embodiment of the present invention, the substrate further comprises a plurality of first gate resistors connected to the conductive surfaces and a plurality of second gate resistors connected to the conductive surfaces, and the silicon carbide power module further comprises a plurality of first gate resistors and a plurality of second gate resistors, wherein:

[0024] The plurality of first gate resistor connecting conductive surfaces are distributed between the first driving conductive surface and the second driving conductive surface and are surrounded by the first driving conductive surface and the second driving conductive surface;

[0025] The plurality of first gate resistors are arranged one by one on the plurality of first gate resistor connecting conductive surfaces and the first driving conductive surface;

[0026] The gate pads of the plurality of first power chips are connected to the plurality of first gate resistor connection conductive surfaces in a one-to-one correspondence;

[0027] The plurality of second gate resistor connection conductive surfaces are distributed between the third driving conductive surface and the fourth driving conductive surface and are surrounded by the third driving conductive surface and the fourth driving conductive surface;

[0028] The plurality of second gate resistors are arranged one by one on the plurality of second gate resistor connecting conductive surfaces and the fourth driving conductive surface;

[0029] The gate pads of the plurality of second power chips are connected to the plurality of second gate resistor connection conductive surfaces in a one-to-one correspondence.

[0030] In one embodiment of the present invention, the number of the plurality of first gate resistors connected to the conductive surfaces and the number of the plurality of second gate resistors connected to the conductive surfaces are both 4;

[0031] The number of the plurality of first gate resistors and the number of the plurality of second gate resistors are both four.

[0032] In one embodiment of the present invention, the substrate further comprises a ceramic layer and a bottom conductive surface, wherein:

[0033] The ceramic layer and the bottom conductive surface are sequentially arranged on the lower surface of the plane formed by the first power conductive surface, the second power conductive surface, and the third power conductive surface.

[0034] In one embodiment of the present invention, a heat dissipation module is further included, wherein the heat dissipation module is arranged on the lower surface of the bottom conductive surface.

[0035] In one embodiment of the present invention, the heat dissipation module includes one or more of a heat sink and a heat dissipation substrate;

[0036] The radiator includes one or more of a natural air cooling radiator, a forced air cooling radiator, and a liquid cooling radiator;

[0037] The heat dissipation substrate includes one or more of a metal substrate and a ceramic substrate.

[0038] Compared with the prior art, the present invention has the following beneficial effects:

[0039] 1. The third power terminals and the first power terminals of the power module of the present invention are close to each other, and the third power conductive surface and the second power conductive surface are tilted and staggered, so that the current paths at the tilted and staggered positions are parallel and staggered to each other and in opposite directions, thereby achieving mutual inductance cancellation, greatly reducing the parasitic inductance of the power circuit of the module, thereby reducing the turn-off voltage overshoot and switching loss, greatly improving the performance of the module, and improving the reliability of the module.

[0040] 2. The power module of the present invention symmetrically designs a plurality of first power chips and a plurality of second power chips. Meanwhile, a plurality of first power terminals, a plurality of second power terminals, and a plurality of third power terminals are arranged in parallel one by one, balancing the number and distance of the terminals, thereby improving the current sharing degree between the parallel chips in the power module; the symmetrical design also effectively reduces the thermal coupling effect between the chips, further enhancing the power handling capability and thermal reliability of the module, and ensuring that the module maintains stability under high power load. BRIEF DESCRIPTION OF THE DRAWINGS

[0041] Figure 1 A three-dimensional structural breakdown diagram of a current-sharing silicon carbide power module provided in an embodiment of the present invention;

[0042] Figure 2a-2b A schematic top view of a current-sharing silicon carbide power module provided in an embodiment of the present invention;

[0043] Figure 3 A schematic front view of a current-sharing silicon carbide power module provided in an embodiment of the present invention;

[0044] Figure 4A schematic side view of a current-sharing silicon carbide power module provided in an embodiment of the present invention;

[0045] Figure 5 A schematic diagram of a commutation circuit of a current-sharing silicon carbide power module provided in an embodiment of the present invention;

[0046] Figure 6 A flow chart of the process for preparing a current-sharing silicon carbide power module provided in an embodiment of the present invention. DETAILED DESCRIPTION

[0047] The present invention is further described in detail below with reference to specific embodiments, but the embodiments of the present invention are not limited thereto.

[0048] Embodiment 1

[0049] The silicon carbide power module of this embodiment aims to provide a silicon carbide power module with low parasitic inductance and current sharing to solve the loss problem caused by the parasitic inductance of the module. At the same time, this embodiment focuses on ensuring the current sharing capability and heat dissipation performance of the module, thereby improving the reliability of the module.

[0050] See also Figure 1 , Figure 2a-2b , Figure 3 and Figure 4 , Figure 1 A three-dimensional structural breakdown diagram of a current-sharing silicon carbide power module provided in an embodiment of the present invention, Figure 2a-2b A schematic top view of a current-sharing silicon carbide power module provided in an embodiment of the present invention, Figure 3 A schematic front view of a current-sharing silicon carbide power module provided in an embodiment of the present invention, Figure 4 A schematic side view of a current-sharing silicon carbide power module provided in an embodiment of the present invention.

[0051] The current-balanced silicon carbide power module of this embodiment includes a substrate, a plurality of first power chips 1, a plurality of second power chips 5, a plurality of first power terminals 6, a plurality of second power terminals 8 and a plurality of third power terminals 7; the substrate includes a first power conductive surface 12, a second power conductive surface 14 and a third power conductive surface 13.

[0052] Among them, the first power conductive surface 12, the second power conductive surface 14, and the third power conductive surface 13 are arranged in sequence to form a plane, and the third power conductive surface 13 and the second power conductive surface 14 are staggered so that the current paths at the staggered positions are parallel to each other and staggered and in opposite directions; a plurality of first power chips 1 are distributed in parallel on the first power conductive surface 12, and the source pads of a plurality of first power chips 1 are connected to the second power conductive surface 14; a plurality of second power chips 5 are distributed in parallel on the second power conductive surface 14, and a plurality of second power chips 5 are connected to a plurality of first power chips 1 one by one Correspondingly and symmetrically distributed along the horizontal center axis of the silicon carbide power module, the source pads of the plurality of second power chips 5 are connected to the third power conductive surface 13; the plurality of first power terminals 6 are distributed on the first power conductive surface 12 and on both sides of the plurality of first power chips 1; the plurality of second power terminals 8 are distributed on the second power conductive surface 14 and on both sides of the plurality of second power chips 5, and are arranged in parallel with the plurality of first power terminals 6 in a one-to-one correspondence; the plurality of third power terminals 7 are distributed on the third power conductive surface 13, and are arranged in parallel with the plurality of first power terminals 6 in a one-to-one correspondence and are close to each other.

[0053] Specifically, the first power conductive surface 12, the second power conductive surface 14 and the third power conductive surface 13 can all be conductive copper surfaces. The first power conductive surface 12 is rectangular. The third power conductive surface 13 and the second power conductive surface 14 are arranged in a staggered zigzag shape. Several first power chips 1 include upper tube chips on the bridge arm, and several second power chips 5 include lower tube chips on the bridge arm; several first power chips 1 and several second power chips 5 both include silicon carbide power chips. Several first power chips 1 are soldered on the first power conductive surface 12 by solder; several second power chips 5 are soldered on the second power conductive surface 14 by solder. Several first power terminals 6 are DC+ terminals, several third power terminals 7 are DC- terminals, and several second power terminals 8 are AC terminals. The shapes of several first power terminals 6, several second power terminals 8 and several third power terminals 7 are all cylindrical. The source pads of several first power chips 1 are connected to the second power conductive surface 14 by bonding wires, and the source pads of several second power chips 5 are connected to the third power conductive surface 13 by bonding wires.

[0054] Specifically, the number of the first power chips 1 and the number of the second power chips 5 are 4. The four first power chips 1 are first power chips 1a, 1b, 1c, and 1d, respectively, and the four second power chips 5 are second power chips 5a, 5b, 5c, and 5d, respectively. The number of the first power terminals 6, the second power terminals 8, and the third power terminals 7 are 8; the eight first power terminals 6 are first power terminals 6a, 6b, 6c, 6d, 6e, 6f, 6g, and 6h, the eight second power terminals 8 are second power terminals 8a, 8b, 8c, 8d, 8e, 8f, 8g, and 8h, and the eight third power terminals 7 are third power terminals 7a, 7b, 7c, 7d, 7e, 7f, 7g, and 7h, respectively. The eight first power terminals 6, the eight second power terminals 8, and the eight third power terminals 7 are arranged along the horizontal central axis of the silicon carbide power module to form a straight line, thereby realizing the parallel arrangement of the power terminals.

[0055] Specifically, two first power terminals 6 are arranged between two adjacent first power chips 1, and one first power terminal 6 is arranged on the side of the outermost first power chip 1; two second power terminals 8 are arranged between two adjacent second power chips 5, and one second power terminal 8 is arranged on the side of the outermost second power chip 5; the third power terminal 7 corresponds to the first power terminal 6 and the second power terminal 8 one by one, and the first power terminal 6 is arranged on the side of the first power conductive surface 12 close to the third power conductive surface 13, and the third power terminal 7 is arranged on the side of the third power conductive surface 13 close to the first power conductive surface 12, so that the first power terminal 6 and the third power terminal are close to each other, and then the mutual inductance cancellation is achieved.

[0056] In the power module of this embodiment, several third power terminals and several first power terminals are close to each other, and the third power conductive surface and the second power conductive surface are tilted and staggered, so that the current paths at the tilted and staggered positions are parallel and staggered to each other and in opposite directions, that is, the current paths from the first power chip to the second power terminal and from the second power chip to the third power terminal are parallel and staggered to each other and in opposite directions, thereby realizing mutual inductance cancellation, greatly reducing the parasitic inductance of the power loop of the module, thereby reducing the turn-off voltage overshoot and switching loss, greatly improving the performance of the module, and improving the reliability of the module.

[0057] The power module of this embodiment has a symmetrical design for several first power chips and several second power chips. Meanwhile, several first power terminals, several second power terminals, and several third power terminals are arranged in parallel one by one, balancing the number and distance of the terminals, thereby improving the current sharing degree between the parallel chips in the power module. The symmetrical design also effectively reduces the thermal coupling effect between the chips, further enhancing the power handling capability and thermal reliability of the module, and ensuring that the module maintains stability under high power load.

[0058] In a specific embodiment, the substrate also includes a first driving conductive surface 15, a second driving conductive surface 16, a third driving conductive surface 17, and a fourth driving conductive surface 18, and the silicon carbide power module also includes a plurality of first driving terminals 3, a plurality of second driving terminals 4, a plurality of third driving terminals 10, and a plurality of fourth driving terminals 11.

[0059] Among them, the second drive conductive surface 16 and the first drive conductive surface 15 are arranged in sequence on one side of the first power conductive surface 12; the source pads of several first power chips 1 are connected to the second drive conductive surface 16 to realize Kelvin source connection, and the gate pads are connected to several first drive conductive surfaces 15; several first drive terminals 3 are distributed on the second drive conductive surface 16, and several second drive terminals 4 are distributed on the first drive conductive surface 15; the third drive conductive surface 17 and the fourth drive conductive surface 18 are arranged in sequence on one side of the second power conductive surface 14 to realize Kelvin source connection; the source pads of several second power chips 5 are connected to the third drive conductive surface 17 to realize Kelvin source connection, and the gate pads are connected to several fourth drive conductive surfaces 18; several third drive terminals 10 are distributed on the third drive conductive surface 17, and several fourth drive terminals 11 are distributed on the fourth drive conductive surface 18.

[0060] Specifically, the first driving conductive surface 15, the second driving conductive surface 16, the third driving conductive surface 17, and the fourth driving conductive surface 18 can all be conductive copper surfaces, and together with the first power conductive surface 12, the second power conductive surface 14, and the third power conductive surface 13, form a plane as a conductive surface of the substrate. The first driving conductive surface 15 and the second driving conductive surface 16 are located at the lower side of the power module, and the third driving conductive surface 17 and the fourth driving conductive surface 18 are located at the upper side of the power module. The source pads of the first power chips 1 are connected to the second driving conductive surface 16 through bonding wires to achieve Kelvin source connection, and the gate pads are connected to the first driving conductive surfaces 15 through bonding wires. The source pads of the second power chips 5 are connected to the third driving conductive surface 17 through bonding wires to achieve Kelvin source connection, and the gate pads are connected to the fourth driving conductive surfaces 18 through bonding wires. It can be understood that the second driving terminal 4 is a Kelvin source terminal, and the fourth driving terminal 11 is a Kelvin source terminal, that is, the second driving terminal 4 and the fourth driving terminal 11 are source terminals for realizing Kelvin source connection in the driving circuit.

[0061] Specifically, the shapes of the first drive terminals 3, the second drive terminals 4, the third drive terminals 10 and the fourth drive terminals 11 are all cylindrical. The number of the first drive terminals 3, the second drive terminals 4, the third drive terminals 10 and the fourth drive terminals 11 is 2; the two first drive terminals 3 are respectively the first drive terminals 3a and 3b, the two second drive terminals 4 are respectively the second drive terminals 4a and 4b, the two third drive terminals 10 are respectively 10a and 10b, and the two fourth drive terminals 11 are respectively 11a and 11b. Along the horizontal central axis of the silicon carbide power module, the two first drive terminals 3 and the two third drive terminals 10 are symmetrically designed, and the two second drive terminals 4 and the two fourth drive terminals 11 are symmetrically designed.

[0062] In a specific embodiment, the substrate further includes a plurality of first gate resistor connected conductive surfaces 19 and a plurality of second gate resistor connected conductive surfaces 20 , and the silicon carbide power module further includes a plurality of first gate resistors 2 and a plurality of second gate resistors 9 .

[0063] Among them, a number of first gate resistor connected conductive surfaces 19 are distributed between the first drive conductive surface 15 and the second drive conductive surface 16 and are surrounded by the first drive conductive surface 15 and the second drive conductive surface 16; a number of first gate resistors 2 are arranged one-to-one on the number of first gate resistor connected conductive surfaces 19 and the first drive conductive surface 15; the gate pads of a number of first power chips 1 are connected one-to-one with the number of first gate resistor connected conductive surfaces 19; a number of second gate resistor connected conductive surfaces 20 are distributed between the third drive conductive surface 17 and the fourth drive conductive surface 18 and are surrounded by the third drive conductive surface 17 and the fourth drive conductive surface 18; a number of second gate resistors 9 are arranged one-to-one on the number of second gate resistor connected conductive surfaces 20 and the fourth drive conductive surface 18; the gate pads of a number of second power chips 5 are connected one-to-one with the number of second gate resistor connected conductive surfaces 20.

[0064] Specifically, a plurality of first gate resistor connection conductive surfaces 19 and a plurality of second gate resistor connection conductive surfaces 20 are located on a plane formed by the first power conductive surface 12, the second power conductive surface 14 and the third power conductive surface 13. The plurality of first gate resistor connection conductive surfaces 19 and the plurality of second gate resistor connection conductive surfaces 20 can all be gate resistor connection copper surfaces, and the shapes are all block-shaped. The number of the plurality of first gate resistor connection conductive surfaces 19 and the plurality of second gate resistor connection conductive surfaces 20 are both 4; the 4 first gate resistor connection conductive surfaces 19 are respectively the first gate resistor connection conductive surfaces 19a, 19b, 19c, 19d, and the 4 second gate resistor connection conductive surfaces 20 are respectively the second gate resistor connection conductive surfaces 20a, 20b, 20c, 20d. Along the horizontal center axis of the silicon carbide power module, the 4 first gate resistor connection conductive surfaces 19 and the 4 second gate resistor connection conductive surfaces 20 are symmetrically designed.

[0065] Specifically, the number of the first gate resistors 2 and the number of the second gate resistors 9 are both 4; the 4 first gate resistors 2 are first gate resistors 2a, 2b, 2c, and 2d, respectively, and the 4 second gate resistors 9 are second gate resistors 9a, 9b, 9c, and 9d, respectively. Along the horizontal center axis of the silicon carbide power module, the 4 first gate resistors 2 and the 4 second gate resistors 9 are symmetrically designed.

[0066] Specifically, the gate pads of the first power chips 1 are connected to the first gate resistor connection conductive surfaces 19 in a one-to-one correspondence through bonding wires. The gate pads of the second power chips 5 are connected to the second gate resistor connection conductive surfaces 20 in a one-to-one correspondence through bonding wires.

[0067] In a specific embodiment, the substrate further includes a ceramic layer 21 and a bottom conductive surface 22 .

[0068] The ceramic layer 21 and the bottom conductive surface 22 are sequentially arranged on the lower surface of the plane formed by the first power conductive surface 12 , the second power conductive surface 14 , and the third power conductive surface 13 .

[0069] Specifically, the first power conductive surface 12, the second power conductive surface 14, the third power conductive surface 13, the first drive conductive surface 15, the second drive conductive surface 16, the third drive conductive surface 17, the fourth drive conductive surface 18, a plurality of first gate resistor connected conductive surfaces 19 and a plurality of second gate resistor connected conductive surfaces 20 together form a conductive surface, which together with the ceramic layer 21 and the bottom conductive surface 22 forms a direct copper clad ceramic substrate, i.e., a DCB substrate.

[0070] Specifically, the bottom conductive surface 22 may be a bottom copper surface. The material of the ceramic layer 21 may include AlN.

[0071] In a specific embodiment, the silicon carbide power module further includes a heat dissipation module, wherein the heat dissipation module is disposed on the lower surface of the bottom conductive surface 22 .

[0072] Specifically, the heat dissipation module includes one or more of a heat sink and a heat dissipation substrate. The heat sink includes one or more of a natural air cooling heat sink, a forced air cooling heat sink, and a liquid cooling heat sink. The heat dissipation substrate includes one or more of a metal substrate and a ceramic substrate.

[0073] For the above-mentioned current-sharing silicon carbide power module, when the first power chip 1 is turned on and the plurality of second power chips 5 are not turned on, the current path is: a plurality of first power terminals 6-a plurality of first power chips 1-a plurality of second power terminals 8; when the first power chip 1 is not turned on and the plurality of second power chips 5 are turned on, the current path is: a plurality of second power terminals 8-a plurality of second power chips 5-a plurality of third power terminals 7; when the first power chip 1 is turned on and the plurality of second power chips 5 are turned on, the current path is: a plurality of first power terminals 6-a plurality of first power chips 1-a plurality of second power terminals 8-a plurality of second power chips 5-a plurality of third power terminals 7, such as Figure 5 As shown, Figure 5 A schematic diagram of a commutation circuit of a current-sharing silicon carbide power module provided in an embodiment of the present invention.

[0074] In summary, the layout scheme of the low parasitic inductance silicon carbide power module with current sharing in this embodiment includes: silicon carbide chips, wire bonding wires, power terminals and direct copper-clad ceramic substrates. The silicon carbide chips are soldered on the DBC substrate by solder, and the electrical connection is achieved by bonding wires; the power terminals realize the electrical connection between the external circuit and the internal power loop, and the terminals that realize the same function are connected together through the upper copper layer of the DBC, and the lead-out terminals are used for external electrical signal connection. The gate resistor is welded between the chip and the gate drive terminal, and the gate drive circuit adopts Kelvin source connection. The bottom surface of the module is interconnected with the heat sink or heat dissipation substrate. Eight silicon carbide chips form eight half-bridge circuits, and the eight half-bridge circuits are connected in parallel to form a power module, and each half-bridge circuit is connected through a drive circuit.

[0075] This power module solves the problems of large parasitic inductance of the power circuit and mismatched parameters of the chip parallel branch in traditional power modules through multi-pin terminal and substrate layout design. Specifically, by adopting a new module substrate layout, the parasitic inductance of the power circuit is greatly reduced, thereby reducing the turn-off voltage overshoot and switching loss. The layout structure of this power module improves the consistency of external circuit parameters between parallel chips, reduces the unevenness of current distribution between parallel chips, and improves the current sharing capacity of parallel chips in the module. While not increasing the thermal resistance of the module, the reliability of the power module is improved.

[0076] The current-sharing silicon carbide power module of the embodiment of the present invention can be applied to electric vehicles, rail transportation and industrial control systems.

[0077] In this embodiment, a gate resistor is welded, and the size of the gate resistor can be adjusted. Ansys Q3D is used to perform electromagnetic simulation analysis on the power module of this embodiment. The simulated power loop inductance is 2.77nH, which is smaller than the inductance of the existing power module.

[0078] See also Figure 6 , Figure 6 A flow chart of a process for preparing a current-balanced silicon carbide power module provided by an embodiment of the present invention. The process for preparing a current-balanced silicon carbide power module comprises the following steps:

[0079] Step 1, apply lead-free solder paste on the surface of DBC substrate through steel mesh. The steel mesh here should have appropriate thickness to ensure successful connection of solder and prevent over-application of solder paste.

[0080] Step 2: Place the first power chip 1, the second power chip 2, the first gate resistor 3, and the second gate resistor 9 at designated positions on the DBC substrate by a chip placement machine.

[0081] Step 3: Place the whole into a customized graphite fixture and perform vacuum welding in a vacuum welding furnace at a temperature of 219°C. Use ultrasonic cleaning equipment to clean the residual flux on the surface of the module.

[0082] Step 4: Connect the gate pad and source pad of the power chip to the copper surface of the DBC substrate through a bonding interconnection device.

[0083] Step 5: Apply solder paste to the designated position of the DBC substrate through the steel mesh. The steel mesh is cut to a suitable thickness to ensure that the solder can complete the welding of the terminals and is not applied excessively.

[0084] Step 6: Fix the DBC substrate, resistors, power terminals and drive terminals by using a graphite fixture.

[0085] Step 7, perform vacuum welding in a vacuum welding furnace at a welding temperature of 180° C. and use ultrasonic cleaning equipment to clean residual flux on the surface of the module.

[0086] Step 8: Fill the module with insulating material in a vacuum potting furnace to provide insulation protection and improve the performance and stability of the module.

[0087] Furthermore, after the silicon carbide power module is prepared, the module may be subjected to an electrical characteristic test and a reliability test. The testing means are existing technologies and will not be described in detail in this embodiment.

[0088] In the present invention, the terms "first" and "second" are used for descriptive purposes only and cannot be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined as "first" and "second" may explicitly or implicitly include one or more of the features. In the description of the present invention, the meaning of "plurality" is two or more, unless otherwise clearly and specifically defined.

[0089] In the description of this specification, the description with reference to the terms "one embodiment", "some embodiments", "example", "specific example", or "some examples" etc. means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic representations of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described may be combined in any one or more embodiments or examples in a suitable manner. In addition, those skilled in the art may combine and combine the different embodiments or examples described in this specification.

[0090] Although the present application is described herein in conjunction with various embodiments, in the process of implementing the claimed application, those skilled in the art may understand and implement other variations of the disclosed embodiments by reviewing the drawings, the disclosure, and the appended claims. In the claims, the word "comprising" does not exclude other components or steps, and "a" or "an" does not exclude a plurality of components or steps.

[0091] The above contents are further detailed descriptions of the present invention in combination with specific preferred embodiments, and it cannot be determined that the specific implementation of the present invention is limited to these descriptions. For ordinary technicians in the technical field to which the present invention belongs, several simple deductions or substitutions can be made without departing from the concept of the present invention, which should be regarded as falling within the protection scope of the present invention.

Claims

1. A current-sharing silicon carbide power module, characterized in that: include: A substrate, a plurality of first power chips (1), a plurality of second power chips (5), a plurality of first power terminals (6), a plurality of second power terminals (8) and a plurality of third power terminals (7), wherein the substrate comprises a first power conductive surface (12), a second power conductive surface (14) and a third power conductive surface (13), wherein: The first power conductive surface (12), the third power conductive surface (13), and the second power conductive surface (14) are arranged in sequence and spaced apart, and the third power conductive surface (13) and the second power conductive surface (14) are staggered obliquely so that current paths at the staggered positions are parallel to each other and staggered in opposite directions; The plurality of first power chips (1) are distributed in parallel on the first power conductive surface (12), and the source pads of the plurality of first power chips (1) are connected to the second power conductive surface (14); The plurality of second power chips (5) are distributed in parallel on the second power conductive surface (14), the plurality of second power chips (5) correspond one-to-one to the plurality of first power chips (1) and are symmetrically distributed along the horizontal central axis of the silicon carbide power module, and the source pads of the plurality of second power chips (5) are connected to the third power conductive surface (13); The plurality of first power terminals (6) are distributed on the first power conductive surface (12) and on both sides of the plurality of first power chips (1); the plurality of second power terminals (8) are distributed on the second power conductive surface (14) and on both sides of the plurality of second power chips (5), and are arranged in parallel in a one-to-one correspondence with the plurality of first power terminals (6); The plurality of third power terminals (7) are distributed on the third power conductive surface (13), and are arranged in parallel and close to each other in a one-to-one correspondence with the plurality of first power terminals (6).

2. The current-sharing silicon carbide power module according to claim 1, characterized in that: The plurality of first power chips (1) include bridge arm upper tube chips, and the plurality of second power chips (5) include bridge arm lower tube chips.

3. The current-sharing silicon carbide power module according to claim 1, characterized in that: The number of the plurality of first power chips (1) and the number of the plurality of second power chips (5) are both 4; The number of the plurality of first power terminals (6), the number of the plurality of second power terminals (8) and the number of the plurality of third power terminals (7) are all eight.

4. The current-sharing silicon carbide power module according to claim 1, characterized in that: The substrate further comprises a first driving conductive surface (15), a second driving conductive surface (16), a third driving conductive surface (17), and a fourth driving conductive surface (18); the silicon carbide power module further comprises a plurality of first driving terminals (3), a plurality of second driving terminals (4), a plurality of third driving terminals (10), and a plurality of fourth driving terminals (11), wherein: The second driving conductive surface (16) and the first driving conductive surface (15) are sequentially arranged at intervals on one side of the first power conductive surface (12); A Kelvin source connection is achieved between the source pads of the plurality of first power chips (1) and the second driving conductive surface (16), and a gate pad is connected to the first driving conductive surface (15); The plurality of first driving terminals (3) are distributed on the second driving conductive surface (16), and the plurality of second driving terminals (4) are distributed on the first driving conductive surface (15); The third driving conductive surface (17) and the fourth driving conductive surface (18) are sequentially arranged at intervals on one side of the second power conductive surface (14); A Kelvin source connection is achieved between the source pads of the plurality of second power chips (5) and the third driving conductive surface (17), and a gate pad is connected to the fourth driving conductive surface (18); The plurality of third driving terminals (10) are distributed on the third driving conductive surface (17), and the plurality of fourth driving terminals (11) are distributed on the fourth driving conductive surface (18).

5. The current-sharing silicon carbide power module according to claim 4, characterized in that: The number of the plurality of first drive terminals (3), the number of the plurality of second drive terminals (4), the number of the plurality of third drive terminals (10) and the number of the plurality of fourth drive terminals (11) are all two.

6. The current-sharing silicon carbide power module according to claim 4, characterized in that: The substrate further comprises a plurality of first gate resistors connected to the conductive surfaces (19) and a plurality of second gate resistors connected to the conductive surfaces (20), and the silicon carbide power module further comprises a plurality of first gate resistors (2) and a plurality of second gate resistors (9), wherein: The plurality of first gate resistor connecting conductive surfaces (19) are distributed between the first driving conductive surface (15) and the second driving conductive surface (16) and are surrounded by the first driving conductive surface (15) and the second driving conductive surface (16); The plurality of first gate resistors (2) are arranged one by one on the plurality of first gate resistor connecting conductive surfaces (19) and the first driving conductive surface (15); The gate pads of the plurality of first power chips (1) are connected to the plurality of first gate resistor connection conductive surfaces (19) in a one-to-one correspondence, and the gate pad of each first power chip (1) is connected to the first driving conductive surface (15) via the first gate resistor connection conductive surface (19) and the first gate resistor (2); The plurality of second gate resistor connection conductive surfaces (20) are distributed between the third drive conductive surface (17) and the fourth drive conductive surface (18) and are surrounded by the third drive conductive surface (17) and the fourth drive conductive surface (18); The plurality of second gate resistors (9) are arranged one by one on the plurality of second gate resistor connecting conductive surfaces (20) and the fourth driving conductive surface (18); The gate pads of the plurality of second power chips (5) are connected to the plurality of second gate resistor connection conductive surfaces (20) in a one-to-one correspondence, and the gate pad of each second power chip (5) is connected to the fourth drive conductive surface (18) via the second gate resistor connection conductive surface (20) and the second gate resistor (9).

7. The current-sharing silicon carbide power module according to claim 6, characterized in that: The number of the plurality of first grid resistor connected conductive surfaces (19) and the number of the plurality of second grid resistor connected conductive surfaces (20) are both 4; The number of the plurality of first gate resistors (2) and the number of the plurality of second gate resistors (9) are both four.

8. The current-sharing silicon carbide power module according to claim 1, characterized in that: The substrate further comprises a ceramic layer (21) and a bottom conductive surface (22), wherein: The ceramic layer (21) and the bottom conductive surface (22) are sequentially arranged on the lower surface of a plane formed by the first power conductive surface (12), the second power conductive surface (14), and the third power conductive surface (13).

9. The current-sharing silicon carbide power module according to claim 8, characterized in that: It also includes a heat dissipation module, wherein the heat dissipation module is arranged on the lower surface of the bottom conductive surface (22).

10. The current-sharing silicon carbide power module according to claim 9, characterized in that: The heat dissipation module includes one or more of a heat sink and a heat dissipation substrate; The radiator includes one or more of a natural air cooling radiator, a forced air cooling radiator, and a liquid cooling radiator; The heat dissipation substrate includes one or more of a metal substrate and a ceramic substrate.

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