A real-time self-test circuit for radio frequency coaxial cables
By superimposing a self-test signal at the transmitting end of the RF coaxial cable and using FSK codeword closed-loop detection, the problems of not being able to perform real-time self-test and adding test cables in the existing technology are solved, and highly reliable real-time self-test is achieved.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- CASCO SIGNAL LTD
- Filing Date
- 2023-10-27
- Publication Date
- 2026-06-30
Smart Images

Figure CN117439676B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to a real-time self-test circuit for radio frequency coaxial cables. Background Technology
[0002] In the application of radio frequency (RF) cables in automotive control systems, the continuity of the RF cable and the tightness of the connector interface are crucial to the transmission of RF signals. Real-time self-testing of RF cables can meet the requirements of real-time testing without affecting normal operation. Furthermore, self-testing does not change the structure of the RF coaxial cable; that is, it does not add any test cables and remains the working RF coaxial cable.
[0003] Currently, common cable self-testing devices and methods have the following drawbacks: 1. Real-time self-testing is not possible; the working process and self-testing process are strictly separated. One method involves self-testing upon power-on, followed by normal operation after the self-test function is disabled; another method requires stopping normal operation, performing a self-test, and then resuming normal operation. 2. Self-testing places specific requirements on the cable, requiring a dedicated transmitting cable for the excitation source and a separate receiving cable, increasing cost and complexity. 3. The self-testing system design is relatively complex, with complex signal acquisition and analysis modules, limiting the reliability of the self-testing system itself.
[0004] The statements herein provide only background information in relation to this invention and do not necessarily constitute prior art. Summary of the Invention
[0005] The purpose of this invention is to provide a real-time self-test circuit for radio frequency coaxial cables, which does not require additional test cables, does not affect the existing working power supply and power supply, and is convenient to implement, highly identifiable and highly reliable.
[0006] To achieve the above objectives, the present invention provides a real-time self-test circuit for an RF coaxial cable, comprising:
[0007] Excitation source, used to output self-test signal to the transmitter of the RF coaxial cable;
[0008] A drive output module, whose input end is connected to the output end of the excitation source and whose output end is connected to the transmitter end of the RF coaxial cable, is used to amplify the self-test signal output by the excitation source and superimpose it onto the power signal of the transmitter end of the RF coaxial cable.
[0009] The self-test signal separation module has its input end connected to the receiving end of the radio frequency coaxial cable, and is used to separate the self-test signal and the power signal from the received signal.
[0010] A feedback circuit is used to generate frequency shift modulation (FSK) codewords with agreed-upon content, and couple the FSK codewords to the receiving end of the RF coaxial cable, and feed them back to the transmitting end of the RF coaxial cable.
[0011] The status judgment module is connected to the transmitter end of the RF coaxial cable. If the status judgment module fails to collect the agreed FSK codeword, it considers the transmission link to be abnormal.
[0012] The excitation source is an MCU chip. The IO pin of the MCU chip will generate a momentary first pulse P1. The amplitude of the first pulse P1 is the power supply amplitude of the MCU chip.
[0013] The drive output module includes three NPN transistors Q1, Q2, and Q5, and two PNP transistors Q3 and Q4;
[0014] The base of the first transistor Q1 is connected to the output terminal of the excitation source, the collector is connected to the power supply voltage, and the emitter is grounded;
[0015] The base of the second transistor Q2 is connected to the collector of the first transistor Q1, the collector is connected to the base of the fourth transistor Q4, and the emitter is grounded.
[0016] The base of the third transistor Q3 is connected to the collector of the first transistor Q1, the emitter is connected to the power supply voltage, and the collector is connected to the base of the fifth transistor Q5.
[0017] The base of the fourth transistor Q4 is connected to the collector of the second transistor Q2, the emitter is connected to the power supply voltage, and the collector outputs a power amplified signal.
[0018] The base of the fifth transistor Q5 is connected to the collector of the third transistor Q3, the collector outputs a power amplified signal, and the emitter is grounded;
[0019] When the input is low, the second transistor Q2 and the fourth transistor Q4 operate in a saturation switching state;
[0020] When the input is high, the first transistor Q1, the third transistor Q3, and the fifth transistor Q5 operate in a saturation switching state.
[0021] A first resistor R1 is connected in series between the base of the first transistor Q1 and the output terminal of the excitation source, a second resistor R2 is connected in series between the base and ground, and a third resistor R3 is connected in series between the collector and the power supply voltage, so as to enable the transistor to operate in a cutoff or saturated switching state.
[0022] A fourth resistor R4 is connected in series between the base of the second transistor Q2 and the collector of the first transistor Q1, and a fifth resistor R5 is connected in series between the base of the third transistor Q3 and the collector of the first transistor Q1, for separating the common-source output signal of the collector of the first transistor Q1.
[0023] A seventh resistor R7 is connected in series between the emitter of the third transistor Q3 and ground, and a diode D1 and a ninth resistor R9 are connected in series between the emitter of the third transistor Q3 and the power supply voltage, so as to enable the PNP transistor of the third transistor Q3 to operate in a switching state.
[0024] The self-test signal separation module includes a self-test signal separation circuit and a power signal separation circuit. The self-test signal separation circuit is used to separate the self-test signal from the received signal, and the power signal separation circuit is used to separate the power signal from the received signal.
[0025] The self-test signal separation circuit includes a voltage divider circuit and a Smith trigger U1. The voltage divider circuit includes a first voltage divider resistor R1 connected in series between the output terminal of the drive output module and the input terminal of the Smith trigger U1, and a second voltage divider resistor R2 with one end connected to the input terminal of the Smith trigger U1 and the other end grounded. The Smith trigger U1 is used to separate the self-test signal.
[0026] The power signal separation circuit includes a filter circuit and a power conversion module, and the filter circuit adopts an LC circuit.
[0027] The feedback circuit generates specific codewords through the digital circuit of the antenna module of the coaxial cable, and then generates an FSK signal through the oscillation circuit. The center frequency of the FSK signal is 4.2MHz, the low level signal 0 is implemented at 3.9MHz, and the high level signal 1 is implemented at 4.5MHz.
[0028] The state determination module includes: a filter circuit, a directional coupler, an amplitude and phase detection module, a comparator module, and a digital circuit.
[0029] The filtering circuit filters out the frequency of the transmitted signal and performs filtering, amplification, and shaping on the received signal.
[0030] The directional coupler couples the output voltage standing wave ratio (VSWR) parameter signal and sends it to the amplitude and phase detection module.
[0031] The amplitude and phase detection module detects the adaptation of the transmission link resistance and the impedance continuity by detecting the amplitude and phase of the voltage standing wave ratio (VSWR) parameter signal.
[0032] The comparator module is used to determine whether the characteristic performance of the cable is within the normal reception range;
[0033] The digital circuit determines whether the impedance result of the cable self-test is abnormal based on the output signal of the comparator module.
[0034] The filtering circuit uses a 27MHz filter constructed from a general-purpose LC filter.
[0035] The directional coupler is model SYDC-30-12HP.
[0036] The amplitude and phase detection module uses the AD8302 chip.
[0037] The comparator module includes a first comparator and a second comparator;
[0038] The first comparator is used to determine the amplitude of the impedance mismatch reflection coefficient. The threshold VMAG of the first comparator is set to 0.2V. If the amplitude of the voltage standing wave ratio (VSWR) parameter signal exceeds the threshold VMAG of the first comparator, the output of the first comparator will flip.
[0039] The second comparator is used to determine the phase of the impedance mismatch reflection coefficient. The threshold VPHS of the second comparator is set to 1V. If the phase of the voltage standing wave ratio (VSWR) parameter signal exceeds the threshold VPHS of the second comparator, the output of the second comparator will flip.
[0040] The digital circuit receives the output signal of the comparator module. If the output of at least one of the first comparator and the second comparator flips, the digital circuit will cut off the radio frequency transmission.
[0041] The present invention has the following beneficial effects:
[0042] 1. It does not affect the existing working power supply and power supply, and uses specific FSK codewords, so it will not affect the working radio frequency signal.
[0043] 2. The working RF coaxial cable will still be used, and no additional test cables will be added.
[0044] 3. The excitation source uses a DC power supply signal superimposed with a self-test signal, and is judged by the voltage standing wave ratio (VSWR) parameter at the transmitting end, which has strong recognition and is convenient to implement.
[0045] 4. The self-test signal is detected in real time through a closed loop using a single coaxial cable. On the one hand, it uses the FSK feedback codeword signal returned from the load end to the transmitter end, and on the other hand, it uses the voltage standing wave ratio parameter at the transmitter end to determine the load matching status. The self-test loop closes and converges, resulting in high reliability. Attached Figure Description
[0046] Figure 1This is a circuit block diagram of a real-time self-test circuit for an RF coaxial cable provided by the present invention.
[0047] Figure 2 yes Figure 1 A circuit diagram of the drive output module.
[0048] Figure 3 yes Figure 1 Circuit diagram of the self-test signal separation module.
[0049] Figure 4 yes Figure 1 Circuit diagram of the status judgment module. Detailed Implementation
[0050] The following is based on Figures 1-4 The preferred embodiments of the present invention will be described in detail below.
[0051] like Figure 1 As shown, the present invention provides a real-time self-test circuit for an RF coaxial cable, comprising:
[0052] Excitation source 1 is used to output a self-test signal to the transmitter of the RF coaxial cable 6; in this embodiment, the excitation source 1 is an MCU chip, and the IO pins of the MCU chip will generate the following... Figure 1 The first pulse P1 shown is the amplitude of the power supply amplitude of the MCU chip, for example, 3.3V. The first pulse P1 is used as a self-test signal. After passing through the drive output module 2, it is superimposed on the power supply signal at the transmitting end of the RF coaxial cable 6. The self-test signal will cause the voltage amplitude of the power supply signal to drop momentarily.
[0053] The drive output module 2 has its input end connected to the output end of the excitation source 1 and its output end connected to the transmitter end of the RF coaxial cable 6. It is used to amplify the self-test signal output by the excitation source 1 and superimpose it onto the power signal at the transmitter end of the RF coaxial cable 6. The drive output module 2 amplifies the signal with an amplitude of MCU power supply voltage (e.g., 3.3V) to the load operating voltage (e.g., 24V). This signal is used to directly drive the load through the RF coaxial cable 6. Therefore, power amplification is performed simultaneously with voltage amplitude amplification.
[0054] The self-test signal separation module 3 has its input end connected to the receiving end of the radio frequency coaxial cable 6, and is used to separate the self-test signal and the power signal from the received signal.
[0055] Feedback circuit 4 is used to generate FSK (frequency shift modulation) codewords with agreed content and couple the FSK codewords to the receiving end of the radio frequency coaxial cable 6, and feed them back to the transmitting end of the radio frequency coaxial cable 6; because the transmission distance of the radio frequency coaxial cable is relatively long, FSK signals are superimposed on the coaxial cable and fed back to the transmitting end through specific codewords of the FSK message;
[0056] The status judgment module 5, which is connected to the transmitter end of the RF coaxial cable 6, determines whether the agreed FSK codeword is collected, thereby determining the continuity of the cable connection link channel. If the agreed FSK codeword is not collected, the transmission link is considered abnormal.
[0057] In embodiments of the present invention, because the self-test signal needs to minimize its impact on the power supply, it is set to a detection pulse in the microsecond range. In a specific implementation, the drive output module 2 is implemented using multiple current-driven transistors, with the input and output being inverse logic. Figure 2 As shown, the drive output module 2 includes three NPN transistors Q1, Q2, and Q5 and two PNP transistors Q3 and Q4. The base of the first transistor Q1 is connected to the output terminal of the excitation source 1, the collector is connected to the power supply voltage, and the emitter is grounded. The base of the second transistor Q2 is connected to the collector of the first transistor Q1, the collector is connected to the base of the fourth transistor Q4, and the emitter is grounded. The base of the third transistor Q3 is connected to the collector of the first transistor Q1, the emitter is connected to the power supply voltage, and the collector is connected to the base of the fifth transistor Q5. The base of the fourth transistor Q4 is connected to the collector of the second transistor Q2, the emitter is connected to the power supply voltage, and the collector outputs a power amplified signal. The base of the fifth transistor Q5 is connected to the collector of the third transistor Q3, the collector outputs a power amplified signal, and the emitter is grounded. When the input is low, the second transistor Q2 and the fourth transistor Q4 operate in a saturated switching state; when the input is high, the first transistor Q1, the third transistor Q3, and the fifth transistor Q5 operate in a saturated switching state. Resistors R1 to R3 are matching resistors for the NPN transistor of the first transistor Q1, used to ensure the transistor operates in a cutoff or saturation switching state. Resistors R4 and R5 are base series resistors for the second transistor Q2 and the third transistor Q3, used to separate the common-source output signal of the first transistor Q1. Resistors R7 and R9 and diode D1 enable the PNP transistor of the third transistor Q3 to operate in a switching state. The fourth transistor Q4 and the fifth transistor Q5 are power transistors that amplify the output signal.
[0058] like Figure 3As shown, the self-test signal separation module 3 distinguishes and processes the received signal. The self-test signal separation module 3 includes a self-test signal separation circuit and a power signal separation circuit. The self-test signal separation circuit includes a voltage divider circuit and a Smith trigger U1. The voltage divider circuit includes a first voltage divider resistor R1 connected in series between the output terminal of the drive output module 2 and the input terminal of the Smith trigger U1, and a second voltage divider resistor R2 with one end connected to the input terminal of the Smith trigger U1 and the other end grounded. The power signal separation circuit includes a filter circuit and a power conversion module. The filter circuit adopts an LC circuit. For the self-test signal, the voltage is first divided by the first voltage divider resistor R1 and the second voltage divider resistor R2 in the voltage divider circuit. Then, the self-test signal is separated by the Smith trigger U1 to determine the current cable self-test requirements (the self-test signal is equivalent to a trigger signal, which is generated by one end of the cable; when this signal is received, it indicates that the cable connection is normal, and the signal will send the result back through a specific FSK code). For the power signal, the self-test signal is filtered out by the energy storage and decoupling capacitor C1 and the inductor L1 in the filter circuit, and the power signal is separated. Then, the amplitude of the power signal is converted to a normal amplitude by the power conversion module to supply power to the load end, so that the self-test signal does not affect the power supply.
[0059] In this embodiment, the feedback circuit 4 can generate specific codewords through the digital circuit of the antenna module of the coaxial cable, and then generate FSK signals through the oscillation circuit, that is, 0 represents one frequency point and 1 represents another frequency point. In specific implementation, the center frequency is 4.2MHz, 0 is implemented using 3.9MHz, and 1 is implemented using 4.5MHz. The agreed-upon FSK codewords can be pre-agreed fixed codewords, such as "0xA5A5".
[0060] In embodiments of the present invention, such as Figure 4As shown, the state judgment module 5 includes: a filter circuit (not shown in the figure), a directional coupler, an amplitude and phase detection module, a comparator module, and a digital circuit. The filter circuit filters out the transmitted signal frequency and performs filtering and signal amplification and shaping on the received signal (in this embodiment, a 27MHz filter composed of a general LC is used to filter out the transmitted 27MHz frequency signal); the directional coupler (model SYDC-30-12HP) couples out the voltage standing wave ratio (VSWR) parameter signal and sends it to the amplitude and phase detection module; the amplitude and phase detection module uses an AD8302 chip to detect the adaptation of the transmission link resistance and impedance continuity by detecting the amplitude and phase of the voltage standing wave ratio (VSWR) parameter signal. The comparator module includes two comparators used to determine whether the cable's characteristic performance is within the normal reception range. The first comparator determines the amplitude of the impedance mismatch reflection coefficient. Ideally, in a perfect match, this value should be 0V. The threshold VMAG of the first comparator is set to 0.2V. If the amplitude of the voltage standing wave ratio (VSWR) parameter signal exceeds the threshold VMAG of the first comparator, the output of the first comparator will flip. The second comparator determines the phase of the impedance mismatch reflection coefficient. Ideally, in a perfect match, this value should be close to 0.9V. The threshold VPHS of the second comparator is set to 1V. If the phase of the voltage standing wave ratio (VSWR) parameter signal exceeds the threshold VPHS of the second comparator, the output of the second comparator will flip. The digital circuit receives the output signal of the comparator module. If the output of at least one of the first and second comparators flips, it indicates that the impedance result of the cable self-test is abnormal, and the digital circuit will cut off the radio frequency transmission.
[0061] The present invention has the following beneficial effects:
[0062] 1. It does not affect the existing working power supply and power supply, and uses specific FSK codewords, so it will not affect the working radio frequency signal.
[0063] 2. The working RF coaxial cable will still be used, and no additional test cables will be added.
[0064] 3. The excitation source uses a DC power supply signal superimposed with a self-test signal, and is judged by the voltage standing wave ratio (VSWR) parameter at the transmitting end, which has strong recognition and is convenient to implement.
[0065] 4. The self-test signal is detected in real time through a closed loop using a single coaxial cable. On the one hand, it uses the FSK feedback codeword signal returned from the load end to the transmitter end, and on the other hand, it uses the voltage standing wave ratio parameter at the transmitter end to determine the load matching status. The self-test loop closes and converges, resulting in high reliability.
[0066] It should be noted that, in the embodiments of the present invention, the terms "center," "longitudinal," "lateral," "length," "width," "thickness," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," "clockwise," "counterclockwise," "axial," "radial," and "circumferential," etc., indicating the orientation or positional relationship, are based on the orientation or positional relationship shown in the accompanying drawings and are only for the convenience of describing the embodiments. They do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of the present invention. Furthermore, the terms "first," "second," and "third" are used for descriptive purposes only and should not be construed as indicating or implying relative importance.
[0067] In this invention, unless otherwise explicitly specified and limited, the terms "installation," "connection," "linking," and "fixing," etc., should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral part; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication of two components or the interaction between two components. Those skilled in the art can understand the specific meaning of the above terms in this invention according to the specific circumstances.
[0068] Although the present invention has been described in detail through the preferred embodiments above, it should be understood that the above description should not be considered as a limitation of the present invention. Various modifications and substitutions to the present invention will be apparent to those skilled in the art after reading the above description. Therefore, the scope of protection of the present invention should be defined by the appended claims.
Claims
1. A real-time self-test circuit for an RF coaxial cable, characterized in that, Include: Excitation source, used to output self-test signal to the transmitter of RF coaxial cable; A drive output module, whose input end is connected to the output end of the excitation source and whose output end is connected to the transmitter end of the RF coaxial cable, is used to amplify the self-test signal output by the excitation source and superimpose it onto the power signal of the transmitter end of the RF coaxial cable. The self-test signal separation module has its input end connected to the receiving end of the radio frequency coaxial cable, and is used to separate the self-test signal and the power signal from the received signal. A feedback circuit is used to generate frequency shift modulation (FSK) codewords with agreed-upon content, and couple the FSK codewords to the receiving end of the RF coaxial cable, and feed them back to the transmitting end of the RF coaxial cable. The status judgment module is connected to the transmitter end of the RF coaxial cable. If the status judgment module fails to collect the agreed FSK codeword, it considers the transmission link to be abnormal. The state determination module includes: a filter circuit, a directional coupler, an amplitude and phase detection module, a comparator module, and a digital circuit. The filtering circuit filters out the frequency of the transmitted signal and performs filtering, amplification, and shaping on the received signal. The directional coupler couples the output voltage standing wave ratio (VSWR) parameter signal and sends it to the amplitude and phase detection module. The amplitude and phase detection module detects the adaptation of the transmission link resistance and the impedance continuity by detecting the amplitude and phase of the voltage standing wave ratio (VSWR) parameter signal. The comparator module is used to determine whether the characteristic performance of the cable is within the normal reception range; The digital circuit determines whether the impedance result of the cable self-test is abnormal based on the output signal of the comparator module.
2. The real-time self-test circuit for the radio frequency coaxial cable as described in claim 1, characterized in that, The excitation source is an MCU chip, and the IO pin of the MCU chip will generate a momentary first pulse P1, the amplitude of which is the power supply amplitude of the MCU chip.
3. The real-time self-test circuit for the radio frequency coaxial cable as described in claim 1, characterized in that, The drive output module includes three NPN transistors Q1, Q2, and Q5, and two PNP transistors Q3 and Q4; The base of the first transistor Q1 is connected to the output terminal of the excitation source, the collector is connected to the power supply voltage, and the emitter is grounded. The base of the second transistor Q2 is connected to the collector of the first transistor Q1, the collector is connected to the base of the fourth transistor Q4, and the emitter is grounded. The base of the third transistor Q3 is connected to the collector of the first transistor Q1, the emitter is connected to the power supply voltage, and the collector is connected to the base of the fifth transistor Q5. The base of the fourth transistor Q4 is connected to the collector of the second transistor Q2, the emitter is connected to the power supply voltage, and the collector outputs a power amplified signal. The base of the fifth transistor Q5 is connected to the collector of the third transistor Q3. The collector outputs a power amplified signal, and the emitter is grounded. When the input is low, the second transistor Q2 and the fourth transistor Q4 operate in a saturation switching state; When the input is high, the first transistor Q1, the third transistor Q3, and the fifth transistor Q5 operate in a saturation switching state.
4. The real-time self-test circuit for the RF coaxial cable as described in claim 3, characterized in that, A first resistor R1 is connected in series between the base of the first transistor Q1 and the output terminal of the excitation source, a second resistor R2 is connected in series between the base and ground, and a third resistor R3 is connected in series between the collector and the power supply voltage, so as to enable the transistor to operate in a cutoff or saturated switching state.
5. The real-time self-test circuit for the radio frequency coaxial cable as described in claim 3, characterized in that, A fourth resistor R4 is connected in series between the base of the second transistor Q2 and the collector of the first transistor Q1, and a fifth resistor R5 is connected in series between the base of the third transistor Q3 and the collector of the first transistor Q1, for separating the common-source output signal of the collector of the first transistor Q1.
6. The real-time self-test circuit for the radio frequency coaxial cable as described in claim 3, characterized in that, A seventh resistor R7 is connected in series between the emitter of the third transistor Q3 and ground, and a diode D1 and a ninth resistor R9 are connected in series between the emitter of the third transistor Q3 and the power supply voltage, so as to enable the PNP transistor of the third transistor Q3 to operate in a switching state.
7. The real-time self-test circuit for the radio frequency coaxial cable as described in claim 1, characterized in that, The self-test signal separation module includes a self-test signal separation circuit and a power signal separation circuit. The self-test signal separation circuit is used to separate the self-test signal from the received signal, and the power signal separation circuit is used to separate the power signal from the received signal.
8. The real-time self-test circuit for the radio frequency coaxial cable as described in claim 7, characterized in that, The self-test signal separation circuit includes a voltage divider circuit and a Smith trigger U1. The voltage divider circuit includes a first voltage divider resistor connected in series between the output terminal of the drive output module and the input terminal of the Smith trigger U1, and a second voltage divider resistor with one end connected to the input terminal of the Smith trigger U1 and the other end grounded. The Smith trigger U1 is used to separate the self-test signal.
9. The real-time self-test circuit for the radio frequency coaxial cable as described in claim 7, characterized in that, The power signal separation circuit includes a filter circuit and a power conversion module, and the filter circuit adopts an LC circuit.
10. The real-time self-test circuit for the radio frequency coaxial cable as described in claim 1, characterized in that, The feedback circuit generates codewords through the digital circuit of the antenna module of the coaxial cable, and then generates an FSK signal through the oscillation circuit. The center frequency of the FSK signal is 4.2MHz, the low level signal 0 is implemented at 3.9MHz, and the high level signal 1 is implemented at 4.5MHz.
11. The real-time self-test circuit for the radio frequency coaxial cable as described in claim 1, characterized in that, The filtering circuit uses a 27MHz filter made of common LC.
12. The real-time self-test circuit for the radio frequency coaxial cable as described in claim 1, characterized in that, The directional coupler is model SYDC-30-12HP.
13. The real-time self-test circuit for the radio frequency coaxial cable as described in claim 1, characterized in that, The amplitude and phase detection module uses the AD8302 chip.
14. The real-time self-test circuit for the radio frequency coaxial cable as described in claim 1, characterized in that, The comparator module includes a first comparator and a second comparator; The first comparator is used to determine the amplitude of the impedance mismatch reflection coefficient. The threshold VMAG of the first comparator is set to 0.2V. If the amplitude of the voltage standing wave ratio (VSWR) parameter signal exceeds the threshold VMAG of the first comparator, the output of the first comparator will flip. The second comparator is used to determine the phase of the impedance mismatch reflection coefficient. The threshold VPHS of the second comparator is set to 1V. If the phase of the voltage standing wave ratio (VSWR) parameter signal exceeds the threshold VPHS of the second comparator, the output of the second comparator will flip.
15. The real-time self-test circuit for the radio frequency coaxial cable as described in claim 14, characterized in that, The digital circuit receives the output signal of the comparator module. If the output of at least one of the first comparator and the second comparator flips, the digital circuit will cut off the radio frequency transmission.