Communication system based on the DOCSIS protocol

By introducing multi-stage filtering paths and power amplifiers into the DOCSIS protocol communication system, the problem that existing protocols cannot meet the requirements of high network speeds is solved, and efficient transmission of uplink and downlink signals and signal integrity are achieved.

CN117014244BActive Publication Date: 2026-06-23NANNING FUGUI PRECISION IND CO LTD

Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
NANNING FUGUI PRECISION IND CO LTD
Filing Date
2022-04-27
Publication Date
2026-06-23

AI Technical Summary

Technical Problem

The existing DOCSIS 3.1/3.0/2.0 and DOCSIS 4.0 protocols cannot meet users' upstream/downstream network speed requirements in cable networks. In particular, although DOCSIS 4.0 has expanded upstream bandwidth, it is still insufficient to meet the current needs of users.

Method used

A communication system based on the DOCSIS protocol was designed. Through a server, coaxial cable, frequency divider, downlink, uplink and full-duplex communication paths, combined with multi-stage filtering paths and power amplifiers, the system realizes signal frequency division, separation and transmission, thereby improving the utilization rate of uplink and downlink bandwidth.

Benefits of technology

It achieves efficient transmission of uplink and downlink signals, improves the uplink and downlink transmission speed of the communication system, reduces signal attenuation and interference, and improves the signal-to-noise ratio.

✦ Generated by Eureka AI based on patent content.

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Abstract

A communication system based on DOCSIS protocol includes a server for sending signals and demodulating received signals; a coaxial cable for transmitting the signals sent and received by the server through a coaxial cable network; a frequency divider connected to the coaxial cable for dividing the signals sent by the server into downstream signals and full duplex signals; a downstream communication path for transmitting the downstream signals sent by the server to a first modem unit; an upstream communication path for transmitting upstream signals sent by a second modem unit to the server; a full duplex communication path for simultaneously transmitting the downstream signals divided by the frequency divider and the upstream signals sent by the second modem unit, and for separating the downstream signals from the full duplex signals and transmitting the downstream signals to the first modem unit, and for transmitting the upstream signals sent by the second modem unit to the server, realizing in-band multiplexing of upstream and downstream signals and improving the transmission speed of the upstream and downstream signals.
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Description

Technical Field

[0001] This invention relates to the field of signal transmission, and in particular to a communication system and antenna device based on the DOCSIS protocol. Background Technology

[0002] In the cable network market, as users' demands for upstream / downstream network speeds continue to grow, DOCSIS 3.1 / 3.0 / 2.0 can no longer meet their needs. DOCSIS 4.0 was developed to address this, expanding the upstream bandwidth from 204MHz to 684MHz to provide users with higher upstream / downstream speeds. However, this still cannot meet current user demands for network speed. Summary of the Invention

[0003] Therefore, it is necessary to provide a communication system based on the DOCSIS protocol to improve uplink / downlink speeds.

[0004] One embodiment of the present invention provides a communication system based on the DOCSIS protocol, comprising:

[0005] A server is used to send signals and demodulate received signals.

[0006] Coaxial cable, used to transmit signals sent and received by the server via a coaxial cable network;

[0007] A frequency divider, connected to the coaxial cable, is used to divide the signal emitted by the server into downlink signals and full-duplex signals.

[0008] A downlink communication path is used to transmit downlink signals sent by the server to the first modulation and demodulation unit;

[0009] An uplink communication path is used to transmit the uplink signal emitted by the second modulation and demodulation unit to the server;

[0010] The full-duplex communication path is used to simultaneously transmit the downlink signal divided by the frequency divider and the uplink signal emitted by the second modulation and demodulation unit, and is also used to separate the downlink signal from the full-duplex signal and transmit it to the first modulation and demodulation unit, and to transmit the uplink signal emitted by the second modulation and demodulation unit to the server.

[0011] Preferably, the bandwidth range of the downlink communication path is 684MHz to 1812MHz, including:

[0012] The first high-pass filter is electrically connected between the frequency divider and the first modulation and demodulation unit, and is used to filter out high-frequency downlink signals of 684MHz to 1812MHz.

[0013] Preferably, the bandwidth range of the uplink communication path is 5MHz to 85MHz, including:

[0014] A first power amplifier is electrically connected to the second modulation and demodulation unit and is used to adjust the power of the uplink signal emitted by the second modulation and demodulation unit.

[0015] The system-on-chip is electrically connected to the first power amplifier and is used to control the amplification factor of the first power amplifier.

[0016] The first low-pass filter is electrically connected between the first power amplifier and the frequency divider, and is used to filter out low-frequency uplink signals of 5MHz to 85MHz.

[0017] Preferably, the bandwidth range of the full-duplex communication path is 108MHz to 684MHz, and it includes a first-level filtering path, a second-level filtering path, and a third-level filtering path, wherein:

[0018] The primary filtering path includes:

[0019] The second low-pass filter is electrically connected to the frequency divider and is used to filter out downlink signals with a bandwidth of 108MHz to 684MHz.

[0020] The first synthesizer has its first input terminal electrically connected to the output terminal of the second low-pass filter, and is used to remove the uplink signal from the full-duplex signal leading to the first modulation and demodulation unit.

[0021] A first radio frequency switch has its common terminal electrically connected to the output terminal of the first synthesizer and its first terminal electrically connected to the first modulation and demodulation unit to transmit the downlink signal with a bandwidth of 108MHz to 684MHz to the first modulation and demodulation unit.

[0022] The first phase adjuster has its input terminal electrically connected to the second modulation and demodulation unit and is used to adjust the phase of the uplink signal emitted by the second modulation and demodulation unit.

[0023] The second power amplifier has its input terminal electrically connected to the output terminal of the first phase adjuster and its input terminal electrically connected to the second input terminal of the first synthesizer. It is used to adjust the power of the phase-adjusted signal and output a signal with the same power but opposite phase to the uplink signal emitted by the second modulation and demodulation unit.

[0024] The on-chip system is electrically connected to the second power amplifier and is used to control the amplification factor of the second power amplifier.

[0025] Preferably, the secondary filtering path includes:

[0026] The second low-pass filter, with its input terminal electrically connected to the frequency divider, is used to pass downlink signals with a bandwidth of 108MHz to 684MHz;

[0027] The first synthesizer has its first input terminal electrically connected to the output terminal of the second low-pass filter;

[0028] The common terminal of the first radio frequency switch is electrically connected to the output terminal of the first synthesizer;

[0029] The third low-pass filter has its input terminal electrically connected to the second terminal of the first RF switch and is used to pass downlink signals with a bandwidth of 108MHz to 492MHz.

[0030] The second synthesizer has its first input terminal electrically connected to the output terminal of the third low-pass filter;

[0031] The second RF switch has its common terminal electrically connected to the output terminal of the second synthesizer, and its first terminal electrically connected to the first modulation and demodulation unit to transmit the downlink signal with a bandwidth of 108MHz to 492MHz to the first modulation and demodulation unit.

[0032] The second phase adjuster has its input terminal electrically connected to the second modulation and demodulation unit and is used to adjust the phase of the uplink signal emitted by the second modulation and demodulation unit.

[0033] The third power amplifier has its input terminal electrically connected to the input terminal of the second phase adjuster and its output terminal electrically connected to the second input terminal of the second synthesizer. It is used to adjust the power of the signal after phase adjustment and output a signal with the same power but opposite phase to the uplink signal emitted by the second modulation and demodulation unit.

[0034] The on-chip system is electrically connected to the third power amplifier and is also used to control the amplification factor of the third power amplifier.

[0035] Preferably, the three-stage filtering path includes:

[0036] The second low-pass filter, with its input terminal electrically connected to the frequency divider, is used to filter out downlink signals with a bandwidth of 108MHz to 684MHz;

[0037] The first synthesizer has its first input terminal electrically connected to the output terminal of the second low-pass filter;

[0038] The common terminal of the first radio frequency switch is electrically connected to the output terminal of the first synthesizer;

[0039] The third low-pass filter has its input terminal electrically connected to the second terminal of the first RF switch, and is used to pass downlink signals with a bandwidth of 108MHz to 492MHz.

[0040] The first input terminal of the second synthesizer is electrically connected to the output terminal of the third low-pass filter;

[0041] The second radio frequency switch has its common terminal electrically connected to the output terminal of the second synthesizer;

[0042] The fourth low-pass filter has its input terminal electrically connected to the second terminal of the second RF switch;

[0043] The third synthesizer has its first input terminal electrically connected to the output terminal of the fourth low-pass filter, and its output terminal electrically connected to the first modem, so as to transmit the downlink signal with a bandwidth of 108MHz to 300MHz to the first modulation and demodulation unit.

[0044] The third phase adjuster, whose input is electrically connected to the second modulation and demodulation unit, is used to adjust the phase of the uplink signal emitted by the second modulation and demodulation unit;

[0045] The fourth power amplifier has its input terminal electrically connected to the output terminal of the third phase adjuster and its output terminal electrically connected to the second input terminal of the third synthesizer. It is used to adjust the power of the phase-adjusted signal and output a signal with the same power but opposite phase to the uplink signal emitted by the second modulation and demodulation unit.

[0046] The on-chip system is electrically connected to the fourth power amplifier and is also used to control the amplification factor of the fourth power amplifier.

[0047] Preferably, the second modulation and demodulation unit is also electrically connected to the common terminal of the frequency divider and the second low-pass filter to form an uplink sub-communication path, so as to transmit the uplink signal issued by the second modulation and demodulation unit to the server.

[0048] Preferably, when the communication protocol is DOCSIS 4.0:

[0049] When the bandwidth range of the downlink signal is a first bandwidth range: 108MHz to 300MHz, the common terminal of the first RF switch is connected to the second terminal, and the common terminal of the second RF switch is connected to the second terminal.

[0050] When the bandwidth range of the downlink signal is the second bandwidth range: 300M~492MHz, the common terminal of the first RF switch is connected to the second terminal, and the common terminal of the second RF switch is connected to the first terminal;

[0051] When the bandwidth range of the downlink signal is the third bandwidth range of 492MHz to 684MHz, the common terminal of the first RF switch is connected to the first terminal.

[0052] Preferably, when the communication protocol is DOCSIS 3.1 / 3.0 / 2.0:

[0053] The common terminal of the first RF switch is connected to the first terminal, and the second, third, and fourth power amplifiers have no signal output.

[0054] Preferably, the second modulation and demodulation unit is further configured to emit calibration signals for a first bandwidth range, a second bandwidth range, and a third bandwidth range;

[0055] When the second modulation and demodulation unit sends out a calibration signal of the first bandwidth range, the calibration signal reaches the first modulation and demodulation unit through the uplink sub-communication path and the three-level filtering path. The on-chip system adjusts the fourth power amplifier and the third phase adjuster so that the power obtained by the calibration signal of the first bandwidth range in the first modulation and demodulation unit is 0 dBmV.

[0056] When the second modulation and demodulation unit sends out a calibration signal of the second bandwidth range, the calibration signal reaches the first modulation and demodulation unit through the uplink sub-communication path and the second-level filtering path. The on-chip system adjusts the third power amplifier and the second phase adjuster so that the power obtained by the calibration signal of the second bandwidth range in the first modulation and demodulation unit is 0 dBmV.

[0057] When the second modulation and demodulation unit sends out the calibration signal of the third bandwidth range, the calibration signal reaches the first modulation and demodulation unit through the uplink sub-communication path and the first-level filtering path. The on-chip system adjusts the second power amplifier and the first phase adjuster so that the power obtained by the calibration signal of the third bandwidth range in the first modulation and demodulation unit is 0 dBmV.

[0058] Compared to existing technologies, the communication system based on the DOCSIS protocol provided in this invention transmits signals from a server and demodulates received signals; transmits the signals transmitted and received by the server via a coaxial cable; further, a frequency divider divides the signals transmitted by the server into downlink signals and full-duplex signals; further, the downlink signals transmitted by the server are transmitted to a first modem unit via a downlink communication path, and the uplink signals transmitted by a second modem unit are transmitted to the server via an uplink communication path; the full-duplex communication path is used to simultaneously transmit the downlink signals divided by the frequency divider and the uplink signals transmitted by the second modem unit, and is also used to separate the downlink signals from the full-duplex signals and transmit them to the first modem unit, and to transmit the uplink signals transmitted by the second modem unit to the server, thereby realizing in-band multiplexing of uplink and downlink and improving uplink and downlink transmission speed. Attached Figure Description

[0059] Figure 1 This is a schematic diagram of a module in one embodiment of the communication system based on the DOCSIS protocol of the present invention;

[0060] Figure 2 This is a schematic diagram of another embodiment of the communication system based on the DOCSIS protocol of the present invention.

[0061] Figure 3 This is a schematic diagram of the signal flow of the first-level filtering path and the uplink sub-communication path in the communication system based on the DOCSIS protocol of this invention.

[0062] Figure 4 The present invention provides a schematic diagram of the signal flow of the communication system based on the DOCSIS protocol, including the two-stage filtering path and the uplink sub-communication path.

[0063] Figure 5 The present invention provides a schematic diagram of the signal flow of the communication system based on the DOCSIS protocol, including a three-level filtering path and an uplink sub-communication path.

[0064] Explanation of main component symbols

[0065] Communication System Based on DOCSIS Protocol 1

[0066] Server 10

[0067] 20 coaxial cables

[0068] Frequency divider 30

[0069] Downlink communication path 40

[0070] Uplink communication path 50

[0071] Full-duplex communication path 60

[0072] First modulation and demodulation unit 70

[0073] Second modulation and demodulation unit 80

[0074] First high-pass filter HP1

[0075] First low-pass filter - Fourth low-pass filter LP1-LP4

[0076] First power amplifier - Fourth power amplifier PA1-PA4

[0077] First Synthesizer - Third Synthesizer SY1-SY3

[0078] First phase adjuster - Third phase adjuster PR1-PR3

[0079] System-on-a-Chip (SoC)

[0080] The following detailed description, in conjunction with the accompanying drawings, will further illustrate the present invention. Detailed Implementation

[0081] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs; the terminology used herein in the specification of the application is for the purpose of describing particular embodiments only and is not intended to limit the application; the terms "comprising" and "having," and any variations thereof, in the specification, claims, and foregoing drawings of this application are intended to cover non-exclusive inclusion. The terms "first," "second," etc., in the specification, claims, or foregoing drawings of this application are used to distinguish different objects, not to describe a particular order.

[0082] In this document, the term "implementation" means that a specific feature, structure, or characteristic described in connection with an implementation may be included in at least one implementation of this application. The appearance of this phrase in various places in the specification does not necessarily refer to the same implementation, nor is it a separate or alternative implementation mutually exclusive with other implementations. It will be explicitly and implicitly understood by those skilled in the art that the implementations described herein can be combined with other implementations.

[0083] See Figure 1 As shown, Figure 1This is a schematic diagram of a module of an embodiment of the communication system 1 based on the DOCSIS protocol of the present invention. In this embodiment, the communication system 1 based on the DOCSIS protocol is applicable to DOCSIS 3.1 / 3.0 / 2.0 and DOCSIS 4.0, and includes a server 10, a coaxial cable 20, a frequency divider 30, a downlink communication path 40, an uplink communication path 50, a full-duplex communication path 60, a first modem unit 70, and a second modem unit 80. Specifically, the server 10 is used to transmit signals and demodulate received signals. The server 10 can be, but is not limited to, a CMTS (Cable Modem Termination System) device. The coaxial cable 20 transmits the signals transmitted and received by the server 10 through a coaxial cable network. In this embodiment, the coaxial cable 20 can be a hybrid fiber coaxial cable (HFC). Frequency divider 30, connected to coaxial cable 20, is used to divide the signal emitted by server 10 into downlink and full-duplex signals; it also divides the signal into three transmission paths with different frequencies: downlink communication path 40, uplink communication path 50, and full-duplex communication path 60 to transmit signals at different frequencies. Downlink communication path 40 is used to transmit the downlink signal emitted by server 10 to the first modem 70. Uplink communication path 50 is used to transmit the uplink signal emitted by the second modem 80 to server 10. Full-duplex communication path 60 is used to simultaneously transmit the downlink signal divided by frequency divider 30 and the uplink signal emitted by the second modem 80, and also to separate the downlink signal from the full-duplex signal and transmit it to the first modem 70, and to transmit the uplink signal emitted by the second modem 80 to server 10.

[0084] In this embodiment, the bandwidth range of the downlink communication path 40 is 684MHz to 1812MHz. The downlink communication path 40 includes a first high-pass filter HP1, electrically connected between the frequency divider 30 and the first modulation / demodulation unit, used to filter out high-frequency downlink signals with a bandwidth range of 684MHz to 1812MHz, ensuring that the downlink signal emitted from the CMTS has no in-band attenuation within the 684MHz to 1812MHz band, reducing out-of-band parasitics, and lowering the signal-to-noise ratio during signal transmission. The bandwidth range of the uplink communication path 50 is 5MHz to 85MHz. The uplink communication path 50 includes a first power amplifier PA1, electrically connected to the second modulation / demodulation unit 80, used to adjust the power of the uplink signal emitted by the second modulation / demodulation unit. The system-on-chip (SoC), electrically connected to the first power amplifier PA1, is used to control the amplification factor of the first power amplifier PA1. The first low-pass filter LP1 is electrically connected between the first power amplifier PA1 and the frequency divider 30. It is used to filter out low-frequency uplink signals with a bandwidth range of 5MHz to 85MHz to ensure that the uplink signal emitted by the second modulation and demodulation unit 80 has no attenuation within the 5MHz to 85MHz band, reduce parasitic interference outside the band, and reduce the signal-to-noise ratio in signal transmission.

[0085] See Figure 2 As shown, Figure 2 This is a schematic diagram of another embodiment of the communication system 1 based on the DOCSIS protocol of the present invention. In this embodiment, the communication system 1 based on the DOCSIS protocol is applicable to DOCSIS 3.1 / 3.0 / 2.0 and DOCSIS 4.0, and includes a server 10, a coaxial cable 20, a frequency divider 30, a downlink communication path 40, an uplink communication path 50, a full-duplex communication path 60, a first modem unit 70, and a second modem unit 80. The working principles of the server 10, coaxial cable 20, frequency divider 30, downlink communication path 40, uplink communication path 50, first modem unit 70, and second modem unit 80 are similar to those in the above embodiment, and will not be described again here.

[0086] In this embodiment, the full-duplex communication path 60 performs signal separation on the full-duplex signal, extracting the downlink signal, and uses an in-band hierarchical (three-stage filtering path) filter design to reduce harmonic interference in each frequency band, ensuring signal integrity and reliability. Specifically, as shown... Figure 2 As shown, the full-duplex communication path 60 includes a first-stage filtering path 601, a second-stage filtering path 602, a third-stage filtering path 603, and an uplink sub-communication path 604. The bandwidth of the full-duplex communication path 60 ranges from 108MHz to 684MHz. The second modulation / demodulation unit 80 is electrically connected to the frequency divider 30 to form the uplink sub-communication path 604, so as to transmit the uplink signal emitted by the second modulation / demodulation unit 80 to the server 10.

[0087] Specifically, the first-stage filtering path 601 includes: a second low-pass filter LP2, electrically connected to the frequency divider 30, used to filter out downlink signals with a bandwidth of 108MHz to 684MHz; a first synthesizer SY1, with its first input terminal electrically connected to the output terminal of the second low-pass filter LP2, used to remove uplink signals from the full-duplex signals leading to the first modulation and demodulation unit 70; and a first radio frequency switch SW1, with its common terminal electrically connected to the output terminal of the first synthesizer SY1 and its first terminal electrically connected to the first modulation and demodulation unit 70, to transmit the downlink signals with a bandwidth of 108MHz to 684MHz to the first modulation and demodulation unit. 70; First phase adjuster PR1, with its input terminal electrically connected to the second modulation and demodulation unit 80, is used to adjust the phase of the uplink signal emitted by the second modulation and demodulation unit 80; Second power amplifier PA2, with its input terminal electrically connected to the output terminal of the first phase adjuster PR1 and its input terminal electrically connected to the second input terminal of the first synthesizer SY1, is used to adjust the power of the phase-adjusted signal and output a signal with the opposite phase and the same power as the uplink signal emitted by the second modulation and demodulation unit 80; System-on-a-Chip (SoC), electrically connected to the second power amplifier PA2, is used to control the amplification factor of the second power amplifier PA2.

[0088] Combined with appendix Figure 3 , attached Figure 3 This is a schematic diagram of the signal flow of the primary filtering path 601 and the uplink sub-communication path 604, as shown below. Figure 3 As shown, the full-duplex signal, after being divided by frequency divider 30, is transmitted to the first modulation and demodulation unit 70 via the second low-pass filter LP2, the first synthesizer SY1, and the first terminal of the first RF switch SW1. The uplink signal emitted by the second modulation and demodulation unit 80 is divided into two paths: one path is transmitted to the server 10 via the uplink sub-communication path 604, and the other path, after being adjusted by the first phase adjuster PR1 and the second power amplifier PA2, enters the first modulation and demodulation unit 70 via the first synthesizer SY1 and the first terminal of the first RF switch SW1.

[0089] The secondary filtering path 602 includes: a second low-pass filter LP2, with its input electrically connected to the frequency divider 30, for passing downlink signals with a bandwidth of 108MHz to 684MHz; a first synthesizer SY1, with its first input electrically connected to the output of the second low-pass filter LP2; the common terminal of the first RF switch SW1 electrically connected to the output of the first synthesizer SY1; a third low-pass filter LP3, with its input electrically connected to the second terminal of the first RF switch SW1, for passing downlink signals with a bandwidth of 108MHz to 492MHz; a second synthesizer SY2, with its first input electrically connected to the output of the third low-pass filter LP3; and a second RF switch SW2, with its common terminal electrically connected to the output of the second synthesizer SY2, and the first terminal of the second RF switch SW2... A first modem 70 is electrically connected to transmit the downlink signal with a bandwidth of 108MHz to 492MHz to the first modem 70; a second phase adjuster PR2, with its input terminal electrically connected to the second modem 80, is used to adjust the phase of the uplink signal emitted by the second modem 80; a third power amplifier PA3, with its input terminal electrically connected to the input terminal of the second phase adjuster PR2 and its output terminal electrically connected to the second input terminal of the second synthesizer SY2, is used to adjust the power of the phase-adjusted signal and output a signal with the opposite phase and the same power as the uplink signal emitted by the second modem 80; and a system-on-chip (SoC), electrically connected to the third power amplifier PA3, is also used to control the amplification factor of the third power amplifier PA3.

[0090] Combined with appendix Figure 4 , attached Figure 4 This is a schematic diagram of the signal flow of the secondary filtering path 602 and the uplink sub-communication path 604, as shown below. Figure 4 As shown, the full-duplex signal, after being divided by frequency divider 30, is transmitted to the first modulation and demodulation unit 70 via the second low-pass filter LP2, the first synthesizer SY1, the second terminal of the first RF switch SW1, the third low-pass filter LP3, the second synthesizer SY2, and the first terminal of the second RF switch SW2. At this time, there is no signal input at the second input terminal of the first synthesizer SY1, and the signals at the first input and output terminals of the first synthesizer SY1 are the same, with no signal processing. The uplink signal emitted by the second modulation and demodulation unit 80 is divided into two paths. One path is transmitted to the server 10 via the uplink sub-communication path 604, and the other path, after being adjusted by the second phase adjuster PR2 and the third power amplifier PA3, enters the first modulation and demodulation unit 70 via the second synthesizer SY2 and the first terminal of the second RF switch SW1.

[0091] The three-stage filtering path 603 includes: a second low-pass filter LP2, with its input electrically connected to the frequency divider 30, used to filter out downlink signals with a bandwidth of 108MHz to 684MHz; a first synthesizer SY1, with its first input electrically connected to the output of the second low-pass filter LP2; a first RF switch SW1, with its common terminal electrically connected to the output of the first synthesizer SY1; a third low-pass filter LP3, with its input electrically connected to the second terminal of the first RF switch SW1, used to pass downlink signals with a bandwidth of 108MHz to 492MHz; a second synthesizer SY2, with its first input electrically connected to the output of the third low-pass filter LP3; a second RF switch SW2, with its common terminal electrically connected to the output of the second synthesizer SY2; a fourth low-pass filter LP4, with its input electrically connected to the second terminal of the second RF switch SW2; and a third synthesizer SY3, with its first input electrically connected to the second terminal of the second RF switch SW2; and a third low-pass filter LP4, with its first ... RF switch SY3, with its first input electrically connected to the second terminal of the second RF switch SW2; and a third RF switch SY3, with its first input electrically connected to the second terminal of the second RF switch SW2; and a third RF switch SY3, with its first input electrically connected to the second terminal of the second RF switch SW2; and a third RF switch SY3, with its first input electrically connected to the third RF switch SW2; and a third RF switch SY3, with its first input electrically connected to the third The output of the fourth low-pass filter LP4 is electrically connected to the output of the third synthesizer SY3, which is electrically connected to the first modem 70 to transmit the downlink signal with a bandwidth of 108MHz to 300MHz to the first modem 70; the input of the third phase adjuster PR3 is electrically connected to the second modem 80 to adjust the phase of the uplink signal emitted by the second modem 80; the input of the fourth power amplifier PA4 is electrically connected to the output of the third phase adjuster PR3, and the output is electrically connected to the second input of the third synthesizer SY3 to adjust the power of the phase-adjusted signal and output a signal with the opposite phase and the same power as the uplink signal emitted by the second modem 80; the system-on-chip (SoC) is electrically connected to the fourth power amplifier PA4 and is also used to control the amplification factor of the fourth power amplifier PA4.

[0092] Combined with appendix Figure 5 , attached Figure 5 This is a schematic diagram of the signal flow of the three-stage filtering path 603 and the uplink sub-communication path 604, as shown below. Figure 5 As shown, the full-duplex signal, after being divided by frequency divider 30, is transmitted to the first modulation and demodulation unit 70 via the second low-pass filter LP2, the first synthesizer SY1, the second terminal of the first RF switch SW1, the third low-pass filter LP3, the second synthesizer SY2, the second terminal of the second RF switch SW2, the fourth low-pass filter LP4, and the third synthesizer SY3. At this time, there is no signal input at the second input terminal of the second synthesizer SY2, and the signals at the first input and output terminals of the second synthesizer SY2 are the same, with no signal processing. The uplink signal emitted by the second modulation and demodulation unit 80 is divided into two paths. One path is transmitted to the server 10 via the uplink sub-communication path 604, and the other path is regulated by the third phase adjuster PR3 and the fourth power amplifier PA4 before entering the first modulation and demodulation unit 70 via the third synthesizer SY3. This achieves multiplexing of uplink and downlink within a bandwidth of 108-684MHz, improving the uplink and downlink transmission speed.

[0093] The communication system 1 based on the DOCSIS protocol provided by this invention is applicable to DOCSIS 3.1 / 3.0 / 2.0 and DOCSIS 4.0. When the communication protocol is DOCSIS 3.1 / 3.0 / 2.0, the common terminal of the first RF switch SW1 is connected to the first terminal, and the second, third, and fourth power amplifiers have no signal output. When the communication protocol is DOCSIS 4.0, when the bandwidth range of the downlink signal is the first bandwidth range: 108MHz to 300MHz, the common terminal of the first RF switch SW1 is connected to the second terminal, and the common terminal of the second RF switch SW2 is connected to the second terminal; when the bandwidth range of the downlink signal is the second bandwidth range: 300MHz to 492MHz, the common terminal of the first RF switch SW1 is connected to the second terminal, and the common terminal of the second RF switch SW2 is connected to the first terminal; when the bandwidth range of the downlink signal is the third bandwidth range: 492MHz to 684MHz, the common terminal of the first RF switch SW1 is connected to the first terminal.

[0094] During signal transmission, signal loss occurs along the transmission path, necessitating compensation for the damaged signal. Specifically, the second modulation / demodulation unit 80 is also used to emit calibration signals within a first bandwidth range, a second bandwidth range, and a third bandwidth range. When the second modulation / demodulation unit 80 emits a calibration signal within the first bandwidth range, the calibration signal reaches the first modulation / demodulation unit 70 via the uplink sub-communication path 604 and the three-stage filtering path 603. The system-on-chip (SoC) adjusts the fourth power amplifier PA4 and the third phase adjuster PR3 so that the calibration signal within the first bandwidth range receives a power of 0 dBmV in the first modulation / demodulation unit 70. The SoC also records the relevant parameters of the fourth power amplifier PA4 and the third phase adjuster PR3 at this time.

[0095] When the second modulation and demodulation unit 80 sends a calibration signal with a second bandwidth range, the calibration signal reaches the first modulation and demodulation unit through the uplink sub-communication path 604 and the secondary filter path 602. The system-on-chip (SoC) adjusts the third power amplifier PA3 and the second phase adjuster PR2 so that the power obtained by the calibration signal with the second bandwidth range in the first modulation and demodulation unit 70 is 0 dBmV. The SoC is also used to record the relevant parameters of the third power amplifier PA3 and the second phase adjuster PR2 at this time.

[0096] When the second modulation and demodulation unit 80 sends out the calibration signal of the third bandwidth range, the calibration signal reaches the first modulation and demodulation unit 70 through the uplink sub-communication path 604 and the first-level filter path 601. The system-on-chip (SoC) adjusts the second power amplifier PA2 and the first phase adjuster PR1 so that the power obtained by the calibration signal of the third bandwidth range in the first modulation and demodulation unit 70 is 0 dBmV. The SoC is also used to record the relevant parameters of the second power amplifier PA2 and the first phase adjuster PR1 at this time.

[0097] Compared to existing technologies, the communication system based on the DOCSIS protocol provided in this invention transmits signals from a server and demodulates received signals; transmits the signals transmitted and received by the server via a coaxial cable; further, a frequency divider divides the signals transmitted by the server into downlink signals and full-duplex signals; further, the downlink signals transmitted by the server are transmitted to a first modem unit via a downlink communication path, and the uplink signals transmitted by a second modem unit are transmitted to the server via an uplink communication path; the full-duplex communication path is used to simultaneously transmit the downlink signals divided by the frequency divider and the uplink signals transmitted by the second modem unit, and is also used to separate the downlink signals from the full-duplex signals and transmit them to the first modem unit, and to transmit the uplink signals transmitted by the second modem unit to the server, thereby realizing in-band multiplexing of uplink and downlink and improving uplink and downlink transmission speed.

[0098] Those skilled in the art should recognize that the above embodiments are merely illustrative of the present invention and are not intended to limit the present invention. Any appropriate changes and modifications made to the above embodiments within the essential spirit and scope of the present invention fall within the scope of protection claimed by the present invention.

Claims

1. A communication system based on the DOCSIS protocol, characterized in that, include: A server is used to send signals and demodulate received signals. Coaxial cable, used to transmit signals sent and received by the server via a coaxial cable network; A frequency divider, connected to the coaxial cable, is used to divide the signal emitted by the server into downlink signals and full-duplex signals. A downlink communication path is used to transmit downlink signals sent by the server to the first modulation and demodulation unit; An uplink communication path is used to transmit the uplink signal emitted by the second modulation and demodulation unit to the server; A full-duplex communication path is used to simultaneously transmit the downlink signal divided by the frequency divider and the uplink signal emitted by the second modulation and demodulation unit. It is also used to separate the downlink signal from the full-duplex signal and transmit it to the first modulation and demodulation unit, and to transmit the uplink signal emitted by the second modulation and demodulation unit to the server. The downlink communication path, uplink communication path, and full-duplex communication path transmit signals at different frequencies. The bandwidth range of the full-duplex communication path is 108MHz~684MHz, and it includes a first-level filtering path, a second-level filtering path, and a third-level filtering path, wherein: The primary filtering path includes: The second low-pass filter is electrically connected to the frequency divider and is used to filter out downlink signals with a bandwidth of 108MHz to 684MHz. The first synthesizer has its first input terminal electrically connected to the output terminal of the second low-pass filter, and is used to remove the uplink signal from the full-duplex signal leading to the first modulation and demodulation unit. The first radio frequency switch has its common terminal electrically connected to the output terminal of the first synthesizer and its first terminal electrically connected to the first modulation and demodulation unit to transmit the downlink signal with a bandwidth of 108MHz~684MHz to the first modulation and demodulation unit. The first phase adjuster has its input terminal electrically connected to the second modulation and demodulation unit and is used to adjust the phase of the uplink signal emitted by the second modulation and demodulation unit. The second power amplifier has its input terminal electrically connected to the output terminal of the first phase adjuster and its input terminal electrically connected to the second input terminal of the first synthesizer. It is used to adjust the power of the phase-adjusted signal and output a signal with the same power but opposite phase to the uplink signal emitted by the second modulation and demodulation unit. The on-chip system is electrically connected to the second power amplifier and is used to control the amplification factor of the second power amplifier.

2. The communication system as described in claim 1, characterized in that, The bandwidth range of the downlink communication path is 684MHz~1812MHz, including: The first high-pass filter is electrically connected between the frequency divider and the first modulation and demodulation unit, and is used to filter out high-frequency downlink signals of 684MHz~1812MHz.

3. The communication system as described in claim 1, characterized in that, The bandwidth range of the uplink communication path is 5MHz to 85MHz, including: A first power amplifier is electrically connected to the second modulation and demodulation unit and is used to adjust the power of the uplink signal emitted by the second modulation and demodulation unit. The system-on-chip is electrically connected to the first power amplifier and is used to control the amplification factor of the first power amplifier; The first low-pass filter is electrically connected between the first power amplifier and the frequency divider, and is used to filter out low-frequency uplink signals of 5MHz to 85MHz.

4. The communication system as described in claim 1, characterized in that, The secondary filtering path includes: The second low-pass filter, with its input terminal electrically connected to the frequency divider, is used to pass downlink signals with a bandwidth of 108MHz to 684MHz; The first synthesizer has its first input terminal electrically connected to the output terminal of the second low-pass filter; The common terminal of the first radio frequency switch is electrically connected to the output terminal of the first synthesizer; The third low-pass filter has its input terminal electrically connected to the second terminal of the first RF switch and is used to pass downlink signals with a bandwidth of 108MHz~492MHz. The second synthesizer has its first input terminal electrically connected to the output terminal of the third low-pass filter; The second RF switch has its common terminal electrically connected to the output terminal of the second synthesizer, and its first terminal electrically connected to the first modulation and demodulation unit to transmit the downlink signal with a bandwidth of 108MHz~492MHz to the first modulation and demodulation unit. The second phase adjuster has its input terminal electrically connected to the second modulation and demodulation unit and is used to adjust the phase of the uplink signal emitted by the second modulation and demodulation unit. The third power amplifier has its input terminal electrically connected to the input terminal of the second phase adjuster and its output terminal electrically connected to the second input terminal of the second synthesizer. It is used to adjust the power of the signal after phase adjustment and output a signal with the same power but opposite phase to the uplink signal emitted by the second modulation and demodulation unit. The on-chip system is electrically connected to the third power amplifier and is also used to control the amplification factor of the third power amplifier.

5. The communication system as described in claim 4, characterized in that, The three-stage filtering path includes: The second low-pass filter, with its input terminal electrically connected to the frequency divider, is used to filter out downlink signals with a bandwidth of 108MHz to 684MHz; The first synthesizer has its first input terminal electrically connected to the output terminal of the second low-pass filter; The common terminal of the first radio frequency switch is electrically connected to the output terminal of the first synthesizer; The third low-pass filter has its input terminal electrically connected to the second terminal of the first RF switch, and is used to pass downlink signals with a bandwidth of 108MHz~492MHz. The first input terminal of the second synthesizer is electrically connected to the output terminal of the third low-pass filter; The second RF switch has its common terminal electrically connected to the output terminal of the second synthesizer; The fourth low-pass filter has its input terminal electrically connected to the second terminal of the second RF switch; The third synthesizer has its first input terminal electrically connected to the output terminal of the fourth low-pass filter, and its output terminal electrically connected to the first modem, so as to transmit the downlink signal with a bandwidth of 108MHz~300MHz to the first modulation and demodulation unit. The third phase adjuster, whose input is electrically connected to the second modulation and demodulation unit, is used to adjust the phase of the uplink signal emitted by the second modulation and demodulation unit; The fourth power amplifier has its input terminal electrically connected to the output terminal of the third phase adjuster and its output terminal electrically connected to the second input terminal of the third synthesizer. It is used to adjust the power of the phase-adjusted signal and output a signal with the same power but opposite phase to the uplink signal emitted by the second modulation and demodulation unit. The on-chip system is electrically connected to the fourth power amplifier and is also used to control the amplification factor of the fourth power amplifier.

6. The communication system as described in claim 5, characterized in that, The second modulation and demodulation unit is also electrically connected to the common terminal of the frequency divider and the second low-pass filter to form an uplink sub-communication path, so as to transmit the uplink signal issued by the second modulation and demodulation unit to the server.

7. The communication system as described in claim 6, characterized in that, When the communication protocol is DOCSIS 4.0: When the bandwidth range of the downlink signal is a first bandwidth range: 108MHz~300MHz, the common terminal of the first RF switch is connected to the second terminal, and the common terminal of the second RF switch is connected to the second terminal. When the bandwidth range of the downlink signal is the second bandwidth range: 300M~492MHz, the common terminal of the first RF switch is connected to the second terminal, and the common terminal of the second RF switch is connected to the first terminal; When the bandwidth range of the downlink signal is the third bandwidth range of 492MHz to 684MHz, the common terminal of the first RF switch is connected to the first terminal.

8. The communication system as described in claim 6, characterized in that, When the communication protocol is DOCSIS 3.1 / 3.0 / 2.0: The common terminal of the first RF switch is connected to the first terminal, and the second, third, and fourth power amplifiers have no signal output.

9. The communication system based on the DOCSIS protocol as described in claim 6, characterized in that: The second modulation and demodulation unit is also used to send calibration signals for a first bandwidth range, a second bandwidth range, and a third bandwidth range; When the second modulation and demodulation unit sends out a calibration signal of the first bandwidth range, the calibration signal reaches the first modulation and demodulation unit through the uplink sub-communication path and the three-level filtering path. The on-chip system adjusts the fourth power amplifier and the third phase adjuster so that the power obtained by the calibration signal of the first bandwidth range in the first modulation and demodulation unit is 0 dBmV. When the second modulation and demodulation unit sends out a calibration signal of the second bandwidth range, the calibration signal reaches the first modulation and demodulation unit through the uplink sub-communication path and the second-level filtering path. The on-chip system adjusts the third power amplifier and the second phase adjuster so that the power obtained by the calibration signal of the second bandwidth range in the first modulation and demodulation unit is 0 dBmV. When the second modulation and demodulation unit sends out the calibration signal of the third bandwidth range, the calibration signal reaches the first modulation and demodulation unit through the uplink sub-communication path and the first-level filtering path. The on-chip system adjusts the second power amplifier and the first phase adjuster so that the power obtained by the calibration signal of the third bandwidth range in the first modulation and demodulation unit is 0 dBmV.