Display panel and manufacturing method thereof

Abstract

The present application discloses a display panel and a method for manufacturing the same. The display panel includes a base substrate and an anode layer, a pixel definition layer, a light-emitting layer, and a cathode layer sequentially located on the base substrate; the anode layer includes a plurality of anode blocks; the pixel definition layer includes a first pixel opening corresponding to the anode block; the first pixel opening includes a first sidewall; a first cathode auxiliary layer is located on the pixel definition layer and includes a second pixel opening connected to the first pixel opening; the second pixel opening includes a second sidewall, the orthographic projection of the second sidewall on the base substrate being arranged around the orthographic projection of the first sidewall on the base substrate; the light-emitting layer covers at least the anode blocks and the first sidewall; and the cathode layer is located at least on the light-emitting layer and electrically connected to the first cathode auxiliary layer. The present application can use FMM-free technology to form a patterned light-emitting layer, and the aperture ratio of the display panel is effectively improved, which is conducive to the production of large-size and high-resolution OLED display panels.

Description

Technical Field

[0001] The present application relates to the field of display technology, and in particular to a display panel and a manufacturing method thereof. Background Art

[0002] Active-matrix organic light-emitting diode (AMOLED) displays are the mainstream consumer display technology available in a variety of form factors, such as smartwatches, mobile displays, and large-area televisions. Currently, the mainstream production process for small and medium-sized RGB OLED displays uses Fine Metal Mask (FMM) evaporation technology to create the RGB light-emitting layers.

[0003] However, due to limitations in the FMM process, FMM vapor deposition of the RGB light-emitting layer creates a large shadow, making it difficult to use in ultra-high pixel density (PPI) products, such as AR / VR display products. Furthermore, large-scale vapor deposition is limited by the uncontrollable droop and deformation of the mask sheet, making FMM vapor deposition of the RGB light-emitting layer unsuitable. Currently, the mainstream technology for OLED displays above G8.5 is white light OLED combined with color filter (WOLED+CF).

[0004] With the development of display technology, high-end mobile displays require larger size, higher resolution, higher color gamut and lower power consumption. Therefore, FMM-free evaporation RGB has become an important development direction. Summary of the Invention

[0005] The present application provides a display panel and a manufacturing method thereof, which can adopt FMM-free technology to manufacture a patterned light-emitting layer, and the aperture ratio of the display panel is effectively improved, which is conducive to the manufacture of large-size and high-resolution OLED display panels.

[0006] The present application provides a display panel, comprising:

[0007] a substrate, comprising a plurality of driving devices;

[0008] an anode layer, located on the substrate and comprising a plurality of anode blocks distributed in an array, wherein the driving device is electrically connected to at least one of the anode blocks;

[0009] A pixel definition layer is located on the base substrate and includes a first pixel opening corresponding to the anode block; the first pixel opening includes a first sidewall;

[0010] a first cathode auxiliary layer, located on the pixel definition layer, and comprising a second pixel opening communicating with the first pixel opening; the second pixel opening comprising a second sidewall, and an orthographic projection of the second sidewall on the base substrate is arranged around an orthographic projection of the first sidewall on the base substrate;

[0011] a light-emitting layer, covering at least the anode block and the first side wall; and

[0012] The cathode layer is at least located on the light-emitting layer and is electrically connected to the first cathode auxiliary layer.

[0013] Optionally, the light-emitting layer further extends onto the second side wall.

[0014] Optionally, the cathode layer and the light-emitting layer are arranged to overlap; the display panel further includes a second cathode auxiliary layer; the second cathode auxiliary layer covers the cathode layer and extends onto the second side wall, and is electrically connected to the first cathode auxiliary layer.

[0015] Optionally, the display panel further includes an encapsulation layer; the encapsulation layer includes a first inorganic encapsulation layer, an organic encapsulation layer, and a second inorganic encapsulation layer stacked in sequence;

[0016] The first inorganic encapsulation layer at least covers the second cathode auxiliary layer and the second sidewall; the organic encapsulation layer covers the first inorganic encapsulation layer and the first cathode auxiliary layer; and the second inorganic encapsulation layer covers the organic encapsulation layer.

[0017] Optionally, the display panel further includes an auxiliary functional layer located on the first cathode auxiliary layer; the auxiliary functional layer includes a third pixel opening connected to the second pixel opening; the third pixel opening includes a third sidewall, and an orthographic projection of the second sidewall on the base substrate is arranged to surround or cover an orthographic projection of the third sidewall on the base substrate;

[0018] The orthographic projection of the auxiliary functional layer on the base substrate is adjacent to or overlaps with the orthographic projection of the light-emitting layer on the base substrate; the first inorganic encapsulation layer is located on the second cathode auxiliary layer and the second side wall, and extends to the bottom of the auxiliary functional layer; the organic encapsulation layer covers the first inorganic encapsulation layer and the auxiliary functional layer.

[0019] Optionally, the cathode layer covers the light-emitting layer and extends onto the second sidewall, and is electrically connected to the first cathode auxiliary layer.

[0020] Optionally, the display panel further includes an encapsulation layer; the encapsulation layer includes a first inorganic encapsulation layer, an organic encapsulation layer, and a second inorganic encapsulation layer stacked in sequence;

[0021] The first inorganic encapsulation layer at least covers the cathode layer and the second sidewall; the organic encapsulation layer covers the first inorganic encapsulation layer and the first cathode auxiliary layer; and the second inorganic encapsulation layer covers the organic encapsulation layer.

[0022] Optionally, the display panel further includes an auxiliary functional layer located on the first cathode auxiliary layer; the auxiliary functional layer includes a third pixel opening connected to the second pixel opening; the third pixel opening includes a third sidewall, and an orthographic projection of the second sidewall on the base substrate is arranged to surround or cover an orthographic projection of the third sidewall on the base substrate;

[0023] The orthographic projection of the auxiliary functional layer on the base substrate is adjacent to or overlaps with the orthographic projection of the light-emitting layer on the base substrate; the first inorganic encapsulation layer is located on the cathode layer and the second side wall, and extends to the bottom of the auxiliary functional layer; the organic encapsulation layer covers the first inorganic encapsulation layer and the auxiliary functional layer.

[0024] Optionally, the inclination angle of at least part of the second side wall is greater than 0° and less than 90°.

[0025] Optionally, the second sidewall includes a first sub-sidewall, a second sub-sidewall, a third sub-sidewall, and a fourth sub-sidewall sequentially connected to each other in a direction away from the pixel definition layer; the inclination angles of the first sub-sidewall and the third sub-sidewall are both greater than 0° and less than 90°, the inclination angle of the second sub-sidewall is greater than or equal to 0 and less than 90°, and the inclination angle of the fourth sub-sidewall is greater than 0° and less than or equal to 90°; the inclination angles of the fourth sub-sidewall, the third sub-sidewall, and the second sub-sidewall decrease sequentially;

[0026] The first sub-sidewall and the second sub-sidewall form a staircase structure on a side of the second sidewall close to the pixel definition layer; the light-emitting layer covers at least a portion of the staircase structure.

[0027] Optionally, the inclination angle of the second sub-sidewall is equal to 0°, and the inclination angle of the fourth sub-sidewall is greater than the inclination angles of the first sub-sidewall and the third sub-sidewall.

[0028] The present application also provides a method for manufacturing a display panel, comprising the following steps:

[0029] Providing a base substrate and forming an anode layer on the base substrate; wherein the base substrate includes a plurality of driving devices, the anode layer includes a plurality of anode blocks distributed in an array, and one of the driving devices is electrically connected to at least one of the anode blocks;

[0030] forming a pixel definition layer on the base substrate; the pixel definition layer includes a first pixel opening corresponding to the anode block, and the first pixel opening includes a first sidewall;

[0031] forming a first cathode auxiliary layer on the pixel definition layer; wherein the first cathode auxiliary layer includes a second pixel opening connected to the first pixel opening, the second pixel opening includes a second sidewall, and an orthographic projection of the second sidewall on the base substrate is arranged around an orthographic projection of the first sidewall on the base substrate; and

[0032] The light-emitting layer and the cathode layer are formed in sequence by using the whole-surface film forming technology and the patterning processing technology; the light-emitting layer at least covers the anode block and the first side wall; the cathode layer is at least located on the light-emitting layer and is electrically connected to the first cathode auxiliary layer.

[0033] Optionally, before forming the light-emitting layer, the manufacturing method further comprises the following steps:

[0034] forming an auxiliary functional layer on the first cathode auxiliary layer; the auxiliary functional layer including a third pixel opening communicating with the second pixel opening; the third pixel opening including a third sidewall, wherein an orthographic projection of the second sidewall on the base substrate surrounds or covers an orthographic projection of the third sidewall on the base substrate;

[0035] The orthographic projection of the auxiliary functional layer on the base substrate is adjacent to or overlaps with the orthographic projection of the light-emitting layer on the base substrate.

[0036] In the display panel and its manufacturing method provided by the present application, a first cathode auxiliary layer is added to the pixel definition layer, and the first pixel opening on the pixel definition layer and the second pixel opening on the first cathode auxiliary layer together constitute a pixel opening, which effectively increases the size of the pixel opening; the light-emitting layer and the cathode layer are arranged in the pixel opening constituted by the first pixel opening and the second pixel opening, so that the light-emitting area is not limited by the size of the first pixel opening of the pixel definition layer, which is beneficial to increase the light-emitting area, that is, it is beneficial to increase the aperture ratio, thereby improving the life and display effect of the OLED device. In addition, both the light-emitting layer and the cathode layer can be evaporated by Open Mask, and then patterned by photolithography patterning or laser patterning technology, realizing FMM-free evaporation of the light-emitting layer (R / G / B), and because the light-emitting layer is evaporated by Open Mask, different thicknesses can be matched, which is beneficial to improving luminous efficiency and viewing angle performance. BRIEF DESCRIPTION OF THE DRAWINGS

[0037] The following detailed description of the specific embodiments of the present application in conjunction with the accompanying drawings will make the technical solutions and other beneficial effects of the present application apparent.

[0038] Figure 1 A schematic diagram of a partial cross-sectional structure of an exemplary OLED display panel.

[0039] Figure 2 A schematic diagram of a partial cross-sectional structure of a display panel provided in an embodiment of the present application.

[0040] Figure 3 A schematic diagram of a partial cross-sectional structure of another display panel provided in an embodiment of the present application.

[0041] Figure 4 A schematic diagram of a partial cross-sectional structure of another display panel provided in an embodiment of the present application.

[0042] Figure 5 A schematic diagram of a partial cross-sectional structure of another display panel provided in an embodiment of the present application.

[0043] Figure 6 A schematic flow chart of a method for manufacturing a display panel provided in an embodiment of the present application. DETAILED DESCRIPTION

[0044] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the embodiments described are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without making creative efforts are within the scope of protection of this application.

[0045] In the description of the present application, it should be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", "clockwise", "counterclockwise" and the like indicate orientations or positional relationships based on the orientations or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as limiting the present application. In addition, the terms "first" and "second" are used for descriptive purposes only and cannot be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined as "first" and "second" may explicitly or implicitly include one or more of the said features. In the description of the present application, "multiple" means two or more, unless otherwise clearly and specifically defined.

[0046] In the description of this application, it should be noted that, unless otherwise expressly specified or limited, the terms "installed," "connected," and "connected" should be understood in a broad sense. For example, they can refer to fixed connections, detachable connections, or integral connections; they can refer to mechanical connections, electrical connections, or mutual communication; they can refer to direct connections or indirect connections through an intermediate medium; they can refer to internal communication between two components or the interaction between two components. Those skilled in the art will understand the specific meanings of the above terms in this application based on specific circumstances.

[0047] In this application, unless otherwise expressly specified or limited, a first feature being "above" or "below" a second feature may include the first and second features being in direct contact, or may include the first and second features being in contact not directly but through another feature between them. Moreover, a first feature being "above," "above," and "above" a second feature may include the first feature being directly above or obliquely above the second feature, or may simply mean that the first feature is higher in level than the second feature. A first feature being "below," "below," and "below" a second feature may include the first feature being directly below or obliquely below the second feature, or may simply mean that the first feature is lower in level than the second feature.

[0048] The disclosure below provides many different embodiments or examples for realizing different structures of the present application. In order to simplify the disclosure of the present application, the components and settings of specific examples are described below. Of course, they are merely examples and are not intended to limit the present application. In addition, the present application may repeat reference numbers and / or reference letters in different examples, and such repetition is for the purpose of simplicity and clarity, and does not itself indicate the relationship between the various embodiments and / or settings discussed. In addition, the present application provides examples of various specific processes and materials, but those of ordinary skill in the art will appreciate the application of other processes and / or the use of other materials.

[0049] Figure 1 A partial cross-sectional structural diagram of an exemplary OLED display panel is provided. Figure 1 It can be seen that the OLED display panel 1 ′ includes a base substrate 2 ′ and a light emitting functional layer 3 ′, a light extraction layer (CPL) 4 ′, a LiF layer 5 ′ and an encapsulation layer 6 ′ sequentially disposed on the base substrate 2 ′.

[0050] The substrate 2' includes a substrate layer (e.g., a PI layer) and a buffer layer (buffer1 and buffer2), an active layer (Act), a first gate insulating layer (GI1), a first gate (GE1), a second gate insulating layer (GI2), a second gate (GE2), an interlayer insulating layer (ILD), a source-drain electrode (SD), an organic planarization layer (PLN), an anode layer (Anode), and a pixel definition layer (PDL) sequentially arranged on the substrate layer. The buffer layer includes a silicon nitride layer (SiN x ), silicon oxide layer (SiO x ) or a stacked layer of the two. A pixel opening penetrating the pixel definition layer is provided at a position of the pixel definition layer corresponding to the anode layer, and the pixel definition layer covers an edge position of the anode layer.

[0051] The light-emitting functional layer 3' includes a hole injection layer (HIL), a hole transport layer (HTL), an interlayer energy level matching layer (FLR / G / B), an organic light-emitting layer (R / G / B), a hole blocking layer (HBL), an electron transport layer (METL), an electron injection layer (EIL), and a cathode layer, which are stacked in sequence in the pixel opening and on the pixel definition layer. The hole blocking layer covers the hole transport layer and the organic light-emitting layer.

[0052] The encapsulation layer 6 ′ is a thin film encapsulation layer (TFE), specifically including a first inorganic encapsulation layer (TFE1 ), an organic encapsulation layer (IJP) and a second inorganic encapsulation layer (TFE2 ) sequentially stacked on the LiF layer 5 ′.

[0053] When OLED display panels are small or medium-sized, FMM evaporation can be used to form the organic light-emitting layer (R / G / B). However, for large-sized, high-PPI products, FMM evaporation cannot be used due to factors such as the large shadow cast by the FMM and the uncontrollable droop and deformation of the mask sheet. To address the above technical issues, this application provides a FMM-free evaporation process for producing the organic light-emitting layer. Please refer to the following embodiments for details.

[0054] Example 1

[0055] like Figure 2 As shown, an embodiment of the present application provides a display panel 1, which includes a base substrate 2 and an anode layer 3, a pixel definition layer 4, a first cathode auxiliary layer 5a, a light-emitting layer 6 and a cathode layer 7 arranged in sequence on the base substrate 2.

[0056] Specifically, the base substrate 2 includes a plurality of driving devices, such as thin film transistors (TFTs).

[0057] In one embodiment, the base substrate 2 includes an array layer 2a and an organic planar layer 2b stacked together. The array layer 2a includes a substrate layer, a buffer layer, and a plurality of thin film transistors disposed on the buffer layer. The present application does not limit the specific structure and type of the thin film transistors.

[0058] In a specific embodiment, the structure composed of the base substrate 2, the anode layer 3 and the pixel definition layer 4 is equivalent to Figure 1 The substrate 2' is shown. That is, the array layer 2a includes a substrate layer (e.g., a PI layer) and buffer layers (buffer1 and buffer2), an active layer (Act), a first gate insulating layer (GI1), a first gate electrode (GE1), a second gate insulating layer (GI2), a second gate electrode (GE2), an interlayer insulating layer (ILD), and source-drain electrodes (SD) sequentially disposed on the substrate layer; wherein the active layer, the first gate electrode, the second gate electrode, and the source-drain electrodes constitute a dual-gate thin-film transistor.

[0059] Of course, in other embodiments, the thin film transistors in the array layer 2a may also be single-gate thin film transistors, which is not limited in this application.

[0060] Specifically, the anode layer 3 is located on the base substrate 2 and includes a plurality of anode blocks 8 distributed in an array. A driver device is electrically connected to at least one anode block. Specifically, each anode block 8 is electrically connected to a corresponding driver device through a via hole penetrating the organic planar layer 2b.

[0061] Specifically, the pixel definition layer 4 is located on the base substrate 2 and includes a first pixel opening 9 corresponding to the anode block 8; the first pixel opening 9 includes a first sidewall 10. The pixel definition layer 4 may also cover the edge of the anode block 8, and the first pixel opening 9 exposes the portion of the anode block 8 not covered by the pixel definition layer 4.

[0062] Specifically, the longitudinal cross-section of the first pixel opening 9 (ie, the cross-section shown in the figure) includes, but is not limited to, an inverted trapezoid. It is understood that the inclination angle of the first sidewall 10 of the first pixel opening 9 may be greater than 0° and less than 90°.

[0063] Specifically, the first cathode auxiliary layer 5a is located on the pixel definition layer 4 and includes a second pixel opening 11 that communicates with the first pixel opening 9. The second pixel opening 11 includes a second sidewall 12, and the orthographic projection of the second sidewall 12 on the base substrate 2 is arranged around the orthographic projection of the first sidewall 10 on the base substrate 2. It can be understood that the opening size of the second pixel opening 11 is larger than the opening size of the first pixel opening 9.

[0064] Specifically, based on the existing array process, a patterned first cathode auxiliary layer 5a can be added above the pixel definition layer 4. In other words, the process before forming the first cathode auxiliary layer 5a in the embodiment of the present application is the same as that in the existing array process. It is understood that the first cathode auxiliary layer 5a of the present application is formed during the array process.

[0065] Specifically, the first cathode auxiliary layer 5a can be a single-layer structure of any one of Mo, Al, Ti, Cu, Ag, ITO, IZO, and W, or a stacked structure of any two or more of the above metal materials. Of course, the first cathode auxiliary layer 5a can also be made of an alloy composed of the above metal materials.

[0066] Specifically, the first cathode auxiliary layer 5 a may be patterned by photolithography or laser patterning during the manufacturing process.

[0067] Specifically, the shape of the longitudinal cross section of the second pixel opening 11 includes an inverted trapezoid, but is not limited thereto.

[0068] Specifically, the inclination angle of at least a portion of the second side wall 12 is greater than 0° and less than 90°.

[0069] In one specific embodiment, the second sidewall 12 of the second pixel opening 11 is arranged in a multi-section. For example, the second sidewall 12 includes a first sub-sidewall 12a, a second sub-sidewall 12b, a third sub-sidewall 12c, and a fourth sub-sidewall 12d, which are sequentially connected to each other in a direction away from the pixel definition layer 4. The first sub-sidewall 12a and the third sub-sidewall 12c are both inclined surfaces, that is, the inclination angles of the first sub-sidewall 12a and the third sub-sidewall 12c are both greater than 0° and less than 90°. The second sub-sidewall 12b is located between the first sub-sidewall 12a and the third sub-sidewall 12c, and the inclination angle of the second sub-sidewall 12b is greater than or equal to 0 and less than 90°. The fourth sub-sidewall 12d is located at the end of the third sub-sidewall 12c away from the second sub-sidewall 12b, and the inclination angle of the fourth sub-sidewall 12d is greater than 0° and less than or equal to 90°. The inclination angles of the fourth sub-side wall 12d, the third sub-side wall 12c and the second sub-side wall 12b decrease successively, and the first sub-side wall 12a and the second sub-side wall 12b form a stepped structure on the side of the second side wall 12 close to the pixel definition layer 4, and the light-emitting layer 6 covers at least part of the stepped structure.

[0070] In one embodiment, the inclination angle of the second sub-sidewall 12b is equal to 0°, and the inclination angle of the fourth sub-sidewall 12d is close to 90°.

[0071] It should be noted that when the inclination angle is equal to 0°, the angle between the sub-side wall and the horizontal plane is 0°, that is, it is in a horizontal state. When the inclination angle is equal to 90°, the angle between the sub-side wall and the horizontal plane is 90°, that is, it is in a vertical state.

[0072] Specifically, the height of the second sub-sidewall 12b from the pixel definition layer 4 is much smaller than the height of the upper surface of the first cathode auxiliary layer 5a from the pixel definition layer 4. As can be understood, the first sub-sidewall 12a and the second sub-sidewall 12b form a stepped structure with a smaller height on the side of the second sidewall 12 close to the pixel definition layer 4, making it easier for the light-emitting layer 6 to cover the second sidewall 12. This design allows the second sidewall 12 to transition more smoothly to the pixel definition layer 4, effectively reducing the risk of disconnection between the light-emitting layer 6 and the cathode layer 7 at the connection between the second sidewall 12 and the pixel definition layer 4.

[0073] Of course, in other embodiments, the second side wall 12 may also only include the first sub-side wall 12a, the second sub-side wall 12b and the third sub-side wall 12c mentioned above, or the second side wall 12 includes multiple sub-side walls with gradually decreasing inclination angles from top to bottom. This design can also reduce the risk of disconnection between the light-emitting layer 6 and the cathode layer 7 at the connection between the second side wall 12 and the pixel definition layer 4.

[0074] Specifically, the light-emitting layer 6 is located in the pixel opening formed by the first pixel opening 9 and the second pixel opening 11 , and the light-emitting layer 6 at least covers the anode block 8 and the first side wall 10 .

[0075] In one specific embodiment, the light-emitting layer 6 also extends onto the second sidewall 12, that is, the light-emitting layer 6 is located in the first pixel opening 9 and the second pixel opening 11. Of course, in other embodiments, the light-emitting layer 6 may be located only in the first pixel opening 9, for example, the light-emitting layer only covers the anode block 8 and the first sidewall 10. The embodiments of this application will be described using the example of the light-emitting layer 6 covering the anode block 8 and the first sidewall 10 and extending onto the second sidewall 12, but are not limited thereto.

[0076] Specifically, the light-emitting layer 6 extends from the first pixel opening 9 to the second pixel opening 11, and the light-emitting layer 6 only covers a portion of the second sidewall 12 in the second pixel opening 11. For example, the light-emitting layer 6 only covers the first sub-sidewall 12a and at least a portion of the second sub-sidewall 12b in the second pixel opening 11; or, the light-emitting layer 6 completely covers the first sub-sidewall 12a and the second sub-sidewall 12b in the second pixel opening 11, and covers a portion of the third sub-sidewall 12c.

[0077] It can be understood that in the embodiment of the present application, the first pixel opening 9 and the second pixel opening 11 constitute a pixel opening, and the light-emitting layer 6 is formed in the first pixel opening 9 and the second pixel opening 11, so that the light-emitting layer 6 is not restricted by the opening size of the pixel definition layer 4 during production, effectively improving the aperture ratio and being beneficial to improving the life of the device.

[0078] Specifically, the light-emitting layer 6 includes a hole injection layer (HIL), a hole transport layer (HTL), an interlayer energy level matching layer (FLR / G / B), an organic light-emitting layer (R / G / B), a hole blocking layer (HBL), an electron transport layer (METL) and an electron injection layer (EIL) stacked in sequence, but is not limited thereto.

[0079] Specifically, the light-emitting layer 6 can be formed by using a full-surface film forming (eg, vapor deposition) technique and a patterning processing technique.

[0080] Specifically, the light-emitting layer 6 in the embodiment of the present application does not need to use FMM during vapor deposition, but instead adopts open mask vapor deposition, so that the entire effective display area (AA area) of the base substrate 2 is covered with the light-emitting layer 6, and then patterning technology is used for patterning, retaining only the light-emitting layer 6 within the entire first pixel opening 9 and part of the second pixel opening 11.

[0081] It should be noted that the above-mentioned effective display area (AA area) is equivalent to the effective display area of the display panel 1 , and is distinguished from the peripheral wiring area of the display panel 1 .

[0082] Specifically, the patterning technology includes photolithography patterning or laser patterning technology, but is not limited thereto.

[0083] Specifically, the cathode layer 7 is at least located on the light-emitting layer 6 and is electrically connected to the first cathode auxiliary layer 5 a.

[0084] In one embodiment, the cathode layer 7 extends onto the second sidewall 12 to achieve electrical connection with the first cathode auxiliary layer 5 a. In other words, the orthographic projection of the cathode layer 7 on the base substrate 2 completely covers the orthographic projection of the light emitting layer 6 on the base substrate 2 .

[0085] Specifically, the distance between any side edge of the cathode layer 7 and the edge of the light-emitting layer 6 is in a range of 1 micrometer to 20 micrometers.

[0086] Specifically, the cathode layer 7 is also produced by evaporation and patterning techniques, similar to the light-emitting layer 6. That is, both the light-emitting layer 6 and the cathode layer 7 are evaporated by open mask evaporation, and patterned by photolithography or laser patterning techniques after evaporation.

[0087] Specifically, the first cathode auxiliary layer 5 a is used to introduce the cathode signal of the peripheral wiring area to the cathode layer 7 in the AA area, so as to realize the light-emitting function of the light-emitting layer 6 .

[0088] Specifically, the material of the cathode layer 7 may be the same as that of the first cathode auxiliary layer 5 a , but is not limited thereto.

[0089] Specifically, the display panel 1 also includes an encapsulation layer 13; the encapsulation layer 13 includes a first inorganic encapsulation layer 13a, an organic encapsulation layer 13b and a second inorganic encapsulation layer 13c stacked in sequence; the first inorganic encapsulation layer 13a at least covers the cathode layer 7 and the second side wall 12; the organic encapsulation layer 13b covers the first inorganic encapsulation layer 13a and the first cathode auxiliary layer 5a; the second inorganic encapsulation layer 13c covers the organic encapsulation layer 13b.

[0090] In one specific embodiment, the first inorganic encapsulation layer 13a only covers the cathode layer 7 and the second side wall 12, that is, the first inorganic encapsulation layer 13a is only arranged in each pixel opening (including the first pixel opening 9 and the second pixel opening 11) to separately protect the corresponding light-emitting layer 6 and cathode layer 7.

[0091] In another specific embodiment, the first inorganic encapsulation layer 13 a entirely covers the first cathode auxiliary layer 5 a and the cathode layer 7 .

[0092] Specifically, the light-emitting layer 6 includes a red sub-light-emitting layer (R), a green sub-light-emitting layer (G) and a blue sub-light-emitting layer (B) that are spaced apart, and are used to emit red light, green light and blue light, respectively. Since the light-emitting layer 6 and the cathode layer 7 are both manufactured using evaporation technology and patterning technology, during the manufacturing process, the red sub-light-emitting layer, the green sub-light-emitting layer and the blue sub-light-emitting layer are formed three times respectively. Taking the formation of the red sub-light-emitting layer, the green sub-light-emitting layer and the blue sub-light-emitting layer in sequence as an example, when manufacturing the red sub-light-emitting layer, it is also necessary to complete the manufacturing of the cathode layer 7 and the first inorganic encapsulation layer 13a located on the red sub-light-emitting layer, and then proceed with the manufacturing of the green sub-light-emitting layer; similarly, when manufacturing the green sub-light-emitting layer, it is also necessary to complete the manufacturing of the cathode layer 7 and the first inorganic encapsulation layer 13a located on the green sub-light-emitting layer, and then proceed with the manufacturing of the blue sub-light-emitting layer, and finally complete the manufacturing of the cathode layer 7 and the first inorganic encapsulation layer 13a located on the blue sub-light-emitting layer.

[0093] That is to say, the sub-luminescent layer of another luminescent color can only be produced after the sub-luminescent layer of the same luminescent color and the cathode layer 7 and the first inorganic luminescent layer 6 above it are completed. This design can prevent the previously formed sub-luminescent layer from being damaged by external moisture and chemical reagents.

[0094] Specifically, the first inorganic encapsulation layer 13a includes SiN x 、SiO x 、SiON x , Al2O3, ZrO2, etc. The thickness of the first inorganic encapsulation layer 13a ranges from 0.3 microns to 3 microns.

[0095] Specifically, the first inorganic encapsulation layer 13a can be formed on the entire surface by using any one of chemical vapor deposition (CVD) and atomic layer deposition (ALD) or a combination of the two, and then patterned by using photolithography or laser patterning technology.

[0096] Specifically, the organic encapsulation layer 13b can be formed by inkjet printing technology; the second inorganic encapsulation layer 13c can be formed by any one of CVD and ALD or a superposition of the two, and the material of the second inorganic encapsulation layer 13c can be the same as that of the first inorganic encapsulation layer 13a, but is not limited thereto.

[0097] In the embodiment of the present application, a first cathode auxiliary layer 5a is added to the pixel definition layer 4, and the first pixel opening 9 on the pixel definition layer 4 and the second pixel opening 11 on the first cathode auxiliary layer 5a together constitute a pixel opening, which effectively increases the size of the pixel opening; the light-emitting layer 6 and the cathode layer 7 are arranged in the first pixel opening 9 and the second pixel opening 11, so that the light-emitting area is not limited by the size of the first pixel opening 9 of the pixel definition layer 4, effectively increasing the light-emitting area, that is, effectively increasing the aperture ratio, which is beneficial to improving the life and display effect of the OLED device. In addition, both the light-emitting layer 6 and the cathode layer 7 can be evaporated by Open Mask, and then patterned by photolithography patterning or laser patterning technology, realizing FMM-free evaporation of the light-emitting layer (R / G / B) 6, and because the light-emitting layer 6 is evaporated by Open Mask, different thicknesses can be matched, which is beneficial to improving the luminous efficiency and viewing angle performance.

[0098] Example 2

[0099] like Figure 3 As shown, the embodiment of the present application further provides a display panel 1, which differs from the first embodiment in that the cathode layer 7 and the light-emitting layer 6 in the embodiment of the present application are completely overlapped, and the display panel 1 further includes a second cathode auxiliary layer 5b, which is located on the cathode layer 7 and at least a portion of the second side wall 12. In other words, the second cathode auxiliary layer 5b covers the cathode layer 7 and extends onto the second side wall 12, and is electrically connected to the first cathode auxiliary layer 5a.

[0100] Specifically, the light-emitting layer 6 and the cathode layer 7 are both made by evaporation technology and patterning technology. Since the light-emitting layer 6 and the cathode layer 7 are completely overlapped, the light-emitting layer 6 and the cathode layer 7 can be patterned at the same time, which is beneficial to save a patterning process.

[0101] Specifically, after the light-emitting layer 6 and the cathode layer 7 are sequentially evaporated, they can be patterned using photolithography patterning or laser patterning technology.

[0102] In one specific embodiment, the second cathode auxiliary layer 5b only covers the portion of the second side wall 12 not covered by the light-emitting layer 6; in other embodiments, the second cathode auxiliary layer 5b may cover the entire second side wall 12 not covered by the light-emitting layer 6. It will be understood that the second cathode auxiliary layer 5b covers the second side wall 12 in order to achieve electrical connection with the first cathode auxiliary layer 5a. In other words, the cathode layer 7 is electrically connected to the first cathode auxiliary layer 5a through the second cathode auxiliary layer 5b.

[0103] Specifically, the first cathode auxiliary layer 5a is used to lead the cathode signal from the peripheral wiring area to the AA area, and the second cathode auxiliary layer 5b is used to connect the cathode signal on the first cathode auxiliary layer 5a to the cathode layer 7 in each individual pixel to achieve individual control of the light emission of a single pixel.

[0104] It should be noted that the pixels described above can be understood as OLED light-emitting devices composed of each anode block 8 and the light-emitting layer 6 and cathode layer 7 on the anode block 8, that is, OLED light-emitting devices located in the pixel opening composed of the first pixel opening 9 and the second pixel opening 11.

[0105] Specifically, the material of the second cathode auxiliary layer 5 b and the material of the cathode layer 7 may be the same as the material of the first cathode auxiliary layer 5 a , but is not limited thereto.

[0106] Specifically, the second cathode auxiliary layer 5 b can be formed on the entire surface by using evaporation, magnetron sputtering, MOCVD or ALD, and then patterned by using photolithography or laser patterning.

[0107] This embodiment has the advantages described in the above embodiments. At the same time, a second cathode auxiliary layer 5b is provided on the cathode layer 7 in the embodiment of the present application, which is beneficial to reducing the impedance of the cathode layer 7, thereby improving the accuracy of the cathode signal and further improving the luminous efficiency.

[0108] Example 3

[0109] like Figure 4 and Figure 5As shown, the embodiment of the present application also provides a display panel 1, which is different from the first and second embodiments in that the display panel 1 also includes an auxiliary functional layer 14 located on the first cathode auxiliary layer 5a; the auxiliary functional layer 14 includes a third pixel opening 15 connected to the second pixel opening 11; the third pixel opening 15 includes a third side wall 17, and the orthographic projection of the second side wall 12 on the base substrate 2 is arranged around or covers the orthographic projection of the third side wall 17 on the base substrate 2; the orthographic projection of the auxiliary functional layer 14 on the base substrate 2 is adjacent to or overlaps with the orthographic projection of the light-emitting layer 6 on the base substrate 2; the first inorganic encapsulation layer 13a is located in the first pixel opening 9 and the second pixel opening 11, and extends to the bottom of the auxiliary functional layer 14; the organic encapsulation layer 13b covers the first inorganic encapsulation layer 13a and the auxiliary functional layer 14.

[0110] like Figure 4 As shown, the first inorganic encapsulation layer 13a is located on the cathode layer 7 and the second side wall 12, and extends to the bottom of the auxiliary functional layer 14. Alternatively, as shown Figure 5 As shown, the first inorganic encapsulation layer 13 a is located on the second cathode auxiliary layer 5 b and the second sidewall 12 , and extends to the bottom of the auxiliary functional layer 14 .

[0111] It can be understood that the third side wall 17 is equivalent to the side wall of the auxiliary functional layer 14 , and the first side wall 10 , the second side wall 12 and the third side wall 17 are all closed-loop structures.

[0112] Specifically, the diameter of the third sidewall 17 can be adjusted according to the requirements of the evaporation of the light-emitting layer 6 and the cathode layer 7. For example, in one embodiment, the orthographic projection of the auxiliary functional layer 14 on the base substrate 2 also covers the edge portion of the orthographic projection of the cathode layer 7 on the base substrate 2.

[0113] It can be understood that the orthographic projection of the second side wall 12 on the base substrate 2 is arranged to surround or cover the orthographic projection of the third side wall 17 on the base substrate 2, which is equivalent to the opening size of the third pixel opening 15 being smaller than the opening size of the second pixel opening 11, that is, the auxiliary functional layer 14 also extends horizontally to above the second pixel opening 11, thereby forming an undercut structure 16.

[0114] It should be noted that the thickness of the auxiliary functional layer 14 is generally less than that of the first cathode auxiliary layer 5a. When the inclination angle of the second sidewall 12 is small, the orthographic projection of the second sidewall 12 on the base substrate 2 can cover the orthographic projection of the third sidewall 17 on the base substrate 2. When the inclination angle of the second sidewall 12 is large, the orthographic projection of the second sidewall 12 on the base substrate 2 can be arranged around the orthographic projection of the third sidewall 17 on the base substrate 2. Of course, the purpose of providing the auxiliary functional layer 14 in the embodiment of the present application is to form the undercut structure 16. The positional relationship between the third sidewall 17 and the second sidewall 12 depends on the evaporation conditions and coverage of the light-emitting layer 6 and the cathode layer 7.

[0115] Because the auxiliary functional layer 14 and the first cathode auxiliary layer 5a form an undercut structure 16, when evaporating the light-emitting layer 6 and the cathode layer 7, they can be directly disconnected at the undercut structure 16, that is, part of the light-emitting layer 6 and the cathode layer 7 are located in the first pixel opening 9 and the second pixel opening 11, and the other part of the light-emitting layer 6 and the cathode layer 7 are located on the auxiliary functional layer 14. The patterned light-emitting layer 6 and the cathode layer 7 can be obtained by simply removing the light-emitting layer 6 and the cathode layer 7 located on the auxiliary functional layer 14.

[0116] Specifically, due to the presence of the Undercut structure 16, the coverage of the first inorganic encapsulation layer 13a in the embodiment of the present application is different from that in the aforementioned embodiment. Since the first inorganic encapsulation layer 13a is formed by at least one of CVD and ALD, the first inorganic encapsulation layer 13a also covers the top, sidewalls and bottom of the auxiliary functional layer 14 before patterning. The first inorganic encapsulation layer 13a located above the auxiliary functional layer 14 covers the cathode layer 7 (or the second cathode auxiliary layer 5b) located above the auxiliary functional layer 14, so in order to remove the light-emitting layer 6 and the cathode layer 7 located above the auxiliary functional layer 14, it is necessary to remove the first inorganic encapsulation layer 13a located above the auxiliary functional layer 14 at the same time. That is, in the embodiment of the present application, the light-emitting layer 6, the cathode layer 7 and the first inorganic encapsulation layer 13a are patterned in the same process, that is, the light-emitting layer 6, the cathode layer 7 and the first inorganic encapsulation layer 13a located above the auxiliary functional layer 14 are removed at the same time.

[0117] When the light-emitting layer 6, cathode layer 7 and first inorganic encapsulation layer 13a located above the auxiliary functional layer 14 are removed, the first inorganic encapsulation layer 13a located on the side wall of the auxiliary functional layer 14 can also be removed, so that the first inorganic encapsulation layer 13a is only located in the first pixel opening 9 and the second pixel opening 11.

[0118] It can be understood that, unlike the first inorganic encapsulation layer 13a in the first and second embodiments, the first inorganic encapsulation layer 13a in the embodiment of the present application cannot be provided on the entire surface, but can only be formed in the pixel opening formed by the first pixel opening 9 and the second pixel opening 10.

[0119] Specifically, the auxiliary functional layer 14 can be made of an inorganic material, such as SiN x 、SiO x 、SiON x , Al2O3 and other materials; the auxiliary functional layer 14 can also be a metal material, such as a single layer or stacked structure of Ti, Ag, Mo, Al, ITO, IZO, Cu and other materials; of course, the material of the auxiliary functional layer 14 can also be an alloy material composed of the above-mentioned metal materials.

[0120] Specifically, the auxiliary functional layer 14 and the first cathode auxiliary layer 5 a are both manufactured in the Array process section.

[0121] Specifically, in the evaporation Figure 4 When the light emitting layer 6 and cathode layer 7 are shown, different evaporation equipment can be used to obtain light emitting layers 6 and cathode layers 7 with different coverage in the second pixel opening 11, so that the distance between any side edge of the cathode layer 7 and the edge of the light emitting layer 6 ranges from 1 micron to 20 microns. Alternatively, in the evaporation Figure 5 In the case of the light-emitting layer 4, cathode layer 7, and second cathode auxiliary layer 5b shown, the light-emitting layer 6 and cathode layer 7 having the same coverage in the first pixel opening 9 and the second pixel opening 11 can be obtained by evaporation using the same evaporation equipment, and the cathode layer 7 (light-emitting layer 6) and second cathode auxiliary layer 5b having different coverage in the second pixel opening 11 can be obtained by evaporation using different evaporation equipment, so that the distance between any side edge of the second cathode auxiliary layer 5b and the edge of the light-emitting layer 6 ranges from 1 micron to 20 microns. Unlike this embodiment, the first and second embodiments control the different coverage of the cathode layer 7 and the light-emitting layer 6 through patterning technology.

[0122] In the embodiment of the present application, the undercut structure 16 is formed by the auxiliary functional layer 14, so that the light-emitting layer 6, the cathode layer 7 and the first inorganic encapsulation layer 13a can be patterned through a single process, effectively simplifying the process of the EL process section.

[0123] Example 4

[0124] like Figure 6 As shown, an embodiment of the present application provides a method for manufacturing a display panel 1, including steps S601 to S604.

[0125] S601: providing a base substrate and forming an anode layer on the base substrate; the base substrate includes a plurality of driving devices, the anode layer includes a plurality of anode blocks distributed in an array, and a driving device is electrically connected to at least one anode block.

[0126] Specifically, the structures of the substrate and the anode layer may be referred to the description in the first embodiment, which will not be repeated here.

[0127] S602: forming a pixel definition layer on the base substrate; the pixel definition layer includes a first pixel opening corresponding to the anode block, and the first pixel opening includes a first sidewall.

[0128] Specifically, the structure of the pixel definition layer may be specifically referred to the description of the pixel definition layer 4 in the first embodiment, which will not be repeated here.

[0129] S603: forming a first cathode auxiliary layer on the pixel definition layer; the first cathode auxiliary layer includes a second pixel opening connected to the first pixel opening, the second pixel opening includes a second side wall, and the orthographic projection of the second side wall on the base substrate is arranged around the orthographic projection of the first side wall on the base substrate.

[0130] Specifically, the first cathode auxiliary layer can be a single layer structure of any one of Mo, Al, Ti, Cu, Ag, ITO, IZO and W, or a stacked structure of any two or more of them. Of course, the first cathode auxiliary layer can also be made of an alloy composed of the above metal materials.

[0131] Specifically, during the manufacturing process, the first cathode auxiliary layer may be formed on the entire surface by first adopting an evaporation technique, and then patterned by adopting a photolithography patterning technique or a laser patterning technique.

[0132] It can be understood that the substrate, the anode layer, the pixel definition layer and the first cathode auxiliary layer are all completed in the Array process section.

[0133] Specifically, the structure of the first cathode auxiliary layer may refer to the description of the first cathode auxiliary layer 5 a in the first embodiment, which will not be repeated here.

[0134] S604: using a whole-surface film forming technology and a patterning processing technology to sequentially form a light-emitting layer and a cathode layer; the light-emitting layer at least covers the anode block and the first side wall; the cathode layer is at least located on the light-emitting layer and is electrically connected to the first cathode auxiliary layer.

[0135] In one embodiment, Figure 2As shown, the light-emitting layer 6 also extends onto the second sidewall 12, that is, the light-emitting layer 6 is located in the first pixel opening 9 and the second pixel opening 11. Of course, in other embodiments, the light-emitting layer can be located only in the first pixel opening, for example, the light-emitting layer only covers the anode block and the first sidewall. The embodiments of this application will be described as an example in which the light-emitting layer covers the anode block and the first sidewall and extends onto the second sidewall, but the invention is not limited thereto.

[0136] In one specific implementation, step S604 includes the following steps:

[0137] A light-emitting layer is formed by using an evaporation process to continuously cover the first cathode auxiliary layer, the pixel definition layer and the anode layer;

[0138] The light emitting layer is patterned, such as Figure 2 As shown, only the light emitting layer 6 located on the anode block 8 and the first side wall 10 and extending to cover a portion of the second side wall 12 is retained;

[0139] forming a cathode layer that continuously covers the first cathode auxiliary layer 5a and the light-emitting layer 6 by an evaporation process; and

[0140] The cathode layer is patterned, and only the cathode layer 7 located on the light emitting layer 6 and extending to the second sidewall 12 is retained.

[0141] The display panel prepared by the above steps is as follows Figure 2 The display panel 1 described in the first embodiment is shown.

[0142] Specifically, in the above steps, the light-emitting layer 6 and the cathode layer 7 can be formed by open mask evaporation and patterning. The patterning technology includes photolithography patterning or laser patterning technology, but is not limited thereto.

[0143] In another specific embodiment, the cathode layer and the light-emitting layer are completely overlapped, and the display panel further includes a second cathode auxiliary layer; step S604 includes the following steps:

[0144] The light-emitting layer and the cathode layer are sequentially formed by an evaporation process; the light-emitting layer continuously covers the first cathode auxiliary layer, the pixel definition layer and the anode layer, and the cathode layer covers the light-emitting layer;

[0145] The light-emitting layer and the cathode layer are patterned in the same process, and only the light-emitting layer and the cathode layer located in the first pixel opening and the second pixel opening and completely overlapping with each other are retained; Figure 3 As shown, in the first pixel opening 9 and the second pixel opening 11 , the light emitting layer 6 is located on the anode block 8 and the first side wall 10 and extends to the second side wall 12 , and the cathode layer 7 is located on the light emitting layer 6 ;

[0146] forming a second cathode auxiliary layer continuously covering the first cathode auxiliary layer 5a and the cathode layer 7; and

[0147] The second cathode auxiliary layer is patterned, and only the second cathode auxiliary layer 5 b located on the cathode layer 7 and the second side wall 12 is retained.

[0148] The display panel 1 manufactured by the above steps is as follows Figure 3 The display panel 1 described in the second embodiment is shown.

[0149] Specifically, in the above steps, the light-emitting layer 6 and the cathode layer 7 can be formed by open mask evaporation combined with patterning treatment; the second cathode auxiliary layer 5b can be formed by evaporation, magnetron sputtering, MOCVD, ALD and other technologies combined with patterning treatment; the patterning treatment includes photolithography patterning or laser patterning technology, but is not limited thereto.

[0150] Specifically, after forming the cathode layer 7, the manufacturing method further includes the following steps:

[0151] An encapsulation layer 13 is formed to continuously cover the first cathode auxiliary layer 5 a and the cathode layer 7 .

[0152] Specifically, the encapsulation layer 13 includes a first inorganic encapsulation layer 13a, an organic encapsulation layer 13b and a second inorganic encapsulation layer 13c stacked in sequence; the first inorganic encapsulation layer 13a covers at least the cathode layer 7 and the second side wall 12; the organic encapsulation layer 13b covers the first inorganic encapsulation layer 13a and the first cathode auxiliary layer 5a; and the second inorganic encapsulation layer 13c covers the organic encapsulation layer 13b.

[0153] Specifically, the first inorganic encapsulation layer 13a can be formed on the entire surface by using any one of chemical vapor deposition (CVD) and atomic layer deposition (ALD) or a combination of the two, and then patterned by using photolithography or laser patterning technology.

[0154] Specifically, the organic encapsulation layer 13b can be formed by inkjet printing technology; the second inorganic encapsulation layer 13c can be formed by any one of CVD and ALD or a superposition of the two, and the material of the second inorganic encapsulation layer 13c can be the same as that of the first inorganic encapsulation layer 13a, but is not limited thereto.

[0155] Specifically, other descriptions about the encapsulation layer 13 can refer to the description in the first embodiment, which will not be repeated here.

[0156] In the embodiment of the present application, a first cathode auxiliary layer 5a is added to the pixel definition layer 4, and the first pixel opening 9 on the pixel definition layer 4 and the second pixel opening 11 on the first cathode auxiliary layer 5a together constitute a pixel opening, which effectively increases the size of the pixel opening; the light-emitting layer 6 and the cathode layer 7 are arranged in the first pixel opening 9 and the second pixel opening 11, so that the light-emitting area is not limited by the size of the first pixel opening 9 of the pixel definition layer 4, effectively increasing the light-emitting area, that is, effectively increasing the aperture ratio, which is beneficial to improving the life and display effect of the OLED device. In addition, both the light-emitting layer 6 and the cathode layer 7 can be evaporated by Open Mask, and then patterned by photolithography patterning or laser patterning technology, realizing FMM-free evaporation of the light-emitting layer (R / G / B) 6, and because the light-emitting layer 6 is evaporated by Open Mask, different thicknesses can be matched, which is beneficial to improving the luminous efficiency and viewing angle performance.

[0157] Example 5

[0158] The present application also provides a method for manufacturing a display panel. The method differs from the fourth embodiment in that, before forming the light-emitting layer, the method further includes the following steps:

[0159] like Figure 4 and Figure 5 As shown, an auxiliary functional layer 14 is formed on the first cathode auxiliary layer 5a; the auxiliary functional layer 14 includes a third pixel opening 15 connected to the second pixel opening 11; the third pixel opening 15 includes a third side wall 17, and the orthographic projection of the second side wall 12 on the base substrate 2 is arranged around or covering the orthographic projection of the third side wall 17 on the base substrate 2; wherein, the orthographic projection of the auxiliary functional layer 14 on the base substrate 2 is adjacent to or overlaps with the orthographic projection of the light-emitting layer 6 on the base substrate 2.

[0160] And, in making Figure 4 In the case of the display panel shown, step S604 and the step of forming the first inorganic encapsulation layer 13a include the following steps:

[0161] A stacked light-emitting layer 6, a cathode layer 7, and a first inorganic encapsulation layer 13a are formed; a portion of the light-emitting layer 6, the cathode layer 7, and the first inorganic encapsulation layer 13a are stacked on the auxiliary function layer 14 (not shown in the figure), and another portion of the light-emitting layer 6, the cathode layer 7, and the first inorganic encapsulation layer 13a are stacked in the first pixel opening 9 and the second pixel opening 11; Figure 4 As shown, in the first pixel opening 9 and the second pixel opening 11, the light-emitting layer 6 is located on the anode block 8 and the first side wall 10 and extends to cover a portion of the second side wall 12, the cathode layer 7 is located on the light-emitting layer 6 and extends to the second side wall 12, and the first inorganic encapsulation layer 13a at least covers the cathode layer 7;

[0162] The light emitting layer 6 , the cathode layer 7 and the first inorganic encapsulation layer 13 a located on the auxiliary functional layer 14 are removed.

[0163] Specifically, the light-emitting layer 6 and the cathode layer 7 can be formed by evaporation, and the first inorganic encapsulation layer 13a can be formed by CVD and / or ALD deposition. It is understood that the first inorganic encapsulation layer 13a can completely wrap the auxiliary functional layer 14, the second sidewall 12 and the cathode layer 7.

[0164] It can be understood that when the light-emitting layer 6 and the cathode layer 7 are evaporated, the light-emitting layer 6 and the cathode layer 7 can be directly disconnected at the undercut structure 16, that is, part of the light-emitting layer 6 and the cathode layer 7 are stacked in the first pixel opening 9 and the second pixel opening 11, and another part of the light-emitting layer 6 and the cathode layer 7 are stacked on the auxiliary functional layer 14.

[0165] Therefore, the light emitting layer 6, cathode layer 7 and first inorganic encapsulation layer 13a on the auxiliary functional layer 14 can be removed at the same time, and only the light emitting layer 6, cathode layer 7 and first inorganic encapsulation layer 13a in the first pixel opening 9 and the second pixel opening 11 are retained.

[0166] like Figure 5 As shown, when the cathode layer 7 and the light-emitting layer 6 are completely overlapped, and the display panel further includes a second cathode auxiliary layer 5b, the steps of forming the light-emitting layer 6, the cathode layer 7, the second cathode auxiliary layer 5b, and the first inorganic encapsulation layer 13a include the following steps:

[0167] A first evaporation process is used to sequentially form a stacked light-emitting layer 6 and a cathode layer 7. A portion of the light-emitting layer 6 and the cathode layer 7 is located on the auxiliary functional layer 14 (not shown in the figure), and another portion of the light-emitting layer 6 and the cathode layer 7 is located in the first pixel opening 9 and the second pixel opening 11. In the first pixel opening 9 and the second pixel opening 11, the light-emitting layer 6 is located on the anode block 8 and the first side wall 10 and extends to cover a portion of the second side wall 12. The cathode layer 7 is completely overlapped with the light-emitting layer 6.

[0168] A second cathode auxiliary layer 5b is formed using a second evaporation process; a portion of the second cathode auxiliary layer 5b covers the cathode layer 7 located on the auxiliary functional layer 14 (not shown in the figure), and another portion of the second cathode auxiliary layer 5b covers the cathode layer 7 located in the first pixel opening 9 and the second pixel opening 11; in the second pixel opening 11, the second cathode auxiliary layer 5b also extends onto the second sidewall 12;

[0169] forming a first inorganic encapsulation layer 13a that wraps the auxiliary functional layer 14, the second side wall 12, and the second cathode auxiliary layer 5b;

[0170] The light emitting layer 6 , the cathode layer 7 , the second cathode auxiliary layer 5 b and the first inorganic encapsulation layer 13 a on the auxiliary functional layer 14 are removed.

[0171] It can be understood that when the light-emitting layer 6, the cathode layer 7 and the second cathode auxiliary layer 5b are formed, they can be directly disconnected at the undercut structure 16, that is, part of the light-emitting layer 6, the cathode layer 7 and the second cathode auxiliary layer 5b are stacked in the first pixel opening 9 and the second pixel opening 11, and another part of the light-emitting layer 6, the cathode layer 7 and the second cathode auxiliary layer 5b are stacked on the auxiliary functional layer 14.

[0172] Therefore, the light-emitting layer 6, cathode layer 7, second cathode auxiliary layer 5b and first inorganic encapsulation layer 13a located on the auxiliary functional layer 14 can be removed at the same time, leaving only the light-emitting layer 6, cathode layer 7, second cathode auxiliary layer 5b and first inorganic encapsulation layer 13a in the first pixel opening 9 and the second pixel opening 11.

[0173] It can be understood that the first evaporation process and the second evaporation process use different evaporation equipment, so that the coverage area of the formed second cathode auxiliary layer 5 b is larger than the coverage area of the light-emitting layer 6 and the cathode layer 7 .

[0174] Of course, the second cathode auxiliary layer 5b can also be formed by using magnetron sputtering, MOCVD, ALD and other technologies.

[0175] It should be noted that the display panel manufacturing method provided in the embodiment of the present application produces the two display panels 1 described in the third embodiment. The relevant structures involved in the embodiment of the present application can refer to the description of the third embodiment and will not be repeated here.

[0176] In the embodiment of the present application, the undercut structure 16 is formed by the auxiliary functional layer 14, so that the light-emitting layer 6, the cathode layer 7 (and the second cathode auxiliary layer 5b) and the first inorganic encapsulation layer 13a can be patterned through a single process, effectively simplifying the process of the EL process section.

[0177] In the above embodiments, the description of each embodiment has its own focus. For parts that are not described in detail in a certain embodiment, reference can be made to the relevant descriptions of other embodiments.

[0178] The above is a detailed introduction to a display panel and a manufacturing method thereof provided in the embodiments of the present application. Specific examples are used herein to illustrate the principles and implementation methods of the present application. The description of the above embodiments is only used to help understand the technical solutions and core ideas of the present application. Ordinary technicians in this field should understand that they can still modify the technical solutions recorded in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. These modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present application.

Claims

1. A display panel, characterized in that: include: a substrate, comprising a plurality of driving devices; an anode layer, located on the substrate and comprising a plurality of anode blocks distributed in an array, wherein the driving device is electrically connected to at least one of the anode blocks; A pixel definition layer is located on the base substrate and includes a first pixel opening corresponding to the anode block; the first pixel opening includes a first sidewall; a first cathode auxiliary layer, located on the pixel definition layer and comprising a second pixel opening communicating with the first pixel opening; The second pixel opening includes a second sidewall, and an orthographic projection of the second sidewall on the base substrate is arranged around an orthographic projection of the first sidewall on the base substrate; a light-emitting layer, covering at least the anode block and the first side wall; as well as a cathode layer, located at least on the light-emitting layer and electrically connected to the first cathode auxiliary layer; The second sidewall includes a first sub-sidewall and a second sub-sidewall sequentially connected in a direction away from the pixel definition layer, the first sub-sidewall and the second sub-sidewall form a stepped structure on a side of the second sidewall close to the pixel definition layer, and a height of the second sub-sidewall from the pixel definition layer is less than a height of the upper surface of the first cathode auxiliary layer from the pixel definition layer; The cathode layer and the light-emitting layer are arranged to overlap and cover at least a portion of the stepped structure; The display panel further includes a second cathode auxiliary layer, which is located on and in contact with the cathode layer, covers at least a portion of the second side wall not covered by the light-emitting layer, and is electrically connected to the first cathode auxiliary layer.

2. The display panel according to claim 1, wherein: The display panel further includes an encapsulation layer; the encapsulation layer includes a first inorganic encapsulation layer, an organic encapsulation layer, and a second inorganic encapsulation layer stacked in sequence; The first inorganic encapsulation layer at least covers the second cathode auxiliary layer and the second sidewall; the organic encapsulation layer covers the first inorganic encapsulation layer and the first cathode auxiliary layer; and the second inorganic encapsulation layer covers the organic encapsulation layer.

3. The display panel according to claim 2, wherein: The display panel further includes an auxiliary functional layer located on the first cathode auxiliary layer; the auxiliary functional layer includes a third pixel opening connected to the second pixel opening; the third pixel opening includes a third sidewall, and an orthographic projection of the second sidewall on the base substrate surrounds or covers an orthographic projection of the third sidewall on the base substrate; The orthographic projection of the auxiliary functional layer on the base substrate is adjacent to or overlaps with the orthographic projection of the light-emitting layer on the base substrate; the first inorganic encapsulation layer is located on the second cathode auxiliary layer and the second side wall, and extends to the bottom of the auxiliary functional layer; the organic encapsulation layer covers the first inorganic encapsulation layer and the auxiliary functional layer.

4. The display panel according to claim 1, wherein: The cathode layer covers the light-emitting layer and extends onto the second sidewall, and is electrically connected to the first cathode auxiliary layer.

5. The display panel according to claim 4, wherein: The display panel further includes an encapsulation layer; the encapsulation layer includes a first inorganic encapsulation layer, an organic encapsulation layer, and a second inorganic encapsulation layer stacked in sequence; The first inorganic encapsulation layer at least covers the cathode layer and the second sidewall; the organic encapsulation layer covers the first inorganic encapsulation layer and the first cathode auxiliary layer; and the second inorganic encapsulation layer covers the organic encapsulation layer.

6. The display panel according to claim 5, wherein: The display panel further includes an auxiliary functional layer located on the first cathode auxiliary layer; the auxiliary functional layer includes a third pixel opening connected to the second pixel opening; the third pixel opening includes a third sidewall, and an orthographic projection of the second sidewall on the base substrate surrounds or covers an orthographic projection of the third sidewall on the base substrate; The orthographic projection of the auxiliary functional layer on the base substrate is adjacent to or overlaps with the orthographic projection of the light-emitting layer on the base substrate; the first inorganic encapsulation layer is located on the cathode layer and the second side wall, and extends to the bottom of the auxiliary functional layer; the organic encapsulation layer covers the first inorganic encapsulation layer and the auxiliary functional layer.

7. The display panel according to claim 1, wherein: The inclination angle of at least a portion of the second sidewall is greater than 0° and less than 90°.

8. The display panel according to claim 7, wherein: The second sidewall includes the first sub-sidewall, the second sub-sidewall, the third sub-sidewall and the fourth sub-sidewall which are sequentially connected to each other in a direction away from the pixel definition layer; the inclination angles of the first sub-sidewall and the third sub-sidewall are both greater than 0° and less than 90°, the inclination angle of the second sub-sidewall is greater than or equal to 0 and less than 90°, and the inclination angle of the fourth sub-sidewall is greater than 0° and less than or equal to 90°; the inclination angles of the fourth sub-sidewall, the third sub-sidewall and the second sub-sidewall decrease sequentially.

9. The display panel according to claim 8, wherein: The inclination angle of the second sub-sidewall is equal to 0°, and the inclination angle of the fourth sub-sidewall is greater than the inclination angles of the first sub-sidewall and the third sub-sidewall.

10. A method for manufacturing a display panel, characterized in that: The following steps are involved: Providing a base substrate and forming an anode layer on the base substrate; the base substrate includes a plurality of driving devices, the anode layer includes a plurality of anode blocks distributed in an array, and one of the driving devices is electrically connected to at least one of the anode blocks; forming a pixel definition layer on the base substrate; the pixel definition layer includes a first pixel opening corresponding to the anode block, and the first pixel opening includes a first sidewall; forming a first cathode auxiliary layer on the pixel definition layer; wherein the first cathode auxiliary layer includes a second pixel opening communicating with the first pixel opening, the second pixel opening includes a second sidewall, and an orthographic projection of the second sidewall on the base substrate is arranged around an orthographic projection of the first sidewall on the base substrate; as well as The light-emitting layer and cathode layer are formed in sequence using the whole-surface film forming technology and the patterning processing technology; The light-emitting layer at least covers the anode block and the first side wall; the cathode layer is at least located on the light-emitting layer and is electrically connected to the first cathode auxiliary layer; The second sidewall includes a first sub-sidewall and a second sub-sidewall sequentially connected in a direction away from the pixel definition layer, the first sub-sidewall and the second sub-sidewall form a stepped structure on a side of the second sidewall close to the pixel definition layer, and a height of the second sub-sidewall from the pixel definition layer is less than a height of the upper surface of the first cathode auxiliary layer from the pixel definition layer; The cathode layer and the light-emitting layer are arranged to overlap and cover at least a portion of the stepped structure; The display panel further includes a second cathode auxiliary layer, which is located on the cathode layer and in contact with the cathode layer, covers at least a portion of the second side wall not covered by the light-emitting layer, and is electrically connected to the first cathode auxiliary layer.

11. The method for manufacturing a display panel according to claim 10, wherein: Before forming the light-emitting layer, the manufacturing method further includes the following steps: forming an auxiliary functional layer on the first cathode auxiliary layer; the auxiliary functional layer including a third pixel opening communicating with the second pixel opening; the third pixel opening including a third sidewall, wherein an orthographic projection of the second sidewall on the base substrate surrounds or covers an orthographic projection of the third sidewall on the base substrate; The orthographic projection of the auxiliary functional layer on the base substrate is adjacent to or overlaps with the orthographic projection of the light-emitting layer on the base substrate.

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