Wafer large resistance test structure, test method and test system

Abstract

This application provides a wafer large resistance testing structure, testing method, and testing system, applied in the field of wafer testing technology. It introduces a parallel capacitive branch to form a parallel test branch for the large resistance structure to be tested on the wafer. Then, a measurement instrument is used to measure the corresponding resistance value of this parallel test branch under AC signals of different frequencies. Based on the measurement results, the resistance value of the large resistance structure to be tested is calculated. This method not only enables the testing of large resistances on wafers but also offers high testing accuracy, a simple testing process, and low testing cost, which is highly beneficial for reducing testing costs and improving production efficiency and quality.

Description

Technical Field

[0001] This application relates to the field of wafer testing technology, specifically to a wafer high resistance testing structure, testing method and testing system. Background Technology

[0002] After wafer fabrication is complete, the wafer is placed on a wafer stage, and the resistance of each chip on the wafer is measured by probes on a measurement machine. However, due to the large number of chips on the wafer, measuring the resistance of each chip is time-consuming, resulting in low wafer measurement efficiency.

[0003] Currently, in the electrical and reliability testing of WAT (Wafer Acceptance Test), the WAT test structure is typically used to test the internal resistance of the wafer. However, due to limitations in the accuracy of the measurement equipment and the testing methods, some high-value resistors cannot be measured accurately, which seriously affects wafer production efficiency, quality, and cost.

[0004] Therefore, a new resistance testing technology solution is needed. Summary of the Invention

[0005] In view of this, the embodiments of this specification provide a wafer large resistance test structure, test method and test system. The test structure is simple, can test large resistance on wafers, and the test accuracy and efficiency are guaranteed.

[0006] The embodiments in this specification provide the following technical solutions:

[0007] This specification provides a wafer large resistance test structure, including: a first test pad, a second test pad, and a capacitive branch;

[0008] The first test pad is connected to the first end of the large resistor structure under test;

[0009] The second test pad is connected to the second end of the large resistor structure under test;

[0010] The first end of the capacitive branch is connected to the first test pad, and the second end of the capacitive branch is connected to the second test pad, so that the capacitive branch and the large resistor structure under test form a parallel test branch.

[0011] The first and second test pads are used by the measuring machine to measure the resistance values ​​corresponding to at least two sets of AC signals for the parallel test branch. The resistance value of the large resistor structure under test is obtained through the following set of equations:

[0012]

[0013] Among them, R testR represents the resistance value of the large resistor structure under test. C1 R is the resistance value of the capacitive branch under the action of the first group of AC signals at frequency f1; C2 R1 is the resistance value of the capacitive branch under the action of the second set of AC signals at frequency f2; R2 is the resistance value of the parallel test branch measured by the measuring instrument under the first set of AC signals at frequency f1; R3 is the resistance value of the parallel test branch measured by the measuring instrument under the second set of AC signals at frequency f2.

[0014] This specification also provides a wafer large resistance test structure, including: a first test pad, a second test pad, a third test pad, and a capacitive branch;

[0015] The first test pad is connected to the first end of the large resistor structure under test and the first end of the capacitive branch;

[0016] The second test pad is connected to the second end of the capacitive branch;

[0017] The third test pad is connected to the second end of the large resistor structure under test;

[0018] The first and second test pads are used by the measuring instrument to measure the capacitance of the capacitive branch. After the capacitance of the capacitive branch is measured, the second and third test pads are connected so that the capacitive branch and the large resistor under test form a parallel test branch. The first and second test pads are used by the measuring instrument to measure the resistance corresponding to at least one set of AC signals in the parallel test branch. The resistance value of the large resistor under test is obtained by the following equation:

[0019]

[0020] Among them, R test R represents the resistance value corresponding to the large resistive structure under test. C1 Let f be the resistance value of the capacitive branch under the action of a set of AC signals at frequency f1. C is the capacitance value of the capacitive branch; R is the resistance value measured by the measuring instrument on the parallel test branch under a set of AC signals at frequency f1.

[0021] Preferably, in any example, the capacitive branch includes a capacitive branch disposed on the wafer.

[0022] Preferably, in any example, the capacitive branch disposed on the wafer includes a capacitor disposed on the wafer.

[0023] Preferably, in any example, the first test pad and the second test pad are test pads in the WAT test project.

[0024] Preferably, in any example, when at least two sets of AC signal measurements are performed, the frequencies of the multiple sets of AC signals are in a multiple relationship.

[0025] This specification also provides a wafer high resistance testing system, characterized in that it includes a measurement instrument, a probe card, and a wafer high resistance testing structure as described in any one of the specifications.

[0026] When the wafer large resistance test structure includes a first test pad and a second test pad, and the capacitive branch and the large resistance structure under test form a parallel test branch, the measurement instrument uses a probe card to measure the resistance value corresponding to at least two sets of AC signals in the parallel test branch.

[0027] Alternatively, when the wafer large resistance test structure includes a first test pad, a second test pad, and a third test pad, before the second test pad is connected to the third test pad, the measurement equipment first measures the capacitance value of the capacitive branch through a probe card. After the second test pad is connected to the third test pad, so that the capacitive branch and the large resistance structure under test form a parallel test branch, the measurement equipment also measures the resistance value corresponding to at least one set of AC signals on the parallel test branch through a probe card.

[0028] Preferably, the measuring equipment includes a machine for performing WAT testing.

[0029] This specification also provides a wafer high resistance testing method, applied to the wafer high resistance testing system as described in any one of these specifications, the wafer high resistance testing method comprising:

[0030] The parallel test branch is formed by measuring the resistance value of at least two sets of AC signals or at least one set of AC signals in the parallel test branch using a measuring instrument. The parallel test branch is the parallel branch composed of the capacitive branch in the wafer large resistance test structure and the large resistance structure under test.

[0031] The resistance value of the large resistor structure under test is calculated based on the frequency of the AC signal used in the measurement and the resistance value obtained from the parallel test branch.

[0032] Preferably, measuring the resistance value of the parallel test branch under at least two sets of AC signals or at least one set of AC signals using a measuring machine includes: performing multiple measurements on the parallel test branch under the same set of AC signals using a measuring machine, and determining the resistance value of the parallel test branch under the same set of AC signals based on the results of the multiple measurements.

[0033] Compared with the prior art, the beneficial effects that at least one technical solution adopted in the embodiments of this specification can achieve include at least:

[0034] By introducing a parallel capacitive branch to the large resistor structure under test on the wafer to form a parallel test branch, and then using a measurement and testing machine to measure the corresponding resistance value of the parallel test branch under AC signals of different frequencies, the resistance value of the large resistor structure under test can be calculated based on the measurement results. Not only can large resistors on the wafer be tested, but the testing accuracy is also high, the testing process is simple, and the testing cost is low. This is very beneficial for reducing testing costs and improving production efficiency and quality. Attached Figure Description

[0035] To more clearly illustrate the technical solutions of the embodiments of this application, the drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0036] Figure 1 This is a schematic diagram of a wafer large resistance testing structure according to this application;

[0037] Figure 2 This is a schematic diagram of another wafer large resistance testing structure in this application;

[0038] Figure 3 This is a schematic diagram of the structure of a wafer high resistance testing system according to this application;

[0039] Figure 4 This is a flowchart of a wafer high resistance testing method according to this application. Detailed Implementation

[0040] The embodiments of this application will now be described in detail with reference to the accompanying drawings.

[0041] The following specific examples illustrate the implementation of this application. Those skilled in the art can easily understand other advantages and effects of this application from the content disclosed in this specification. Obviously, the described embodiments are only a part of the embodiments of this application, and not all of them. This application can also be implemented or applied through other different specific embodiments, and the details in this specification can also be modified or changed based on different viewpoints and applications without departing from the spirit of this application. It should be noted that, in the absence of conflict, the following embodiments and features in the embodiments can be combined with each other. Based on the embodiments in this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0042] It should be noted that various aspects of embodiments within the scope of the appended claims are described below. It will be apparent that the aspects described herein can be embodied in a wide variety of forms, and any particular structure and / or function described herein is merely illustrative. Based on this application, those skilled in the art will understand that one aspect described herein can be implemented independently of any other aspect, and two or more of these aspects can be combined in various ways. For example, any number and aspects set forth herein can be used to implement the device and / or practice the method. Additionally, this device and / or method can be implemented using structures and / or functionalities other than one or more of the aspects set forth herein.

[0043] It should also be noted that the illustrations provided in the following embodiments are only schematic representations of the basic concept of this application. The drawings only show the components related to this application and are not drawn according to the actual number, shape and size of the components in the actual implementation. In the actual implementation, the form, quantity and proportion of each component can be arbitrarily changed, and the layout of the components may also be more complex.

[0044] Additionally, specific details are provided in the following description to facilitate a thorough understanding of the examples. However, those skilled in the art will understand that practice can be carried out without these specific details.

[0045] Existing solutions can only use measurement equipment to directly test the resistance value of resistors on the wafer. However, due to the limitations of the measurement equipment itself, large resistors on the wafer cannot be measured directly using the measurement equipment, and it is even more impossible to obtain high-precision large resistor value measurement results directly using the measurement equipment.

[0046] In view of this, through in-depth research and improvement of the measurement mechanism of the measuring machine and the resistance measurement circuit, it was found that:

[0047] On the one hand, although there are various circuit forms in the existing technology that can accurately measure the resistance value of resistors, these circuit forms often require a lot of circuit area, and these test circuits cannot be implemented on the wafer. Therefore, these existing test circuits are basically not applicable to the resistance value measurement of large resistors on the wafer.

[0048] Secondly, although the measuring machine can directly measure the resistance of some resistors, the resistance of these resistors is often moderate. Therefore, the measuring machine itself has a mechanism for measuring resistance, which makes it difficult to measure large resistance values.

[0049] Based on this, the embodiments of this specification propose a wafer high resistance testing processing scheme: such as Figure 1 As shown, although the resistance value R of the large resistor structure under test is... testThe resistance is too large to be directly measured using a measuring machine. However, an auxiliary test branch (e.g., a parallel connection is made to the large resistor structure under test) to measure it. Figure 1 After the capacitive branch shown in the diagram, the large resistance junction under test and the auxiliary test branch must form a parallel test branch. That is, both the large resistance junction under test and the auxiliary test branch are branches in the parallel test branch. Therefore, according to the principle of parallel circuits, that is, "the reciprocal of the resistance value corresponding to the parallel test branch must be equal to the sum of the reciprocals of the resistance values ​​corresponding to the two branches", the reciprocal of the large resistance value corresponding to the large resistance structure under test will no longer be a large value, but will be converted to a more moderate value. Therefore, as long as the resistance value of the auxiliary test branch is selected appropriately, it can be ensured that the resistance value corresponding to the parallel test branch will not exceed the direct measurement range of the measuring instrument. Thus, the resistance value corresponding to the parallel test branch can be directly measured by the measuring instrument. Then, the resistance value of the large resistance structure under test can be calculated by using the measured resistance value of the parallel test branch.

[0050] It should be noted that the resistance value of the auxiliary test branch should be selected appropriately. That is, the resistance value of the auxiliary test branch should not be too small or too large. This is because if the resistance value is too small, the reciprocal of the auxiliary test branch in the parallel test branch will inevitably be a very large resistance value. In this case, the measuring machine will also be limited by itself and will not be able to measure the corresponding resistance value of the parallel test branch. If the resistance value is too large, since the auxiliary test branch is connected in parallel with the large resistor structure under test, the auxiliary test branch can easily introduce other influences into the resistance value test of the large resistor structure under test, thereby affecting the accuracy of the resistance value test of the large resistor structure under test.

[0051] In addition, the resistance of the parallel test branch formed by the auxiliary test branch and the large resistor structure under test can be directly measured using a measuring machine. Therefore, as long as the resistance of the auxiliary test branch is known, or the resistance of the auxiliary test branch is unknown but can change according to a known pattern with the test conditions, the resistance of the large resistor structure under test can be calculated back using the measurement results.

[0052] The technical solutions provided by the various embodiments of this application are described below with reference to the accompanying drawings.

[0053] like Figure 1 As shown in the embodiment of this specification, a wafer large resistance test structure is provided, including: a first test pad PAD1, a second test pad PAD2, and a capacitive branch, wherein the capacitive branch is marked Xc; the first test pad PAD1 is connected to the first end of the large resistance structure under test, and the large resistance structure under test is marked R. testThe second test pad PAD2 is connected to the second end of the large resistor structure under test; and the first end of the capacitive branch is connected to the first test pad PAD1, and the second end of the capacitive branch is connected to the second test pad PAD2. At this time, the capacitive branch and the large resistor structure under test form a parallel test branch.

[0054] As analyzed above, when a capacitive branch is used as an auxiliary test branch, the resistance value of the capacitive device is related to the signal frequency, i.e., the reactance value Xc = 2πfC, where C is the capacitance value and f is the signal frequency. Therefore, even without knowing the capacitance value, the resistance value of the large resistor structure under test can be obtained by solving a system of equations using at least two measurement results corresponding to the parallel test branch.

[0055] Specifically, the first test pad PAD1 and the second test pad PAD2 are used on the measurement machine. Figure 1 (Not shown in the diagram) At least two sets of AC signal corresponding resistance values ​​are measured for the parallel test branch, thereby obtaining two sets of measured values. The resistance value of the large resistor structure under test can then be obtained through the following set of equations:

[0056]

[0057] Among them, R test R represents the resistance value of the large resistor structure under test. C1 R is the resistance value of the capacitive branch under the action of the first group of AC signals at frequency f1; C2 R1 is the resistance value of the capacitive branch under the action of the second set of AC signals at frequency f2; R2 is the resistance value of the parallel test branch measured by the measuring instrument under the first set of AC signals at frequency f1; R3 is the resistance value of the parallel test branch measured by the measuring instrument under the second set of AC signals at frequency f2.

[0058] It should be noted that the above test assumes the capacitance value of the capacitive branch is unknown, therefore even if R... C1 R C2 As unknowns, but since the AC signal frequencies f1 and f2 are known, R is used in the test. C1 With R C2 The relationship between them is necessarily related to the relationship between f1 and f2, so the resistance R corresponding to the large resistor structure under test can still be calculated by using the two sets of resistance measurement results corresponding to the parallel test branch. test .

[0059] It should be noted that the measuring instrument can be an existing instrument used for WAT testing, or other instruments capable of measuring resistance; there are no restrictions here.

[0060] In summary, only simple auxiliary test branches (such as...) are needed. Figure 1(Illustrated capacitive branch) is connected in parallel to the large resistor structure under test during the test. This converts the large resistance value of the large resistor structure under test into a moderate reciprocal. Moreover, this reciprocal is part of the reciprocal of the resistance value in the parallel test branch. Therefore, the large resistance value in the parallel test branch can be represented as a parameter that can be calculated after the test. In addition, the overall test structure is simple, low in cost, and easy to complete the test using existing wafer resistance measurement equipment. The test has high accuracy, low cost, and high efficiency, which is very beneficial to reducing wafer production testing costs and improving production efficiency and quality.

[0061] In some examples, since the wafer needs to undergo WAT testing, namely electrical performance and reliability testing, the test pads in the various examples of this application can be the test pads in the WAT testing project.

[0062] It should be noted that in wafer manufacturing, WAT is a common test item used to test a predetermined test structure. Moreover, the test structure (testkey) can often be set in the dicing groove of the wafer, and the test is performed by test probes hitting the test pad.

[0063] Therefore, the test pads, branches, etc. involved in the test structure can be circuit elements, circuit structures, etc. set on the wafer (or set in the dicing slot of the wafer).

[0064] In one example, the capacitive branch used as an auxiliary test branch can be a capacitive branch located on the wafer. This allows the resistance of the capacitive branch to follow the frequency changes of the test signal, enabling the resistance of the parallel test branch to also change according to the signal frequency. This allows the measurement equipment to measure the resistance of the parallel test branch at different signal frequencies. Even if the resistance of the capacitive branch is unknown, the large resistance value to be measured can be calculated from multiple sets of measurement results.

[0065] In one example, the capacitive branch includes a capacitor, meaning the capacitive branch can be a branch composed of capacitors, further simplifying the circuit structure and form of the auxiliary test branch, reducing the circuit area required for the auxiliary test branch, and making the test structure easier to implement on the wafer (or the wafer dicing slot).

[0066] In one example, numerous test pads within the dicing grooves of the wafer can be used to construct the first test pad, second test pad, and other pads in the test structure. In a specific implementation, the first test pad PAD1, the second test pad PAD2, and other pads are test pads in the WAT test project.

[0067] In some implementations, since a capacitive branch is used as the parallel branch of the large resistance structure under test, it is not necessary to know the resistance value of the capacitive branch in advance. It is only necessary to maintain the proportional relationship between the frequencies of the multiple AC signals when measuring at least two sets of AC signals, such as the ratio of multiples, and then it is very convenient to back-calculate the value.

[0068] For example, because the impedance Xc of the capacitive branch has the following relationship with the frequency f and capacitance C: Xc = 1 / (2πfC), in the measurement, it is only necessary to set 2f1 = f2, then Xc = 1 / (2πfC). C1 =2X C2 That is, in the aforementioned formula, there exists R. C1 =2R C2 It should be noted that here the impedance Xc is labeled as the resistance value R. C This application does not make any distinction.

[0069] Based on the same inventive concept, embodiments of this specification also provide a wafer large resistance test structure, which can calculate the resistance value of the large resistance structure under test by combining the continuous resistance value of the capacitive branch with at least one set of measured resistance values.

[0070] like Figure 2 As shown, a wafer large resistance test structure includes: a first test pad PAD1, a second test pad PAD2, a third test pad PAD3, and a capacitive branch. The first test pad PAD1 is connected to the first end of the large resistance structure under test and the first end of the capacitive branch; the second test pad PAD2 is connected to the second end of the capacitive branch; and the third test pad PAD3 is connected to the second end of the large resistance structure under test.

[0071] First, there is no connection between the second test pad PAD2 and the third test pad PAD3 (using...). Figure 2 (The dashed lines indicate that the circuit is not connected). The first test pad PAD1 and the second test pad PAD2 are used by the measuring machine to measure the capacitance value of the capacitive branch. The measuring machine can use the mechanism of capacitance value C = Q / V to measure the accurate capacitance value C of the capacitive branch.

[0072] Then, after measuring the capacitance value of the capacitive branch, the second test pad PAD2 and the third test pad PAD3 are connected. That is, after connection, the second test pad PAD2 and the third test pad PAD3 are equivalent to the aforementioned... Figure 1 The second test pad PAD2 shown is... Figure 2 Structure and Figure 1With similar structures, the capacitive branch and the large resistor under test form a parallel test branch. Therefore, the first test pad PAD1 and the second test pad PAD2 (since the second test pad PAD2 and the third test pad PAD3 are shorted, the third test pad PAD3 can also be used here) are used by the measuring machine to measure the resistance value corresponding to at least one set of AC signals in the parallel test branch.

[0073] Therefore, the resistance value of the large resistor structure to be tested can be obtained by the following equation:

[0074]

[0075] Among them, R test R represents the resistance value corresponding to the large resistive structure under test. C1 Let f be the resistance value of the capacitive branch under the action of a set of AC signals at frequency f1. C is the capacitance value of the capacitive branch. The capacitance value C has been accurately measured by the measuring instrument, so as long as the frequency f1 is determined, then R C This allows us to determine that R is the resistance value measured by the measuring machine on the parallel test branch under a set of AC signals at frequency f1.

[0076] By adding a test pad to the test structure, the capacitance C can be measured simultaneously. Furthermore, by connecting PAD2 and PAD3 in series, the result can be converted to the aforementioned value. Figure 1 The illustrated test structure, while adding test functionality, can significantly save on test structure area and is easier to deploy applications in the middle of wafer testing.

[0077] In some implementations, in any of the foregoing examples, when using a measuring machine for measurement, multiple measurements can be taken under the same test conditions, thereby using the multiple measurement data to form a measurement result that is closer to the true value, such as by taking the average value to obtain the measurement result under the same conditions.

[0078] In some implementations, in any of the foregoing examples, the measuring instrument may perform AC signal measurement signal sets more than once, twice, or even more times, thereby utilizing more data to obtain R that is closer to the true value. test .

[0079] It should be noted that the aforementioned Figure 1 The corresponding example content can also be used. Figure 2 In various embodiments, for example, the capacitive branch is disposed on the wafer (or the dicing groove of the wafer), and the capacitive branch is preferably composed of a capacitor, etc., which will not be listed one by one.

[0080] Based on the same inventive concept, embodiments of this specification also provide a wafer high resistance testing system, thereby automatically obtaining wafer high resistance results using the testing system.

[0081] like Figure 3 This illustration shows a wafer high resistance testing system, including a measurement instrument 10, a probe card 20, and a wafer high resistance testing structure 30 as described in any example of this specification.

[0082] It should be noted that when the wafer large resistance test structure 30 includes a first test pad and a second test pad, and the capacitive branch and the large resistance structure under test form a parallel test branch, the measurement instrument 10 measures the resistance values ​​corresponding to at least two sets of AC signals on the parallel test branch through the probe card 20.

[0083] Therefore, after obtaining at least two sets of measurement results, the large resistance value can be calculated using a set of equations (see the set of equations in the previous example).

[0084] Alternatively, when the wafer large resistance test structure includes a first test pad, a second test pad, and a third test pad, before the second test pad is connected to the third test pad, the measurement instrument 10 first measures the capacitance value of the capacitive branch through the probe card 20. After the second test pad is connected to the third test pad, so that the capacitive branch and the large resistance structure under test form a parallel test branch, the measurement instrument 10 also measures the resistance value corresponding to at least one set of AC signals on the parallel test branch through the probe card 20.

[0085] Therefore, since the capacitance value C of the device being tested can be measured, the large resistance value can be calculated using at least one set of measurement results through an equation (see the equation in the example above).

[0086] In the above examples, the specific structure of the wafer high resistance test structure 30 can be found in the corresponding implementation examples above, and the probe card 20 can be a probe of the measurement instrument 10 for wafer testing, which will not be elaborated here.

[0087] Furthermore, the measurement equipment includes equipment used for WAT testing, meaning that there is no need to invest in equipment costs, and testing can be carried out directly using WAT testing equipment. Moreover, the accuracy is guaranteed when using WAT measurement equipment.

[0088] Based on the same inventive concept, this specification also provides a wafer high resistance testing method, which is applied to the wafer high resistance testing system described in any of the foregoing examples, thereby applying different AC signals to the test structure through a measurement instrument to measure the resistance value.

[0089] like Figure 4 The wafer high resistance testing method, as illustrated, includes:

[0090] Step S202: Use a measurement instrument to measure the resistance value of the parallel test branch under at least two sets of AC signals or at least one set of AC signals. The parallel test branch is a parallel branch composed of the capacitive branch in the wafer large resistance test structure and the large resistance structure to be tested.

[0091] For example, first use an AC signal with a frequency of f1 to perform the measurement, and the resistance value of the parallel test branch is measured to be R1;

[0092] Then, using an AC signal with a frequency of f2, the resistance of the parallel test branch was measured to be R2.

[0093] Assuming f1 = 2f2, since the capacitance Rc = 1 / (2πfC), there exists R C1 =2R C2 Substituting these values ​​into the formula set from the previous example allows us to calculate the large resistance value R. test .

[0094] Step S204: Calculate the resistance value of the large resistor structure under test based on the frequency of the AC signal used in the measurement and the resistance value obtained from the parallel test branch.

[0095] It should be noted that the test structure and calculation process can be referred to the corresponding implementation examples mentioned above, and will not be elaborated here.

[0096] In some implementations, a larger resistance value closer to the true value can be obtained using more sets of measurement data. Specifically, measuring the resistance value of the parallel test branch under at least two sets of AC signals or at least one set of AC signals using a measuring instrument includes: performing multiple measurements on the parallel test branch under the same set of AC signals using a measuring instrument, and determining the resistance value of the parallel test branch under the same set of AC signals based on the results of the multiple measurements.

[0097] It should be noted that multiple sets of data can be processed using methods such as averaging and smoothing filtering; no specific limitations are made here.

[0098] In this specification, the same or similar parts between the various embodiments can be referred to mutually. Each embodiment focuses on describing the differences from other embodiments. In particular, the descriptions of the embodiments described later are relatively simple, and relevant parts can be referred to the descriptions of the foregoing embodiments.

[0099] The above description is merely a specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the technical scope disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

Claims

1. A wafer high resistance testing structure, characterized in that, include: First test pad, second test pad, and capacitive branch; The first test pad is connected to the first end of the large resistor structure under test; The second test pad is connected to the second end of the large resistor structure under test; The first end of the capacitive branch is connected to the first test pad, and the second end of the capacitive branch is connected to the second test pad, so that the capacitive branch and the large resistor structure under test form a parallel test branch. The first and second test pads are used by the measuring machine to measure the resistance values ​​corresponding to at least two sets of AC signals for the parallel test branch. The resistance value of the large resistor structure under test is obtained through the following set of equations: Among them, R test R represents the resistance value of the large resistor structure under test. C1 R is the resistance value of the capacitive branch under the action of the first group of AC signals at frequency f1; C2 R1 is the resistance value of the capacitive branch under the action of the second set of AC signals at frequency f2; R2 is the resistance value of the parallel test branch measured by the measuring instrument under the first set of AC signals at frequency f1; R3 is the resistance value of the parallel test branch measured by the measuring instrument under the second set of AC signals at frequency f2.

2. A wafer high resistance testing structure, characterized in that, include: First test pad, second test pad, third test pad, and capacitive branch; The first test pad is connected to the first end of the large resistor structure under test and the first end of the capacitive branch; The second test pad is connected to the second end of the capacitive branch; The third test pad is connected to the second end of the large resistor structure under test; The first and second test pads are used by the measuring instrument to measure the capacitance of the capacitive branch. After the capacitance of the capacitive branch is measured, the second and third test pads are connected so that the capacitive branch and the large resistor under test form a parallel test branch. The first and second test pads are used by the measuring instrument to measure the resistance corresponding to at least one set of AC signals in the parallel test branch. The resistance value of the large resistor under test is obtained by the following equation: Among them, R test R represents the resistance value corresponding to the large resistive structure under test. C1 Let f be the resistance value of the capacitive branch under the action of a set of AC signals at frequency f1. C is the capacitance value of the capacitive branch; R is the resistance value measured by the measuring instrument on the parallel test branch under a set of AC signals at frequency f1.

3. The wafer high resistance test structure according to claim 1 or 2, characterized in that, Capacitive branches include capacitive branches disposed on the wafer.

4. The wafer high resistance test structure according to claim 3, characterized in that, Capacitive branches disposed on the wafer include capacitors disposed on the wafer.

5. The wafer high resistance test structure according to claim 1 or 2, characterized in that, The first and second test pads are test pads in the WAT test project.

6. The wafer high resistance test structure according to claim 1 or 2, characterized in that, When measuring at least two sets of AC signals, the frequencies of the multiple sets of AC signals are in a multiple relationship.

7. A wafer high resistance testing system, characterized in that, Includes a measurement instrument, a probe card, and a wafer high resistance test structure as described in any one of claims 1-6; When the wafer large resistance test structure includes a first test pad and a second test pad, and the capacitive branch and the large resistance structure under test form a parallel test branch, the measurement instrument uses a probe card to measure the resistance value corresponding to at least two sets of AC signals in the parallel test branch. Alternatively, when the wafer large resistance test structure includes a first test pad, a second test pad, and a third test pad, before the second test pad is connected to the third test pad, the measurement equipment first measures the capacitance value of the capacitive branch through a probe card. After the second test pad is connected to the third test pad, so that the capacitive branch and the large resistance structure under test form a parallel test branch, the measurement equipment also measures the resistance value corresponding to at least one set of AC signals on the parallel test branch through a probe card.

8. The wafer high resistance testing system according to claim 7, characterized in that, Measurement equipment includes equipment used for WAT testing.

9. A method for testing the high resistance of a wafer, characterized in that, The wafer high resistance testing system as described in any one of claims 7-8, wherein the wafer high resistance testing method comprises: The parallel test branch is formed by measuring the resistance value of at least two sets of AC signals or at least one set of AC signals in the parallel test branch using a measuring instrument. The parallel test branch is the parallel branch composed of the capacitive branch in the wafer large resistance test structure and the large resistance structure under test. The resistance value of the large resistor structure under test is calculated based on the frequency of the AC signal used in the measurement and the resistance value obtained from the parallel test branch.

10. The wafer high resistance testing method according to claim 9, characterized in that, Measuring the resistance of a parallel test branch under at least two sets of AC signals or at least one set of AC signals using a measuring instrument includes: performing multiple measurements on the parallel test branch under the same set of AC signals using a measuring instrument, and determining the resistance value of the parallel test branch under the same set of AC signals based on the results of the multiple measurements.

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