Display panel, output voltage compensation method and display device

Abstract

The application discloses a display panel, an output voltage compensation method and a display device. The display panel comprises a driving chip, a timing controller, a processor module and a detection module. The timing controller is connected with the driving chip and is configured to provide a first timing of a scanning signal and a second timing of a video signal to the driving chip. The detection module is configured to acquire light-emitting data of a pixel unit. The processor module is configured to compensate an output voltage of the driving chip according to the light-emitting data, the first timing and the second timing. The display panel provided by the application compensates the output voltage of the pixel unit by combining the first timing of the scanning signal, the second timing of the video signal and the light-emitting data of the pixel unit, so that the actual value of the output voltage is kept as a constant value, thereby solving the split-screen problem of the display panel and improving the display effect of the display device.

Description

Technical Field

[0001] The embodiments of this application relate to the field of liquid crystal display technology, and particularly to a display panel, an output voltage compensation method, and a display device. Background Technology

[0002] Existing LCD panels consist of multiple light-emitting (display) and non-light-emitting (blank) phases within a single frame of video signal. When the scan signal is at a high level and enters the non-light-emitting phase, a voltage drop in the light-emitting voltage of the pixel unit can easily occur, leading to screen splitting issues on the display panel and consequently affecting the display effect of the display device. Summary of the Invention

[0003] The embodiments of this application provide a display panel, an output voltage compensation method, and a display device to solve the technical problem in the prior art where a voltage drop in the light-emitting voltage causes the display panel to split.

[0004] To address the aforementioned technical problems, embodiments of this application disclose the following technical solutions:

[0005] In a first aspect, a display panel is provided, comprising:

[0006] Driver chip;

[0007] A timing controller, connected to the driver chip, is configured to provide the driver chip with a first timing sequence of a scan signal and a second timing sequence of a video signal;

[0008] The driving chip includes a processor module and a detection module. The detection module is configured to acquire light emission data of pixel units, and the processor module is configured to compensate the output voltage of the driving chip according to the light emission data, the first timing sequence, and the second timing sequence.

[0009] Secondly, a method for compensating the output voltage of a display panel is provided, including:

[0010] Acquire the first timing sequence of the scan signal and the second timing sequence of the video signal;

[0011] Obtain the luminescence data of the pixel unit;

[0012] The output voltage of the driver chip is compensated based on the light emission data, the first timing sequence, and the second timing sequence.

[0013] Thirdly, a display device is provided, the display device comprising a display panel as described in any one of the first aspects, or the display device employs an output voltage compensation method for the display panel as described in the second aspect to compensate the output voltage. Attached Figure Description

[0014] The technical solution and other beneficial effects of this application will become apparent from the following detailed description of specific embodiments in conjunction with the accompanying drawings.

[0015] Figure 1 A partial structural diagram of the display panel provided in an embodiment of this application;

[0016] Figure 2 A timing diagram illustrating the voltage setpoint and actual value before compensation, provided for an embodiment of this application;

[0017] Figure 3 A timing diagram illustrating the compensated voltage setpoint and actual value provided in an embodiment of this application;

[0018] Figure 4 A partial schematic diagram of the first timing and the second timing provided for embodiments of this application.

[0019] The attached figures are labeled as follows:

[0020] 100 - Pixel unit, 200 - Detection signal line, 300 - Drive signal line, 400 - Scan signal line. Detailed Implementation

[0021] This application embodiment further provides, in conjunction with the first aspect, that the light emission data includes the high-level duration of the scanning signal and the overlap time T of the blanking region, the column resolution V of the display panel, the light emission current I of the pixel unit, and the resistance R of the output voltage;

[0022] The processor module is configured to obtain a compensation value U based on the luminescence data. add The calculation formula includes:

[0023] U add = (T / 2)V*I*R.

[0024] This application embodiment further provides, in conjunction with the first aspect, that the processor module is configured to obtain the compensation time period of the output voltage according to the first timing sequence and the second timing sequence;

[0025] The processor module obtains the overlapping area between the high level of the first timing sequence and the blanking region of the second timing sequence;

[0026] The processor module determines whether the overlapping area is located within the display area of ​​the display panel;

[0027] In response to the overlapping area being located in the display area, the processor module calculates the compensation time period.

[0028] This application embodiment further provides, in conjunction with the first aspect, that the compensation time period includes a compensation time start point, a compensation time end point, and a compensation duration.

[0029] This application embodiment further provides, in conjunction with the first aspect, that the driving chip further includes a voltage generation module, the voltage generation module being connected to the processor module, the processor module being configured to calculate a compensation value based on the light emission data, and the processor module being configured to calculate a compensation time period based on the first timing sequence and the second timing sequence;

[0030] The voltage generation module is configured to compensate the generated output voltage according to the compensation value and the compensation time period.

[0031] This application embodiment further provides, in conjunction with the first aspect, that the driving chip further includes a pixel driving module, the pixel driving module being connected to the voltage generation module and the pixel unit, and the pixel driving module being configured to drive the pixel unit to emit light according to the compensated output voltage;

[0032] The pixel driving module is connected to the pixel unit via a driving signal line.

[0033] This application further provides, in conjunction with the first aspect, a scan driving module, which is connected to the timing controller and connected to the pixel unit via a scan signal line, and controls the pixel unit via the scan signal.

[0034] This application embodiment further provides, in conjunction with the first aspect, that the detection module acquires the light emission data through a detection signal line connected to the pixel unit.

[0035] One of the above technical solutions has the following advantages or beneficial effects:

[0036] Compared with existing technologies, this application provides a display panel comprising: a driver chip; a timing controller connected to the driver chip, the timing controller being configured to provide the driver chip with a first timing sequence of a scanning signal and a second timing sequence of a video signal; the driver chip includes a processor module and a detection module, the detection module being configured to acquire light emission data of pixel units, and the processor module being configured to compensate the output voltage of the driver chip based on the light emission data, the first timing sequence, and the second timing sequence. In the display panel provided by this application, the driver chip combines the first timing sequence of the scanning signal, the second timing sequence of the video signal, and the light emission data of the pixel units to compensate the output voltage of the pixel units, ensuring that the actual value of the output voltage remains constant, thereby solving the screen splitting problem of the display panel and improving the display effect of the display device.

[0037] This application also provides a method for compensating the output voltage of a display panel, comprising: acquiring a first timing sequence of a scanning signal and a second timing sequence of a video signal; acquiring light emission data of a pixel unit; and compensating the output voltage of a driver chip based on the light emission data, the first timing sequence, and the second timing sequence. The method provided in this application compensates for the output voltage, thereby solving the screen splitting problem of the display panel and improving the display effect of the display device.

[0038] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. In the description of this application, it should be understood that the terms "center," "longitudinal," "lateral," "length," "width," "thickness," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," "clockwise," and "counterclockwise," etc., indicating the orientation or positional relationship, are based on the orientation or positional relationship shown in the accompanying drawings and are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this application. Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Thus, features defined with "first" and "second" may explicitly or implicitly include one or more of the stated features. In the description of this application, "multiple" means two or more, unless otherwise explicitly specified.

[0039] Those skilled in the art have noted that when the pixel driving circuit of existing OLED products operates in PWM mode, there are generally multiple light-emitting and non-light-emitting phases within a single frame of video signal. When the EM high level is in the Porch (blank) region, if the ELVDD voltage drop (IR Drop) is too large, multi-segment splitting will occur on the display screen. The main reason for multi-segment splitting is that the EM has multiple long-duration pulses. When the EM high-level pulse enters the Porch region, it causes an increase in the front light-emitting area of ​​the display screen, i.e., an IR Drop occurs in the ELVDD voltage. If data is written to the control terminal of the thin-film transistor in the pixel driving circuit at this moment, the potential of the control terminal of the thin-film transistor will be too high during the ELVDD recovery process, causing some areas of the display screen to be darker, resulting in multi-segment splitting. Figure 2As shown, without compensation for ELVDD, the set output value of ELVDD for the entire frame is a constant voltage value. When the EM high-level pulse begins to enter the Porch area, the actual light-emitting area increases, and due to the IR Drop, the actual voltage value of ELVDD decreases. When the EM high-level pulse begins to enter the in-plane display area of ​​the display panel, the actual light-emitting area decreases, i.e., the IR Drop decreases, and the ELVDD voltage value begins to return to its original value. Therefore, this application provides compensation for the voltage value of ELVDD when the EM Pulse high level enters the Porch area and the in-plane AA area, thereby eliminating the voltage jump caused by the IR Drop, avoiding screen splitting problems on the display panel, and thus improving the display effect of the display panel.

[0040] The specific implementation methods of this application are illustrated below through examples:

[0041] like Figure 1 As shown in the illustration, this application provides a display panel, including: a driver chip; a timing controller connected to the driver chip, configured to provide the driver chip with a first timing sequence of a scanning signal and a second timing sequence of a video signal; the driver chip includes a processor module and a detection module, the detection module being configured to acquire light emission data of pixel unit 100, and the processor module being configured to compensate the output voltage of the driver chip based on the light emission data, the first timing sequence, and the second timing sequence. Specifically, the driver chip is used to control the voltage and current of the pixel unit 100, the detection module acquires the light emission data required by the pixel unit 100, and the processor module calculates the compensation value of the output voltage ELVDD by combining the light emission data; furthermore, the processor module is also used to calculate the time point and duration of the voltage drop in the output voltage ELVDD by combining the first timing sequence of the scanning signal and the second timing sequence of the video signal, thereby achieving precise compensation of the output voltage ELVDD at the corresponding time point, so that the compensation value of the output voltage ELVDD cancels out the voltage drop, ensuring that the actual output voltage is a constant value. By compensating for the output voltage ELVDD, the voltage drop problem of the output voltage ELVDD is improved, the screen splitting problem of the display panel is avoided, and the display effect of the display panel is improved.

[0042] like Figure 1 As shown, in some embodiments of this application, the light emission data includes the high-level duration of the scan signal and the overlap time T of the blanking region, the column resolution V of the display panel, the light emission current I of the pixel unit 100, and the resistance R of the output voltage; the processor module is configured to obtain a compensation value U based on the light emission data. add The calculation formula includes: U add= (T / 2)V*I*R. Specifically, after obtaining the above data through the detection module, the processor module is configured to calculate the specific compensation value of the output voltage ELVDD according to the set calculation formula. Compensating the output voltage ELVDD can improve the display effect of the display panel. It should be noted that the compensation value obtained by calculation will have a certain error. Therefore, the actual voltage obtained after the voltage compensation value and the voltage drop cancel each other out is not an ideal constant value, and there is a slight error between the actual voltage and the constant value.

[0043] like Figure 1 and Figure 4 As shown in this embodiment, the processor module is configured to obtain the compensation time period of the output voltage according to the first timing sequence and the second timing sequence; the processor module obtains the overlapping area of ​​the high level of the first timing sequence and the blanking region of the second timing sequence; the processor module determines whether the overlapping area is located in the display area of ​​the display panel; in response to the overlapping area being located in the display area, the processor module calculates the compensation time period. Specifically, a split-screen phenomenon will only occur on the display screen when the high level of the EM pulse coincides with the blanking region of the video signal and the overlapping area is located in the display area. Therefore, a split-screen phenomenon requires three conditions to be met simultaneously. If one of the conditions is not met, a split-screen phenomenon will not occur, or the split-screen phenomenon will be outside the display area and will not affect the display area. The overlapping area of ​​the high level and the blanking region can be obtained according to the first timing sequence of the EM pulse and the second timing sequence of the video signal. The voltage drop duration of the output voltage ELVDD can be obtained through the overlapping area. The compensation time period can be obtained through the voltage drop duration. The compensation value is combined with the compensation time period to compensate the output voltage ELVDD, thereby achieving precise cancellation between the output voltage ELVDD and the voltage drop, thus improving the display effect of the display panel.

[0044] like Figures 1 to 3 As shown in this embodiment, the compensation time period includes the compensation time start point, the compensation time end point, and the compensation duration. Specifically, if the compensation time start point and the compensation time end point do not correspond, or if the compensation duration is inaccurate, the output voltage ELVDD will not achieve a constant voltage value after the voltage drop is canceled out. Therefore, whether the processor module can accurately calculate the compensation time start point, compensation time end point, and compensation duration directly affects whether the output voltage ELVDD can be accurately compensated, and also directly affects whether the display effect of the screen can be improved.

[0045] like Figure 1As shown in the embodiment of this application, the driver chip further includes a voltage generation module connected to a processor module. The processor module is configured to calculate a compensation value based on the emitted light data and to calculate a compensation time period based on a first timing sequence and a second timing sequence. The voltage generation module is configured to compensate the generated output voltage based on the compensation value and the compensation time period. Specifically, the voltage generation module generates an output voltage ELVDD based on the data provided by the processor module, such as... Figure 2 As shown, without compensation for the output voltage ELVDD, the processor module sets the output voltage ELVDD to a constant value. Therefore, the output voltage ELVDD from the voltage generation module is also a constant voltage value. However, after passing through the display panel, due to voltage drops, the output voltage ELVDD experiences multiple voltage drop jumps, resulting in a significant difference between the set value and the actual value. This causes a split-screen problem on the display panel. After adding a compensation value to the output voltage ELVDD, as shown... Figure 3 As shown, the timing of the output voltage ELVDD set by the processor module approximates a square wave signal with multiple upward bulges. After passing through the display panel, the compensation value and voltage drop cancel each other out, and the actual value of the output voltage ELVDD is approximately a constant voltage value. Therefore, the pixel unit 100 can emit light normally after obtaining a stable voltage value. The voltage generation module needs to change the timing of the output voltage ELVDD according to the compensation value, the start time of the compensation time, the end time of the compensation time, and the duration of the compensation, so as to avoid the compensation value and voltage drop failing to cancel each other out.

[0046] like Figure 1 As shown in this embodiment, the driving chip further includes a pixel driving module, which is connected to the voltage generation module and the pixel unit 100. The pixel driving module is configured to drive the pixel unit 100 to emit light according to the compensated output voltage. The pixel driving module is connected to the pixel unit 100 via a driving signal line 300. Specifically, the driving signal line 300 is connected to each column of pixel units 100. The pixel driving module is connected to the voltage generation module to receive the compensated output voltage ELVDD. The pixel driving module is configured to transmit data such as the output voltage ELVDD to the pixel unit 100 via the driving signal line 300 as needed, thereby driving the pixel unit 100 to emit light.

[0047] like Figure 1As shown in the embodiment of this application, a scan driving module is also included. The scan driving module is connected to a timing controller and is connected to the pixel unit 100 via a scan signal line 400. The scan driving module controls the pixel unit 100 via a scan signal. Specifically, the scan signal line 400 is connected row by row to the transistors connected to each row of pixel units 100. The scan driving module controls the conduction and cutoff of the transistors connected to the pixel units 100 row by row via the scan signal line 400. Only when the transistor is on can the output voltage ELVDD drive the pixel unit 100 to emit light.

[0048] like Figure 1 As shown in this embodiment, the detection module acquires light emission data through the detection signal line 200 connected to the pixel unit 100. Specifically, the detection signal line 200 is connected to each pixel unit 100 and then to a bus, which in turn is connected to the detection module. The detection module can quickly obtain the data required for the pixel unit 100 to emit light through the detection signal line 200, and the acquired light emission data can be quickly transmitted to the processor module. The processor module calculates the compensation value of the output voltage ELVDD based on the light emission data.

[0049] The table below compares the brightness of various areas of the display panel before and after compensation of the output voltage ELVDD. The data shows that after compensation, the voltage drop of ELVDD decreased from 20mV to 2mV, while the brightness of the bright areas remained unchanged, both before and after compensation being 500.1 nit. The brightness of the dark areas, however, was significantly improved, increasing from 492.4 nit to 499.7 nit. The brightness difference between the dark and bright areas also decreased from 1.15% to 0.08%. As the table demonstrates, compensating for the output voltage ELVDD greatly reduced the brightness difference between the dark and bright areas, resolving the screen splitting issue and improving the display panel's overall performance.

[0050] project Before voltage compensation After voltage compensation ELVDD Drop Amount (mV) 20 2 Brightness of the illuminated area (nits) 500.1 500.1 Brightness (nits) of dark areas 492.4 499.7 Brightness difference 1.15％ 0.08％

[0051] like Figure 1 As shown, based on the same inventive concept, this application embodiment also provides an output voltage compensation method for a display panel, including: acquiring a first timing sequence of a scanning signal and a second timing sequence of a video signal; acquiring light emission data of a pixel unit 100; and compensating the output voltage of a driver chip according to the light emission data, the first timing sequence, and the second timing sequence.

[0052] like Figure 1As shown, based on the same inventive concept, embodiments of this application also provide a display device, which includes a display panel as provided in any of the above claims, or the display device uses an output voltage compensation method for the display panel as provided in any of the above claims to compensate the output voltage. By compensating the output voltage using the method provided in this application, the screen splitting problem of the display panel is solved, thereby improving the display effect of the display device.

[0053] The above provides a detailed description of a display panel, output voltage compensation method, and display device provided in the embodiments of this application. Specific examples have been used to illustrate the principles and implementation methods of this application. The descriptions of the above embodiments are only for the purpose of helping to understand the technical solutions and core ideas of this application. Those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. These modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of this application.

Claims

1. A display panel, characterized in that, include: Driver chip; A timing controller, connected to the driver chip, is configured to provide the driver chip with a first timing sequence of a scan signal and a second timing sequence of a video signal; The driver chip includes a processor module, a detection module, and a voltage generation module. The voltage generation module is connected to the processor module. The detection module is configured to acquire light emission data of pixel units. The processor module is configured to calculate a compensation value based on the light emission data and acquire the overlap region between the high level of the first timing sequence and the blanking region of the second timing sequence; obtain a compensation time period based on the overlap region; and the voltage generation module is configured to compensate the output voltage of the driver chip based on the compensation value and the compensation time period.

2. The display panel as described in claim 1, characterized in that, The light emission data includes the high-level duration of the scan signal and the overlap time T of the blanking region, the column resolution V of the display panel, the light emission current I of the pixel unit, and the resistance R of the output voltage; The processor module is configured to obtain a compensation value U based on the luminescence data. add The calculation formula includes: U add =(T / 2)V*I*R。 3. The display panel as described in claim 1, characterized in that, The processor module is configured to determine whether the overlapping area is located within the display area of ​​the display panel; In response to the overlapping area being located in the display area, the processor module calculates the compensation time period.

4. The display panel as described in claim 3, characterized in that, The compensation period includes the start time of the compensation period, the end time of the compensation period, and the duration of the compensation.

5. The display panel as described in claim 4, characterized in that, The driving chip further includes a pixel driving module, which is connected to the voltage generation module and the pixel unit. The pixel driving module is configured to drive the pixel unit to emit light with the compensated output voltage. The pixel driving module is connected to the pixel unit via a driving signal line.

6. The display panel as described in claim 1, characterized in that, It also includes a scan driving module, which is connected to the timing controller. The scan driving module is connected to the pixel unit through a scan signal line, and the scan driving module controls the pixel unit through the scan signal.

7. The display panel as described in claim 2, characterized in that, The detection module acquires the light emission data through a detection signal line connected to the pixel unit.

8. A method for compensating the output voltage of a display panel, characterized in that, include: Acquire the first timing sequence of the scan signal and the second timing sequence of the video signal; Acquire the luminescence data of the pixel unit, and calculate the compensation value based on the luminescence data; Obtain the overlapping region between the high level of the first timing sequence and the blanking region of the second timing sequence, and obtain the compensation time period based on the overlapping region; The output voltage of the driver chip is compensated according to the compensation value and the compensation time period.

9. A display device, characterized in that, The display device includes a display panel as described in any one of claims 1-7, or the display device uses the output voltage compensation method of the display panel as described in claim 8 to compensate the output voltage.

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