Nand flash based startup version generation method, device and storage medium

Abstract

The application discloses a NAND FLASH-based startup version generation method, equipment and storage medium, which is compatible with a NAND burner detection standard and a CPU detection standard, and generates a startup version suitable for both checks. The method comprises two parts of generation and verification. When generating the version, ECC verification is added in the startup version according to the CPU verification rule, and the corresponding code segment can be subjected to segment offset according to the verification result, so that the generated version is suitable for the burner verification. When verifying the version, data verification is performed according to the NAND FLASH verification standard, and the block record that fails to pass the verification is recorded, so that the corresponding code segment is subjected to offset when generating the version. The method changes the verification and modification of the startup version into automatic detection and modification, efficiently and conveniently solves the problem that the burner bad block detection standard and the CPU verification standard provided by manufacturers are inconsistent, and saves time and effort.

Description

Technical Field

[0001] This invention relates to the field of computer software technology, and specifically to a method, device, and storage medium for generating boot versions based on NAND FLASH. Background Technology

[0002] Due to the hardware characteristics of NAND Flash, bit flipping can occur. This phenomenon is mainly caused by drift effects and interference during read / write operations. Because of this characteristic of NAND Flash, many blocks may be defective and unusable when the flash memory leaves the factory. To improve the reliability of flash memory, manufacturers mark problematic blocks, typically by marking the first byte of the block as 0x00. Each manufacturer has its own standard for marking bad blocks and performing programming verification.

[0003] Bad blocks in Flash memory can affect the normal operation of a device. For example, a bootable version burned into NandFlash may fail to boot properly, causing significant losses and trouble for both users and manufacturers. To address this issue, the common practice is to use a programmer (with its own built-in verification standard) to check for bad blocks when burning the bootable version, ensuring that the blocks used in the bootable version are not bad.

[0004] However, existing technology overlooks the fact that the boot version is compiled and generated according to the CPU's verification mode, and the byte data in the boot version may be 0x00. Because the programmer writes the boot version byte by byte, there is a possibility that the boot version data written to the bad block flag might be exactly 0x00. In this case, after the boot version is written, verification using the programmer will fail, interfering with the operator's judgment and making it impossible to determine whether the boot version was successfully written. Currently, the main method to solve this problem is to manually inspect the generated boot version, checking the data according to the manufacturer's manual to ensure that the data written to the bad block flag is not 0x00.

[0005] Existing technologies for solving verification failures caused by startup versions have the following drawbacks: there is a significant amount of human uncertainty, with the possibility of forgetting to check or checking errors; and the workload of manual checks is large, time-consuming, and labor-intensive. Summary of the Invention

[0006] The present invention proposes a method, device and storage medium for generating boot versions based on NAND FLASH, which can at least solve one of the technical problems in the background art.

[0007] To achieve the above objectives, the present invention adopts the following technical solution: A method for generating a boot version based on NAND FLASH, characterized by generation activities and verification activities; The generation activities of the NAND FLASH-based boot version generation method include generating a boot version according to CPU verification rules and FLASH programmer verification rules, verifying the boot version data, and recompiling the code segment by offsetting it according to the verification results to generate a new boot version.

[0008] The verification activities of the NAND FLASH-based boot version generation method include extracting boot version data, identifying supported FLASH data, verifying corresponding address data, and outputting the results.

[0009] Furthermore, the method for generating a boot version based on NAND FLASH mainly includes the following steps: 1) Based on the characteristics of the CPU used in the product, add an ECC checksum to the BOOT boot version according to the CPU's verification rules to generate a boot version with ECC to be verified. 2) Determine the filename of the boot version and identify which FLASH model the boot version is applicable to based on the OobSize; 3) Determine the starting address Addr and the actual size BlockSize of each BLOCK to be verified based on the FLASH model; 4) According to the address of each block specified by FLASH, check the data at the corresponding address in the entire boot version; 5) If the test fails, delete the corresponding startup version file, add an offset to the segment corresponding to the erroneous code during compilation, and recompile and check. 6) By checking through the above 5 steps, a BOOT startup file suitable for the programmer's burning and testing can be generated; Furthermore, the main implementation process of the NAND FLASH-based boot version generation method includes the following steps: 1) Generate the startup version using a method that immediately checks after compilation; 2) Compiling using segment offsets can provide a version that can be verified by the programmer; 3) After compilation, it can dynamically identify the location of the startup version and enable verification; 4) The verification algorithm can automatically verify based on the version size and NAND FLASH verification requirements; 5) If the verification fails, perform a segment offset on the code, recompile and verify again; 6) After verification, the verified BOOT version is generated.

[0010] In another aspect, the present invention also discloses a computer-readable storage medium storing a computer program, which, when executed by a processor, causes the processor to perform the steps of the method described above.

[0011] In another aspect, the present invention also discloses a computer device, including a memory and a processor, wherein the memory stores a computer program, and when the computer program is executed by the processor, the processor performs the steps of the method described above.

[0012] As can be seen from the above technical solution, the method provided by this invention changes the verification and modification of the boot version from manual operation to automatic detection and modification. Using the method provided by this invention improves the efficiency of boot version compilation and verification. It cleverly solves the problem of data being 0x00 at the NAND FLASH verification address through verification algorithms and segment offsets. In particular, when the data of the relocation segment is 0x00 at the NAND FLASH verification address, it is difficult to change the data of the relocation segment by adding or removing code; this invention solves this problem through segment offsets. Simultaneously, the verification method provided by this invention can automatically verify the boot version during compilation, automatically deleting and recompiling boot versions that fail verification. This avoids the problem of programmers forgetting to check the verification results before using the boot version, causing verification failures during batch burning. The method provided by this invention can dynamically obtain board and CPU information and dynamically verify the boot version BOOT generated by various boards without manual modification.

[0013] Compared with existing technologies, the boot version generation method based on NAND FLASH provided by this invention avoids human uncertainty and reduces manpower; it can independently verify the bad block flag bit of each block and can verify multiple boot version files, significantly improving efficiency. Attached Figure Description

[0014] Figure 1 This is a flowchart illustrating the overall workflow of compiling and generating the boot version BOOT in this invention. Figure 2 This is a flowchart of the detailed verification method for verifying the startup version of this invention. Detailed Implementation

[0015] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are some embodiments of the present invention, but not all embodiments.

[0016] like Figure 1As shown, the boot version generation method based on NAND FLASH described in this embodiment includes two main parts: generating and verifying the boot version. 1) Generating the startup version includes: compiling the BOOT, adding ECC verification to the generated version, and offsetting the code segment; 2) Verifying the startup version includes: extracting startup version data, identifying supported FLASH data, verifying the corresponding address data and outputting the results.

[0017] The main implementation process includes: 1) Generate the startup version using a method that immediately checks after compilation; 2) Compiling using segment offsets can provide a version that can be verified by the programmer; 3) After compilation, it can dynamically identify the location of the startup version and enable verification; 4) The verification algorithm can automatically verify based on the version size and NAND FLASH verification requirements; 5) If the verification fails, perform a segment offset on the code, recompile and verify again; 6) After verification, the verified BOOT version is generated.

[0018] The following description uses an example of the present invention: The boot version generation process is explained using Marvell's CPU chip and MIX's NAND flash as examples: 1) Compile the U-BOOT startup version to generate an executable .bin file; 2) Add ECC verification to the .bin file according to the verification requirements of the MARVEL chip; 3) Based on the FLASH type supported by BOOT, rename the boot version file with ECC to a file in the format of FLASH model_OOB size; 4) Dynamically open the generated bootloader and, according to MIX's FLASH verification rules, check the corresponding addresses of the first 5 blocks used by the bootloader, as follows: The data corresponding to 0x1000, 0x2100, 0x45000, 0x46100, 0x89000, 0x8A100, 0xCD000, 0xCE100, 0x111000, and 0x112100 are not 0x00; 5) If the detection fails, the corresponding code segment is offset by 1 page length during compilation, based on the failed block, and the detection is recompiled until all detections pass, and then the startup version is generated.

[0019] In summary, the method provided in this invention transforms the manual verification and modification of the boot version into automatic detection and modification. Using this method improves the efficiency of boot version compilation and verification. The invention cleverly solves the problem of data being 0x00 at the NAND FLASH verification address through verification algorithms and segment offsets. In particular, when the data in the relocation segment is 0x00 at the NAND FLASH verification address, it is difficult to change the data in the relocation segment by adding or removing code; this invention solves this problem through segment offsets. Furthermore, the verification method provided by this invention can automatically verify the boot version during compilation, automatically deleting and recompiling boot versions that fail verification. This avoids the problem of programmers forgetting to check the verification results before using the boot version, causing verification failures during batch burning. The method provided by this invention can dynamically acquire board and CPU information and dynamically verify the boot version BOOT generated by various boards without manual modification.

[0020] In another aspect, the present invention also discloses a computer-readable storage medium storing a computer program, which, when executed by a processor, causes the processor to perform the steps of the method described above.

[0021] In another aspect, the present invention also discloses a computer device, including a memory and a processor, wherein the memory stores a computer program, and when the computer program is executed by the processor, the processor performs the steps of the method described above.

[0022] In another embodiment provided in this application, a computer program product containing instructions is also provided, which, when run on a computer, causes the computer to execute any of the NAND FLASH-based boot version generation methods described above.

[0023] It is understood that the system provided in the embodiments of the present invention corresponds to the method provided in the embodiments of the present invention, and the explanation, examples and beneficial effects of the relevant content can be referred to the corresponding parts of the above methods.

[0024] This application also provides an electronic device, including a processor, a communication interface, a memory, and a communication bus, wherein the processor, communication interface, and memory communicate with each other via the communication bus. Memory, used to store computer programs; When the processor executes the program stored in the memory, it implements the above-described method for generating a boot version based on NAND FLASH.

[0025] The communication bus mentioned in the aforementioned electronic devices can be a Peripheral Component Interconnect (PCI) bus or an Extended Industry Standard Architecture (EISA) bus, etc. This communication bus can be divided into address bus, data bus, control bus, etc.

[0026] The communication interface is used for communication between the aforementioned electronic devices and other devices.

[0027] The memory may include random access memory (RAM) or non-volatile memory (NVM), such as at least one disk storage device. Optionally, the memory may also be at least one storage device located remotely from the aforementioned processor.

[0028] The processors mentioned above can be general-purpose processors, including central processing units (CPUs), network processors (NPs), etc.; they can also be digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), or other programmable logic devices, discrete gate or transistor logic devices, or discrete hardware components.

[0029] In the above embodiments, implementation can be achieved entirely or partially through software, hardware, firmware, or any combination thereof. When implemented using software, it can be implemented entirely or partially as a computer program product. The computer program product includes one or more computer instructions. When the computer program instructions are loaded and executed on a computer, all or part of the processes or functions described in the embodiments of this application are generated. The computer can be a general-purpose computer, a special-purpose computer, a computer network, or other programmable device. The computer instructions can be stored in a computer-readable storage medium or transmitted from one computer-readable storage medium to another. For example, the computer instructions can be transmitted from one website, computer, server, or data center to another website, computer, server, or data center via wired (e.g., coaxial cable, fiber optic, digital subscriber line (DSL)) or wireless (e.g., infrared, wireless, microwave, etc.) means. The computer-readable storage medium can be any available medium that a computer can access or a data storage device such as a server or data center that integrates one or more available media. The available medium can be a magnetic medium (e.g., floppy disk, hard disk, magnetic tape), an optical medium (e.g., DVD), or a semiconductor medium (e.g., solid state disk (SSD)).

[0030] It should be noted that, in this document, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0031] The various embodiments in this specification are described in a related manner. Similar or identical parts between embodiments can be referred to mutually. Each embodiment focuses on describing the differences from other embodiments. In particular, the system embodiments are basically similar to the method embodiments, so the description is relatively simple; relevant parts can be referred to the descriptions of the method embodiments.

[0032] The above embodiments are only used to illustrate the technical solutions of the present invention, and are not intended to limit it. Although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A method for generating a boot version based on NAND FLASH, characterized in that, Includes generation activities and verification activities; The generation process includes generating a boot version based on CPU verification rules and FLASH programmer verification rules, verifying the boot version's data, and recompiling the code segment based on the verification results to generate a new boot version. The verification process includes extracting startup version data, identifying supported FLASH data, verifying corresponding address data, and outputting the results. Includes the following steps: S1. Based on the characteristics of the CPU used in the product, add an ECC check area to the BOOT boot version according to the CPU's verification rules to generate a boot version with ECC to be verified. S2. Determine the filename of the boot version and identify which FLASH model the boot version is applicable to based on the OobSize; S3. Determine the starting address Addr and the actual size BlockSize of each BLOCK to be verified based on the FLASH model; S4. According to the address of each block specified by FLASH, check the data at the corresponding address in the entire startup version; S5. If the test fails, delete the corresponding startup version file, add an offset to the segment corresponding to the erroneous code during compilation, and recompile and check. S6. After checking through the above 5 steps, a BOOT startup file suitable for the programmer's burning and testing is generated.

2. The boot version generation method based on NAND FLASH according to claim 1, characterized in that: The implementation process is as follows: 1) Generate the startup version using a method that immediately checks after compilation; 2) Compilation uses segment offsets to provide a version that can be verified by the programmer; 3) After compilation, it can dynamically identify the location of the startup version and enable verification; 4) The verification algorithm can automatically verify based on the version size and NAND FLASH verification requirements; 5) If the verification fails, perform a segment offset on the code, recompile and verify again; 6) After verification, the verified BOOT version is generated.

3. A computer-readable storage medium storing a computer program that, when executed by a processor, causes the processor to perform the steps of the method as described in claim 1 or 2.

4. A computer device comprising a memory and a processor, the memory storing a computer program that, when executed by the processor, causes the processor to perform the steps of the method as claimed in claim 1 or 2.

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