SysML state machine diagram formal requirement verification method based on large model

By automatically generating a NuSMV-recognizable formal language based on a large model, the problem of automating the verification of SysML state machine diagram requirements is solved, achieving efficient and accurate formal verification, and is applicable to multiple fields.

CN117608525BActive Publication Date: 2026-03-31HARBIN INST OF TECH
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2023-11-24
Publication Date
2026-03-31

AI Technical Summary

Technical Problem

Existing technologies struggle to efficiently and automatically verify the requirements of SysML state machine diagrams. Manual translation is tedious and time-consuming, and the ambiguity and inconsistency in natural language descriptions lead to low verification efficiency.

Method used

A large model-based approach is adopted, which collects SysML state machine diagrams and requirement text datasets, performs preprocessing and batch training, automatically generates formal language that can be recognized by NuSMV, and combines NuSMV for formal verification.

Benefits of technology

It improves the verification efficiency of SysML state machine diagrams, reduces manual intervention, lowers the risk of errors, and is applicable to a variety of systems and fields, possessing universality and high efficiency.

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Abstract

The application discloses a large model-based SysML state machine diagram formal requirement verification method, and belongs to the technical field of computer software development.The method is as follows: collecting SysML state machine diagram data sets, tracing corresponding requirement texts, and then translating and verifying the SysML state machine diagram and the requirement texts; processing the SysML state machine diagram and the requirement texts; setting a prompt template for a large model, and batch training two large-scale data sets; obtaining translation results of the SysML state machine diagram and the requirement texts, and representing the translation results in a language recognizable by NuSMV; making corresponding modifications on the obtained code; and inputting the obtained target code into NuSMV for formal verification.The application improves the verification efficiency, makes the verification method more universal, reduces cumbersome work when the formal verification method is applied in different fields, and can adapt to various requirement verification scenes.
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Description

TECHNICAL FIELD

[0001] The application relates to a large model-based SysML state machine diagram formalized requirement verification method and belongs to the technical field of computer software development. BACKGROUND

[0002] The model-based system engineering (MBSE) software development method is a trend in software development, and practice has proved that model-based software development is a relatively effective method for solving many current problems.

[0003] Model-based verification is a verification technology proposed for model-driven development and can be regarded as part of the MBSE methodology. It is a graphical modeling language (such as UML, SysML, etc.) for modeling a software system or a part of a system, and a test model is generated through model conversion to test the logical constraint relationship in the related model. It is a feasible formal verification method.

[0004] Both the industry and academia believe that accurate formal modeling and analysis of system requirements can effectively guarantee software quality. Moreover, some typical industrial standards, such as the DO-333 method in the aviation field, also require the use of formal methods in the entire software development life cycle related to safety. By converting the model into a formal description and proving the correctness of the software based on the description, the software reliability, safety and other properties can be strongly analyzed. The model-based verification method can greatly reduce the development and testing cycle of software, making the software development and testing processes work more efficiently, thereby reducing the model development cycle and maintaining high product quality. However, current methods and tools focus on model building and code generation, and neglect requirement verification, so it is necessary to study the model-based requirement verification method.

[0005] SysML (System Modeling Language) is a general-purpose modeling language for system engineering, which plays a key role in system design and analysis. The state machine diagram in SysML is widely used to describe the states and state transitions between components in a system. With the continuous development of modern systems, the complexity and size of systems grow exponentially. In such a complex background, it becomes increasingly difficult to verify the requirements of SysML state machine diagrams using traditional manual methods. Formal verification methods can more effectively handle the requirement verification of complex systems by using mathematical models and automated tools. Human error is a common problem in system design, especially in the manual verification process. Formal requirement verification can reduce the risk of human error and more comprehensively and accurately check the consistency of system design through mathematical formalization.

[0006] SysML state machine diagrams provide an intuitive representation in system design, but to help developers make preliminary language translation more easily, enabling them to use formal verification tools such as NuSMV, these graphical representations need to be automatically converted into corresponding formal specification languages. Manual translation is a tedious and time-consuming task for large systems, so it is crucial to develop an automated translation method that can convert SysML state machine diagrams into NuSMV recognizable specification languages, providing a preliminary language translation framework for those without much development background. Developers can adjust the output according to actual conditions, thereby improving the verification efficiency of system design. This method is expected to significantly shorten the verification period and inject higher efficiency and accuracy into the system design process.

[0007] In addition, the advantage of using natural language to describe the requirement document is easy to maintain and communicate. Natural language description can improve the readability of the requirement document, making non-professionals also understand the system requirements. However, the disadvantage of this method is the lack of a method to accurately describe the requirements, which may have ambiguity and inconsistency in interpretation. It is also a challenging task to achieve automation in the confirmation and verification of requirements. Therefore, researchers need to continue to explore how to find a balance between natural language description and formal specification. The introduction of automated tools and technologies may be a key factor in solving this challenge, helping to ensure that the requirement document is both accurate and easy to understand in preliminary language translation. SUMMARY

[0008] To solve the problems in the background art, the present application provides a SysML state machine diagram formalized requirement verification method based on a large model.

[0009] To achieve the above-mentioned purpose, the present application adopts the following technical solution: a SysML state machine diagram formalized requirement verification method based on a large model, the method comprising the following steps:

[0010] S1: Collect SysML state machine diagram data sets, trace corresponding requirement texts, and then translate and verify SysML state machine diagrams and requirement texts;

[0011] S2: Process SysML state machine diagrams and requirement texts;

[0012] S3: Set a prompt template for the large model and batch train two large-scale data sets;

[0013] S4: Obtain the translation results of SysML state machine diagrams and requirement texts and represent them in the form of NuSMV recognizable language;

[0014] S5: Make corresponding modifications to the obtained code;

[0015] S6: input the obtained target code into NuSMV for formal verification.

[0016] Compared with the prior art, the present application has the beneficial effects that:

[0017] 1、The present application is based on model-driven and artificial intelligence technology, through intelligent learning and analysis method, the demand verification method has the ability of intelligentization, the system can learn from a large amount of data, and can automatically analyze and understand the system demand, the generated formal language can better help the practitioner to carry out subsequent verification, thereby improving the efficiency of verification.

[0018] 2、Unlike traditional formal verification methods that rely on manually defined requirement templates and conversion rules, the present application automatically generates the language required for formal verification through a large model, breaking the excessive dependence on human experience, so that practitioners without rich experience can simply modify the code according to the actual situation to perform formal verification, making the verification method more versatile.

[0019] 3、The present application automatically generates the language required for formal verification through a large model, rather than manually defining requirement templates and conversion rules, improving the generalization ability of the formal verification method, making it applicable to a variety of systems and scenarios, and reducing the cumbersome work when applying the formal verification method in different fields.

[0020] 4、The present application is not limited to a specific field, but has a wide application prospect. Its model-driven intelligent learning can adapt to various demand verification scenarios, providing more flexible and efficient formal verification means for multiple fields. It is expected to achieve significant application effect in industry, communication, aerospace and other fields. BRIEF DESCRIPTION OF DRAWINGS

[0021] Figure 1 is a flowchart of the present application;

[0022] Figure 2 is a flowchart of the SysML state machine diagram data collection step;

[0023] Figure 3 is a flowchart of the requirement text data collection step;

[0024] Figure 4 is an instance schematic diagram of the preprocessing process of the requirement text;

[0025] Figure 5 is a flowchart of the formal verification process. DETAILED DESCRIPTION

[0026] The technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the invention, not all embodiments. All other embodiments obtained by those skilled in the art based on the embodiments of the present invention without creative effort are within the scope of protection of the present invention.

[0027] A formal requirement verification method based on a large model using SysML state machine diagrams, the method comprising the following steps:

[0028] S1: Collect the SysML state machine diagram dataset, trace the corresponding requirement text, and then manually translate and verify the SysML state machine diagrams and requirement texts. The SysML state machine diagram dataset and processing procedure are as follows: Figure 2 As shown;

[0029] S101: Filter out SysML state machine diagrams from the database and remove SysML state machine diagrams that do not meet the quality requirements.

[0030] S102: Manually translate the SysML state machine diagram into a language recognizable by NuSMV and cross-validate it through multiple validators;

[0031] S103: Filter the requirement texts that meet the requirements from the requirement database;

[0032] S104: Manually translate the requirements text into LTL or CTL language and perform cross-validation by multiple validators. The requirements text dataset and processing procedure are as follows: Figure 3 As shown.

[0033] SysML state machine diagrams are extracted from system design documents, software specifications, or other relevant documents. These diagrams contain a rich set of states, events, and state transitions to cover all aspects of the system. They include varying numbers of states, diverse event triggering conditions, and different types of state transitions to simulate the diversity of real-world systems. A dataset quality control mechanism is implemented to ensure that each state machine diagram and requirements document is accurate and clear.

[0034] The translation of SysML state machine diagrams and requirements texts was undertaken by personnel with extensive professional knowledge and experience. Furthermore, multiple verifiers were introduced to cross-validate the translation results. Through teamwork and discussion, the consistency and accuracy of the translation results were ensured. This process and mechanism accurately convey the information from the original documents, providing a reliable basis for subsequent development and research.

[0035] S2: Process the SysML state machine diagram and the requirement text;

[0036] S201: Preprocessing the SysML state machine diagram: Decompile the SysML state machine diagram, analyze the generated notation document, and extract key information for use during large model training.

[0037] S20101: Use the ElementTree tool to analyze the tree structure of the notation document;

[0038] ElementTree is a powerful XML processing library that provides convenient methods for parsing and manipulating document structure and content. By utilizing ElementTree, you can perform in-depth analysis of notation documents to gain a more comprehensive understanding of their structure and meaning. This tool makes it easy to process XML documents and perform effective information extraction and manipulation.

[0039] S20102: Based on the tree structure analysis of the notation document, identify each module according to the node type; these modules usually have specific tags or labels to represent different functions or content. By identifying these modules, we can better understand the structure and function of the document and provide a foundation for subsequent processing.

[0040] S20103: After identifying each module, the state transition details are further analyzed and extracted as key information. State transition refers to the process of switching or jumping between different modules, which is usually triggered by specific instructions or conditions. By analyzing the state transition details, the document processing flow and logic can be better understood, thereby extracting key information for subsequent processing or response generation.

[0041] S202: Preprocess the requirement text, identify keywords and break it down into short sentences, while capturing logical relationships, such as... Figure 4 As shown, the preprocessing steps for the requirements document include part-of-speech analysis, dependency analysis, logical analysis, and sentence segmentation.

[0042] S20201: For each requirement statement, HanLP tools are used for part-of-speech tagging and dependency analysis; this allows for a deeper understanding of the statement's structure and meaning. Part-of-speech tagging refers to labeling each word with its grammatical attributes, such as noun, verb, adjective, etc. Dependency analysis analyzes the relationships between words in a sentence. In this way, the position of each word in the sentence and its association with other words are identified, thus leading to a deeper understanding of the sentence's structure and meaning. Using HanLP tools for part-of-speech tagging and dependency analysis not only allows for a deeper understanding of the requirement statements' structure and meaning, enabling better service to users, but also improves sentence clarity, logical rigor, and the accuracy of reasoning.

[0043] S20202: Identify conjunctions and break long sentences into shorter sentences accordingly to facilitate subsequent logical relationship analysis and processing;

[0044] The conjunctions involved in this step include, but are not limited to:

[0045] Temporal relationships: "time" and "after";

[0046] Conditional relationships: "if", "suppose" and the following "then", "so", "then", "otherwise";

[0047] Sequential relationship: "before";

[0048] Logical AND relation: "AND";

[0049] Multiple expressions of logic and relation: "and", "and", "and", "in addition", "as well as";

[0050] Logical OR relation: "or", "or";

[0051] S20203: Organize the logical relationships of sentences based on conjunctions to establish connections between short sentences.

[0052] By combining rule matching with dependency parsing, conjunctions are identified. This is a sophisticated analytical process designed to reveal the hidden logical structure within sentences. A logical relation tree is constructed in this way, organizing entities and conjunctions in a structured hierarchical relationship. This hierarchy clearly reveals the connections and dependencies between sentences. Finally, based on the logical relation tree, formal logic expressions are generated, making the logical relationships within sentences more explicit and concrete. This approach enhances sentence readability and comprehensibility, enabling readers to more easily understand the meaning of sentences.

[0053] This step is implemented as follows: Figure 2 As shown. This step aims to identify the logical connections between short sentences, including causal relationships, conditional relationships, etc. By establishing logical relationships, the system can more comprehensively understand the meaning of the requirement text, providing more structured input for subsequent large-scale model training.

[0054] S3: Set cue templates for large models and perform batch training on two large datasets (SysML state machine graph dataset and natural language dataset);

[0055] S301: Perform data cleaning and preprocessing on the dataset of SysML state machine diagrams and requirement texts;

[0056] Data cleaning involves handling missing and outlier values, such as deleting samples with missing values ​​or using interpolation, to ensure data integrity and consistency.

[0057] S302: Divide the dataset into a training set and a validation set to ensure that the model can be validated and generalized during training;

[0058] S303: Using two large-scale datasets, add prompt templates and perform batch training on the training set;

[0059] S304: Improve the model's performance gradually through iterative training.

[0060] Specifically, different prompt templates are used for the two transformations to ensure that the model can accurately understand and translate key information from the SysML state machine diagram and natural language requirement text:

[0061] (1) Convert the key information of the SysML state machine diagram into a NuSMV recognizable language;

[0062] (2) Convert natural language short sentences and logical relationships into NuSMV-recognizable LTL or CTL statements.

[0063] S305: Monitor the model's performance on the training and validation sets, including metrics such as loss function and accuracy;

[0064] The training process is optimized using strategies such as learning rate decay and early stopping to ensure that the model does not overfit the training set during training. Training parameters, model performance metrics, and any adjustments are recorded for each iteration.

[0065] S4: Obtain the translation results of the SysML state machine diagram and the requirement text and represent them in a language that can be recognized by NuSMV;

[0066] S401: Perform the same preprocessing as S2 on the SysML state machine diagram and requirement text to be verified, including decompiling the SysML state machine diagram and extracting key information, as well as keyword recognition and logical relationship capture of the requirement text.

[0067] S402: Apply the prompt template set in S3; this process converts the key information of the SysML state machine diagram into a NuSMV-recognizable language, and at the same time converts the natural language requirement text and logical relationships into NuSMV-recognizable LTL or CTL statements.

[0068] S403: Input the processed and transformed data into a trained large model for translation;

[0069] S404: Obtain the translation results of SysML state machine diagrams and requirement texts from the output generated by the large model and represent them in a NuSMV-recognizable language.

[0070] This process maps important information into formal specifications, providing the necessary input for formal verification. This series of steps prepares the way for formal verification, making the entire verification process more efficient and accurate.

[0071] S5: Modify the obtained code accordingly based on the actual situation;

[0072] Given that artificial intelligence methods cannot guarantee 100% accuracy in generated code, relevant professionals need to carefully review the generated code, identify potential errors, and fix them promptly. Simultaneously, it is crucial to ensure that the modified code remains consistent with system requirements. Furthermore, by comparing the code implementation with the requirements document, it should be verified whether it meets the specific functional and performance requirements.

[0073] S6: Input the obtained target code into NuSMV for formal verification.

[0074] Since the core objective of this invention is to verify whether the SysML state machine diagram meets the requirements text, a loop method is employed to verify the LTL or CTL code converted from the requirements text line by line. This loop method is considered an efficient and comprehensive verification strategy, ensuring that every detail is rigorously verified, thereby guaranteeing the consistency and correctness of the state machine diagram with the requirements text. Figure 5 As shown.

[0075] S601: Input NuSMV into a language that is recognizable by NuSMV, which is generated by the transformation of the SysML state machine diagram;

[0076] S602: Encode the variables in the model and build the model using NuSMV;

[0077] S60201: Use NuSMV to flatten the model hierarchy; flattening the model hierarchy helps simplify the model representation, making it easier to process during subsequent validation.

[0078] S60202: Encode the variables in the model; encoding variables may involve transforming abstract concepts into a NuSMV-understandable form to preserve the semantics and logical structure of the model.

[0079] S60203: Based on the flattened model hierarchy and the encoded variables, construct a NuSMV-acceptable validation model.

[0080] S603: Input the verification statement (TCL or LTL statement) into the model for verification. If it fails, provide a counterexample; if it passes, verify the next verification statement.

[0081] The constructed NuSMV model will be validated using validation statements (TCL or LTL statements). This process includes the following sub-steps to comprehensively check the model's correctness.

[0082] S60301: Select one or more TCL (Temporal Control Language) or LTL (Linear Temporal Logic) statements from the predefined verification statements to describe the properties that are expected or not expected to occur in the system; these statements may cover security, consistency or other critical attributes.

[0083] S60302: Input validation statements into NuSMV. Input the selected validation statements into the constructed NuSMV model for formal validation. NuSMV will check whether the model satisfies the specified properties based on these statements. If the validation fails, NuSMV will provide counterexamples, i.e., model behaviors that violate the defined properties. If the validation passes, you can continue to validate the next statement.

[0084] This invention assists developers in performing formal verification of SysML state machine diagrams by automatically translating SysML state machine diagrams and requirement texts into a large model. By converting graphical SysML state machine diagrams and natural language text into a formal specification language recognizable by NuSMV, formal verification of system requirements is achieved. This reduces human intervention, lowers the risk of errors, and improves verification efficiency. To ensure the method's universality, the large model can dynamically adapt to the characteristics of different domains and systems. Through flexible learning and adaptation mechanisms, the large model can handle SysML state machine diagrams of various types and sizes, identify natural language requirements with different logics, and guarantee the generalization ability of the verification method.

[0085] It will be apparent to those skilled in the art that the present invention is not limited to the details of the exemplary embodiments described above, and that the invention can be implemented in other forms without departing from its spirit or essential characteristics. Therefore, the embodiments should be considered in all respects as exemplary and non-limiting, and the scope of the invention is defined by the appended claims rather than the foregoing description. Thus, all variations falling within the meaning and scope of the equivalents of the claims are intended to be included within the present invention. No reference numerals in the claims should be construed as limiting the scope of the claims.

[0086] Furthermore, it should be understood that although this specification describes embodiments, not every embodiment contains only one independent technical solution. This narrative style is merely for clarity. Those skilled in the art should consider the specification as a whole, and the technical solutions in each embodiment can also be appropriately combined to form other embodiments that can be understood by those skilled in the art.

Claims

1. A large model-based SysML state machine diagram formalized requirement verification method, characterized by: The method comprises the following steps: S1: collecting a SysML state machine diagram dataset, tracing corresponding requirement texts, and then translating and verifying the SysML state machine diagram and the requirement texts; The S1 comprises the following steps: S101: screening SysML state machine diagrams from a database, and removing SysML state machine diagrams that do not meet quality requirements; S102: manually translating the SysML state machine diagrams into a language recognizable by NuSMV, and cross-verifying by multiple verifiers; S103: screening requirement texts that meet requirements from a requirement database; S104: manually translating the requirement texts into LTL or CTL languages and cross-verifying by multiple verifiers; S2: processing the SysML state machine diagram and the requirement texts; The S2 comprises the following steps: S201: preprocessing the SysML state machine diagram; The S201 comprises the following steps: S20101: analyzing a notation document tree structure by using an ElementTree tool; S20102: identifying each module according to a node type; S20103: analyzing state transition conditions and extracting key information; S202: preprocessing the requirement texts; The S202 comprises the following steps: S20201: performing part-of-speech analysis and dependency relationship analysis on each requirement sentence by using a HanLP tool; S20202: identifying conjunctions, and accordingly splitting long sentences into short sentences; S20203: arranging logical relationships of the sentences according to the conjunctions to establish associations between the short sentences; S3: setting a prompt template for a large model, and batch training two large-scale datasets; S4: obtaining translation results of the SysML state machine diagram and the requirement texts and representing them in a language recognizable by NuSMV; S5: modifying the obtained code; S6: inputting the obtained target code into NuSMV for formal verification; The S6 comprises the following steps: S601: inputting the language recognizable by NuSMV generated by the SysML state machine diagram into NuSMV; S602: encoding variables in the model and constructing the model by using NuSMV; S603: inputting verification sentences into the model for testing, and if the verification sentences do not pass, giving counterexamples, and if the verification sentences pass, verifying the next verification sentence.

2. The method of claim 1, wherein the method is characterized by: The S3 comprises the following steps: S301: performing data cleaning and preprocessing on the dataset of the SysML state machine diagram and the requirement texts; S302: dividing the dataset into a training set and a verification set; S303: using the two large-scale datasets, adding a prompt template, and batch training the training set; S304: improving the performance of the model by iterative training; S305: monitoring the performance of the model on the training set and the verification set.

3. The method of claim 2, wherein the method is characterized by: The S4 comprises the following steps: S401: preprocessing the SysML state machine diagram and the requirement texts to be verified in the same way as S2; S402: applying the prompt template set in S3; S403: inputting the processed and converted data into the trained large model for translation; S404: Obtain the translation results of SysML state machine diagram and requirement text by the output generated by the large model and represent them in a language recognizable by NuSMV.

4. The method of claim 1, wherein the method is characterized by: The S602 includes the following steps: S60201: Flatten the hierarchical structure of the model using NuSMV; S60202: Encode the variables in the model; S60203: According to the flattened model hierarchical structure and the encoded variables, build a verification model acceptable by NuSMV.

5. The method of claim 1, wherein the method is characterized by: The S603 includes the following steps: S60301: Select one or more statements from the predefined verification statements; S60302: Input the verification statements to NuSMV, if the verification fails, NuSMV will provide counterexamples, if the verification passes, the next statement can be verified.

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