High-heat-dissipation three-dimensional heterogeneous plastic packaging structure and preparation method thereof

By designing a high thermal conductivity heat sink in heterogeneous integrated circuit packaging and combining it with chemical etching and fiber laser processing, the problems of poor heat dissipation and low packaging yield were solved, achieving uniform heat dissipation and high reliability packaging results.

CN117690890BActive Publication Date: 2026-06-30WUXI ZHONGWEI GAOKE ELECTRONICS +1

Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
WUXI ZHONGWEI GAOKE ELECTRONICS
Filing Date
2023-12-19
Publication Date
2026-06-30

AI Technical Summary

Technical Problem

Traditional heterogeneous integrated circuit packaging suffers from poor heat dissipation and low packaging yield, especially when directly mounting heat sinks and mounting heat sinks after overall thinning. The bonding strength between the heat sink and the molding compound is insufficient, resulting in low heat transfer efficiency and a high risk of chip cracking.

Method used

The heat sink adopts a high thermal conductivity design. The top of the heat sink has a stepped groove and micropores on the surface. The bottom is bonded to heterogeneous multi-chips with thermally conductive adhesive. After encapsulation with molding compound, a dielectric layer and a metal layer under the bumps are set on the bottom. The interconnect structure realizes uniform heat dissipation and electrical connection of heterogeneous chips. Chemical etching and pulsed fiber laser treatment are combined to enhance the bonding strength.

Benefits of technology

It improves the heat dissipation efficiency and reliability of the packaging structure, prevents excessive local temperature, reduces the risk of chip cracking and warping, and improves the packaging yield.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure CN117690890B_ABST
    Figure CN117690890B_ABST
Patent Text Reader

Abstract

This invention relates to the field of integrated circuit packaging technology, specifically disclosing a high-heat-dissipation three-dimensional heterogeneous molding compound structure and its fabrication method. The high-heat-dissipation three-dimensional heterogeneous molding compound structure includes a high thermal conductivity heat sink. The top of the high thermal conductivity heat sink has a stepped groove, and the surface of the stepped groove has multiple micropores. The bottom of the high thermal conductivity heat sink is bonded to a heterogeneous multi-chip structure with thermally conductive adhesive and then encapsulated with molding compound. A dielectric layer is disposed at the bottom of the molding compound. The dielectric layer encapsulates a redistribution layer and a metal under the bump layer. Solder balls are disposed at the bottom of the metal under the bump layer. A connecting structure is provided between adjacent high thermal conductivity heat sinks. The leads of the heterogeneous multi-chip structure are electrically connected to the solder balls through the redistribution layer and the metal under the bump layer. The connecting structure is also electrically connected to the solder balls through the redistribution layer and the metal under the bump layer. This invention can improve the heat dissipation efficiency, reliability, and packaging yield of the molding compound structure.
Need to check novelty before this filing date? Find Prior Art

Description

Technical Field

[0001] This invention relates to the field of integrated circuit packaging technology, and in particular to a high heat dissipation three-dimensional heterogeneous molding compound and its preparation method. Background Technology

[0002] As Moore's Law approaches its physical limits, heterogeneous integration represents a new direction for the chip industry in the post-Moore's Law era. Heterogeneous integration technology is a high-density, highly integrated technology that improves the overall performance of a chip by integrating devices made of different materials and using different processes. Heterogeneous integrated devices can achieve better performance parameters and integrate more modular functions from the initial design stage. Despite these advantages, two problems remain to be solved. First, the heat flux density of high-density heterogeneous integrated circuits increases dramatically. According to statistics from the U.S. Air Force's Aeronautical Electronics Integrated Research Project, more than 55% of electronic product failures are caused by excessive temperature and heat-related problems; the failure rate doubles for every 10°C increase in chip temperature. Second, during the wafer reconstruction process, the mismatch in thermal expansion coefficients between materials can lead to varying degrees of warpage. Significant warpage can cause delamination of molded devices, severely impacting production yield. Solving the problems of heat dissipation and warpage in the packaging structure is a key challenge for the development of heterogeneous integration technology.

[0003] Traditional heat dissipation methods for devices mainly fall into two categories. One involves directly mounting a heat sink on the bottom of the molded device, where the chip's heat is transferred to the heat sink through the molding compound. However, the thermal conductivity of the molding compound is extremely low, generally not exceeding 1 W / (m·K), resulting in low heat dissipation efficiency. The other method, in heterogeneous integration structures, involves thinning chips of different thicknesses to the same height and exposing them on the surface of the molded device, then mounting a heat sink on the top surface. While this method can effectively improve heat dissipation efficiency, the thickness of the molded device decreases significantly along with the chip thinning, leading to a sharp increase in the risk of stress concentration causing chip cracking and edge chipping, making it difficult to guarantee packaging yield. Summary of the Invention

[0004] The purpose of this invention is to overcome the shortcomings of the existing technology and provide a high heat dissipation three-dimensional heterogeneous molding structure and a method for preparing the high heat dissipation three-dimensional heterogeneous molding structure, so as to solve the problems of poor heat dissipation capacity and low packaging yield of traditional direct mounting heat sinks and overall thinning and mounting heat sinks.

[0005] As one aspect of the present invention, a high-heat-dissipation three-dimensional heterogeneous molding compound structure is provided, including a high thermal conductivity heat sink. The top of the high thermal conductivity heat sink is provided with a stepped groove, and the surface of the stepped groove is provided with a plurality of micropores. The bottom of the high thermal conductivity heat sink is bonded to a heterogeneous multi-chip by thermally conductive adhesive and then encapsulated with molding compound. The bottom of the molding compound is provided with a dielectric layer. The dielectric layer encapsulates a redistribution layer and a metal under the bump layer. Solder balls are provided at the bottom of the metal under the bump layer. A connecting structure is provided between two adjacent high thermal conductivity heat sinks. The leads of the heterogeneous multi-chip are electrically connected to the solder balls after passing through the redistribution layer and the metal under the bump layer. The connecting structure is electrically connected to the solder balls after passing through the redistribution layer and the metal under the bump layer.

[0006] Furthermore, the material of the high thermal conductivity heat sink is a molybdenum-copper alloy.

[0007] Furthermore, the top of the high thermal conductivity heat sink is formed by chemical etching to create the stepped groove.

[0008] Furthermore, the surface of the stepped groove is roughened using a pulsed fiber laser to form multiple micropores.

[0009] Furthermore, the heterogeneous multi-chip includes multiple heterogeneous chips, and the high thermal conductivity heat sink has different thicknesses, which can be matched with heterogeneous chips of different thicknesses through the thermally conductive adhesive.

[0010] Furthermore, the material of the under-bump metal layer and the redistribution layer is copper, and the material of the dielectric layer is polyimide. All three are completed through a wafer-level redistribution process.

[0011] Furthermore, the solder balls are formed at the bottom of the metal layer under the bump using a stencil ball-mounting process or a wafer-level ball-mounting process.

[0012] Furthermore, the solder ball is made of a low-melting-point tin-lead eutectic composition, a high-melting-point high-lead composition, or a high-melting-point lead-free composition.

[0013] As another aspect of the present invention, a method for preparing a high-heat-dissipation three-dimensional heterogeneous molding compound is provided, wherein the method for preparing the high-heat-dissipation three-dimensional heterogeneous molding compound includes:

[0014] Step S11: Provide a heterogeneous multi-chip, thin the heterogeneous multi-chip to a certain thickness, and attach the thinned heterogeneous multi-chip to the wafer through a temporary bonding film to form a temporary carrier board;

[0015] Step S12: Fabricate high thermal conductivity heat sinks according to the thickness and position of each heterogeneous chip, and connect adjacent high thermal conductivity heat sinks through a connecting structure. Before mounting the high thermal conductivity heat sinks, chemically etch the top of the high thermal conductivity heat sinks to form stepped grooves, and pattern the surface of the stepped grooves to form multiple micropores. Mount the processed high thermal conductivity heat sinks on the top of the heterogeneous multi-chip using thermally conductive adhesive, and cure the adhesive according to its composition.

[0016] Step S13: The heterogeneous multi-chip and high thermal conductivity heat sink that have been mounted are injection molded using molding compound, and after curing, they form resin discs.

[0017] Step S14: Thin the back side of the resin disc until the high thermal conductivity heat sink is exposed;

[0018] Step S15: Remove the temporary bonding film on the front side of the resin wafer, invert the resin wafer, and attach the back side of the resin wafer to the wafer wafer through the temporary bonding film. Sequentially form a dielectric layer, a redistribution layer, and a metal layer under the bump on the front side of the resin wafer to realize the interconnection and grounding of heterogeneous chips.

[0019] Step S16: Solder balls are formed at the location of the metal layer under the bump, and the solder balls and the metal layer under the bump are interconnected by a reflow process;

[0020] Step S17: Remove the temporary bonding film on the back of the resin disc, dic the resin disc after ball implantation, and invert it to form the high heat dissipation three-dimensional heterogeneous encapsulation structure.

[0021] The high heat dissipation three-dimensional heterogeneous molding structure provided by this invention has the following advantages:

[0022] (1) The bottom of the integrated heat sink has different thicknesses. According to the thickness of the heterogeneous chip, the amount of thermal adhesive is adjusted to ensure that the surface of the heat sink is at the same level after the heterogeneous chip is mounted on the heat sink. This avoids the risk of chip cracking and edge chipping that may occur when all heterogeneous chips are thinned to the same height.

[0023] (2) The integrated heat sink has a connected structure, which makes it easy to ground multiple heterogeneous chips through rewiring, and also enables the plastic package structure to have heat dissipation capability in the horizontal direction, uniformly dissipating heat from the chips and preventing the local temperature of the plastic package structure from being too high.

[0024] (3) The back of the integrated heat sink is chemically etched to form a stepped groove structure, and the surface is roughened by pulsed fiber laser to form a high-density microporous structure, which enhances the wettability of the molding compound to the heat sink, improves the bonding strength between the heat sink and the molding compound, prevents interface delamination, and improves the packaging yield. Attached Figure Description

[0025] The accompanying drawings are provided to further illustrate the invention and form part of the specification. They are used together with the following detailed description to explain the invention, but do not constitute a limitation thereof.

[0026] Figure 1 This is a schematic diagram of a high-heat-dissipation three-dimensional heterogeneous encapsulation structure in an embodiment of the present invention.

[0027] Figure 2 This is a flowchart illustrating a method for preparing a high-heat-dissipation three-dimensional heterogeneous encapsulation structure according to an embodiment of the present invention.

[0028] Figure 3 The structural diagram corresponding to the preparation of S11 in the embodiment of the present invention is shown.

[0029] Figure 4 The structural diagram corresponding to the preparation of S12 in the embodiment of the present invention is shown.

[0030] Figure 5 The structural diagram corresponding to S13 in the embodiment of the present invention is shown.

[0031] Figure 6 The structural diagram corresponding to S14 prepared in this embodiment of the invention is shown.

[0032] Figure 7 The structural diagram corresponding to S15 in the embodiment of the present invention is shown.

[0033] Figure 8 The structural diagram corresponding to S16 in the embodiment of the present invention is shown.

[0034] Figure 9 The structural diagram corresponding to S17 in the embodiment of the present invention is shown.

[0035] Figure 10 This is a simulation diagram of the temperature field distribution of the high heat dissipation three-dimensional heterogeneous plastic-encapsulated structure in an embodiment of the present invention.

[0036] Figure 11 This is a simulation distribution diagram of the equivalent stress of the molding compound in a high-heat-dissipation three-dimensional heterogeneous molding structure according to an embodiment of the present invention.

[0037] Figure 12 This is a simulation diagram of the warpage distribution of a high-heat-dissipation three-dimensional heterogeneous encapsulation structure in an embodiment of the present invention.

[0038] The components represented by each number in the attached diagram are listed below: 001-Temporary bonding film; 100-Encapsulating material; 101-Stepped groove; 102-High thermal conductivity heat sink; 103-Thermal conductive adhesive; 104-Heterogeneous multi-chip; 105-Dielectric layer; 106-Under-bump metal layer; 107-Solder ball; 108-Rewiring layer; 109-Connection structure; 110-Microvia. Detailed Implementation

[0039] It should be noted that, unless otherwise specified, the embodiments and features described in the present invention can be combined with each other. The present invention will now be described in detail with reference to the accompanying drawings and embodiments.

[0040] To enable those skilled in the art to better understand the present invention, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort should fall within the scope of protection of the present invention.

[0041] It should be noted that the terms "first," "second," etc., in the specification, claims, and accompanying drawings of this invention are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate for the embodiments of the invention described herein. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover a non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.

[0042] This invention provides a high-heat-dissipation three-dimensional heterogeneous molding structure, such as... Figure 1 As shown, the high heat dissipation three-dimensional heterogeneous molding compound structure includes a high thermal conductivity heat sink 102. The top of the high thermal conductivity heat sink 102 has a stepped groove 101, and the surface of the stepped groove 101 has multiple micropores 110. The bottom of the high thermal conductivity heat sink 102 is bonded to the heterogeneous multi-chip 104 with thermally conductive adhesive 103 and then encapsulated with molding compound 100. A dielectric layer 105 is provided at the bottom of the molding compound 100, and the dielectric layer 105 encapsulates a... The system includes a wiring layer 108 and a bump under-metal layer 106. A solder ball 107 is disposed at the bottom of the bump under-metal layer 106. A connecting structure 109 is disposed between two adjacent high thermal conductivity heat sinks 102. The leads of the heterogeneous multi-chip 104 are electrically connected to the solder ball 107 after passing through the redistribution layer 108 and the bump under-metal layer 106. The connecting structure 109 is electrically connected to the solder ball 107 after passing through the redistribution layer 108 and the bump under-metal layer 106.

[0043] Specifically, a connecting structure 109 is provided between two adjacent high thermal conductivity heat sinks 102. On the one hand, it is used to ground multiple heterogeneous chips through the redistribution layer 108 and the under-bump metal layer 106 to the solder ball 107. On the other hand, it realizes uniform heat dissipation of heterogeneous chips. Heat is transferred not only in the vertical direction, but also in the horizontal direction, so that the overall temperature of the plastic package structure is more uniform when the chip is working, preventing the local temperature of the plastic package structure from being too high, and improving the heat dissipation efficiency, reliability and packaging yield of the plastic package structure.

[0044] Preferably, the high thermal conductivity heat sink 102 is made of molybdenum-copper alloy, and the mass fraction of copper content in the molybdenum-copper alloy is in the range of 50% to 70%, and the thermal expansion coefficient of the molding compound 100 is matched by adjusting the copper content.

[0045] Preferably, the top of the high thermal conductivity heat sink 102 is chemically etched to form the stepped groove 101, which increases the bonding area between the high thermal conductivity heat sink 102 and the molding compound 100 and prevents the interface between the high thermal conductivity heat sink 102 and the molding compound 100 from delaminating along the longitudinal direction.

[0046] Preferably, the surface of the stepped groove 101 is roughened using a pulsed fiber laser to form multiple micropores 110, thereby improving the wettability of the molding compound 100 to the high thermal conductivity heat sink 102 and preventing the interface between the high thermal conductivity heat sink 102 and the molding compound 100 from delaminating in the horizontal direction.

[0047] Specifically, the laser texturing process parameters are as follows: average power of 80~100 W, scanning speed of 2~5 mm / s, pulse frequency of 800~1500 kHz, and pulse width of 200~500 ns.

[0048] Preferably, the heterogeneous multi-chip 104 includes multiple heterogeneous chips, and the high thermal conductivity heat sink 102 has different thicknesses, which can be matched with heterogeneous chips of different thicknesses by means of the thermally conductive adhesive 103.

[0049] Preferably, the under-bump metal layer 106 and the redistribution layer 108 are both made of copper, and the dielectric layer 105 is made of polyimide. All three are completed using a wafer-level redistribution process.

[0050] Preferably, the bottom of the metal layer 106 under the bump is formed into solder balls 107 by a stencil ball-planting process or a wafer-level ball-planting process. Since the two adjacent high thermal conductivity heat sinks 102 are connected and have stepped grooves 101, they provide good support for the molding structure and alleviate warping during the ball-planting process. Therefore, the solder balls 107 are made of low melting point tin-lead eutectic composition, high melting point high lead composition, or high melting point lead-free composition.

[0051] It should be noted that the density, depth, and layout of the stepped grooves 101 and micropores 110 can be adjusted according to the requirements of the encapsulation structure, making it highly versatile.

[0052] This invention also provides a method for preparing a high-heat-dissipation three-dimensional heterogeneous encapsulation structure, such as... Figure 2 As shown, it includes the following steps:

[0053] Step S11: As Figure 3 As shown, a heterogeneous multi-chip 104 is provided. The heterogeneous multi-chip 104 is thinned to a certain thickness as required. The thinned heterogeneous multi-chip 104 is then attached to a wafer through a temporary bonding film 001 to form a temporary carrier.

[0054] Step S12: As Figure 4 As shown, a high thermal conductivity heat sink 102 is fabricated according to the thickness and position of each heterogeneous chip, and adjacent high thermal conductivity heat sinks 102 are connected by a connecting structure 109. Before mounting the high thermal conductivity heat sink 102, the top of the high thermal conductivity heat sink 102 is chemically etched to form a stepped groove 101. The laser texturing parameters are adjusted according to the composition of the high thermal conductivity heat sink 102, and the surface of the stepped groove 101 is patterned to form multiple micropores 110. According to the position of each heterogeneous chip, the processed high thermal conductivity heat sink 102 is mounted on the top of the heterogeneous multi-chip 104 using a die-mounting device with thermally conductive adhesive 103, and the thermally conductive adhesive 103 is cured according to its composition.

[0055] Step S13: As Figure 5 As shown, the heterogeneous multi-chip 104 and the high thermal conductivity heat sink 102 that have been mounted are injection molded using molding compound 100, and after curing, they form a resin disc.

[0056] Step S14: As Figure 6 As shown, the back side of the resin wafer is thinned by mechanical grinding until the high thermal conductivity heat sink 102 is exposed, with the exposed area being no less than 80% of the chip area;

[0057] Step S15: As Figure 7 As shown, the temporary bonding film 001 on the front side of the resin wafer is removed, and the resin wafer is inverted. The back side of the resin wafer is attached to the wafer wafer through the temporary bonding film 001. On the front side of the resin wafer, a dielectric layer 105, a redistribution layer 108, and a bump under-metal layer 106 are formed sequentially using photolithography equipment and wafer-level multilayer redistribution process to realize the interconnection and grounding of heterogeneous chips.

[0058] Step S16: As Figure 8As shown, using the stencil ball-planting process, balls are planted at the position of the metal layer 106 under the bump to form solder balls 107, and the solder balls 107 and the metal layer 106 under the bump are interconnected by the reflow process according to the composition of the solder balls.

[0059] Step S17: As Figure 9 As shown, the temporary bonding film 001 on the back of the resin disc is removed, the resin disc after ball implantation is diced, and then inverted to form... Figure 1 The high heat dissipation three-dimensional heterogeneous encapsulation structure is shown.

[0060] Specifically, considering the processing thickness error of the high thermal conductivity heat sink 102 and the thinning error of the heterogeneous chip, the amount of thermal conductive adhesive applied is adjusted to ensure that the upper surface of the high thermal conductivity heat sink 102 after mounting is at the same level. The heat sink is then exposed by grinding after molding, thereby improving the heat dissipation efficiency of the heat sink.

[0061] The heat dissipation of a high-heat-dissipation three-dimensional heterogeneous plastic-encapsulated structure under room temperature service conditions was simulated using the finite element analysis software ANSYS. This embodiment features an axisymmetric structure, and a 1 / 4 scale model was used for calculation to improve simulation efficiency. The temperature field distribution of the structure described in this embodiment is as follows: Figure 10 As shown, heterogeneous chip A has a power consumption of 0.5 W, heterogeneous chips B and C each have a power consumption of 0.25 W, and heterogeneous chip D has a power consumption of 0.15 W. When operating at room temperature, the maximum temperature of the heterogeneous multi-chip system is approximately 190.0℃. The heat sink interconnection structure 109 proposed in this invention provides a medium for heat transfer in the horizontal direction, resulting in a relatively uniform temperature distribution among the four heterogeneous chips in the high-heat-dissipation three-dimensional heterogeneous encapsulation structure.

[0062] During the process of molding compound curing (typically 150℃) and cooling to room temperature, the equivalent stress of the high heat dissipation three-dimensional heterogeneous molding structure is simulated using the finite element analysis software ANSYS. Figure 11 As shown, after the device encapsulation is cooled to room temperature, the maximum equivalent stress of the molding compound is 78.0 MPa, the stress distribution is relatively uniform, and there is no stress concentration at the interface between the molding compound and the heat sink and the chip.

[0063] The warpage of a high-heat-dissipation three-dimensional heterogeneous plastic-encapsulated structure was simulated using the finite element analysis software ANSYS in a 125℃ high-temperature environment. Figure 12 As shown, in a high-temperature environment of 125℃, the warpage of the heterogeneous multi-chip exhibits a shape characterized by a convex center and concave edges. The maximum warpage of the central heterogeneous chip A is 0.007mm, the maximum warpage of the edge heterogeneous chip D is -0.068mm, and the overall warpage of the heterogeneous multi-chip is 0.075mm.

[0064] It is understood that the above embodiments are merely exemplary implementations used to illustrate the principles of the present invention, and the present invention is not limited thereto. For those skilled in the art, various modifications and improvements can be made without departing from the spirit and essence of the present invention, and these modifications and improvements are also considered to be within the scope of protection of the present invention.

Claims

1. A high-heat-dissipation three-dimensional heterogeneous encapsulation structure, characterized in that, The device includes a high thermal conductivity heat sink (102), the top of which is provided with a stepped groove (101), and the surface of the stepped groove (101) is provided with a plurality of micropores (110). The bottom of the high thermal conductivity heat sink (102) is bonded to a heterogeneous multi-chip (104) with thermally conductive adhesive (103) and then encapsulated with molding compound (100). The bottom of the molding compound (100) is provided with a dielectric layer (105), and the dielectric layer (105) encapsulates a redistribution layer (108) and a raised layer. A bottom metal layer (106) is provided with solder balls (107) at the bottom of the bottom metal layer (106). A connecting structure (109) is provided between two adjacent high thermal conductivity heat sinks (102). The lead-out terminals of the heterogeneous multi-chip (104) are electrically connected to the solder balls (107) through the redistribution layer (108) and the bottom metal layer (106). The connecting structure (109) is electrically connected to the solder balls (107) through the redistribution layer (108) and the bottom metal layer (106).

2. The high heat dissipation three-dimensional heterogeneous encapsulation structure according to claim 1, characterized in that, The high thermal conductivity heat sink (102) is made of molybdenum-copper alloy.

3. The high heat dissipation three-dimensional heterogeneous encapsulation structure according to claim 1, characterized in that, The top of the high thermal conductivity heat sink (102) is formed by chemical etching to create the stepped groove (101).

4. The high heat dissipation three-dimensional heterogeneous encapsulation structure according to claim 1, characterized in that, The surface of the stepped groove (101) is roughened using a pulsed fiber laser to form multiple micropores (110).

5. The high heat dissipation three-dimensional heterogeneous encapsulation structure according to claim 1, characterized in that, The heterogeneous multi-chip (104) includes multiple heterogeneous chips, and the high thermal conductivity heat sink (102) has different thicknesses, which can be matched with heterogeneous chips of different thicknesses by means of the thermally conductive adhesive (103).

6. The high heat dissipation three-dimensional heterogeneous encapsulation structure according to claim 1, characterized in that, The material of the under-bump metal layer (106) and the redistribution layer (108) is copper, and the material of the dielectric layer (105) is polyimide. All three are completed by wafer-level redistribution process.

7. The high heat dissipation three-dimensional heterogeneous encapsulation structure according to claim 1, characterized in that, The bottom of the metal layer (106) under the bump is formed into solder balls (107) by a stencil ball-planting process or a wafer-level ball-planting process.

8. The high heat dissipation three-dimensional heterogeneous molding structure according to claim 1, characterized in that, The solder ball (107) is made of a low-melting-point tin-lead eutectic composition, a high-melting-point high-lead composition, or a high-melting-point lead-free composition.

9. A method for preparing a high-heat-dissipation three-dimensional heterogeneous molding structure as described in any one of claims 1-8, characterized in that, The method for preparing the high heat dissipation three-dimensional heterogeneous molding structure includes: Step S11: Provide a heterogeneous multi-chip (104), thin the heterogeneous multi-chip (104) to a certain thickness, and attach the thinned heterogeneous multi-chip (104) to the wafer through a temporary bonding film (001) to form a temporary carrier board; Step S12: Fabricate a high thermal conductivity heat sink (102) according to the thickness and position of each heterogeneous chip, and connect two adjacent high thermal conductivity heat sinks (102) through a connecting structure (109). Before mounting the high thermal conductivity heat sink (102), chemically etch the top of the high thermal conductivity heat sink (102) to form a stepped groove (101), and pattern the surface of the stepped groove (101) to form multiple micropores (110). Mount the processed high thermal conductivity heat sink (102) on the top of the heterogeneous multi-chip (104) using thermally conductive adhesive (103), and cure the thermally conductive adhesive (103) according to its composition. Step S13: The heterogeneous multi-chip (104) and high thermal conductivity heat sink (102) that have been mounted are injection molded using molding compound (100), and resin discs are formed after curing. Step S14: Thin the back side of the resin disc until the high thermal conductivity heat sink (102) is exposed. Step S15: Remove the temporary bonding film (001) on the front side of the resin wafer, and invert the resin wafer. Attach the back side of the resin wafer to the wafer wafer through the temporary bonding film (001). Sequentially form a dielectric layer (105), a redistribution layer (108), and a bump under-metal layer (106) on the front side of the resin wafer to achieve interconnection and grounding of heterogeneous chips. Step S16: Solder balls (107) are formed at the location of the under-bump metal layer (106), and the solder balls (107) and the under-bump metal layer (106) are interconnected by a reflow process; Step S17: Remove the temporary bonding film (001) on the back of the resin disc, scribble the resin disc after ball implantation, and invert it to form the high heat dissipation three-dimensional heterogeneous encapsulation structure.