A multi-field ring fast recovery diode based on a punch-through structure and a preparation method thereof

Abstract

The present invention discloses a multi-field ring fast recovery diode based on a punch-through structure in the field of semiconductor technology and a preparation method thereof. The fast recovery diode comprises: an N+ substrate, an N buffer layer, and an N-drift region; a lightly doped P-region is arranged on the upper part of the N-drift region; a cell region, a plurality of field rings and a cut-off ring, the plurality of field rings and the cut-off ring are arranged concentrically with the cell region and are spaced apart, the cut-off ring is located at the outer periphery of the outermost field ring, the cell region and the plurality of field rings are heavily doped P+ regions, and the cut-off ring is a heavily doped N+ region; an oxide layer is arranged above the N-drift region; a metal field plate is arranged above the oxide layer, the cell region and the ring region; and a back metal layer is arranged below the N+ substrate. The fast recovery diode achieves the effects of improving reverse withstand voltage capability, reducing forward voltage drop, and improving softness factor by combining a lightly doped P-region with a punch-through structure, and combining multiple field rings, cut-off rings and field plates.

Description

Technical Field

[0001] This invention relates to the field of semiconductor device technology, and in particular to a multi-field ring fast recovery diode based on a punch-through structure and its fabrication method. Background Technology

[0002] In the power electronics industry, diodes are widely used as basic components. Due to their unidirectional conductivity, they are often used in circuits for rectification, clamping, and freewheeling. Especially in high-voltage, frequency conversion, and chopper circuits, switching devices such as GTOs, MOSFETs, and IGBTs require a diode connected in parallel to provide freewheeling, buffering, and absorption functions. With the continuous iteration and development of various technologies, the power, frequency, and performance of electronic devices are constantly improving. To ensure that diodes are compatible with their operating processes, fast recovery diodes are required to have characteristics such as high reverse withstand voltage, low forward voltage drop, short reverse recovery time, low leakage current, and good flexibility.

[0003] Traditional fast recovery diodes typically consist of three core parts: a highly doped P+ emitter region at the anode, a lightly doped N- drift region, and a highly doped N+ emitter region at the cathode. However, their structure inherently presents a contradiction—conduction characteristics and reverse recovery characteristics—which urgently need improvement. Furthermore, the reverse breakdown voltage of the chip itself is limited to the terminal section, resulting in a low reverse breakdown voltage. In addition, while traditional platinum doping processes can effectively control minority carrier lifetime, shorten reverse recovery time, and improve overall device performance, they also suffer from problems such as large forward voltage drop and moderate softness. Summary of the Invention

[0004] This application provides a multi-field ring fast recovery diode based on a punch-through structure, which solves the problems of low reverse breakdown voltage, large forward voltage drop, and poor softness of conventional fast recovery diodes in the application end. It achieves the technical effects of improving reverse breakdown voltage, reducing forward voltage drop, and improving softness factor.

[0005] This application provides a multi-field ring fast recovery diode based on a punch-through structure, including:

[0006] N+ substrate;

[0007] An N-buffer layer is disposed above the N+ substrate;

[0008] The N-drift region is disposed above the N-buffer layer;

[0009] A lightly doped P-region is disposed above the N-drift region;

[0010] The cell region and the ring region are disposed within the lightly doped P- region. The ring region includes multiple field rings and a stop ring. The multiple field rings and the stop ring are all arranged concentrically with the cell region and are distributed at intervals. The stop ring is located on the outer periphery of the outermost field ring. The cell region and the multiple field rings are heavily doped P+ regions, and the stop ring is heavily doped N+ regions.

[0011] An oxide layer is disposed above the N-drift region, and windows corresponding to the cell region and the ring region are formed on the oxide layer;

[0012] A metal field plate is disposed above the oxide layer, the cellular region, and the ring region;

[0013] A back metal layer is disposed beneath the N+ substrate.

[0014] The beneficial effects of the above embodiments are as follows: This multi-field-ring fast recovery diode, through a lightly doped P-region combined with a punch-through (PT) structure (i.e., introducing an N-buffer layer between the N- and N+ regions), achieves a trapezoidal electric field distribution. This electric field distribution, without changing the reverse breakdown voltage, can reduce the device thickness, which is beneficial for reducing the forward voltage drop and increasing the fall time of the diode's reverse recovery, thereby improving the softness factor. Simultaneously, the combination of the multi-field ring and the field plate widens the depletion region of the main junction outward, thereby reducing the electric field intensity within it and increasing the breakdown voltage. Furthermore, due to the influence of chip manufacturing processes, the depletion region boundary located at the edge cells is approximately cylindrical or spherical, which leads to increased curvature and enhanced electric field at this point, making it a weak point in insulation. The cutoff ring (heavily doped N+ region) can improve the termination structure and optimize the electric field distribution, thereby improving the overall reverse breakdown voltage capability of the chip.

[0015] Based on the above embodiments, this application can be further improved as follows:

[0016] In one embodiment of this application, the impurity concentration in the lightly doped P-region exhibits a quadratic function distribution. By repeatedly adjusting parameters such as the ion implantation angle, energy, annealing time, and temperature, the impurity concentration in the lightly doped P-region is approximated by f(x) = ... The quadratic function distribution of -0.6x+c (where c is a constant and related to parameters such as ion implantation energy) can create a certain gradient distribution of the internal electric field, effectively improving the reverse breakdown voltage capability of the chip and achieving better softness.

[0017] In one embodiment of this application, the quadratic function is f(x) = -0.6x+c, where c is a constant.

[0018] In one embodiment of this application, the spacing between each field ring is the same. That is, the distance between the main junction and each field ring is distributed in an arithmetic progression, with the distance from the main junction to each field ring increasing gradually from the inside out.

[0019] In one embodiment of this application, the cutoff ring is located in the outermost region of the lightly doped P-region. The impurity concentration distribution of the cutoff ring is semi-elliptical, which improves the termination structure, optimizes the electric field distribution, and enhances the overall breakdown voltage capability of the chip.

[0020] In one embodiment of this application, the metal field plate is made of Al. The metal field plate is also a front-side metal layer or anode, formed by vaporizing Al and adhering it to the chip surface. On the one hand, it can reduce the peak value of the junction electric field and improve the breakdown voltage; on the other hand, it can reduce the impact of impurity charges on the chip stability.

[0021] In one embodiment of this application, the back metal layer is, from top to bottom, a Ti / Ni / Ag metal layer. Titanium (Ti) is the layer in contact with the silicon wafer, and its function is to prevent the materials above and below from mixing. Nickel (Ni) is the layer between the contact layer and the protective layer; its material itself has good bonding characteristics with the metal layers above and below, and it acts as the dominant medium during wafer bonding. Silver (Ag) is the outermost metal layer, generally composed of a high-density, high-conductivity material.

[0022] In one embodiment of this application, the back metal layer, N+ substrate, N buffer layer, and N- drift region are doped with the impurity Au. The introduction of the impurity element Au achieves a lower forward voltage drop and better softness.

[0023] In one embodiment of this application, the resistivity of the N+ substrate is 0.002~0.004 Ω·cm, the thickness is 10~20 μm, and the doping concentration of the N buffer layer is... The thickness is 8~15μm, and the doping concentration of the N-drift region is approximately ~ Thickness 220~260μm.

[0024] In one embodiment of this application, the oxide layer is silicon oxide with a thickness of 2~6μm.

[0025] This application also provides a method for fabricating a multi-field ring fast recovery diode based on a punch-through structure, including the following steps:

[0026] S1: Perform the first epitaxial layer growth on the N+ substrate to form the N buffer layer;

[0027] S2: Perform a second epitaxial layer growth to form the N-drift region;

[0028] S3: Under high temperature conditions, high-purity hydrogen and oxygen are introduced to grow the oxide layer on the epitaxial layer by hydrogen-oxygen synthesis oxidation.

[0029] S4: Perform photolithography and etching on the oxide layer to open the windows of the cell region and the ring region, adjust the ion implantation angle along the window, perform B ion implantation, and anneal at high temperature to form the lightly doped P- region;

[0030] S5: Adjust the ion implantation angle, implant B ions again in the window corresponding to the cell region and the field ring, and implant Ph ions in the window corresponding to the cutoff ring. After rapid thermal annealing, the heavily doped P+ region and the heavily doped N+ region are formed.

[0031] S6: The metal source Al is vaporized by the evaporation stage and adheres to the surface of the cell region and the ring region to form the metal field plate;

[0032] S7: A back metal layer with ohmic contact characteristics and a Ti / Ni / Ag metal layer distribution from top to bottom is fabricated on the back side of the N+ substrate through evaporation and multilayer etching processes;

[0033] S8: After thinning the wafer, Au impurities are introduced by sputtering the back metal layer and diffused into the N+ substrate, N buffer layer and N- drift region by laser annealing.

[0034] The beneficial effect of the above embodiments is that the preparation method, by repeatedly adjusting and controlling parameters such as the angle and energy of ion implantation, as well as the annealing time and temperature, makes the impurity concentration of the lightly doped P-region approximately f(x) = The distribution follows a quadratic function of -0.6x+c (where c is a constant related to parameters such as ion implantation energy), which creates a gradient distribution in the internal electric field, effectively improving the chip's reverse breakdown voltage and achieving better softness. This fabrication method introduces the impurity element Au by sputtering a back metal layer, which then diffuses into the N+ substrate, buffer layer, and drift region under high temperature conditions to achieve a lower forward voltage drop and better softness. Furthermore, this method employs laser annealing to avoid the potential impact of high-temperature annealing on the front structure, allowing for precise control of specific areas and enabling rapid heating and cooling.

[0035] One or more technical solutions provided in the embodiments of this application have at least the following technical effects or advantages:

[0036] 1. This multi-field ring fast recovery diode uses a lightly doped P-region with a quadratic distribution of impurity concentration to create a gradient distribution of the internal electric field, which effectively improves the reverse breakdown voltage capability of the chip and achieves better softness. Combined with a punch-through structure, the electric field is distributed in a trapezoidal shape, which can reduce the thickness of the device without changing the reverse breakdown voltage. This helps to reduce the forward voltage drop, improve the fall time of the diode's reverse recovery, and thus improve the softness factor.

[0037] 2. The multi-field ring and cutoff ring of this multi-field fast recovery diode are combined with the field plate to widen the depletion region of the main junction outward, thereby reducing the electric field strength within it, increasing the breakdown voltage, improving the termination structure, optimizing the electric field distribution, and improving the overall reverse withstand voltage capability of the chip; the metal field plate can reduce the peak value of the junction electric field and reduce the impact of impurity charge on the stability of the chip.

[0038] 3. This preparation method, through repeated adjustments to control parameters such as the ion implantation angle, energy, annealing time, and temperature, achieves an impurity concentration in the lightly doped P-region that is approximately f(x) = The quadratic function distribution of -0.6x+c (where c is a constant and related to parameters such as ion implantation energy) allows the internal electric field to form a certain gradient distribution, effectively improving the reverse breakdown voltage capability of the chip and achieving better softness.

[0039] 4. This preparation method introduces the impurity element gold (Au) by sputtering a back metal layer and diffusing it into the N+ substrate, buffer layer, drift region, etc. under high temperature conditions to obtain a lower forward voltage drop and better softness.

[0040] 5. This fabrication method uses laser annealing to avoid the potential impact of high-temperature annealing on the front structure of the device, allowing for precise control of specific areas and enabling rapid heating and cooling. Attached Figure Description

[0041] To more clearly illustrate the specific embodiments of the present invention or the technical solutions in the prior art, the accompanying drawings used in the description of the specific embodiments or the prior art will be briefly introduced below. In all the drawings, similar elements or parts are generally identified by similar reference numerals. In the drawings, the elements or parts are not necessarily drawn to scale.

[0042] Figure 1 This is a schematic diagram of a multi-field loop fast recovery diode based on a punch-through structure in Example 1;

[0043] Figure 2 This is a schematic diagram of the intermediate product structure of a method for fabricating a multi-field ring fast recovery diode based on a punch-through structure, as shown in Example 2. Figure 1 ;

[0044] Figure 3 This is a schematic diagram of the intermediate product structure of a method for fabricating a multi-field ring fast recovery diode based on a punch-through structure, as shown in Example 2. Figure 2 ;

[0045] Figure 4 This is a schematic diagram of the intermediate product structure of a method for fabricating a multi-field ring fast recovery diode based on a punch-through structure, as shown in Example 2. Figure 3 ;

[0046] Figure 5 This is a schematic diagram of the intermediate product structure of a method for fabricating a multi-field ring fast recovery diode based on a punch-through structure, as shown in Example 2. Figure 4 .

[0047] Among them, 1. back metal layer, 2. N+ substrate, 3. N buffer layer, 4. N- drift region, 5. lightly doped P- region, 6. field ring, 7. cutoff ring, 8. cell region, 9. metal field plate, 10. oxide layer. Detailed Implementation

[0048] The present invention will be further illustrated below with reference to specific embodiments. It should be understood that these embodiments are for illustrative purposes only and are not intended to limit the scope of the invention. After reading the present invention, any modifications of the present invention in various equivalent forms by those skilled in the art will fall within the scope defined by the appended claims.

[0049] It should be noted that similar labels and letters in the following figures indicate similar items. Therefore, once an item is defined in one figure, it does not need to be further defined and explained in subsequent figures.

[0050] In the description of this invention, it should be noted that the terms "vertical," "outer peripheral surface," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings, or the orientation or positional relationship in which the product of this invention is usually placed when in use. They are only for the convenience of describing this invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limiting this invention.

[0051] In the description of this invention, it should also be noted that, unless otherwise explicitly specified and limited, the terms "set," "install," "connect," and "link" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; and they can refer to the internal connection of two components. Those skilled in the art can understand the specific meaning of the above terms in this invention based on the specific circumstances.

[0052] This application provides a multi-field ring fast recovery diode based on a punch-through structure and its fabrication method, which solves the problems of low reverse breakdown voltage, large forward voltage drop, and poor softness of conventional fast recovery diodes in the application end. It achieves the technical effects of improving reverse breakdown voltage, reducing forward voltage drop, and improving softness factor.

[0053] The technical solution in the embodiments of the present application is to solve the above problems, and the overall idea is as follows:

[0054] Example 1:

[0055] like Figure 1 As shown, a multi-field ring fast recovery diode based on a punch-through structure includes: a back metal layer 1, an N+ substrate 2, an N buffer layer 3, an N- drift region 4, a lightly doped P- region 5, a field ring 6, a cutoff ring 7, a cell region 8, a metal field plate 9, and an oxide layer 10.

[0056] The N buffer layer 3 is disposed above the N+ substrate 2; the N- drift region 4 is disposed above the N buffer layer 3;

[0057] The lightly doped P-region 5 is located above the N-drift region 4. The impurity concentration of the lightly doped P-region 5, centered on the first field ring 6 of the adjacent cell region 8 and the cutoff ring 7, is f(x) = The quadratic function distribution of -0.6x+c;

[0058] Cell region 8 and ring region are located within lightly doped P- region 5. The ring region includes multiple field rings 6 and a stop ring 7. The multiple field rings 6 and the stop ring 7 are all arranged concentrically with cell region 8 and are spaced apart. The spacing between each field ring 6 is the same. The stop ring 7 is located on the outer periphery of the outermost field ring 6. Cell region 8 and multiple field rings 6 are heavily doped P+ regions, and stop ring 7 is heavily doped N+ regions.

[0059] An oxide layer 10 is disposed above the N-drift region 4, and windows corresponding to the cell region 8 and the ring region are formed on the oxide layer 10;

[0060] Metal field plate 9 is disposed above oxide layer 10, cell region 8 and ring region, and the metal field plate 9 is made of Al.

[0061] The back metal layer 1 is disposed below the N+ substrate 2, and the back metal layer 1 consists of Ti / Ni / Ag metal layers from top to bottom;

[0062] Among them, the back metal layer 1, N+ substrate 2, N buffer layer 3, and N- drift region 4 are doped with Au impurities.

[0063] Furthermore, the resistivity of the N+ substrate 2 is 0.002~0.004 Ω·cm, the thickness is 10~20 μm, and the doping concentration of the N buffer layer 3 is... The thickness is 8~15μm, and the doping concentration of N-drift region 4 is approximately ~ The thickness is 220~260μm. The oxide layer 10 is silicon oxide with a thickness of 2~6μm.

[0064] Example 2:

[0065] A method for fabricating a multi-field ring fast recovery diode based on a punch-through structure includes the following steps:

[0066] Forming a punch-through (PT) structure: The first epitaxial layer is grown on an N+ type substrate 2 with a resistivity of 0.002~0.004 Ω·cm and a thickness of 10~20 μm, forming a doped layer with a doping concentration of approximately [missing information]. A second epitaxial layer is grown, with a thickness of 8-15 μm, followed by the growth of an N-buffer layer, resulting in a doping concentration of approximately [missing information]. ~ N-drift region 4 with a thickness of 220~260μm, such as Figure 2 As shown.

[0067] Formation of oxide layer and lightly doped P-region: Under high temperature, high-purity hydrogen and oxygen are introduced to grow silicon oxide with a thickness of 2~6μm, i.e., oxide layer 10, on N-drift region 4 by hydrogen-oxygen synthesis oxidation; photolithography and etching are performed on oxide layer 10 to open windows of cell region 8 (main junction) and multi-ring region (field ring 6, stop ring 7). B ion implantation is performed first. In a nitrogen environment, according to the set temperature coefficient, the furnace tube temperature is first raised to 600-800℃, then gradually increased to 1000-1200℃, and finally gradually reduced to room temperature after a period of time. Starting from the center of the first field ring (implantation window) on the left / right side of the main junction and the stop ring (edge ​​implantation window), respectively, an approximate f(x) = The lightly doped P-region 5 has a quadratic function distribution of -0.6x+c (where c is a constant related to parameters such as ion implantation energy), as shown in Figure 5. Figure 3 As shown.

[0068] Formation of cell regions, multiple field rings, and cutoff rings: B ions are re-implanted into the windows of cell region 8 and field ring 6, and Ph ions are implanted into the outermost cutoff ring 7 window. Rapid thermal annealing is then performed to form a heavily doped P+ region (field ring 6) where the distances between cell region 8 and each field ring are evenly distributed (i.e., the distances between adjacent field rings are equal, and the distances from the cell region to each field ring increase progressively from the inside out), and a semi-elliptical heavily doped N+ region (cutoff ring 7). Figure 4 As shown.

[0069] Forming a metal field plate: In the cell region and ring region, a specific metal source Al is vaporized using an evaporation stage, adhering to the entire chip surface to form a metal field plate 9 with a thickness of 4~8μm, as shown below. Figure 5 As shown.

[0070] A cathode metal is formed, and a back-side metal is sputtered: A multi-layered metal structure with ohmic contact characteristics and a Ti / Ni / Ag distribution from top to bottom is fabricated on the back side of the N+ type substrate 2 through evaporation and multi-layer etching processes; this is the back-side metal layer 1. After wafer thinning, the impurity element gold (Au) is introduced by sputtering the back-side metal layer 1, and diffuses into the N+ type substrate 2, N-buffer layer 3, N-drift region 4, etc., under high temperature conditions of 800-1200℃. Figure 1 As shown. To avoid the impact of high-temperature annealing on the front structure of the device, laser annealing technology is used to precisely control specific areas, achieving rapid heating and rapid cooling.

[0071] The technical solutions described in the embodiments of this application have at least the following technical effects or advantages:

[0072] 1. This multi-field ring fast recovery diode uses a lightly doped P-region with a quadratic distribution of impurity concentration to create a gradient distribution of the internal electric field, which effectively improves the reverse breakdown voltage capability of the chip and achieves better softness. Combined with a punch-through structure, the electric field is distributed in a trapezoidal shape, which can reduce the thickness of the device without changing the reverse breakdown voltage. This helps to reduce the forward voltage drop, improve the fall time of the diode's reverse recovery, and thus improve the softness factor.

[0073] 2. The multi-field ring and cutoff ring of this multi-field fast recovery diode are combined with the field plate to widen the depletion region of the main junction outward, thereby reducing the electric field strength within it, increasing the breakdown voltage, improving the termination structure, optimizing the electric field distribution, and improving the overall reverse withstand voltage capability of the chip; the metal field plate can reduce the peak value of the junction electric field and reduce the impact of impurity charge on the stability of the chip.

[0074] 3. This preparation method, through repeated adjustments to control parameters such as the ion implantation angle, energy, annealing time, and temperature, achieves an impurity concentration in the lightly doped P-region that is approximately f(x) = The quadratic function distribution of -0.6x+c (where c is a constant and related to parameters such as ion implantation energy) allows the internal electric field to form a certain gradient distribution, effectively improving the reverse breakdown voltage capability of the chip and achieving better softness.

[0075] 4. This preparation method introduces the impurity element gold (Au) by sputtering a back metal layer and diffusing it into the N+ substrate, buffer layer, drift region, etc. under high temperature conditions to obtain a lower forward voltage drop and better softness.

[0076] 5. This fabrication method uses laser annealing to avoid the potential impact of high-temperature annealing on the front structure of the device, allowing for precise control of specific areas and enabling rapid heating and cooling.

[0077] Although the embodiments of the present invention have been shown and described above, it will be understood that the above embodiments are illustrative and are not to be construed as limitations on the present invention. A person skilled in the art may change, modify, replace and modify the above embodiments within the scope of the present invention.

Claims

1. A multi-field ring fast recovery diode based on a punch-through structure, characterized in that: include: N+ substrate; An N buffer layer, disposed above the N+ substrate; An N-drift region, disposed above the N buffer layer; A lightly doped P-region, disposed on the upper portion of the N-drift region; A cell region and a ring region are arranged in the lightly doped P- region, the ring region includes a plurality of field rings and a cut-off ring, the plurality of field rings and the cut-off ring are arranged concentrically with the cell region and are distributed at intervals, the cut-off ring is located at the outer periphery of the outermost field ring, the cell region and the plurality of field rings are heavily doped P+ regions, and the cut-off ring is a heavily doped N+ region; An oxide layer, disposed above the N-drift region, the oxide layer being provided with windows corresponding to the cell region and the ring region; A metal field plate is disposed above the oxide layer, the cell region and the ring region; A back metal layer, disposed below the N+ substrate; The impurity concentration of the lightly doped P-region is set so that the boundary lines of the lightly doped P-region are respectively distributed in a quadratic function form with the first field ring and the center of the cut-off ring outside the cell region as the starting point, and the quadratic function is f(x)=0.2x 2 -0.6x+c, where c is a constant.

2. The multi-field ring fast recovery diode according to claim 1, characterized in that: The distances between the field rings are the same.

3. The multi-field ring fast recovery diode according to claim 1, characterized in that: The cut-off ring is located at the outermost area of ​​the lightly doped P-region, and the impurity concentration of the cut-off ring is set to make the cut-off ring present a semi-elliptical shape.

4. The multi-field ring fast recovery diode according to claim 1, characterized in that: The metal field plate is made of Al.

5. The multi-field ring fast recovery diode according to claim 1, characterized in that: The back metal layer is Ti / Ni / Ag metal layer from top to bottom.

6. The multi-field ring fast recovery diode according to claim 1, characterized in that: The back metal layer, N+ substrate, N buffer layer and N-drift region are doped with Au impurities.

7. The multi-field ring fast recovery diode according to claim 1, characterized in that: The resistivity of the N+ substrate is 0.002-0.004 Ω.cm, the thickness is 10-20 μm, and the doping concentration of the N buffer layer is 10 20 cm -3 , with a thickness of 8 to 15 μm, and the doping concentration of the N-drift region is 10 16 cm -3 ~10 17 cm -3 , thickness 220~260μm.

8. A method for preparing a multi-field ring fast recovery diode as claimed in any one of claims 1 to 7, comprising the following steps: S1: performing a first epitaxial layer growth on the N+ substrate to form the N buffer layer; S2: performing a second epitaxial layer growth to form the N-drift region; S3: introducing high-purity hydrogen and oxygen to grow the oxide layer on the epitaxial layer by hydrogen-oxygen synthesis oxidation; S4: performing photolithography and etching on the oxide layer to open the windows of the cell region and the ring region, adjusting the ion implantation angle along the windows, implanting B ions, and annealing to form the lightly doped P-region; S5: adjusting the ion implantation angle, implanting B ions again into the windows corresponding to the cell region and the field ring, and implanting Ph ions into the windows corresponding to the cutoff ring, and performing rapid thermal annealing to form the heavily doped P+ region and the heavily doped N+ region; S6: vaporizing the metal source Al through an evaporation table and attaching it to the surfaces of the cell region and the ring region to form the metal field plate; S7: on the back side of the N+ substrate, a back metal layer having an ohmic contact characteristic and having a Ti / Ni / Ag metal layer distribution from top to bottom is manufactured by evaporation and multi-layer etching process; S8: After thinning the wafer, the impurity Au is introduced by sputtering the back metal layer, and diffused to the N+ substrate, N buffer layer, and N-drift region by laser annealing.

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