Ising-aware computer Boolean algebra system construction method and Ising machine programming interface

Abstract

This paper proposes a method for constructing an Ising-aware computer Boolean algebra system and an Ising machine programming interface. The system relates to an Ising-aware computer Boolean algebra quantum circuit system for solving constrained optimization problems. It also relates to programming interfaces for quantum Ising machines and other general Ising machines that implement quantum adiabatic computing. This approach falls within the fields of constrained optimization and quantum adiabatic computing. This method uses a Boolean constraint primitive expression system described by penalty terms as the basic expression object, and uses an Ising-aware computer algebra system for automatic, efficient, and reliable rearrangement and simplification. By combining the characteristics of the Ising machine, the system reduces the size of optimization problem instances and improves the efficiency of solving these optimization problem instances on the Ising machine.

Description

Technical Field

[0001] The present invention relates to the technical fields of constrained optimization and quantum adiabatic computing, and in particular to a method for constructing an Ising-aware computer Boolean algebra system and an Ising machine programming interface. Background Art

[0002] Constructing penalty terms for integer-variable arithmetic constraints is a necessary step for solving constrained optimization problems using Ising machines. Since Ising machines can only directly solve unconstrained problems, practical NP-Hard problems often involve multiple arithmetic constraints, typically linear constraints. This requires constructing penalty terms for integer-variable arithmetic constraints to construct an unconstrained quadratic form (hereinafter referred to as the QUBO form) from the problem to be solved, allowing the Ising machine to solve the problem. Given the extremely limited number of bits, restricted interaction precision, and topology of Ising machines, particularly quantum annealers, the method for constructing penalty terms for integer-variable arithmetic constraints significantly impacts the scale of the problem that can be solved on a single machine and the quality of the solution.

[0003] However, the existing algorithms for constructing penalty terms for arithmetic constraints either have a number of bits and a number of interactions that are linear and square in the dynamic range width, respectively, or the dynamic range of interaction strength cannot take into account both the practicality of the problem and the accuracy of the Ising machine. The complexity of constructing the QUBO form from the problem to be solved grows extremely rapidly, limiting the scale of solvable problems on the Ising machine, represented by the quantum annealing machine.

[0004] In order to solve this problem, relevant experts have explored different aspects. [1] A series of works gave the QUBO form of simple Boolean logic gates, but it was limited to Boolean logic problems and did not give the construction of arithmetic logic. [2] A series of constructions gave efficient encoding of integer variables when the interaction dynamic range and precision were limited, but destroyed the bijective relationship between the encoding and the variable values, and the construction of arithmetic constraints under the new encoding was still significantly limited by the interaction dynamic range and precision. [3] Several QUBO forms of NP-Hard problems were given, but the problems discussed did not involve arithmetic constraints, and the naive reduction of practical NP-Hard problems to related problems was still subject to the above basic limitations. [4] By avoiding squares in the construction, the influence of the interaction dynamic range on the arithmetic coding accuracy was reduced, but the influence was not completely eliminated. At the same time, the negative impact of the introduction of continuous variables on the interaction precision limitation was ignored, and the requirement for iterative auxiliary solution on traditional computers was introduced, which reduced the efficiency of problem solving. [5] summarized various construction methods including [1-4], but they were still subject to the above basic limitations.

[0005] In constrained optimizer software, advanced annealing computers, led by quantum Ising machines, have a significant effect on improving the tool's running speed and result quality on small-scale problem instances. However, the above-mentioned issues hinder the application of constrained optimizer software on quantum Ising machines to problem instances.

[0006] [1] J.Su, T.Tu and L.He, "A quantum annealing approach for BooleanSatisfiability problem," 2016 53nd ACM / EDAC / IEEE Design Automation Conference(DAC), Austin, TX, USA, 2016, pp.1-6, doi:10.1145 / 2897937.2897973.

[0007] [2]Karimi, S., Ronagh, P. Practical integer-to-binary mapping for quantum annealers. Quantum Inf Process 18,94 (2019).

[0008] https: / / doi.org / 10.1007 / s11128-019-2213-x

[0009] [3] Lodewijks, Bas. "Mapping NP-Hard and NP-Complete OptimizationProblems to Quadratic Unconstrained Binary Optimization Problems." arXiv.Org, 3Aug.2020, arxiv.org / abs / 1911.08043.

[0010] [4] Djidjev, Hristo N. "Quantum Annealing with Inequality Constraints: The Set Cover Problem." arXiv.Org, 22Feb.2023, arxiv.org / abs / 2302.11185.

[0011] [5]Reformulating a Problem." D-Wave,docs.dwavesys.com / docs / latest / handbook_reformulating.html.Accessed 30Nov.2023. Summary of the Invention

[0012] The purpose of the present invention is to provide a method for constructing an Ising-aware computer Boolean algebra system for solving constrained optimization problems and to provide a programming interface between a quantum Ising machine that implements quantum adiabatic computing and other general Ising machines.

[0013] The technical solution of the present invention is to provide a method for constructing an Ising-aware computer Boolean algebra system, comprising the following steps:

[0014] Step S1: construct a domain-specific constraint optimization primitive expression system in a high-level programming language, providing parameter-containing abstract constraint optimization primitives for four fields: electronic design automation, finance, energy, and communications;

[0015] Step S2: construct a domain-independent constraint optimization primitive expression system in a high-level programming language, providing parameter-containing abstract constraint optimization primitives such as variable management, equality constraints, mutual difference constraints, inequality constraints, one-hot constraints, selection constraints, extreme value constraints, sum constraints, and linear constraints;

[0016] Step S3: In a high-level programming language, targeting the four fields of electronic design automation, finance, energy, and communications, and combining domain-specific knowledge, construct a domain knowledge decomposition from the constraint optimization complex expressed by the domain-specific constraint optimization primitive expression system to the constraint optimization complex expressed by the domain-independent constraint optimization primitive expression system, and expand each domain-specific parameter-containing abstract constraint optimization primitive in S1 into a sequence of each domain-independent parameter-containing abstract constraint optimization primitive in S2;

[0017] Step S4, constructing a Boolean constraint primitive expression system for the penalty term quantum circuit description in a high-level programming language, providing NOT gate constraints, AND gate constraints, OR gate constraints, SNR derivative gate constraints, XOR gate constraints, and XNOR gate constraints;

[0018] Step S5: In a high-level programming language, construct a Boolean expansion of the constraint optimization complex expressed by the domain-independent constraint optimization primitive expression system to the constraint optimization complex expressed by the Boolean constraint primitive expression system described by the penalty term quantum circuit, and unstructuredly expand each domain-independent constraint optimization primitive in S2 into an unstructured sequence of Boolean constraint primitives described by each penalty term quantum circuit in S4;

[0019] Step S6: In a high-level programming language, construct a quantum circuit synthesis based on Ising perception and computer Boolean algebra, providing constant propagation, constant folding, NOT gate fusion, chain reduction, tree reduction, computational intensity reduction, sparse format export, and dense format export functions.

[0020] Preferably, the single-phase inversion derivative gate constraint is obtained by simplifying the penalty term of the corresponding non-inversion gate by substituting the inversion variable x->(1-x).

[0021] Preferably, in step S5, according to the field selection, one or more of the following is used to expand the equality constraint into an equivalent quantum circuit of summing the penalty terms of the XNOR gates, the difference constraint is expanded into an equivalent quantum circuit of all bitwise XOR results, the inequality constraint is expanded bit by bit into the high bit satisfying the inequality or the high bit satisfying the equality and the low bit satisfying the inequality, the one-hot constraint is expressed as an equivalent quantum circuit of all adjacent bit and results, the selection constraint is expanded into a one-hot constraint and a bitwise selection, the extreme value constraint is first expanded into the corresponding inequality constraint and the selection constraint and then further expanded, and the sum constraint is expanded according to the bit length of the addend.

[0022] Preferably, the bit-by-bit selection is expanded into an equivalent quantum circuit of the whole OR of the AND of the variable to be selected and the one-hot variable.

[0023] Preferably, in step 6, the constant propagation is performed at the initialization, after NOT gate fusion, chain reduction, tree reduction, computational strength reduction, sparse format export, and dense format export, eliminating bits with known values ​​as constants and replacing them with constants until there are no bits with known values ​​as constants. The constant folding is performed after constant propagation, simplifying constraints containing constants until the remaining constraints do not contain constants.

[0024] Preferably, in step 6, the NOT gate fusion is performed when a NOT gate or an XNOR gate exists in the quantum circuit, and the Ising characteristic is used to further eliminate bit usage and interaction and reduce the dynamic range of interaction.

[0025] Preferably, in step 6, when a NOT gate exists, the NOT gate is eliminated and the original bit is used, and the gate using the NOT gate result is converted according to (AND<->AND single NOT<->ORNOT), (OR<->OR single NOT<->ANDNOT), and (XOR<->XOR); when an XNOR gate exists, it is replaced with an XOR gate, and the gate using the XNOR gate result is converted according to (AND<->AND single NOT<->ORNOT), (OR<->OR single NOT<->ANDNOT), and (XOR<->XOR).

[0026] Preferably, in step 6, the chain reduction converts the unstructured gate sequence into a chain topology quantum circuit that is recursively performed from high to low bits; the tree reduction converts the unstructured gate sequence into a tree topology quantum circuit that is paired as much as possible and recursively binary merged; the computational intensity reduction decomposes the multiplication with an integer constant into a shift-addition quantum circuit; the sparse format derivation derives the chain topology quantum circuit, tree topology quantum circuit, and shift-addition quantum circuit obtained by the chain reduction, tree reduction, and computational intensity reduction into a coordinate index sparse matrix format; the dense format derivation derives the chain topology quantum circuit, tree topology quantum circuit, and shift-addition quantum circuit obtained by the chain reduction, tree reduction, and computational intensity reduction into an upper triangular matrix format; wherein the sparse format and the dense format derivation sort the bit variables, record the self-interactions in the diagonal terms, and merge the interactions of the bit variable pairs into the corresponding subscript positions.

[0027] Another technical solution of the present invention is to provide an Ising machine programming interface, which adopts the above-mentioned Ising-aware computer Boolean algebra system construction method, including:

[0028] Provide an annealer-neutral input interface in high-level programming languages ​​and provide specific implementations for mainstream vendors' real machines for submitting quantum circuits to them;

[0029] An annealer-neutral output interface is provided in high-level programming languages, and specific implementations of real machines from mainstream suppliers are provided to obtain quantum circuit operation process statistics and operation results from the real machines;

[0030] A numerical output and visualization system is set up in the high-level programming language, which provides the functions of outputting and storing numerical results, and visualizing the optimization process and results of quantum circuit operation.

[0031] Preferably, the numerical result output and storage function converts the read-back results in the neutral output interface of the annealing machine into a numerical matrix and stores it in the memory and / or hard disk; the visualization function includes a bar chart of the number of numerical hits of different optimization targets and the evolution trajectory of the system Hamiltonian over time.

[0032] This paper proposes a method for constructing an Ising-aware computer Boolean algebra system and an Ising machine programming interface. The system relates to an Ising-aware computer Boolean algebra quantum circuit system for solving constrained optimization problems. It also relates to programming interfaces for quantum Ising machines and other general Ising machines that implement quantum adiabatic computing. This approach falls within the fields of constrained optimization and quantum adiabatic computing. This method uses a Boolean constraint primitive expression system described by penalty terms as the basic expression object, and uses an Ising-aware computer algebra system for automatic, efficient, and reliable rearrangement and simplification. By combining the characteristics of the Ising machine, the system reduces the size of optimization problem instances and improves the efficiency of solving these optimization problem instances on the Ising machine. BRIEF DESCRIPTION OF THE DRAWINGS

[0033] Figure 1 A structural diagram of an Ising-aware computer Boolean algebra system provided by an embodiment of the present invention;

[0034] Figure 2 An equality constraint formula diagram provided by an embodiment of the present invention;

[0035] Figure 3 A diagram of a mutually different constraint formula provided by an embodiment of the present invention;

[0036] Figure 4 Inequality constraint formula diagram provided by an embodiment of the present invention;

[0037] Figure 5 A diagram of a one-hot constraint formula provided by an embodiment of the present invention;

[0038] Figure 6 A diagram of a selection constraint formula provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0039] Below in conjunction with specific embodiment, further set forth the present invention.Should be understood that these embodiments are only used to illustrate the present invention and are not used in limiting the scope of the present invention.In addition, should be understood that after reading the content taught by the present invention, those skilled in the art can make various changes or modifications to the present invention, and these equivalent forms fall equally within the scope limited by the appended claims of the application.

[0040] In this embodiment, if Figure 1 As shown, an Ising-aware computer Boolean algebra system for solving constrained optimization problems is provided. The Ising-aware computer Boolean algebra system construction method includes the following steps:

[0041] Step S1: Build a domain-specific constraint optimization primitive expression system in a high-level programming language to provide parameter-containing abstract constraint optimization primitives for four fields: electronic design automation, finance, energy, and communications.

[0042] Step S2: Build a domain-independent constraint optimization primitive expression system in a high-level programming language, providing abstract constraint optimization primitives with parameters such as variable management, equality constraints, mutual difference constraints, inequality constraints (greater than, greater than or equal to, less than, less than or equal to), one-hot constraints, selection constraints, extreme value constraints (maximum value, minimum value), sum constraints, and linear constraints.

[0043] Step S3: In a high-level programming language, targeting the four fields of electronic design automation, finance, energy, and communications, combined with domain-specific knowledge, construct a domain knowledge decomposition from the constraint optimization complex expressed by the domain-specific constraint optimization primitive expression system to the constraint optimization complex expressed by the domain-independent constraint optimization primitive expression system, and expand the domain-specific parameter-containing abstract constraint optimization primitives in S1 into a sequence of domain-independent parameter-containing abstract constraint optimization primitives in S2.

[0044] Step S4: Construct a Boolean constraint primitive expression system for the penalty term quantum circuit description in a high-level programming language, providing NOT gate constraints, AND gate constraints, OR gate constraints, single-input inverted AND gate constraints, single-input inverted OR gate constraints, XOR gate constraints, and XNOR gate constraints.

[0045] The SIN derivative gate constraint is obtained by simplifying the penalty term of the corresponding non-inverting gate by substituting the inverting variable x->(1-x).

[0046] Step S5: In a high-level programming language, construct a Boolean expansion of the constraint optimization complex expressed by the domain-independent constraint optimization primitive expression system to the constraint optimization complex expressed by the Boolean constraint primitive expression system described by the penalty term quantum circuit, and unstructuredly expand the domain-independent constraint optimization primitives in S2 into an unstructured sequence of Boolean constraint primitives described by the penalty term quantum circuit in S4.

[0047] like Figure 2-Figure 6 As shown, the equality constraint is expanded into an equivalent quantum circuit of the sum of the penalty terms of the XOR gates; the difference constraint is expanded into an equivalent quantum circuit of the whole AND of the bitwise XOR results; the inequality constraint is expanded bit by bit into the high bit satisfying the inequality, or the high bit satisfying the equality and the low bit satisfying the inequality; the one-hot constraint is expressed as an equivalent quantum circuit of the whole OR of the AND results of the adjacent bits; the selection constraint is expanded into the one-hot constraint and bitwise selection, where the bitwise selection is expanded into the equivalent quantum circuit of the whole OR of the AND of the variable to be selected and the one-hot variable; the extreme value constraint is first expanded into the corresponding inequality constraint and selection constraint, and then further expanded according to the above steps; the sum constraint provides two implementations, which are selected according to the bit length of the addend.

[0048] In the construction based on the cascade of Boolean logic gate carry chains, the lowest bit and the highest bit, the sum, and the carry are expanded. The lowest bit sum is expanded into the equivalent quantum circuit of an XOR gate, and the lowest bit carry is expanded into the equivalent quantum circuit of an AND gate. The high-bit sum is expanded into a three-input XOR gate and further expanded. The high-bit carry is expanded into the equivalent quantum circuit of the total OR of the two input bits and the carry of the previous bit. In the hybrid construction based on carry chains and polynomial difference squares, the carry chain quantum circuit is constructed according to the following half adder and full adder penalty terms. Half adder: PHA(A,B,C,S) = [(A+B)-(2C+S)]² = A+2AB-4AC-2AS+B-4BC-2BS+4C+4CS+S; Full adder: PFA(A,B,C,C',S) = [(A+B+C)^{2}-(2C'+S)]² = A+2AB+2AC-4AC'-2AS+B+2BC-4BC'-2BS+C-4CC'-2CS+4C'+4C'S+S. This construction represents a black-box quantum circuit for subsequent steps and does not participate in further optimization.

[0049] Step S6: In a high-level programming language, construct a quantum circuit synthesis based on Ising perception and computer Boolean algebra, providing functions such as constant propagation, constant folding, NOT gate fusion, chain reduction, tree reduction, computational intensity reduction, sparse format export, and dense format export.

[0050] Among them, constant propagation is performed at the initialization, after NOT gate fusion, chain reduction, tree reduction, computational strength reduction, sparse format export, and dense format export. Bits with known constant values ​​are eliminated and replaced with constants until there are no bits with known constant values.

[0051] Constant folding is performed after constant propagation, simplifying constraints that contain constants until the remaining constraints do not contain constants.

[0052] Among them, X and single not 0 = x; X and single not 1 = 0; X or single not 0 = 1; X or single not 1 = x; x and 0 = 0; x and 1 = x; x or 0 = x; x or 1 = x; x and not 0 = 1; x and not 1 = not x; x or not 0 = not x; x or not 1 = 0; x exclusive or 0 = x; x exclusive or 1 = not x.

[0053] NOT gate fusion is performed when NOT gates or XNOR gates exist in quantum circuits, and the Ising property is used to further eliminate bit usage and interactions and reduce the dynamic range of interactions.

[0054] If a NOT gate exists, eliminate it and use the original bit. Gates using the NOT gate result are switched according to the following order: (AND <-> AND NOT <-> NOR), (OR <-> OR NOT <-> NAND), and (XOR <-> XOR). If an XNOR gate exists, replace it with an XOR gate. Gates using the XNOR gate result are switched according to the following order: (AND <-> AND NOT <-> NOR), (OR <-> OR NOT <-> NAND), and (XOR <-> XOR).

[0055] Chain reduction transforms an unstructured gate sequence into a chain-topology quantum circuit that recursively steps from high to low bits. Tree reduction transforms an unstructured gate sequence into a tree-topology quantum circuit that pairs as much as possible and then recursively binary-merges. Computational intensity reduction decomposes multiplication with integer constants into a shift-addition quantum circuit. Sparse format export exports the quantum circuit obtained by simplifying the above steps into a coordinate-indexed sparse matrix format. The bit variables are sorted, self-interactions are recorded in diagonal terms, and interactions between pairs of bit variables are merged and recorded in corresponding subscript positions. Dense format export exports the quantum circuit obtained by simplifying the above steps into an upper triangular matrix format. The bit variables are sorted, self-interactions are recorded in diagonal terms, and interactions between pairs of bit variables are merged and recorded in corresponding subscript positions.

[0056] In this embodiment, a programming interface between a quantum Ising machine that implements quantum adiabatic computing and other general Ising machines is provided. The Ising machine programming interface includes:

[0057] Provide an annealer-neutral input interface in high-level programming languages ​​and provide specific implementations for mainstream vendors' real machines for submitting quantum circuits to them;

[0058] An annealer-neutral output interface is provided in high-level programming languages, and specific implementations of real machines from mainstream suppliers are provided to obtain quantum circuit operation process statistics and operation results from the real machines;

[0059] A numerical output and visualization system is set up in the high-level programming language, which provides the functions of outputting and storing numerical results, and visualizing the optimization process and results of quantum circuit operation.

[0060] The numerical result output and storage function converts the result read back from the output interface of S8 into a numerical matrix and stores it in the memory and / or hard disk;

[0061] Visualization function of the quantum circuit operation optimization process and results, including a bar chart of the number of hits for different optimization target values ​​and the evolution trajectory of the system Hamiltonian over time.

[0062] The method provided by the present invention is applied to the efficient solution of constrained optimization problems represented by large-scale NP-Hard problems in various fields including electronic design automation, energy, finance, and communications on an Ising machine represented by a quantum annealer. The steps for use are as follows:

[0063] The first step is to use Python language to import the Ising-aware computer Boolean algebra quantum circuit synthesis system for solving constrained optimization problems provided by an embodiment of the present invention.

[0064] The second step is to use the domain-specific constraint optimization primitive expression system provided by the embodiment of the present invention to construct the constraint optimization problem to be solved.

[0065] The third step is to use the domain knowledge decomposition, Boolean expansion, and quantum circuit synthesis based on Ising perception and computer Boolean algebra provided by the embodiments of the present invention in sequence to convert the problem instance into a universal format for describing quantum circuits based on QUBO, which can run on advanced annealing computers such as quantum Ising machines.

[0066] In the fourth step, the annealing machine neutral input interface provided by the embodiment of the present invention is used to submit the problem instance quantum circuit to the annealing computer for actual operation to solve the original constrained optimization problem.

[0067] The fifth step is to use the annealing machine neutral output interface provided by the embodiment of the present invention to read back the solution process and / or solution result from the annealing computer.

[0068] The sixth step is to use the numerical output and visualization system provided by the embodiment of the present invention to visualize the solution process and / or solution results.

[0069] The embodiment of the present invention adopts a Boolean constraint primitive expression system described by penalty terms as the basic expression object, and performs automatic, efficient and reliable rearrangement and simplification through an Ising-aware computer algebra system. Combined with the characteristics of the Ising machine, the scale of the optimization problem instance is reduced and the efficiency of solving the optimization problem instance on the Ising machine is improved.

[0070] Compared with the existing mainstream methods based on polynomial expansion, the new method provided by the present invention greatly reduces the expression complexity of the Ising problem obtained by encoding the NP-Hard problem, increases the allowable scale of the problem solved by the existing quantum annealing machine, and improves the solution efficiency of existing problem instances and the quality of annealing solutions.

[0071] Theoretical analysis and actual machine experiments show that the method provided by the present invention improves the optimal bit coding efficiency, improves the interaction locality and greatly compresses the interaction dynamic range, achieving the following results: (1) the integer coding length is logarithmic to the dynamic range width of the integer variable; (2) the extra bits introduced by the constraint are logarithmic to the dynamic range width of the integer variable; (3) the number of interactions introduced by a single constraint on a single bit is a small constant independent of the integer coding length; (4) the total number of interactions introduced by a single constraint is logarithmic to the dynamic range width of the integer variable; (5) the dynamic range of the interaction introduced by the constraint is a small constant independent of the integer coding length; (6) the number of bits required for deploying large-scale constrained optimization problem instances on a real machine is reduced to 1 / 2 to 1 / 3 of that of existing mainstream methods, which is equivalent to expanding the upper limit of the scale of constrained optimization problems that can be deployed on a real machine to 2 to 3 times.

Claims

1. A method for constructing an Ising-aware computer Boolean algebra system, characterized in that: The following steps are involved: Step S1: construct a domain-specific constraint optimization primitive expression system in a high-level programming language, providing parameter-containing abstract constraint optimization primitives for four fields: electronic design automation, finance, energy, and communications; Step S2: construct a domain-independent constraint optimization primitive expression system in a high-level programming language, providing abstract constraint optimization primitives such as variable management, equality constraints, mutual difference constraints, inequality constraints, one-hot constraints, selection constraints, extreme value constraints, sum constraints, and linear constraints with parameters; Step S3: In a high-level programming language, targeting the four fields of electronic design automation, finance, energy, and communications, and combining domain-specific knowledge, construct a domain knowledge decomposition from the constraint optimization complex expressed by the domain-specific constraint optimization primitive expression system to the constraint optimization complex expressed by the domain-independent constraint optimization primitive expression system, and expand each domain-specific parameter-containing abstract constraint optimization primitive in S1 into a sequence of each domain-independent parameter-containing abstract constraint optimization primitive in S2; Step S4, constructing a Boolean constraint primitive expression system for the penalty term quantum circuit description in a high-level programming language, providing NOT gate constraints, AND gate constraints, OR gate constraints, SNR derivative gate constraints, XOR gate constraints, and XNOR gate constraints; Step S5: In a high-level programming language, construct a Boolean expansion of the constraint optimization complex expressed by the domain-independent constraint optimization primitive expression system to the constraint optimization complex expressed by the Boolean constraint primitive expression system described by the penalty term quantum circuit, and unstructuredly expand each domain-independent constraint optimization primitive in S2 into an unstructured sequence of Boolean constraint primitives described by each penalty term quantum circuit in S4; Step S6: In a high-level programming language, construct a quantum circuit synthesis based on Ising perception and computer Boolean algebra, providing constant propagation, constant folding, NOT gate fusion, chain reduction, tree reduction, computational intensity reduction, sparse format export, and dense format export functions.

2. The method for constructing an Ising-aware computer Boolean algebra system according to claim 1, wherein: The single-phase inversion derivative gate constraint is obtained by simplifying the penalty term of the corresponding non-inversion gate by substituting the inversion variable x->(1-x).

3. The method for constructing an Ising-aware computer Boolean algebra system according to claim 1, wherein: In step S5, according to the field selection, one or more of the following is expanded: equality constraints are expanded into an equivalent quantum circuit for summing penalty terms of XNOR gates; difference constraints are expanded into an equivalent quantum circuit for all bitwise XOR results; inequality constraints are expanded bit by bit into high-bit satisfying inequality or high-bit satisfying equality and low-bit satisfying inequality; one-hot constraints are expressed as an equivalent quantum circuit for all adjacent bit and results; selection constraints are expanded into one-hot constraints and bitwise selection; extreme value constraints are first expanded into corresponding inequality constraints and selection constraints and then further expanded; sum constraints are selected and expanded according to the bit length of the addend.

4. The method for constructing an Ising-aware computer Boolean algebra system according to claim 3, wherein: The bit-by-bit selection is expanded into an equivalent quantum circuit of the whole OR of the AND of the variable to be selected and the one-hot variable.

5. The method for constructing an Ising-aware computer Boolean algebra system according to claim 1, wherein: In step S6, the constant propagation is performed at the initialization, after NOT gate fusion, chain reduction, tree reduction, computational strength reduction, sparse format export, and dense format export, eliminating bits with known values ​​that are constants and replacing them with constants until there are no bits with known values ​​that are constants. The constant folding is performed after constant propagation, simplifying constraints containing constants until the remaining constraints do not contain constants.

6. The method for constructing an Ising-aware computer Boolean algebra system according to claim 1, wherein: In step S6, the NOT gate fusion is performed when a NOT gate or an XNOR gate exists in the quantum circuit, and the Ising characteristic is used to further eliminate bit usage and interaction and reduce the dynamic range of interaction.

7. The method for constructing an Ising-aware computer Boolean algebra system according to claim 6, wherein: In step S6, When a NOT gate exists, eliminate the NOT gate and use the original bit. Convert the gates that use the NOT gate result according to (AND<->AND-NON<->OR-NON), (OR<->OR-NON<->AND-NON), and (XOR<->XOR); When an XOR gate exists, replace it with an XOR gate, and convert the gate using the XOR gate result according to (AND<->AND-NON<->OR-NON), (OR<->OR-NON<->AND-NON), and (XOR<->XOR).

8. The method for constructing an Ising-aware computer Boolean algebra system according to claim 1, wherein: In step S6, The chain reduction converts the unstructured gate sequence into a chain topology quantum circuit that is recursive bit by bit from high to low; The tree reduction converts the unstructured gate sequence into a tree topology quantum circuit that matches as much as possible and recursively divides and merges into two parts; The computational intensity reduction decomposes multiplication with an integer constant into a shift-add quantum circuit; The sparse format export exports the chain topology quantum circuit, tree topology quantum circuit and shift-addition quantum circuit obtained by chain reduction, tree reduction and computational intensity reduction into a coordinate index sparse matrix format; The dense format derivation derives the chain topology quantum circuit, tree topology quantum circuit and shift-addition quantum circuit obtained by chain reduction, tree reduction and computational intensity reduction into an upper triangular matrix format; The sparse format and the dense format are derived by sorting the bit variables, recording the self-interactions into diagonal items, and merging the interactions of the bit variable pairs into corresponding subscript positions.

9. A method for constructing an Ising machine programming interface, characterized in that: The method for constructing an Ising-aware computer Boolean algebra system according to any one of claims 1 to 8 comprises: Provide an annealer-neutral input interface in high-level programming languages ​​and provide specific implementations for mainstream vendors' real machines for submitting quantum circuits to them; An annealing machine-neutral output interface is provided in high-level programming languages, and specific implementations of real machines from mainstream suppliers are provided to obtain quantum circuit operation process statistics and operation results from the real machines; A numerical output and visualization system is set up in the high-level programming language, which provides the functions of outputting and storing numerical results, and visualizing the optimization process and results of quantum circuit operation.

10. The Ising machine programming interface construction method according to claim 9, characterized in that: The numerical result output and storage function converts the read-back results in the neutral output interface of the annealing machine into a numerical matrix and stores it in the memory and / or hard disk; the visualization function includes a bar graph of the number of numerical hits of different optimization targets and the evolution trajectory of the system Hamiltonian over time.

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