Display substrate and display device

Abstract

The present disclosure provides a display substrate and a display device, and belongs to the technical field of display, which can solve the problem that the driving voltage of the existing stacked device is larger than that of the traditional single-layer device. The display substrate of the present disclosure comprises a substrate and a plurality of organic electroluminescent diodes arranged on the substrate. The organic electroluminescent diode comprises a first electrode layer and a second electrode layer arranged on the substrate in sequence; at least two light-emitting layers stacked between the first electrode layer and the second electrode layer; and N-type charge generation layer and P-type charge generation layer arranged in a stack between any two adjacent light-emitting layers, wherein the N-type charge generation layer is doped with metal ytterbium. The display substrate further comprises an auxiliary electrode layer, at least one of the N-type charge generation layer and the P-type charge generation layer is in direct contact with the auxiliary electrode layer, and the orthographic projection of the display substrate on the substrate covers the orthographic projection of the auxiliary electrode layer on the substrate.

Description

Technical Field

[0001] This disclosure belongs to the field of display technology, specifically relating to a display substrate and a display device. Background Technology

[0002] With the continuous development of the OLED industry, new technologies to improve OLED performance are emerging one after another, among which the dual-layer stacked device structure is one. A stacked device is a high-efficiency display substrate structure formed by connecting layers in series. Compared to single-layer devices, dual-layer display substrates have a series of advantages such as higher luminous efficiency and longer lifespan. However, because the stacked device connects two light-emitting units in series, its driving voltage is significantly higher than that of traditional single-layer devices, which will hinder further reductions in power consumption. Summary of the Invention

[0003] This disclosure aims to at least solve one of the technical problems existing in the prior art, and to provide a display substrate and a display device.

[0004] In a first aspect, this disclosure provides a display substrate, comprising a substrate and a plurality of organic light-emitting diodes disposed on the substrate; wherein the organic light-emitting diodes include:

[0005] A first electrode layer and a second electrode layer are sequentially disposed on the substrate.

[0006] At least two light-emitting layers are stacked between the first electrode layer and the second electrode layer;

[0007] An N-type charge generation layer and a P-type charge generation layer are provided, and an N-type charge generation layer and a P-type charge generation layer are stacked between any two adjacent light-emitting layers. The N-type charge generation layer is doped with ytterbium.

[0008] The display substrate further includes an auxiliary electrode layer, at least one of the N-type charge generation layer and the P-type charge generation layer being in direct contact with the auxiliary electrode layer, and the orthogonal projection of the auxiliary electrode layer on the substrate covers the orthogonal projection of the auxiliary electrode layer on the substrate.

[0009] Preferably, the N-type charge generation layers disposed in the same layer of each organic light-emitting diode are integral structures, and the P-type charge generation layers disposed in the same layer are integral structures; the auxiliary electrode layer is located between the adjacent N-type charge generation layers and the P-type charge generation layers.

[0010] Preferably, the display substrate further includes a pixel defining layer; the orthographic projection of the auxiliary electrode layer on the substrate covers the orthographic projection of the pixel defining layer on the substrate.

[0011] Preferably, the display substrate further includes a pixel defining layer; the pixel defining layer includes receiving portions disposed one-to-one with the organic light-emitting diodes; the orthographic projection of the auxiliary electrode layer on the substrate does not overlap with the orthographic projection of the receiving portions on the substrate.

[0012] Preferably, the auxiliary electrode layer includes a plurality of first sub-electrodes, and the orthographic projections of any adjacent row of organic light-emitting diodes on the substrate have a first gap, with the orthographic projection of one first sub-electrode on the substrate located within one of the first gaps; and / or,

[0013] The auxiliary electrode layer includes a plurality of second sub-electrodes, and the orthogonal projections of any adjacent column of organic light-emitting diodes on the substrate have a second gap, and the orthogonal projection of one second sub-electrode on the substrate is located within one of the second gaps.

[0014] Preferably, the auxiliary electrode layer includes a plurality of first sub-electrodes; the orthogonal projections of the organic light-emitting diodes disposed arbitrarily adjacent in the row direction on the substrate have a third gap; and the orthogonal projection of one of the first sub-electrodes on the substrate is located within one of the third gaps.

[0015] Preferably, the auxiliary electrode layer includes a plurality of first sub-electrodes; the orthogonal projections of the organic light-emitting diodes arranged arbitrarily adjacently in the column direction on the substrate have a fourth gap; the orthogonal projection of one of the first sub-electrodes on the substrate is located within one of the fourth gaps.

[0016] Preferably, the auxiliary electrode layer includes a plurality of first sub-electrodes, and the orthogonal projection of any adjacent row of organic light-emitting diodes on the substrate has a fifth gap, and the orthogonal projection of one first sub-electrode on the substrate is located within one of the fifth gaps;

[0017] Each of the first sub-electrodes includes multiple electrode blocks, which are alternately arranged with the organic light-emitting diode.

[0018] Preferably, the auxiliary electrode layer is located between the N-type charge generation layer and the pixel defining layer.

[0019] Preferably, the display substrate further includes a pixel defining layer; the auxiliary electrode layer is disposed in the same layer as the first electrode layer, and the N-type charge generating layer contacts the auxiliary electrode layer through a first through-groove penetrating the pixel defining layer.

[0020] Preferably, a first interlayer insulating layer is provided on the side of the first electrode layer near the substrate. The first interlayer insulating layer includes a plurality of first openings. Each organic light-emitting diode and its adjacent organic light-emitting diode have at least one orthogonal projection of the first opening onto the substrate. The display substrate further includes a pixel defining layer. The pixel defining layer includes receiving portions corresponding to each organic light-emitting diode and a first through-slot. The first through-slot is provided in a one-to-one correspondence with the first opening, and the corresponding first opening and the first through-slot communicate to form an isolation portion.

[0021] The auxiliary electrode layer is located between the pixel defining layer and the N-type charge generation layer. The N-type charge generation layer, the P-type charge generation layer, the second electrode layer, and the auxiliary electrode layer are disconnected at the location of the isolation portion. The auxiliary electrode layer and the orthographic projection of the accommodating portion on the substrate do not overlap.

[0022] Preferably, a first interlayer insulating layer is provided on the side of the first electrode layer near the substrate. The first interlayer insulating layer includes a plurality of first openings. Each organic light-emitting diode and the orthographic projection of an adjacent organic light-emitting diode on the substrate have at least one orthographic projection of the first opening on the substrate. The display substrate further includes a pixel defining layer. The pixel defining layer includes receiving portions corresponding to each organic light-emitting diode and a first through-slot. The first through-slot is provided in a one-to-one correspondence with the first opening, and the corresponding first opening and the first through-slot communicate to form an isolation portion.

[0023] The auxiliary electrode layer is located between the N-type charge generation layer and the P-type charge generation layer. The N-type charge generation layer, the P-type charge generation layer, the second electrode layer, and the auxiliary electrode layer are disconnected at the location of the isolation portion. The auxiliary electrode layer and the orthographic projection of the accommodating portion on the substrate do not overlap.

[0024] Preferably, the display substrate further includes a pixel defining layer, the pixel defining layer including a receiving portion corresponding to each organic light-emitting diode and a first through-hole; the auxiliary electrode layer is located between the N-type charge generating layer and the P-type charge generating layer.

[0025] Preferably, the thickness of the auxiliary electrode layer is no more than 10 nanometers.

[0026] Preferably, the energy level of the auxiliary electrode layer is greater than the lowest unoccupied molecular orbital (LUMO) energy level of the N-type charge generation layer, and the energy level of the auxiliary electrode layer is less than the highest occupied molecular orbital (HOMO) energy level of the P-type charge generation layer.

[0027] Preferably, the work function of the auxiliary electrode layer is between -4eV and -6eV.

[0028] Preferably, the material of the auxiliary electrode layer includes any one of indium tin oxide, zinc oxide, aluminum-doped zinc oxide, gold, polyaniline, polypyrrole, and polythiophene derivatives.

[0029] Preferably, the auxiliary electrode layer includes a conductive layer and a second interlayer insulating layer sequentially disposed along a direction away from the substrate.

[0030] Preferably, the second interlayer insulating layer comprises any one of silicon dioxide, carbon fiber, and lithium fluoride.

[0031] Secondly, this disclosure also provides a display device including the aforementioned display substrate. Attached Figure Description

[0032] Figure 1 This is a schematic diagram of the structure of an existing multilayer display substrate;

[0033] Figure 2 A schematic diagram of the structure of an organic light-emitting diode provided for an embodiment of this disclosure;

[0034] Figure 3 A schematic diagram of the structure of a display substrate provided for an embodiment of this disclosure;

[0035] Figure 4 A schematic diagram of the structure of another display substrate provided for an embodiment of this disclosure;

[0036] Figure 4a A schematic diagram of the structure of a fine metal mask provided for embodiments of this disclosure;

[0037] Figure 4b A schematic diagram of the structure of yet another fine metal mask provided for embodiments of this disclosure;

[0038] Figure 4c A schematic diagram of the structure of another fine metal mask provided for embodiments of this disclosure;

[0039] Figure 4d A schematic diagram of the structure of another fine metal mask provided for embodiments of this disclosure;

[0040] Figure 4e A schematic diagram of the structure of another fine metal mask provided for embodiments of this disclosure;

[0041] Figure 4f A schematic diagram of the structure of another fine metal mask provided for embodiments of this disclosure;

[0042] Figure 5 A schematic diagram of another display substrate provided for an embodiment of this disclosure;

[0043] Figure 6 A schematic diagram of another display substrate provided for an embodiment of this disclosure;

[0044] Figure 7 A schematic diagram of another display substrate provided for an embodiment of this disclosure;

[0045] Figure 8 A schematic diagram of another display substrate provided for an embodiment of this disclosure;

[0046] Figure 9 This is a schematic diagram of another display substrate provided as an embodiment of the present disclosure. Detailed Implementation

[0047] To make the objectives, technical solutions, and advantages of the embodiments of this disclosure clearer, the technical solutions of the embodiments of this disclosure will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this disclosure, and not all of them. The components of the embodiments of this disclosure described and shown in the accompanying drawings can generally be arranged and designed in various different configurations. Therefore, the following detailed description of the embodiments of this disclosure provided in the accompanying drawings is not intended to limit the scope of the claimed disclosure, but merely represents selected embodiments of this disclosure. All other embodiments obtained by those skilled in the art based on the embodiments of this disclosure without inventive effort are within the scope of protection of this disclosure.

[0048] Unless otherwise defined, the technical or scientific terms used in this disclosure shall have the ordinary meaning understood by one of ordinary skill in the art to which this disclosure pertains. The terms “first,” “second,” and similar terms used in this disclosure do not indicate any order, quantity, or importance, but are merely used to distinguish different components. Similarly, the terms “an,” “a,” or “the,” and similar terms do not indicate a quantity limitation, but rather indicate the presence of at least one. The terms “including,” “comprising,” or “containing,” and similar terms mean that the element or object preceding the word encompasses the elements or objects listed following the word and their equivalents, without excluding other elements or objects. The terms “connected,” “linked,” or similar terms are not limited to physical or mechanical connections, but can include electrical connections, whether direct or indirect. The terms “upper,” “lower,” “left,” and “right,” etc., are used only to indicate relative positional relationships, and these relative positional relationships may change accordingly when the absolute position of the described objects changes.

[0049] In this disclosure, "multiple or several" refers to two or more. "And / or" describes the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A alone, A and B simultaneously, or B alone. The character " / " generally indicates that the preceding and following related objects have an "or" relationship.

[0050] In related technologies, such as Figure 1 As shown, in the multilayer display substrate technology, the N-type charge generation layer and the P-type charge generation layer are directly connected to generate electrons and holes. To improve electron injection capability and device performance, ytterbium (Yb), a metal with low work function, is typically doped into the N-type charge generation layer 5. However, ytterbium has high resistivity (29 x 10⁻⁶). -6 Ω.cm), is the cathode material, such as magnesium (4.45 x 10⁻⁶). -6 6.5 times that of Ω.cm, silver (1.586x10 -6 The voltage across the stacked display substrate is more than 18 times that of a single-layer device (Ω·cm), significantly increasing the contact resistance. Furthermore, the energy level barriers between the layers of the stacked device are higher, resulting in a much higher transverse voltage across the stacked display substrate compared to a single-layer device.

[0051] In a first aspect, embodiments of this disclosure provide a display substrate, comprising: a substrate 1 and a plurality of organic light-emitting diodes 2 and a pixel defining layer 8 disposed on the substrate 1. Each organic light-emitting diode 2 includes: a first electrode layer 3, a second electrode layer 10, at least two light-emitting layers 4, an N-type charge-generating layer 5, a P-type charge-generating layer 7, and an auxiliary electrode layer 6. The first electrode layer 3 and the second electrode layer 10 are sequentially disposed on the substrate 1. The light-emitting layers are stacked between the first electrode layer 3 and the second electrode layer 10. An N-type charge-generating layer 5 and a P-type charge-generating layer 7 are stacked between any two adjacent light-emitting layers 4. Both the N-type charge-generating layer 5 and the P-type charge-generating layer 7 are integral structures. At least one of the N-type charge-generating layer 5 and the P-type charge-generating layer 7 is in direct contact with the auxiliary electrode layer 6. The orthogonal projection of the N-type charge-generating layer 5 and / or the P-type charge-generating layer 7 onto the substrate 1 covers the orthogonal projection of the auxiliary electrode layer 6 onto the substrate 1. By directly contacting the N-type charge generation layer 5, the auxiliary electrode layer 6 can significantly reduce the sheet resistance of the ytterbium-doped N-type charge generation layer 5, thereby greatly reducing the voltage drop across the stacked device, lowering its operating voltage, and consequently reducing power consumption and improving image uniformity. Secondly, by directly contacting the auxiliary electrode layer 6 with the P-type charge generation layer 7, the hole injection efficiency and device stability of the P-type charge generation layer 7 can be greatly improved, further enhancing the luminous efficiency of the stacked device.

[0052] It should be noted that the display substrate in this embodiment may further include a hole transport layer, an electron transport layer, a capping layer, and an encapsulation layer. The light-emitting layer includes at least a first light-emitting layer 41 and a second light-emitting layer 42, with the hole transport layer located between the first electrode layer 3 and the first light-emitting layer 41. The electron transport layer is located between the second light-emitting layer 42 and the second electrode layer 10. The capping layer is located on the side of the second electrode layer 10 facing away from the substrate 1. The encapsulation layer is located on the side of the capping layer facing away from the substrate 1.

[0053] To make the embodiments of this disclosure clearer, the following seven examples are used for illustration.

[0054] In the first example, this disclosure provides a display substrate, such as... Figure 2 and Figure 3 As shown, the display substrate includes a substrate 1 and a plurality of organic light-emitting diodes (OLEDs) 2 and a pixel defining layer 8 disposed on the substrate 1. Each OLED 2 includes a first electrode layer 3, a second electrode layer 10, at least two light-emitting layers 4, an N-type charge-generating layer 5, a P-type charge-generating layer 7, and an auxiliary electrode layer 6. The first electrode layer 3 and the second electrode layer 10 are sequentially disposed on the substrate 1. The pixel defining layer 8 includes receiving portions 81 corresponding to each OLED 2 and a plurality of pixel barriers 82. The light-emitting layers are stacked between the first electrode layer 3 and the second electrode layer 10. An N-type charge-generating layer 5 and a P-type charge-generating layer 7 are stacked between any two adjacent light-emitting layers 4. The N-type charge-generating layer 5 and the P-type charge-generating layer 7 are integral structures, and the orthogonal projection of the N-type charge-generating layer 5 and / or the P-type charge-generating layer 7 onto the substrate 1 covers the orthogonal projection of the auxiliary electrode layer 6 onto the substrate 1. The auxiliary electrode layer 6 is located between adjacent N-type charge-generating layers 5 and P-type charge-generating layers 7. By directly contacting the N-type charge generation layer 5, the auxiliary electrode layer 6 can significantly reduce the sheet resistance of the ytterbium-doped N-type charge generation layer 5, thereby greatly reducing the voltage drop across the stacked device, lowering its operating voltage, and consequently reducing power consumption and improving image uniformity. Secondly, by directly contacting the auxiliary electrode layer 6 with the P-type charge generation layer 7, the hole injection efficiency and device stability of the P-type charge generation layer 7 can be greatly improved, further enhancing the luminous efficiency of the stacked device.

[0055] It should be noted that the display substrate in this embodiment may further include a hole transport layer, an electron transport layer, a capping layer, and an encapsulation layer. The light-emitting layer 4 includes at least a first light-emitting layer 41 and a second light-emitting layer 42. The hole transport layer is located between the first electrode layer 3 and the first light-emitting layer 41. The electron transport layer is located between the second light-emitting layer 42 and the second electrode layer 10. The capping layer is located on the side of the second electrode layer 10 facing away from the substrate 1. The encapsulation layer is located on the side of the capping layer facing away from the substrate 1. The capping layer and encapsulation layer protect the display substrate from water and oxygen corrosion, preventing harmful gases such as water and oxygen from penetrating into the display substrate and causing device damage.

[0056] This disclosure also provides a method for fabricating a display substrate, which can be used to fabricate the aforementioned display substrate. The method may include:

[0057] S11. Take a substrate 1.

[0058] S12. A first electrode layer 3 is formed on the substrate 1. The first electrode layer 3 includes a plurality of first electrodes, and there is a gap between adjacent first electrodes.

[0059] S13. A pixel limiting layer 8 is formed at the gap of the first electrode layer 3. The pixel limiting layer 8 includes a plurality of pixel barriers 82 and a receiving portion 81 corresponding to the organic light-emitting diode 2. The pixel limiting layer 8 covers the edge of the first electrode. The orthographic projection of the pixel limiting layer 8 on the substrate 1 overlaps with the orthographic projection of the first electrode layer 3 on the substrate 1.

[0060] S14. A first light-emitting layer 41 is formed on the side of the first electrode layer 3 away from the substrate 1.

[0061] S15. An N-type charge generation layer 5 is formed on the side of the first light-emitting layer 41 that is away from the substrate 1.

[0062] S16. An auxiliary electrode layer 6 is formed on the side of the N-type charge generation layer 5 that is away from the substrate 1.

[0063] Optionally, step S16 may specifically include:

[0064] An auxiliary electrode layer 6 is formed on the side of the N-type charge generation layer 5 away from the substrate 1 by physical vapor deposition (PVD), chemical vapor deposition (CVD), or sputtering.

[0065] S17. A P-type charge generation layer 7 is formed on the side of the auxiliary electrode layer 6 away from the N-type charge generation layer 5.

[0066] S18. A second light-emitting layer 42 is formed on the side of the P-type charge generating layer 7 of the receiving portion 81 that is away from the substrate 1.

[0067] S19. A second electrode layer 10 is formed on the side of the second light-emitting layer 42 away from the substrate 1.

[0068] In some examples, the method of fabricating the display substrate may also include forming a hole transport layer located between the first electrode layer 3 and the first light-emitting layer 41.

[0069] In some examples, the method of fabricating the display substrate may also include forming an electron transport layer located between the second light-emitting layer 42 and the second electrode layer 10.

[0070] In some examples, the method of fabricating the display substrate may also include forming a cover layer located on the side of the second electrode layer 10 opposite to the substrate 1.

[0071] In some examples, the method of fabricating the display substrate may also include forming an encapsulation layer located on the side of the cover layer opposite to the substrate 1.

[0072] In some examples, the thickness of the auxiliary electrode layer 6 is no more than 10 nanometers. Since its thickness is adjustable over a wide range and the material of the auxiliary electrode layer 6 is transparent, the auxiliary electrode layer 6 has little impact on the light emission of the display substrate.

[0073] In some examples, the material of the auxiliary electrode layer 6 includes any one of indium tin oxide, zinc oxide, aluminum-doped zinc oxide, gold, polyaniline, polypyrrole, and polythiophene derivatives.

[0074] In some examples, the work function of the auxiliary electrode layer 6 material is controlled between -4 eV and -6 eV to achieve better hole and electron injection. Taking indium tin oxide (ITO) as an example, the work function of the auxiliary electrode layer 6 material can be adjusted by adjusting the ratio of indium trioxide (ITO) to tin oxide (TITO) in the ITO, or by adjusting the plasma treatment time. Alternatively, a thin second interlayer insulating layer, such as silicon dioxide, carbon fiber, or lithium fluoride, can be deposited on the conductive layer (ITO) with a thickness controlled between 0.2 nm and 2 nm to improve hole injection efficiency and reduce the driving voltage.

[0075] In some examples, the energy level of the auxiliary electrode layer 6 is greater than the lowest unoccupied molecular orbital (LUMO) energy level of the N-type charge generation layer 5, and less than the highest occupied molecular orbital (HOMO) energy level of the P-type charge generation layer 7.

[0076] In a second example, this disclosure provides yet another display substrate, such as... Figure 4As shown, the display substrate includes: a substrate 1 and a plurality of organic light-emitting diodes 2 and a pixel defining layer 8 disposed on the substrate 1. The organic light-emitting diode 2 includes: a first electrode layer 3, a second electrode layer 10, at least two light-emitting layers 4, an N-type charge-generating layer 5, a P-type charge-generating layer 7, and an auxiliary electrode layer 6. The first electrode layer 3 and the second electrode layer 10 are sequentially disposed on the substrate 1. The pixel defining layer 8 includes a receiving portion 81 corresponding to each organic light-emitting diode 2 and a plurality of pixel barriers 82. The light-emitting layers are stacked between the first electrode layer 3 and the second electrode layer 10. An N-type charge-generating layer 5 and a P-type charge-generating layer 7 are stacked between any two adjacent light-emitting layers 4, and both the N-type charge-generating layer 5 and the P-type charge-generating layer 7 are integral structures. The auxiliary electrode layer 6 is located between the adjacent N-type charge generation layer 5 and P-type charge generation layer 7. The orthographic projection of the auxiliary electrode layer 6 onto the substrate 1 covers the orthographic projection of the pixel limiting layer 8 onto the substrate 1, and the orthographic projection of the auxiliary electrode layer 6 onto the substrate 1 does not overlap with the orthographic projection of the receiving portion 81 onto the substrate 1. By directly contacting the N-type charge generation layer 5, the auxiliary electrode layer 6 can significantly reduce the sheet resistance of the ytterbium-doped N-type charge generation layer 5, thereby greatly reducing the voltage drop across the stacked device, lowering its operating voltage, and thus reducing power consumption and improving image uniformity. Secondly, by making the auxiliary electrode layer 6 directly contact the P-type charge generation layer 7, the hole injection efficiency and device stability of the P-type charge generation layer 7 can be greatly improved, further enhancing the luminous efficiency of the stacked device. In the receiving portion 81, the N-type charge generation layer 5 and the P-type charge generation layer 7 are in direct contact, which prevents the auxiliary electrode layer 6 from affecting the generation of holes and electrons in the stacked device, thus preventing any impact on device performance. On the other hand, it can also avoid the thermal impact on the underlying organic film layer during the preparation of the auxiliary electrode layer 6.

[0077] It should be noted that the display substrate in this embodiment may further include a hole transport layer, an electron transport layer, a capping layer, and an encapsulation layer. The light-emitting layer includes at least a first light-emitting layer 41 and a second light-emitting layer 42, with the hole transport layer located between the first electrode layer 3 and the first light-emitting layer 41. The electron transport layer is located between the second light-emitting layer 42 and the second electrode layer 10. The capping layer is located on the side of the second electrode layer 10 facing away from the substrate 1. The encapsulation layer is located on the side of the capping layer facing away from the substrate 1. The capping layer and encapsulation layer protect the display substrate from water and oxygen corrosion, preventing harmful gases such as water and oxygen from penetrating into the display substrate and causing device damage.

[0078] This disclosure also provides another method for fabricating a display substrate, which can be applied to fabricate the above-mentioned display substrate. The method may include:

[0079] S21. Take a substrate 1.

[0080] S22. A first electrode layer 3 is formed on the substrate 1. The first electrode layer 3 includes a plurality of first electrodes, and there is a gap between adjacent first electrodes.

[0081] S23. A pixel limiting layer 8 is formed at the gap of the first electrode layer 3. The pixel limiting layer 8 includes a plurality of pixel barriers 82 and a receiving portion 81 corresponding to the organic light-emitting diode 2. The pixel limiting layer 8 covers the edge of the first electrode. The orthographic projection of the pixel limiting layer 8 on the substrate 1 overlaps with the orthographic projection of the first electrode layer 3 on the substrate 1.

[0082] S24. A first light-emitting layer 41 is formed on the side of the first electrode layer 3 away from the substrate 1.

[0083] S25. An N-type charge generation layer 5 is formed on the side of the first light-emitting layer 41 away from the substrate 1.

[0084] S26. An auxiliary electrode layer 6 is formed on the side of the N-type charge generation layer 5 away from the substrate 1. Only the auxiliary electrode layer 6 on the side of the pixel barrier 82 away from the substrate 1 is retained by the patterning process.

[0085] Optionally, step S26 may specifically include:

[0086] Through such Figures 4a to 4c The patterned auxiliary electrode layer 6 is fabricated using a fine metal mask. The auxiliary electrode layer 6 includes multiple first sub-electrodes. The orthogonal projections of any adjacent row of organic light-emitting diodes 2 onto the substrate 1 have a first gap 11. The orthogonal projection of one first sub-electrode onto the substrate 1 is located within one of the first gaps 11. Alternatively, the auxiliary electrode layer 6 includes multiple second sub-electrodes. The orthogonal projections of any adjacent column of organic light-emitting diodes 2 onto the substrate 1 have a second gap 12. The orthogonal projection of one second sub-electrode onto the substrate 1 is located within one of the second gaps 12. Within the first gap 11 and / or the second gap 12, the auxiliary electrode layer 6 is located between adjacent N-type charge generation layers 5 and P-type charge generation layers 7, and the orthogonal projection of the auxiliary electrode layer 6 onto the substrate 1 covers the orthogonal projection of the pixel defining layer 8 onto the substrate 1. By directly contacting the N-type charge generation layer 5, the auxiliary electrode layer 6 can significantly reduce the sheet resistance of the ytterbium-doped N-type charge generation layer 5, greatly reducing the voltage drop across the stacked device, lowering its operating voltage, thereby reducing power consumption and improving image uniformity.

[0087] Optionally, step S26 may specifically include:

[0088] Through such Figure 4dThe fine metal mask shown depicts a patterned auxiliary electrode layer 6, which includes multiple first sub-electrodes. Organic light-emitting diodes 2, arbitrarily adjacent in the row direction, have a third gap 13 in their orthogonal projections onto the substrate 1. The orthogonal projection of one of the first sub-electrodes onto the substrate 1 is located within one of the third gaps 13. Within the third gap 13, the auxiliary electrode layer 6 is located between adjacent N-type charge-generating layers 5 and P-type charge-generating layers 7, and the orthogonal projection of the auxiliary electrode layer 6 onto the substrate 1 covers the orthogonal projection of the pixel-defining layer 8 onto the substrate 1. By directly contacting the N-type charge-generating layer 5, the auxiliary electrode layer 6 can significantly reduce the sheet resistance of the ytterbium-doped N-type charge-generating layer 5, greatly reducing the voltage drop across the stacked device, lowering its operating voltage, thereby reducing power consumption and improving image uniformity.

[0089] Optionally, step S26 may specifically include:

[0090] Through such Figure 4e The fine metal mask shown depicts a patterned auxiliary electrode layer 6, which includes multiple first sub-electrodes. Organic light-emitting diodes 2, arbitrarily adjacent in the column direction, have a fourth gap 14 in their orthogonal projection onto the substrate 1. The orthogonal projection of one first sub-electrode onto the substrate 1 lies within one of the fourth gaps 14. Within the fourth gap 14, the auxiliary electrode layer 6 is located between adjacent N-type charge-generating layers 5 and P-type charge-generating layers 7, and the orthogonal projection of the auxiliary electrode layer 6 onto the substrate 1 covers the orthogonal projection of the pixel-defining layer 8 onto the substrate 1. By directly contacting the N-type charge-generating layer 5, the auxiliary electrode layer 6 significantly reduces the sheet resistance of the ytterbium-doped N-type charge-generating layer 5, greatly reducing the voltage drop across the stacked device, lowering its operating voltage, thereby reducing power consumption and improving image uniformity.

[0091] Optionally, step S26 may specifically include:

[0092] Through such Figure 4fThe fine metal mask shown depicts a patterned auxiliary electrode layer 6. The auxiliary electrode layer 6 includes multiple first sub-electrodes. The orthographic projections of any adjacent row of organic light-emitting diodes (OLEDs) 2 onto the substrate 1 have a fifth gap 15. The orthographic projection of one first sub-electrode onto the substrate 1 is located within one of the fifth gaps 15. Each first sub-electrode includes multiple electrode blocks, which are alternately arranged with the OLEDs 2. The auxiliary electrode layer 6 within the fifth gap 15 is located between adjacent N-type charge generation layers 5 and P-type charge generation layers 7, and the orthographic projection of the auxiliary electrode layer 6 onto the substrate 1 covers the orthographic projection of the pixel defining layer 8 onto the substrate 1. By directly contacting the N-type charge generation layer 5, the auxiliary electrode layer 6 can significantly reduce the sheet resistance of the ytterbium-doped N-type charge generation layer 5, greatly reducing the voltage drop across the stacked device, lowering its operating voltage, thereby reducing power consumption and improving image uniformity.

[0093] S27. A P-type charge generation layer 7 is formed on the side of the auxiliary electrode layer 6 away from the N-type charge generation layer 5.

[0094] S28. A second light-emitting layer 42 is formed on the side of the P-type charge generating layer 7 away from the substrate 1. The orthogonal projection of the second light-emitting layer 42 on the substrate 1 partially overlaps with the orthogonal projection of the first light-emitting layer 41 on the substrate 1.

[0095] S29. A second electrode layer 10 is formed on the side of the second light-emitting layer 42 away from the substrate 1.

[0096] In some examples, the method of fabricating the display substrate may also include forming a hole transport layer located between the first electrode layer 3 and the first light-emitting layer 41.

[0097] In some examples, the method of fabricating the display substrate may also include forming an electron transport layer located between the second light-emitting layer 42 and the second electrode layer 10.

[0098] In some examples, the method of fabricating the display substrate may also include forming a cover layer located on the side of the second electrode layer 10 opposite to the substrate 1.

[0099] In some examples, the method of fabricating the display substrate may also include forming an encapsulation layer located on the side of the cover layer opposite to the substrate 1.

[0100] In some examples, the thickness of the auxiliary electrode layer 6 is no more than 10 nanometers. Since its thickness is adjustable over a wide range and the material of the auxiliary electrode layer 6 is transparent, the auxiliary electrode layer 6 has little impact on the light emission of the display substrate.

[0101] In some examples, the material of the auxiliary electrode layer 6 includes any one of indium tin oxide, zinc oxide, aluminum-doped zinc oxide, gold, polyaniline, polypyrrole, and polythiophene derivatives.

[0102] In some examples, the work function of the auxiliary electrode layer 6 material is controlled between -4 eV and -6 eV to achieve better hole and electron injection. Taking indium tin oxide (ITO) as an example, the work function of the auxiliary electrode layer 6 material can be adjusted by adjusting the ratio of indium trioxide (ITO) to tin oxide (TITO) in the ITO, or by adjusting the plasma treatment time. Alternatively, a thin second interlayer insulating layer, such as silicon dioxide, carbon fiber, or lithium fluoride, can be deposited on the conductive layer (ITO) with a thickness controlled between 0.2 nm and 2 nm to improve hole injection efficiency and reduce the driving voltage.

[0103] In some examples, the energy level of the auxiliary electrode layer 6 is greater than the lowest unoccupied molecular orbital (LUMO) energy level of the N-type charge generation layer 5, and less than the highest occupied molecular orbital (HOMO) energy level of the P-type charge generation layer 7.

[0104] A third example is provided in this disclosure, which offers yet another display substrate, such as... Figure 5 As shown, the display substrate includes a substrate 1 and a plurality of organic light-emitting diodes (OLEDs) 2 and a pixel defining layer 8 disposed on the substrate 1. Each OLED 2 includes a first electrode layer 3, a second electrode layer 10, at least two light-emitting layers 4, an N-type charge-generating layer 5, a P-type charge-generating layer 7, and an auxiliary electrode layer 6. The first electrode layer 3 and the second electrode layer 10 are sequentially disposed on the substrate 1. The pixel defining layer 8 includes receiving portions 81 corresponding to each OLED 2 and a plurality of pixel barriers 82. The light-emitting layers are stacked between the first electrode layer 3 and the second electrode layer 10. An N-type charge-generating layer 5 and a P-type charge-generating layer 7 are stacked between any two adjacent light-emitting layers 4, and both the N-type charge-generating layer 5 and the P-type charge-generating layer 7 are integral structures. The auxiliary electrode layer 6 is located between the N-type charge generation layer 5 and the pixel defining layer 8. The orthographic projection of the auxiliary electrode layer 6 onto the substrate 1 overlaps with the orthographic projection of the pixel defining layer 8 onto the substrate 1, and the orthographic projection of the auxiliary electrode layer 6 onto the substrate 1 does not overlap with the orthographic projection of the accommodating portion 81 onto the substrate 1. By directly contacting the N-type charge generation layer 5, the auxiliary electrode layer 6 can significantly reduce the sheet resistance of the ytterbium-doped N-type charge generation layer 5, thereby greatly reducing the voltage drop across the stacked device, lowering its operating voltage, and thus reducing power consumption and improving image uniformity. In the accommodating portion 81, the N-type charge generation layer 5 is in direct contact with the P-type charge generation layer 7. This prevents the auxiliary electrode layer 6 from affecting the generation of holes and electrons in the stacked device, thus preventing any impact on device performance. Furthermore, it avoids thermal impact on the underlying organic film layer during the fabrication of the auxiliary electrode layer 6.

[0105] It should be noted that the display substrate in this embodiment may further include a hole transport layer, an electron transport layer, a capping layer, and an encapsulation layer. The light-emitting layer includes at least a first light-emitting layer 41 and a second light-emitting layer 42, with the hole transport layer located between the first electrode layer 3 and the first light-emitting layer 41. The electron transport layer is located between the second light-emitting layer 42 and the second electrode layer 10. The capping layer is located on the side of the second electrode layer 10 facing away from the substrate 1. The encapsulation layer is located on the side of the capping layer facing away from the substrate 1. The capping layer and encapsulation layer protect the display substrate from water and oxygen corrosion, preventing harmful gases such as water and oxygen from penetrating into the display substrate and causing device damage.

[0106] This disclosure also provides a method for fabricating a display substrate, which can be used to fabricate the aforementioned display substrate. The method may include:

[0107] S31. Take a substrate 1.

[0108] S32. A first electrode layer 3 is formed on the substrate 1. The first electrode layer 3 includes a plurality of first electrodes, and there is a gap between adjacent first electrodes.

[0109] S33. A pixel limiting layer 8 is formed at the gap of the first electrode layer 3. The pixel limiting layer 8 includes a plurality of pixel barriers 82 and a receiving portion 81 corresponding to the organic light-emitting diode 2. The pixel limiting layer 8 covers the edge of the first electrode. The orthographic projection of the pixel limiting layer 8 on the substrate 1 overlaps with the orthographic projection of the first electrode layer 3 on the substrate 1.

[0110] S34. A first light-emitting layer 41 is formed on the side of the first electrode layer 3 away from the substrate 1.

[0111] S35. An auxiliary electrode layer 6 is formed on the side of the pixel barrier 82 of the pixel limiting layer 8 that is away from the substrate 1.

[0112] Optionally, step S35 may specifically include:

[0113] Through such Figures 4a to 4cThe patterned auxiliary electrode layer 6 is fabricated using a fine metal mask. The auxiliary electrode layer 6 includes multiple first sub-electrodes. The orthogonal projections of any adjacent row of organic light-emitting diodes 2 onto the substrate 1 have a first gap 11. The orthogonal projection of one first sub-electrode onto the substrate 1 is located within one of the first gaps 11. Alternatively, the auxiliary electrode layer 6 includes multiple second sub-electrodes. The orthogonal projections of any adjacent column of organic light-emitting diodes 2 onto the substrate 1 have a second gap 12. The orthogonal projection of one second sub-electrode onto the substrate 1 is located within one of the second gaps 12. Within the first gap 11 and / or the second gap 12, the auxiliary electrode layer 6 is located between adjacent N-type charge generation layers 5 and P-type charge generation layers 7, and the orthogonal projection of the auxiliary electrode layer 6 onto the substrate 1 covers the orthogonal projection of the pixel defining layer 8 onto the substrate 1. By directly contacting the N-type charge generation layer 5, the auxiliary electrode layer 6 can significantly reduce the sheet resistance of the ytterbium-doped N-type charge generation layer 5, greatly reducing the voltage drop across the stacked device, lowering its operating voltage, thereby reducing power consumption and improving image uniformity.

[0114] Optionally, step S36 may specifically include:

[0115] Through such Figure 4d The fine metal mask shown depicts a patterned auxiliary electrode layer 6, which includes multiple first sub-electrodes. Organic light-emitting diodes 2, arbitrarily adjacent in the row direction, have a third gap 13 in their orthogonal projections onto the substrate 1. The orthogonal projection of one of the first sub-electrodes onto the substrate 1 is located within one of the third gaps 13. Within the third gap 13, the auxiliary electrode layer 6 is located between adjacent N-type charge-generating layers 5 and P-type charge-generating layers 7, and the orthogonal projection of the auxiliary electrode layer 6 onto the substrate 1 covers the orthogonal projection of the pixel-defining layer 8 onto the substrate 1. By directly contacting the N-type charge-generating layer 5, the auxiliary electrode layer 6 can significantly reduce the sheet resistance of the ytterbium-doped N-type charge-generating layer 5, greatly reducing the voltage drop across the stacked device, lowering its operating voltage, thereby reducing power consumption and improving image uniformity.

[0116] Optionally, step S36 may specifically include:

[0117] Through such Figure 4eThe fine metal mask shown depicts a patterned auxiliary electrode layer 6, which includes multiple first sub-electrodes. Organic light-emitting diodes 2, arbitrarily adjacent in the column direction, have a fourth gap 14 in their orthogonal projection onto the substrate 1. The orthogonal projection of one first sub-electrode onto the substrate 1 lies within one of the fourth gaps 14. Within the fourth gap 14, the auxiliary electrode layer 6 is located between adjacent N-type charge-generating layers 5 and P-type charge-generating layers 7, and the orthogonal projection of the auxiliary electrode layer 6 onto the substrate 1 covers the orthogonal projection of the pixel-defining layer 8 onto the substrate 1. By directly contacting the N-type charge-generating layer 5, the auxiliary electrode layer 6 significantly reduces the sheet resistance of the ytterbium-doped N-type charge-generating layer 5, greatly reducing the voltage drop across the stacked device, lowering its operating voltage, thereby reducing power consumption and improving image uniformity.

[0118] Optionally, step S36 may specifically include:

[0119] Through such Figure 4f The fine metal mask shown depicts a patterned auxiliary electrode layer 6. The auxiliary electrode layer 6 includes multiple first sub-electrodes. The orthographic projections of any adjacent row of organic light-emitting diodes (OLEDs) 2 onto the substrate 1 have a fifth gap 15. The orthographic projection of one first sub-electrode onto the substrate 1 is located within one of the fifth gaps 15. Each first sub-electrode includes multiple electrode blocks, which are alternately arranged with the OLEDs 2. The auxiliary electrode layer 6 within the fifth gap 15 is located between adjacent N-type charge generation layers 5 and P-type charge generation layers 7, and the orthographic projection of the auxiliary electrode layer 6 onto the substrate 1 covers the orthographic projection of the pixel defining layer 8 onto the substrate 1. By directly contacting the N-type charge generation layer 5, the auxiliary electrode layer 6 can significantly reduce the sheet resistance of the ytterbium-doped N-type charge generation layer 5, greatly reducing the voltage drop across the stacked device, lowering its operating voltage, thereby reducing power consumption and improving image uniformity.

[0120] S36. An N-type charge generation layer 5 is formed on the side of the auxiliary electrode layer 6 away from the substrate 1.

[0121] S37. A P-type charge generation layer 7 is formed on the side of the N-type charge generation layer 5 that is away from the substrate 1.

[0122] S38. A second light-emitting layer 42 is formed on the side of the P-type charge generating layer 7 away from the substrate 1. The orthogonal projection of the second light-emitting layer 42 on the substrate 1 partially overlaps with the orthogonal projection of the first light-emitting layer 41 on the substrate 1.

[0123] S39. A second electrode layer 10 is formed on the side of the second light-emitting layer 42 away from the substrate 1.

[0124] In some examples, the method of fabricating the display substrate may also include forming a hole transport layer located between the first electrode layer 3 and the first light-emitting layer 41.

[0125] In some examples, the method of fabricating the display substrate may also include forming an electron transport layer located between the second light-emitting layer 42 and the second electrode layer 10.

[0126] In some examples, the method of fabricating the display substrate may also include forming a cover layer located on the side of the second electrode layer 10 opposite to the substrate 1.

[0127] In some examples, the method of fabricating the display substrate may also include forming an encapsulation layer located on the side of the cover layer opposite to the substrate 1.

[0128] In some examples, the thickness of the auxiliary electrode layer 6 is no more than 10 nanometers. Since its thickness is adjustable over a wide range and the material of the auxiliary electrode layer 6 is transparent, the auxiliary electrode layer 6 has little impact on the light emission of the display substrate.

[0129] In some examples, the material of the auxiliary electrode layer 6 includes any one of indium tin oxide, zinc oxide, aluminum-doped zinc oxide, gold, polyaniline, polypyrrole, and polythiophene derivatives.

[0130] In some examples, the work function of the auxiliary electrode layer 6 material is controlled between -4 eV and -6 eV to achieve better hole and electron injection. Taking indium tin oxide (ITO) as an example, the work function of the auxiliary electrode layer 6 material can be adjusted by adjusting the ratio of indium trioxide (ITO) to tin oxide (TITO) in the ITO, or by adjusting the plasma treatment time. Alternatively, a thin second interlayer insulating layer, such as silicon dioxide, carbon fiber, or lithium fluoride, can be deposited on the conductive layer (ITO) with a thickness controlled between 0.2 nm and 2 nm to improve hole injection efficiency and reduce the driving voltage.

[0131] In some examples, the energy level of the auxiliary electrode layer 6 is greater than the lowest unoccupied molecular orbital (LUMO) energy level of the N-type charge generation layer 5, and less than the highest occupied molecular orbital (HOMO) energy level of the P-type charge generation layer 7.

[0132] A fourth example is provided in this disclosure, which offers another display substrate, such as... Figure 6As shown, the display substrate includes a substrate 1 and a plurality of organic light-emitting diodes (OLEDs) 2 and a pixel defining layer 8 disposed on the substrate 1. Each OLED 2 includes a first electrode layer 3, a second electrode layer 10, at least two light-emitting layers 4, an N-type charge-generating layer 5, a P-type charge-generating layer 7, and an auxiliary electrode layer 6. The first electrode layer 3 and the second electrode layer 10 are sequentially disposed on the substrate 1. The pixel defining layer 8 includes receiving portions 81 corresponding to each OLED 2, a plurality of pixel barriers 82, and a first through-slot. The light-emitting layers are stacked between the first electrode layer 3 and the second electrode layer 10. An N-type charge-generating layer 5 and a P-type charge-generating layer 7 are stacked between any two adjacent light-emitting layers 4, and both the N-type charge-generating layer 5 and the P-type charge-generating layer 7 are integral structures. The auxiliary electrode layer 6 is disposed on the same layer as the first electrode layer 3, and the N-type charge-generating layer 5 contacts the auxiliary electrode layer 6 through the first through-slot penetrating the pixel defining layer 8. The auxiliary electrode layer 6, through direct contact with the N-type charge generation layer 5, significantly reduces the sheet resistance of the ytterbium-doped N-type charge generation layer 5, thereby greatly reducing the voltage drop across the stacked device, lowering its operating voltage, and consequently reducing power consumption and improving image uniformity. The direct contact between the N-type charge generation layer 5 and the P-type charge generation layer 7 prevents the auxiliary electrode layer 6 from affecting the generation of holes and electrons in the stacked device, thus protecting device performance. Furthermore, it avoids thermal impacts on the underlying organic film layer during the fabrication of the auxiliary electrode layer 6.

[0133] It should be noted that the display substrate in this embodiment may further include a hole transport layer, an electron transport layer, a capping layer, and an encapsulation layer. The light-emitting layer includes at least a first light-emitting layer 41 and a second light-emitting layer 42, with the hole transport layer located between the first electrode layer 3 and the first light-emitting layer 41. The electron transport layer is located between the second light-emitting layer 42 and the second electrode layer 10. The capping layer is located on the side of the second electrode layer 10 facing away from the substrate 1. The encapsulation layer is located on the side of the capping layer facing away from the substrate 1. The capping layer and encapsulation layer protect the display substrate from water and oxygen corrosion, preventing harmful gases such as water and oxygen from penetrating into the display substrate and causing device damage.

[0134] This disclosure also provides a method for fabricating a display substrate, which can be used to fabricate the aforementioned display substrate. The method may include:

[0135] S41. Take a substrate 1.

[0136] S42. A first electrode layer 3 is formed on the substrate 1. The first electrode layer 3 includes a plurality of first electrodes, and there is a gap between adjacent first electrodes.

[0137] S43. An auxiliary electrode layer 6 is formed at the gap of the first electrode layer 3, and the orthogonal projection of the auxiliary electrode layer 6 on the substrate 1 does not overlap with the orthogonal projection of the first electrode layer 3 on the substrate 1.

[0138] Optionally, step S43 may specifically include:

[0139] An auxiliary electrode layer 6 is formed at the gap of the first electrode layer 3 using a physical vapor deposition (PVD) process, a chemical vapor deposition (CVD) process, or a sputtering process.

[0140] S44. A pixel limiting layer 8 is formed at the gap of the first electrode layer 3. The pixel limiting layer 8 includes a plurality of pixel barriers 82 and a receiving portion 81 corresponding to the organic light-emitting diode 2. A first through groove is formed in the middle of each pixel barrier 82. The pixel limiting layer 8 covers the edge of the first electrode. The orthographic projection of the pixel limiting layer 8 on the substrate 1 overlaps with the orthographic projection of the first electrode layer 3 on the substrate 1.

[0141] S45. A first light-emitting layer 41 is formed on the side of the first electrode layer 3 away from the substrate 1.

[0142] S46. An N-type charge generation layer 5 is formed on the side of the auxiliary electrode layer 6 away from the substrate 1.

[0143] S47. A P-type charge generation layer 7 is formed on the side of the N-type charge generation layer 5 that is away from the substrate 1.

[0144] S48. A second light-emitting layer 42 is formed on the side of the P-type charge generating layer 7 away from the substrate 1. The orthogonal projection of the second light-emitting layer 42 on the substrate 1 partially overlaps with the orthogonal projection of the first light-emitting layer 41 on the substrate 1.

[0145] S49. A second electrode layer 10 is formed on the side of the second light-emitting layer 42 away from the substrate 1.

[0146] In some examples, the method of fabricating the display substrate may also include forming a hole transport layer located between the first electrode layer 3 and the first light-emitting layer 41.

[0147] In some examples, the method of fabricating the display substrate may also include forming an electron transport layer located between the second light-emitting layer 42 and the second electrode layer 10.

[0148] In some examples, the method of fabricating the display substrate may also include forming a cover layer located on the side of the second electrode layer 10 opposite to the substrate 1.

[0149] In some examples, the method of fabricating the display substrate may also include forming an encapsulation layer located on the side of the cover layer opposite to the substrate 1.

[0150] In some examples, the thickness of the auxiliary electrode layer 6 is no more than 10 nanometers. Since its thickness is adjustable over a wide range and the material of the auxiliary electrode layer 6 is transparent, the auxiliary electrode layer 6 has little impact on the light emission of the display substrate.

[0151] In some examples, the material of the auxiliary electrode layer 6 includes any one of indium tin oxide, zinc oxide, aluminum-doped zinc oxide, gold, polyaniline, polypyrrole, and polythiophene derivatives.

[0152] In some examples, the work function of the auxiliary electrode layer 6 material is controlled between -4 eV and -6 eV to achieve better hole and electron injection. Taking indium tin oxide (ITO) as an example, the work function of the auxiliary electrode layer 6 material can be adjusted by adjusting the ratio of indium trioxide (ITO) to tin oxide (TITO) in the ITO, or by adjusting the plasma treatment time. Alternatively, a thin second interlayer insulating layer, such as silicon dioxide, carbon fiber, or lithium fluoride, can be deposited on the conductive layer (ITO) with a thickness controlled between 0.2 nm and 2 nm to improve hole injection efficiency and reduce the driving voltage.

[0153] In some examples, the energy level of the auxiliary electrode layer 6 is greater than the lowest unoccupied molecular orbital (LUMO) energy level of the N-type charge generation layer 5, and less than the highest occupied molecular orbital (HOMO) energy level of the P-type charge generation layer 7.

[0154] Fifth example, this disclosure provides another display substrate, such as... Figure 7As shown, the display substrate includes a substrate 1 and a plurality of organic light-emitting diodes (OLEDs) 2 and a pixel defining layer 8 disposed on the substrate 1. Each OLED 2 includes a first interlayer insulating layer 16, a first electrode layer 3, a second electrode layer 10, at least two light-emitting layers 4, an N-type charge-generating layer 5, a P-type charge-generating layer 7, and an auxiliary electrode layer 6. The first electrode layer 3 and the second electrode layer 10 are sequentially disposed on the substrate 1. The first interlayer insulating layer 16 is disposed on the side of the first electrode layer 3 near the substrate 1, and includes a plurality of first openings. Each OLED 2 and each adjacent OLED 2 have at least one first opening. The pixel defining layer 8 includes receiving portions 81 corresponding to each OLED 2, a plurality of pixel barriers 82, and first through slots. The first through slots correspond to the first openings, and the corresponding first openings and first through slots communicate to form an isolation portion. The light-emitting layers are stacked between the first electrode layer 3 and the second electrode layer 10. Between any two adjacent light-emitting layers 4, there are stacked N-type charge-generating layers 5 and P-type charge-generating layers 7, both of which are integral structures. An auxiliary electrode layer 6 is located between the pixel limiting layer 8 and the N-type charge-generating layer 5. The N-type charge-generating layer 5, P-type charge-generating layer 7, second electrode layer 10, and auxiliary electrode layer 6 are disconnected at the isolation section, and the orthographic projection of the auxiliary electrode layer 6 and the receiving section 81 on the substrate 1 does not overlap. By setting the auxiliary electrode layer 6 as described above, contact between the high-resistivity ytterbium-doped N-type charge-generating layer 5 and the auxiliary electrode layer 6 is ensured, effectively reducing contact resistance. Simultaneously, it effectively isolates the organic light-emitting material deposited in the evaporation chamber through a universal mask, effectively solving the crosstalk problem of stacked devices. Furthermore, the connection between the first opening and the first through-slot to form an isolation section further extends the transmission path of the lateral common film layer and more effectively avoids the overlapping of adjacent light-emitting pixels, thus significantly improving the crosstalk phenomenon of the light-emitting device.

[0155] It should be noted that the display substrate in this embodiment may further include a hole transport layer, an electron transport layer, a capping layer, and an encapsulation layer. The light-emitting layer includes at least a first light-emitting layer 41 and a second light-emitting layer 42, with the hole transport layer located between the first electrode layer 3 and the first light-emitting layer 41. The electron transport layer is located between the second light-emitting layer 42 and the second electrode layer 10. The capping layer is located on the side of the second electrode layer 10 facing away from the substrate 1. The encapsulation layer is located on the side of the capping layer facing away from the substrate 1. The capping layer and encapsulation layer protect the display substrate from water and oxygen corrosion, preventing harmful gases such as water and oxygen from penetrating into the display substrate and causing device damage.

[0156] This disclosure also provides a method for fabricating a display substrate, which can be used to fabricate the aforementioned display substrate. The method may include:

[0157] S51. Take a substrate 1.

[0158] S52. A first interlayer insulating layer 16 is formed on the substrate 1.

[0159] S53. A first opening is formed on the side of the first interlayer insulating layer 16 away from the substrate 1 by a patterning process.

[0160] S54. A first electrode layer 3 is formed on the side of the first interlayer insulating layer 16 away from the substrate 1. The first electrode layer 3 includes a plurality of first electrodes, and there is a gap between adjacent first electrodes.

[0161] S55, An auxiliary electrode layer 6 is formed at the first opening.

[0162] Optionally, step S55 may specifically include:

[0163] An auxiliary electrode layer 6 is formed at the first opening using a physical vapor deposition (PVD) process, a chemical vapor deposition (CVD) process, or a sputtering process.

[0164] S56. A pixel limiting layer 8 is formed at the gap of the first electrode layer 3. The pixel limiting layer 8 includes a plurality of pixel barriers 82 and a receiving portion 81 corresponding to the organic light-emitting diode 2. A first through groove is formed in the middle of each pixel barrier 82. The pixel limiting layer 8 covers the edge of the first electrode. The orthographic projection of the pixel limiting layer 8 on the substrate 1 overlaps with the orthographic projection of the first electrode layer 3 on the substrate 1. The first through groove and the first opening are correspondingly provided. The position of the isolation portion formed by the corresponding first opening and the first through groove is disconnected from the two sides.

[0165] S57. A first light-emitting layer 41 is formed on the side of the first electrode layer 3 away from the substrate 1.

[0166] S58. An N-type charge generation layer 5 is formed on the side of the auxiliary electrode layer 6 away from the substrate 1.

[0167] S59. A P-type charge generation layer 7 is formed on the side of the N-type charge generation layer 5 that is away from the substrate 1.

[0168] S510. A second light-emitting layer 42 is formed on the side of the P-type charge generating layer 7 away from the substrate 1. The orthogonal projection of the second light-emitting layer 42 on the substrate 1 partially overlaps with the orthogonal projection of the first light-emitting layer 41 on the substrate 1.

[0169] S511, a second electrode layer 10 is formed on the side of the second light-emitting layer 42 away from the substrate 1.

[0170] In some examples, the method of fabricating the display substrate may also include forming a hole transport layer located between the first electrode layer 3 and the first light-emitting layer 41.

[0171] In some examples, the method of fabricating the display substrate may also include forming an electron transport layer located between the second light-emitting layer 42 and the second electrode layer 10.

[0172] In some examples, the method of fabricating the display substrate may also include forming a cover layer located on the side of the second electrode layer 10 opposite to the substrate 1.

[0173] In some examples, the method of fabricating the display substrate may also include forming an encapsulation layer located on the side of the cover layer opposite to the substrate 1.

[0174] In some examples, the thickness of the auxiliary electrode layer 6 is no more than 10 nanometers. Since its thickness is adjustable over a wide range and the material of the auxiliary electrode layer 6 is transparent, the auxiliary electrode layer 6 has little impact on the light emission of the display substrate.

[0175] In some examples, the material of the auxiliary electrode layer 6 includes any one of indium tin oxide, zinc oxide, aluminum-doped zinc oxide, gold, polyaniline, polypyrrole, and polythiophene derivatives.

[0176] In some examples, the work function of the auxiliary electrode layer 6 material is controlled between -4 eV and -6 eV to achieve better hole and electron injection. Taking indium tin oxide (ITO) as an example, the work function of the auxiliary electrode layer 6 material can be adjusted by adjusting the ratio of indium trioxide (ITO) to tin oxide (TITO) in the ITO, or by adjusting the plasma treatment time. Alternatively, a thin second interlayer insulating layer, such as silicon dioxide, carbon fiber, or lithium fluoride, can be deposited on the conductive layer (ITO) with a thickness controlled between 0.2 nm and 2 nm to improve hole injection efficiency and reduce the driving voltage.

[0177] In some examples, the energy level of the auxiliary electrode layer 6 is greater than the lowest unoccupied molecular orbital (LUMO) energy level of the N-type charge generation layer 5, and less than the highest occupied molecular orbital (HOMO) energy level of the P-type charge generation layer 7.

[0178] A sixth example, this disclosure provides yet another display substrate, such as... Figure 8As shown, the display substrate includes a substrate 1 and a plurality of organic light-emitting diodes (OLEDs) 2 and a pixel defining layer 8 disposed on the substrate 1. Each OLED 2 includes a first interlayer insulating layer 16, a first electrode layer 3, a second electrode layer 10, at least two light-emitting layers 4, an N-type charge-generating layer 5, a P-type charge-generating layer 7, and an auxiliary electrode layer 6. The first electrode layer 3 and the second electrode layer 10 are sequentially disposed on the substrate 1. The first interlayer insulating layer 16 is disposed on the side of the first electrode layer 3 near the substrate 1, and includes a plurality of first openings. Each OLED 2 and each adjacent OLED 2 have at least one first opening. The pixel defining layer 8 includes receiving portions 81 corresponding to each OLED 2, a plurality of pixel barriers 82, and first through slots. The first through slots correspond to the first openings, and the corresponding first openings and first through slots communicate to form an isolation portion. The light-emitting layers are stacked between the first electrode layer 3 and the second electrode layer 10. Between any two adjacent light-emitting layers 4, there are stacked N-type charge-generating layers 5 and P-type charge-generating layers 7, both of which are integral structures. An auxiliary electrode layer 6 is located between the N-type charge-generating layers 5 and P-type charge-generating layers 7. The N-type charge-generating layers 5, P-type charge-generating layers 7, second electrode layer 10, and auxiliary electrode layer 6 are disconnected at the isolation section, and the orthogonal projection of the auxiliary electrode layer 6 and the receiving section 81 on the substrate 1 does not overlap. By setting the auxiliary electrode layer 6 as described above, contact between the high-resistivity ytterbium-doped N-type charge-generating layer 5 and the auxiliary electrode layer 6 is ensured, effectively reducing contact resistance. Simultaneously, it effectively isolates the organic light-emitting material deposited in the evaporation chamber through a universal mask, effectively solving the crosstalk problem of stacked devices. Furthermore, the connection between the first opening and the first through-slot to form an isolation section further extends the transmission path of the lateral common film layer and more effectively avoids the overlapping of adjacent light-emitting pixels, thus significantly improving the crosstalk phenomenon of the light-emitting device.

[0179] It should be noted that the display substrate in this embodiment may further include a hole transport layer, an electron transport layer, a capping layer, and an encapsulation layer. The light-emitting layer includes at least a first light-emitting layer 41 and a second light-emitting layer 42, with the hole transport layer located between the first electrode layer 3 and the first light-emitting layer 41. The electron transport layer is located between the second light-emitting layer 42 and the second electrode layer 10. The capping layer is located on the side of the second electrode layer 10 facing away from the substrate 1. The encapsulation layer is located on the side of the capping layer facing away from the substrate 1. The capping layer and encapsulation layer protect the display substrate from water and oxygen corrosion, preventing harmful gases such as water and oxygen from penetrating into the display substrate and causing device damage.

[0180] This disclosure also provides a method for fabricating a display substrate, which can be used to fabricate the aforementioned display substrate. The method may include:

[0181] S61. Take a substrate 1.

[0182] S62. A first interlayer insulating layer 16 is formed on the substrate 1.

[0183] S63. A first opening is formed on the side of the first interlayer insulating layer 16 away from the substrate 1 by a patterning process.

[0184] S64. A first electrode layer 3 is formed on the side of the first interlayer insulating layer 16 away from the substrate 1. The first electrode layer 3 includes a plurality of first electrodes, and there is a gap between adjacent first electrodes.

[0185] S65. A pixel limiting layer 8 is formed at the gap of the first electrode layer 3. The pixel limiting layer 8 includes a plurality of pixel barriers 82 and a receiving portion 81 corresponding to the organic light-emitting diode 2. A first through groove is formed in the middle of each pixel barrier 82. The pixel limiting layer 8 covers the edge of the first electrode. The orthographic projection of the pixel limiting layer 8 on the substrate 1 overlaps with the orthographic projection of the first electrode layer 3 on the substrate 1. The first through groove and the first opening are correspondingly provided. The position of the isolation portion formed by the corresponding first opening and the first through groove is disconnected from the two sides.

[0186] S66. A first light-emitting layer 41 is formed on the side of the first electrode layer 3 away from the substrate 1.

[0187] S67. An N-type charge generation layer 5 is formed on the side of the first light-emitting layer 41 away from the substrate 1.

[0188] S68. An auxiliary electrode layer 6 is formed on the side of the N-type charge generation layer 5 away from the substrate 1 at the first opening.

[0189] Optionally, step S68 may specifically include:

[0190] An auxiliary electrode layer 6 is formed on the side of the N-type charge generation layer 5 at the first opening away from the substrate 1 by means of physical vapor deposition (PVD), chemical vapor deposition (CVD), or sputtering.

[0191] S69. A P-type charge generation layer 7 is formed on the side of the auxiliary electrode layer 6 away from the N-type charge generation layer 5.

[0192] S610. A second light-emitting layer 42 is formed on the side of the P-type charge generating layer 7 away from the substrate 1. The orthogonal projection of the second light-emitting layer 42 on the substrate 1 partially overlaps with the orthogonal projection of the first light-emitting layer 41 on the substrate 1.

[0193] S611. A second electrode layer 10 is formed on the side of the second light-emitting layer 42 away from the substrate 1.

[0194] In some examples, the method of fabricating the display substrate may also include forming a hole transport layer located between the first electrode layer 3 and the first light-emitting layer 41.

[0195] In some examples, the method of fabricating the display substrate may also include forming an electron transport layer located between the second light-emitting layer 42 and the second electrode layer 10.

[0196] In some examples, the method of fabricating the display substrate may also include forming a cover layer located on the side of the second electrode layer 10 opposite to the substrate 1.

[0197] In some examples, the method of fabricating the display substrate may also include forming an encapsulation layer located on the side of the cover layer opposite to the substrate 1.

[0198] In some examples, the thickness of the auxiliary electrode layer 6 is no more than 10 nanometers. Since its thickness is adjustable over a wide range and the material of the auxiliary electrode layer 6 is transparent, the auxiliary electrode layer 6 has little impact on the light emission of the display substrate.

[0199] In some examples, the material of the auxiliary electrode layer 6 includes any one of indium tin oxide, zinc oxide, aluminum-doped zinc oxide, gold, polyaniline, polypyrrole, and polythiophene derivatives.

[0200] In some examples, the work function of the auxiliary electrode layer 6 material is controlled between -4 eV and -6 eV to achieve better hole and electron injection. Taking indium tin oxide (ITO) as an example, the work function of the auxiliary electrode layer 6 material can be adjusted by adjusting the ratio of indium trioxide (ITO) to tin oxide (TITO) in the ITO, or by adjusting the plasma treatment time. Alternatively, a thin second interlayer insulating layer, such as silicon dioxide, carbon fiber, or lithium fluoride, can be deposited on the conductive layer (ITO) with a thickness controlled between 0.2 nm and 2 nm to improve hole injection efficiency and reduce the driving voltage.

[0201] In some examples, the energy level of the auxiliary electrode layer 6 is greater than the lowest unoccupied molecular orbital (LUMO) energy level of the N-type charge generation layer 5, and less than the highest occupied molecular orbital (HOMO) energy level of the P-type charge generation layer 7.

[0202] A seventh example, this disclosure provides yet another display substrate, such as... Figure 9As shown, the display substrate includes a substrate 1 and a plurality of organic light-emitting diodes (OLEDs) 2 and a pixel defining layer 8 disposed on the substrate 1. Each OLED 2 includes a first electrode layer 3, a second electrode layer 10, at least two light-emitting layers 4, an N-type charge-generating layer 5, a P-type charge-generating layer 7, and an auxiliary electrode layer 6. The first electrode layer 3 and the second electrode layer 10 are sequentially disposed on the substrate 1. The pixel defining layer 8 includes receiving portions 81 corresponding to each OLED 2, a plurality of pixel barriers 82, and a first through-slot. The light-emitting layers are stacked between the first electrode layer 3 and the second electrode layer 10. An N-type charge-generating layer 5 and a P-type charge-generating layer 7 are stacked between any two adjacent light-emitting layers 4, and both the N-type charge-generating layer 5 and the P-type charge-generating layer 7 are integral structures. The auxiliary electrode layer 6, located within the first through-slot, is situated between the N-type charge-generating layer 5 and the P-type charge-generating layer 7. By directly contacting the N-type charge generation layer 5, the auxiliary electrode layer 6 significantly reduces the sheet resistance of the ytterbium-doped N-type charge generation layer 5, thereby greatly reducing the voltage drop across the stacked device, lowering its operating voltage, and consequently reducing power consumption and improving image uniformity. Secondly, by directly contacting the auxiliary electrode layer 6 with the P-type charge generation layer 7, the hole injection efficiency and device stability of the P-type charge generation layer 7 are greatly improved, further enhancing the luminous efficiency of the stacked device. In the housing portion 81, the direct contact between the N-type charge generation layer 5 and the P-type charge generation layer 7 prevents the auxiliary electrode layer 6 from affecting the generation of holes and electrons in the stacked device, thus preventing any impact on device performance. Furthermore, it avoids thermal impact on the underlying organic film layer during the fabrication of the auxiliary electrode layer 6.

[0203] It should be noted that the display substrate in this embodiment may further include a hole transport layer, an electron transport layer, a capping layer, and an encapsulation layer. The light-emitting layer includes at least a first light-emitting layer 41 and a second light-emitting layer 42, with the hole transport layer located between the first electrode layer 3 and the first light-emitting layer 41. The electron transport layer is located between the second light-emitting layer 42 and the second electrode layer 10. The capping layer is located on the side of the second electrode layer 10 facing away from the substrate 1. The encapsulation layer is located on the side of the capping layer facing away from the substrate 1. The capping layer and encapsulation layer protect the display substrate from water and oxygen corrosion, preventing harmful gases such as water and oxygen from penetrating into the display substrate and causing device damage.

[0204] This disclosure also provides a method for fabricating a display substrate, which can be used to fabricate the aforementioned display substrate. The method may include:

[0205] S71. Take a substrate 1.

[0206] S72. A first electrode layer 3 is formed on a substrate 1. The first electrode layer 3 includes a plurality of first electrodes, and there is a gap between adjacent first electrodes.

[0207] S73. A pixel limiting layer 8 is formed at the gap of the first electrode layer 3. The pixel limiting layer 8 includes a plurality of pixel barriers 82 and a receiving portion 81 corresponding to the organic light-emitting diode 2. A first through groove is formed in the middle of each pixel barrier 82. The pixel limiting layer 8 covers the edge of the first electrode. The orthographic projection of the pixel limiting layer 8 on the substrate 1 overlaps with the orthographic projection of the first electrode layer 3 on the substrate 1.

[0208] S74. A first light-emitting layer 41 is formed on the side of the first electrode layer 3 away from the substrate 1.

[0209] S75, An N-type charge generation layer 5 is formed on the side of the pixel barrier 82 of the pixel limiting layer 8 away from the substrate 1.

[0210] S76. An auxiliary electrode layer 6 is formed on the side of the N-type charge generation layer 5 at the first through slot that is away from the substrate 1. The orthogonal projection of the auxiliary electrode layer 6 on the substrate 1 does not overlap with the orthogonal projection of the first electrode layer 3 on the substrate 1.

[0211] Optionally, step S76 may specifically include:

[0212] An auxiliary electrode layer 6 is formed on the side of the N-type charge generation layer 5 at the first through-hole that is away from the substrate 1 by means of physical vapor deposition (PVD), chemical vapor deposition (CVD), or sputtering.

[0213] S77. A P-type charge generation layer 7 is formed on the side of the auxiliary electrode layer 6 away from the substrate 1.

[0214] S78. A second light-emitting layer 42 is formed on the side of the P-type charge generating layer 7 away from the substrate 1. The orthogonal projection of the second light-emitting layer 42 on the substrate 1 partially overlaps with the orthogonal projection of the first light-emitting layer 41 on the substrate 1.

[0215] S79. A second electrode layer 10 is formed on the side of the second light-emitting layer 42 away from the substrate 1.

[0216] In some examples, the method of fabricating the display substrate may also include forming a hole transport layer located between the first electrode layer 3 and the first light-emitting layer 41.

[0217] In some examples, the method of fabricating the display substrate may also include forming an electron transport layer located between the second light-emitting layer 42 and the second electrode layer 10.

[0218] In some examples, the method of fabricating the display substrate may also include forming a cover layer located on the side of the second electrode layer 10 opposite to the substrate 1.

[0219] In some examples, the method of fabricating the display substrate may also include forming an encapsulation layer located on the side of the cover layer opposite to the substrate 1.

[0220] In some examples, the thickness of the auxiliary electrode layer 6 is no more than 10 nanometers. Since its thickness is adjustable over a wide range and the material of the auxiliary electrode layer 6 is transparent, the auxiliary electrode layer 6 has little impact on the light emission of the display substrate.

[0221] In some examples, the material of the auxiliary electrode layer 6 includes any one of indium tin oxide, zinc oxide, aluminum-doped zinc oxide, gold, polyaniline, polypyrrole, and polythiophene derivatives.

[0222] In some examples, the work function of the auxiliary electrode layer 6 material is controlled between -4 eV and -6 eV to achieve better hole and electron injection. Taking indium tin oxide (ITO) as an example, the work function of the auxiliary electrode layer 6 material can be adjusted by adjusting the ratio of indium trioxide (ITO) to tin oxide (TITO) in the ITO, or by adjusting the plasma treatment time. Alternatively, a thin second interlayer insulating layer, such as silicon dioxide, carbon fiber, or lithium fluoride, can be deposited on the conductive layer (ITO) with a thickness controlled between 0.2 nm and 2 nm to improve hole injection efficiency and reduce the driving voltage.

[0223] In some examples, the energy level of the auxiliary electrode layer 6 is greater than the lowest unoccupied molecular orbital (LUMO) energy level of the N-type charge generation layer 5, and less than the highest occupied molecular orbital (HOMO) energy level of the P-type charge generation layer 7.

[0224] Secondly, embodiments of this disclosure also provide a display device, which includes the display substrate of any of the above embodiments. This display device can be, for example, any product with display functionality such as a mobile phone, tablet computer, television, monitor, laptop computer, digital photo frame, or in-vehicle device. Other essential components of this display device are readily understood by those skilled in the art and will not be described in detail here, nor should they be construed as limiting this disclosure.

[0225] It is understood that the above embodiments are merely exemplary embodiments used to illustrate the principles of this disclosure, and this disclosure is not limited thereto. For those skilled in the art, various modifications and improvements can be made without departing from the spirit and substance of this disclosure, and these modifications and improvements are also considered to be within the scope of protection of this disclosure.

Claims

1. A display substrate, comprising a substrate and a plurality of organic light-emitting diodes disposed on the substrate; wherein, The organic light-emitting diode includes: A first electrode layer and a second electrode layer are sequentially disposed on the substrate. At least two light-emitting layers are stacked between the first electrode layer and the second electrode layer; An N-type charge generation layer and a P-type charge generation layer are provided, and an N-type charge generation layer and a P-type charge generation layer are stacked between any two adjacent light-emitting layers. The N-type charge generation layer is doped with ytterbium. The display substrate further includes an auxiliary electrode layer, at least one of the N-type charge generation layer and the P-type charge generation layer is in direct contact with the auxiliary electrode layer, and the orthogonal projection of the auxiliary electrode layer on the substrate covers the orthogonal projection of the auxiliary electrode layer on the substrate. The display substrate further includes a pixel defining layer; the pixel defining layer includes receiving portions corresponding to the organic light-emitting diodes; the orthographic projection of the auxiliary electrode layer on the substrate does not overlap with the orthographic projection of the receiving portions on the substrate.

2. The display substrate according to claim 1, wherein, In each of the organic light-emitting diodes, the N-type charge generation layer disposed on the same layer is an integral structure, and the P-type charge generation layer disposed on the same layer is an integral structure; the auxiliary electrode layer is located between the adjacent N-type charge generation layer and the P-type charge generation layer.

3. The display substrate according to claim 1, wherein, The auxiliary electrode layer includes a plurality of first sub-electrodes, and any adjacent row of organic light-emitting diodes has a first gap in its orthogonal projection on the substrate, and the orthogonal projection of one first sub-electrode on the substrate is located within one of the first gaps; And / or, The auxiliary electrode layer includes a plurality of second sub-electrodes, and any adjacent column of organic light-emitting diodes has a second gap in its orthogonal projection on the substrate, and the orthogonal projection of one second sub-electrode on the substrate is located within one of the second gaps.

4. The display substrate according to claim 1, wherein, The auxiliary electrode layer includes a plurality of first sub-electrodes; the orthographic projections of the organic light-emitting diodes arranged arbitrarily adjacently in the row direction on the substrate have a third gap; the orthographic projection of one of the first sub-electrodes on the substrate is located within one of the third gaps; Each of the first sub-electrodes includes multiple electrode blocks, which are alternately arranged with the organic light-emitting diode.

5. The display substrate according to claim 1, wherein, The auxiliary electrode layer includes a plurality of second sub-electrodes; the orthogonal projections of the organic light-emitting diodes arranged arbitrarily adjacently in the column direction on the substrate have a fourth gap; the orthogonal projection of one of the second sub-electrodes on the substrate is located within one of the fourth gaps; Each second sub-electrode includes multiple electrode blocks, which are alternately arranged with the organic light-emitting diode.

6. The display substrate according to claim 1, wherein, The auxiliary electrode layer includes a plurality of first sub-electrodes, and the orthogonal projections of any adjacent row or column of the organic light-emitting diodes on the substrate have a fifth gap, and the orthogonal projection of one of the first sub-electrodes on the substrate is located within one of the fifth gaps; Each of the first sub-electrodes includes multiple electrode blocks, which are alternately arranged with the organic light-emitting diodes.

7. The display substrate according to claim 1, wherein, The auxiliary electrode layer is located between the N-type charge generation layer and the pixel definition layer.

8. The display substrate according to claim 1, wherein, The auxiliary electrode layer is disposed in the same layer as the first electrode layer, and the N-type charge generation layer contacts the auxiliary electrode layer through a first through-slot penetrating the pixel defining layer.

9. The display substrate according to claim 1, wherein, A first interlayer insulating layer is provided on the side of the first electrode layer near the substrate. The first interlayer insulating layer includes a plurality of first openings. Each organic light-emitting diode and the orthographic projection of an adjacent organic light-emitting diode on the substrate have at least one orthographic projection of the first opening on the substrate. The display substrate further includes a pixel defining layer. The pixel defining layer includes receiving portions corresponding to each organic light-emitting diode and a first through-slot. The first through-slot is provided corresponding to each of the first openings, and the corresponding first openings and the first through-slots communicate to form an isolation portion. The auxiliary electrode layer is located between the pixel defining layer and the N-type charge generation layer, and the N-type charge generation layer, the P-type charge generation layer, the second electrode layer and the auxiliary electrode layer are disconnected at the location of the isolation portion.

10. The display substrate according to claim 1, wherein, A first interlayer insulating layer is provided on the side of the first electrode layer near the substrate. The first interlayer insulating layer includes a plurality of first openings. Each organic light-emitting diode and the orthographic projection of the adjacent organic light-emitting diode on the substrate have at least one orthographic projection of the first opening on the substrate. The display substrate also includes a pixel defining layer. The pixel defining layer includes receiving portions corresponding to the organic light-emitting diodes and first through slots. The first through slots are provided corresponding to the first openings, and the corresponding first openings and the first through slots are connected to form an isolation portion. The auxiliary electrode layer is located between the N-type charge generation layer and the P-type charge generation layer, and the N-type charge generation layer, the P-type charge generation layer, the second electrode layer and the auxiliary electrode layer are disconnected at the location of the isolation portion.

11. The display substrate according to any one of claims 1-10, wherein, The thickness of the auxiliary electrode layer is no more than 10 nanometers.

12. The display substrate according to any one of claims 1-10, wherein, The energy level of the auxiliary electrode layer is greater than the lowest unoccupied molecular orbital (LUMO) energy level of the N-type charge generation layer, and the energy level of the auxiliary electrode layer is less than the highest occupied molecular orbital (HOMO) energy level of the P-type charge generation layer.

13. The display substrate according to any one of claims 1-10, wherein, The work function of the auxiliary electrode layer is between -4eV and -6eV.

14. The display substrate according to any one of claims 1-10, wherein, The auxiliary electrode layer is made of any one of indium tin oxide, zinc oxide, aluminum-doped zinc oxide, gold, polyaniline, polypyrrole, or polythiophene derivatives.

15. The display substrate according to any one of claims 1-10, wherein, The auxiliary electrode layer includes a conductive layer and a second interlayer insulating layer sequentially disposed along the direction away from the substrate.

16. The display substrate according to claim 15, wherein, The second interlayer insulation layer includes any one of silicon dioxide, carbon fiber, and lithium fluoride.

17. A display device, characterized in that, Includes the display substrate according to any one of claims 1 to 16.

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