Pixel circuit, driving method and display device

Abstract

A pixel circuit, a driving method and a display device. The pixel circuit comprises a light emitting element (E0), a driving circuit (11), an energy storage circuit (12), an initialization circuit and a compensation control circuit (14); a display period of the pixel circuit comprises a refresh frame and a holding frame; the refresh frame and the holding frame each comprise a reset stage and a light emitting stage arranged in sequence; the initialization circuit controls the provision of an initial voltage to a first end of the driving circuit (11) and / or a second end of the driving circuit (11) at least in the reset stage in the refresh frame and the holding frame under the control of an initial control signal.

Description

Pixel circuits, driving methods, and display devices Technical Field

[0001] This disclosure relates to the field of display technology, and more particularly to a pixel circuit, driving method, and display device. Background Technology

[0002] In recent years, with the advancement of smart display technology, organic light-emitting diode (OLED) displays have become one of the hottest topics in the field of display research. With the thinning of display panels, the narrowing of bezels, and the development of low-frequency display technology, the optimization design of display panels has become increasingly challenging.

[0003] In related technologies, the threshold voltage drift of the driving transistors in the pixel circuit is severe, which is not conducive to improving hysteresis and affects the display effect. Summary of the Invention

[0004] In one aspect, embodiments of this disclosure provide a pixel circuit, including a light-emitting element, a driving circuit, an energy storage circuit, an initialization circuit, and a compensation control circuit; the display cycle of the pixel circuit includes a refresh frame and a hold frame; the refresh frame and the hold frame respectively include a reset phase and a light-emitting phase set sequentially.

[0005] The energy storage circuit is electrically connected to the control terminal of the drive circuit and is used to store electrical energy.

[0006] The compensation control circuit is electrically connected to the compensation control terminal, the control terminal of the drive circuit, and the second terminal of the drive circuit, respectively, and is used to control the connection between the control terminal of the drive circuit and the second terminal of the drive circuit under the control of the compensation control signal provided by the compensation control terminal;

[0007] The initialization circuit is electrically connected to the initial control terminal and the initial voltage terminal respectively, and the initialization circuit is electrically connected to the first terminal and / or the second terminal of the driving circuit respectively. Under the control of the initial control signal provided by the initial control terminal, in the refresh frame and the hold frame, at least in the reset phase, the initial voltage provided by the initial voltage terminal is provided to the first terminal and / or the second terminal of the driving circuit.

[0008] The second terminal of the driving circuit is electrically connected to the light-emitting element, and is used to drive the light-emitting element under the control of the potential of the control terminal of the driving circuit.

[0009] Optionally, the driving circuit includes a p-type transistor as the driving transistor, and the initial voltage is a positive voltage.

[0010] Optionally, the initialization circuit includes a first initialization sub-circuit; the initial control terminal includes a first initial control terminal, and the initial voltage terminal includes a first initial voltage terminal;

[0011] The first initialization sub-circuit is electrically connected to the first initial control terminal, the first initial voltage terminal, and the second terminal of the driving circuit, respectively, and is used to write the first initial voltage provided by the first initial voltage terminal to the second terminal of the driving circuit under the control of the first initial control signal provided by the first initial control terminal, during the refresh frame and the hold frame, at least during the reset phase.

[0012] Optionally, the initialization circuit includes a second initialization sub-circuit; the initial control terminal includes a second initial control terminal, and the initial voltage terminal includes a second initial voltage terminal;

[0013] The second initialization sub-circuit is electrically connected to the second initial control terminal, the second initial voltage terminal, and the first terminal of the driving circuit, respectively, and is used to write the second initial voltage provided by the second initial voltage terminal into the first terminal of the driving circuit under the control of the second initial control signal provided by the second initial control terminal, in the refresh frame and the hold frame, at least in the reset phase.

[0014] Optionally, the initialization circuit includes a first initialization sub-circuit and a second initialization sub-circuit; the initial control terminal includes a first initial control terminal and a second initial control terminal; and the initial voltage terminal includes a first initial voltage terminal and a second initial voltage terminal.

[0015] The first initialization sub-circuit is electrically connected to the first initial control terminal, the first initial voltage terminal, and the second terminal of the driving circuit, respectively, and is used to write the first initial voltage provided by the first initial voltage terminal into the second terminal of the driving circuit under the control of the first initial control signal provided by the first initial control terminal, in the refresh frame and the hold frame, at least in the reset phase.

[0016] The second initialization sub-circuit is electrically connected to the second initial control terminal, the second initial voltage terminal, and the first terminal of the driving circuit, respectively, and is used to write the second initial voltage provided by the second initial voltage terminal into the first terminal of the driving circuit under the control of the second initial control signal provided by the second initial control terminal, in the refresh frame and the hold frame, at least in the reset phase.

[0017] Optionally, the first initialization sub-circuit includes a first transistor;

[0018] The control electrode of the first transistor is electrically connected to the first initial control terminal, the first electrode of the first transistor is electrically connected to the first initial voltage terminal, and the second electrode of the first transistor is electrically connected to the second terminal of the driving circuit.

[0019] Optionally, the second initialization sub-circuit includes a second transistor;

[0020] The control electrode of the second transistor is electrically connected to the second initial control terminal, the first electrode of the second transistor is electrically connected to the second initial voltage terminal, and the second electrode of the second transistor is electrically connected to the first terminal of the driving circuit.

[0021] Optionally, the first initialization sub-circuit includes a first transistor, and the second initialization sub-circuit includes a second transistor;

[0022] The control electrode of the first transistor is electrically connected to the first initial control terminal, the first electrode of the first transistor is electrically connected to the first initial voltage terminal, and the second electrode of the first transistor is electrically connected to the second terminal of the driving circuit.

[0023] The control electrode of the second transistor is electrically connected to the second initial control terminal, the first electrode of the second transistor is electrically connected to the second initial voltage terminal, and the second electrode of the second transistor is electrically connected to the first terminal of the driving circuit.

[0024] Optionally, the pixel circuit described in at least one embodiment of this disclosure further includes a first light-emitting control circuit, a second light-emitting control circuit, and a data writing circuit;

[0025] The first light-emitting control circuit is electrically connected to the first light-emitting control terminal, the power supply voltage terminal, and the first terminal of the driving circuit, respectively, and is used to control the connection between the power supply voltage terminal and the first terminal of the driving circuit under the control of the first light-emitting control signal provided by the first light-emitting control terminal.

[0026] The second light-emitting control circuit is electrically connected to the second light-emitting control terminal, the second terminal of the driving circuit, and the first electrode of the light-emitting element, respectively, and is used to control the connection between the second terminal of the driving circuit and the first electrode of the light-emitting element under the control of the second light-emitting control signal provided by the second light-emitting control terminal; the second electrode of the light-emitting element is electrically connected to the first voltage terminal.

[0027] The data writing circuit is electrically connected to the write control terminal, the data line, and the first terminal of the drive circuit, respectively, and is used to control the connection between the data line and the first terminal of the drive circuit under the control of the write control signal provided by the write control terminal.

[0028] Optionally, the pixel circuit described in at least one embodiment of this disclosure further includes a reset circuit;

[0029] The reset circuit is electrically connected to the reset control terminal, the reset voltage terminal, and the first electrode of the light-emitting element, respectively, and is used to control the reset voltage provided by the reset voltage terminal to be written into the first electrode of the light-emitting element under the control of the reset control signal provided by the reset control terminal.

[0030] Optionally, the compensation control circuit includes a third transistor, the first light-emitting control circuit includes a fourth transistor, the second light-emitting control circuit includes a fifth transistor, the data writing circuit includes a sixth transistor, and the driving circuit includes a driving transistor.

[0031] The control electrode of the third transistor is electrically connected to the compensation control terminal, the first electrode of the third transistor is electrically connected to the control terminal of the driving circuit, and the second electrode of the third transistor is electrically connected to the second terminal of the driving circuit.

[0032] The control electrode of the fourth transistor is electrically connected to the first light-emitting control terminal, the first electrode of the fourth transistor is electrically connected to the power supply voltage terminal, and the second electrode of the fourth transistor is electrically connected to the first terminal of the driving circuit.

[0033] The control electrode of the fifth transistor is electrically connected to the second light-emitting control terminal, the first electrode of the fifth transistor is electrically connected to the second terminal of the driving circuit, and the second electrode of the fifth transistor is electrically connected to the first electrode of the light-emitting element.

[0034] The control electrode of the sixth transistor is electrically connected to the write control terminal, the first electrode of the sixth transistor is electrically connected to the data line, and the second electrode of the sixth transistor is electrically connected to the first terminal of the drive circuit.

[0035] The control electrode of the driving transistor is electrically connected to the control terminal of the driving circuit, the first electrode of the driving transistor is electrically connected to the first terminal of the driving circuit, and the second electrode of the driving transistor is electrically connected to the second terminal of the driving circuit.

[0036] Optionally, the third transistor is an oxide thin-film transistor.

[0037] Optionally, the reset circuit includes a seventh transistor;

[0038] The control electrode of the seventh transistor is electrically connected to the reset control terminal, the first electrode of the seventh transistor is electrically connected to the reset voltage terminal, and the second electrode of the seventh transistor is electrically connected to the first electrode of the light-emitting element.

[0039] Optionally, the seventh transistor is an oxide thin-film transistor.

[0040] In a second aspect, embodiments of this disclosure provide a driving method applied to the aforementioned pixel circuit, wherein the display cycle of the pixel circuit includes a refresh frame and a hold frame; the refresh frame and the hold frame respectively include a reset phase and a light-emitting phase set sequentially; the driving method includes:

[0041] During the refresh frame and the hold frame, at least during the reset phase, the initialization circuit, under the control of the initial control signal provided by the initial control terminal, controls the initial voltage provided by the initial voltage terminal to be supplied to the first terminal and / or the second terminal of the drive circuit.

[0042] Optionally, the initialization circuit includes a first initialization sub-circuit; the pixel circuit further includes a first light-emitting control circuit, a second light-emitting control circuit, a data writing circuit, and a reset circuit; the refresh frame includes a first initialization stage, a first reset stage, a first charging stage, a first reset stage, and a first light-emitting stage set sequentially; the driving method includes:

[0043] During the first initialization phase, the first initialization sub-circuit, under the control of the first initial control signal, writes the first initial voltage provided by the first initial voltage terminal into the second terminal of the drive circuit; under the control of the compensation control signal, the compensation control circuit controls the connection between the control terminal of the drive circuit and the second terminal of the drive circuit.

[0044] During the first reset phase, the reset circuit, under the control of the reset control signal, writes the reset voltage provided by the reset voltage terminal into the first electrode of the light-emitting element. Under the control of the second light-emitting control signal, the second light-emitting control circuit controls the second terminal of the driving circuit to connect with the first electrode of the light-emitting element. Under the control of the compensation control signal, the compensation control circuit controls the control terminal of the driving circuit to connect with the second terminal of the driving circuit.

[0045] During the first charging phase, the data writing circuit writes the data voltage provided by the data line into the first terminal of the driving circuit, and the compensation control circuit controls the connection between the control terminal of the driving circuit and the second terminal of the driving circuit under the control of the compensation control signal.

[0046] During the first reset phase, the first initialization sub-circuit, under the control of the first initial control signal, writes the first initial voltage provided by the first initial voltage terminal into the second terminal of the driving circuit; the driving circuit, under the control of the potential of its control terminal, controls the connection between the first terminal of the driving circuit and the second terminal of the driving circuit.

[0047] In the first light-emitting stage, the first light-emitting control circuit, under the control of the first light-emitting control signal, controls the connection between the power supply voltage terminal and the first terminal of the driving circuit; the second light-emitting control circuit, under the control of the second light-emitting control signal, controls the connection between the second terminal of the driving circuit and the first electrode of the light-emitting element; the driving circuit, under the control of the potential of its control terminal, drives the light-emitting element to emit light.

[0048] Optionally, the initialization circuit includes a first initialization sub-circuit; the pixel circuit further includes a first light emission control circuit, a second light emission control circuit, a data writing circuit, and a reset circuit; the holding frame includes a second initialization stage, a second reset stage, a second reset stage, and a second light emission stage set sequentially; the driving method includes:

[0049] During the holding frame, under the control of the compensation control signal, the compensation control circuit controls the control terminal of the drive circuit to disconnect from the second terminal of the drive circuit;

[0050] In the second initialization phase, the first initialization sub-circuit, under the control of the first initial control signal, writes the first initial voltage provided by the first initial voltage terminal into the second terminal of the driving circuit;

[0051] In the second reset phase, under the control of the reset control signal, the reset circuit writes the reset voltage provided by the reset voltage terminal into the first electrode of the light-emitting element, and under the control of the second light-emitting control signal, the second light-emitting control circuit controls the second terminal of the driving circuit to connect with the first electrode of the light-emitting element.

[0052] During the second reset phase, the first initialization sub-circuit, under the control of the first initial control signal, writes the first initial voltage provided by the first initial voltage terminal into the second terminal of the driving circuit; the driving circuit, under the control of the potential of its control terminal, controls the connection between the first terminal of the driving circuit and the second terminal of the driving circuit.

[0053] In the second light-emitting stage, the first light-emitting control circuit, under the control of the first light-emitting control signal, controls the connection between the power supply voltage terminal and the first terminal of the driving circuit; the second light-emitting control circuit, under the control of the second light-emitting control signal, controls the connection between the second terminal of the driving circuit and the first electrode of the light-emitting element; the driving circuit, under the control of the potential of its control terminal, drives the light-emitting element to emit light.

[0054] The holding frame further includes a holding set phase between the second reset phase and the second reset phase; the driving method further includes:

[0055] During the hold-set phase, the data writing circuit writes the voltage signal provided by the data line to the first terminal of the drive circuit.

[0056] Optionally, the initialization circuit includes a second initialization sub-circuit; the pixel circuit further includes a first light-emitting control circuit, a second light-emitting control circuit, a data writing circuit, and a reset circuit; the refresh frame includes a first initialization stage, a first reset stage, a first charging stage, a first reset stage, and a first light-emitting stage set sequentially; the driving method includes:

[0057] During the first initialization phase, the second initialization sub-circuit, under the control of the second initial control signal, writes the second initial voltage provided by the second initial voltage terminal into the first terminal of the drive circuit; the compensation control circuit, under the control of the compensation control signal, controls the connection between the control terminal of the drive circuit and the second terminal of the drive circuit.

[0058] During the first reset phase, the reset circuit, under the control of the reset control signal, writes the reset voltage provided by the reset voltage terminal into the first electrode of the light-emitting element; the second light-emitting control circuit, under the control of the second light-emitting control signal, controls the second terminal of the driving circuit to connect with the first electrode of the light-emitting element; the compensation control circuit, under the control of the compensation control signal, controls the control terminal of the driving circuit to connect with the second terminal of the driving circuit.

[0059] During the first charging phase, the data writing circuit writes the data voltage provided by the data line into the first terminal of the driving circuit, and the compensation control circuit controls the connection between the control terminal of the driving circuit and the second terminal of the driving circuit under the control of the compensation control signal.

[0060] During the first reset phase, the second initialization sub-circuit, under the control of the second initial control signal, writes the second initial voltage provided by the second initial voltage terminal into the first terminal of the drive circuit; the drive circuit, under the control of the potential of its control terminal, controls the connection between the first terminal and the second terminal of the drive circuit.

[0061] In the first light-emitting stage, the first light-emitting control circuit, under the control of the first light-emitting control signal, controls the connection between the power supply voltage terminal and the first terminal of the driving circuit; the second light-emitting control circuit, under the control of the second light-emitting control signal, controls the connection between the second terminal of the driving circuit and the first electrode of the light-emitting element; the driving circuit, under the control of the potential of its control terminal, drives the light-emitting element to emit light.

[0062] Optionally, the initialization circuit includes a second initialization sub-circuit; the pixel circuit further includes a first light-emitting control circuit, a second light-emitting control circuit, a data writing circuit, and a reset circuit; the holding frame includes a second initialization stage, a second reset stage, a second reset stage, and a second light-emitting stage set sequentially; the driving method includes:

[0063] During the holding frame, under the control of the compensation control signal, the compensation control circuit controls the control terminal of the drive circuit to disconnect from the second terminal of the drive circuit;

[0064] During the second initialization phase, the second initialization sub-circuit, under the control of the second initial control signal, writes the second initial voltage provided by the second initial voltage terminal into the first terminal of the drive circuit.

[0065] During the second reset phase, the reset circuit, under the control of the reset control signal, writes the reset voltage provided by the reset voltage terminal into the first electrode of the light-emitting element; the second light-emitting control circuit, under the control of the second light-emitting control signal, controls the second terminal of the driving circuit to connect with the first electrode of the light-emitting element.

[0066] During the second reset phase, the second initialization sub-circuit, under the control of the second initial control signal, writes the second initial voltage provided by the second initial voltage terminal into the first terminal of the drive circuit; the drive circuit, under the control of the potential of its control terminal, controls the connection between the first terminal and the second terminal of the drive circuit.

[0067] In the second light-emitting stage, the first light-emitting control circuit, under the control of the first light-emitting control signal, controls the connection between the power supply voltage terminal and the first terminal of the driving circuit; the second light-emitting control circuit, under the control of the second light-emitting control signal, controls the connection between the second terminal of the driving circuit and the first electrode of the light-emitting element; the driving circuit, under the control of the potential of its control terminal, drives the light-emitting element to emit light.

[0068] The holding frame further includes a holding set phase between the second reset phase and the second reset phase; the driving method further includes:

[0069] During the hold-set phase, the data writing circuit writes the voltage signal provided by the data line to the first terminal of the drive circuit.

[0070] Optionally, the initialization circuit includes a first initialization sub-circuit and a second initialization sub-circuit; the pixel circuit further includes a first light-emitting control circuit, a second light-emitting control circuit, and a data writing circuit; the refresh frame includes a first reset stage, a first charging stage, a first reset stage, and a first light-emitting stage set sequentially; the driving method includes:

[0071] During the first reset phase, the first initialization sub-circuit, under the control of the first initial control signal, writes the first initial voltage provided by the first initial voltage terminal into the second terminal of the driving circuit. Under the control of the compensation control signal, the compensation control circuit controls the connection between the control terminal of the driving circuit and the second terminal of the driving circuit.

[0072] During the first charging phase, the data writing circuit writes the data voltage provided by the data line into the first terminal of the driving circuit, and the compensation control circuit controls the connection between the control terminal of the driving circuit and the second terminal of the driving circuit under the control of the compensation control signal.

[0073] During the first reset phase, the second initialization sub-circuit, under the control of the second initial control signal, writes the second initial voltage provided by the second initial voltage terminal into the first terminal of the driving circuit. Under the control of the potential of its control terminal, the driving circuit controls the connection between the first terminal and the second terminal of the driving circuit.

[0074] In the first light-emitting stage, the first light-emitting control circuit, under the control of the first light-emitting control signal, controls the connection between the power supply voltage terminal and the first terminal of the driving circuit; the second light-emitting control circuit, under the control of the second light-emitting control signal, controls the connection between the second terminal of the driving circuit and the first electrode of the light-emitting element; the driving circuit, under the control of the potential of its control terminal, drives the light-emitting element to emit light.

[0075] Optionally, the pixel circuit further includes a reset circuit; the driving method further includes:

[0076] During the first reset phase, the reset circuit, under the control of the reset control signal, writes the reset voltage provided by the reset voltage terminal into the first electrode of the light-emitting element.

[0077] Optionally, the initialization circuit includes a first initialization sub-circuit and a second initialization sub-circuit; the pixel circuit further includes a first light emission control circuit, a second light emission control circuit, and a data writing circuit; the holding frame includes a second reset phase, a second reset phase, and a second light emission phase set sequentially; the driving method includes:

[0078] During the holding frame, under the control of the compensation control signal, the compensation control circuit controls the control terminal of the drive circuit to disconnect from the second terminal of the drive circuit;

[0079] During the second reset phase, the first initialization sub-circuit, under the control of the first initial control signal, writes the first initial voltage provided by the first initial voltage terminal into the second terminal of the driving circuit;

[0080] During the second reset phase, the second initialization sub-circuit, under the control of the second initial control signal, writes the second initial voltage provided by the second initial voltage terminal into the first terminal of the driving circuit. Under the control of the potential of its control terminal, the driving circuit controls the connection between the first terminal and the second terminal of the driving circuit.

[0081] In the second light-emitting stage, the first light-emitting control circuit, under the control of the first light-emitting control signal, controls the connection between the power supply voltage terminal and the first terminal of the driving circuit; the second light-emitting control circuit, under the control of the second light-emitting control signal, controls the connection between the second terminal of the driving circuit and the first electrode of the light-emitting element; the driving circuit, under the control of the potential of its control terminal, drives the light-emitting element to emit light.

[0082] Optionally, the pixel circuit further includes a reset circuit; the driving method further includes:

[0083] During the second reset phase, the reset circuit, under the control of the reset control signal, writes the reset voltage provided by the reset voltage terminal into the first electrode of the light-emitting element.

[0084] Optionally, the holding frame further includes a holding set phase disposed between the second reset phase and the second reset phase; the driving method further includes:

[0085] During the hold-set phase, the data writing circuit writes the voltage signal provided by the data line to the first terminal of the drive circuit.

[0086] In a third aspect, embodiments of this disclosure provide a display device including the pixel circuit described above. Attached Figure Description

[0087] Figure 1 is a structural diagram of a pixel circuit according to at least one embodiment of the present disclosure;

[0088] Figure 2 is a structural diagram of a pixel circuit according to at least one embodiment of the present disclosure;

[0089] Figure 3 is a structural diagram of a pixel circuit according to at least one embodiment of the present disclosure;

[0090] Figure 4 is a structural diagram of a pixel circuit according to at least one embodiment of the present disclosure;

[0091] Figure 5 is a structural diagram of a pixel circuit according to at least one embodiment of the present disclosure;

[0092] Figure 6 is a structural diagram of a pixel circuit according to at least one embodiment of the present disclosure;

[0093] Figure 7 is a structural diagram of a pixel circuit according to at least one embodiment of the present disclosure;

[0094] Figure 8 is a circuit diagram of a pixel circuit according to at least one embodiment of the present disclosure;

[0095] Figure 9 is a timing diagram of at least one embodiment of the pixel circuit shown in Figure 8 of this disclosure;

[0096] Figure 10A is a schematic diagram of the working state of at least one embodiment of the pixel circuit shown in Figure 8 of this disclosure in the first initialization stage S11;

[0097] Figure 10B is a schematic diagram of the working state of at least one embodiment of the pixel circuit shown in Figure 8 of this disclosure in the first reset stage S12.

[0098] Figure 10C is a schematic diagram of the operating state of at least one embodiment of the pixel circuit shown in Figure 8 of this disclosure in the first charging stage S13.

[0099] Figure 10D is a schematic diagram of the working state of at least one embodiment of the pixel circuit shown in Figure 8 of this disclosure in the first reset stage S14.

[0100] Figure 10E is a schematic diagram of the working state of at least one embodiment of the pixel circuit shown in Figure 8 of this disclosure in the first light-emitting stage S15.

[0101] Figure 11 is a timing diagram of at least one embodiment of the pixel circuit shown in Figure 8 of this disclosure;

[0102] Figure 12 is a circuit diagram of a pixel circuit according to at least one embodiment of the present disclosure;

[0103] Figure 13 is a timing diagram of at least one embodiment of the pixel circuit shown in Figure 11 of this disclosure;

[0104] Figure 14A is a schematic diagram of the working state of at least one embodiment of the pixel circuit shown in Figure 12 of this disclosure in the first initialization stage S11;

[0105] Figure 14B is a schematic diagram of the working state of at least one embodiment of the pixel circuit shown in Figure 12 of this disclosure in the first reset stage S12.

[0106] Figure 14C is a schematic diagram of the operating state of at least one embodiment of the pixel circuit shown in Figure 12 of this disclosure in the first charging stage S13.

[0107] Figure 14D is a schematic diagram of the working state of at least one embodiment of the pixel circuit shown in Figure 12 of this disclosure in the first reset stage S14.

[0108] Figure 14E is a schematic diagram of the working state of at least one embodiment of the pixel circuit shown in Figure 12 of this disclosure in the first light-emitting stage S15.

[0109] Figure 15 is a timing diagram of at least one embodiment of the pixel circuit shown in Figure 12 of this disclosure;

[0110] Figure 16 is a timing diagram of at least one embodiment of the pixel circuit shown in Figure 12 of this disclosure;

[0111] Figure 17 is a circuit diagram of a pixel circuit according to at least one embodiment of the present disclosure;

[0112] Figure 18 is a circuit diagram of a pixel circuit according to at least one embodiment of the present disclosure;

[0113] Figure 19 is a timing diagram of at least one embodiment of the pixel circuit shown in Figure 18 of this disclosure;

[0114] Figure 20A is a schematic diagram of the working state of at least one embodiment of the pixel circuit shown in Figure 18 of this disclosure in the first reset stage S12;

[0115] Figure 20B is a schematic diagram of the operating state of at least one embodiment of the pixel circuit shown in Figure 18 of this disclosure in the first charging stage S13.

[0116] Figure 20C is a schematic diagram of the working state of at least one embodiment of the pixel circuit shown in Figure 18 of this disclosure in the first reset stage S14.

[0117] Figure 20D is a schematic diagram of the working state of at least one embodiment of the pixel circuit shown in Figure 18 of this disclosure in the first light-emitting stage S15.

[0118] Figure 21 is a timing diagram of at least one embodiment of the pixel circuit shown in Figure 18 of this disclosure;

[0119] Figure 22 is a timing diagram of at least one embodiment of the pixel circuit shown in Figure 18 of this disclosure. Detailed Implementation

[0120] The technical solutions of the embodiments of this disclosure will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this disclosure, and not all embodiments. Based on the embodiments of this disclosure, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the scope of protection of this disclosure.

[0121] In all embodiments of this disclosure, the transistors used can be bipolar junction transistors (BJTs), thin-film transistors (TFTs), field-effect transistors (FETs), or other devices with similar characteristics. In the embodiments of this disclosure, to distinguish the two terminals of the transistor other than the control terminal, one terminal is referred to as the first terminal and the other as the second terminal.

[0122] In actual operation, when the transistor is a bipolar junction transistor (BJT), the control electrode can be the base, the first electrode can be the collector, and the second electrode can be the emitter; or, the control electrode can be the base, the first electrode can be the emitter, and the second electrode can be the collector.

[0123] In actual operation, when the transistor is a thin-film transistor or a field-effect transistor, the control electrode can be the gate, the first electrode can be the drain, and the second electrode can be the source; or, the control electrode can be the gate, the first electrode can be the source, and the second electrode can be the drain.

[0124] The pixel circuit described in this embodiment includes a light-emitting element, a driving circuit, an energy storage circuit, an initialization circuit, and a compensation control circuit; the display cycle of the pixel circuit includes a refresh frame and a hold frame; the refresh frame and the hold frame respectively include a reset phase and a light-emitting phase set sequentially.

[0125] The energy storage circuit is electrically connected to the control terminal of the drive circuit and is used to store electrical energy.

[0126] The compensation control circuit is electrically connected to the compensation control terminal, the control terminal of the drive circuit, and the second terminal of the drive circuit, respectively, and is used to control the connection between the control terminal of the drive circuit and the second terminal of the drive circuit under the control of the compensation control signal provided by the compensation control terminal;

[0127] The initialization circuit is electrically connected to the initial control terminal and the initial voltage terminal respectively, and the initialization circuit is electrically connected to the first terminal and / or the second terminal of the driving circuit respectively. Under the control of the initial control signal provided by the initial control terminal, in the refresh frame and the hold frame, at least in the reset phase, the initial voltage provided by the initial voltage terminal is provided to the first terminal and / or the second terminal of the driving circuit.

[0128] The second terminal of the driving circuit is electrically connected to the light-emitting element, and is used to drive the light-emitting element under the control of the potential of the control terminal of the driving circuit.

[0129] When the pixel circuit described in this embodiment is working, the initialization circuit, under the control of the initial control signal, at least during the reset phase in the refresh frame and the hold frame, controls the initial voltage provided by the initial voltage terminal to be provided to the first terminal and / or the second terminal of the driving circuit, so as to provide a bias voltage to the driving transistors included in the driving circuit, so that the driving transistors included in the driving circuit are in a biased state, thereby improving the hysteresis phenomenon and enhancing the display effect.

[0130] The pixel circuit described in this embodiment can improve the flicker phenomenon when displaying at low frequencies.

[0131] Since the display cycle includes refresh frames and hold frames when displaying at low frequencies, in the reset phase of the hold frame, the driving transistors included in the driving circuit are biased in this embodiment of the present disclosure, so that the potential of the source and the potential of the drain of the driving transistors in the driving circuit are consistent with the refresh frame in the reset phase of the hold frame, which can improve the flickering phenomenon.

[0132] In at least one embodiment of this disclosure, the driving circuit includes a p-type transistor, and the initial voltage is a positive voltage.

[0133] Optionally, the energy storage circuit may include a storage capacitor;

[0134] The first end of the storage capacitor is electrically connected to the control terminal of the driving circuit, and the second end of the storage capacitor is electrically connected to the power supply voltage terminal.

[0135] In at least one embodiment of this disclosure, the initialization circuit may include a first initialization sub-circuit; the initial control terminal includes a first initial control terminal, and the initial voltage terminal includes a first initial voltage terminal;

[0136] The first initialization sub-circuit is electrically connected to the first initial control terminal, the first initial voltage terminal, and the second terminal of the driving circuit, respectively, and is used to write the first initial voltage provided by the first initial voltage terminal to the second terminal of the driving circuit under the control of the first initial control signal provided by the first initial control terminal, during the refresh frame and the hold frame, at least during the reset phase.

[0137] As shown in Figure 1, the pixel circuit described in at least one embodiment of this disclosure may include a light-emitting element E0, a driving circuit 11, an energy storage circuit 12, an initialization circuit, and a compensation control circuit 14; the display cycle of the pixel circuit includes a refresh frame and a hold frame; the refresh frame and the hold frame respectively include a reset phase and a light-emitting phase set sequentially.

[0138] The energy storage circuit 12 is electrically connected to the control terminal of the drive circuit and is used to store electrical energy.

[0139] The compensation control circuit 14 is electrically connected to the compensation control terminal NG, the control terminal of the drive circuit 11, and the second terminal of the drive circuit 11, respectively, and is used to control the connection between the control terminal of the drive circuit 11 and the second terminal of the drive circuit 11 under the control of the compensation control signal provided by the compensation control terminal NG.

[0140] The initialization circuit includes a first initialization sub-circuit 131; the initial control terminal includes a first initial control terminal S1; and the initial voltage terminal includes a first initial voltage terminal I1.

[0141] The first initialization sub-circuit 131 is electrically connected to the first initial control terminal S1, the first initial voltage terminal I1, and the second terminal of the driving circuit 11, respectively. Under the control of the first initial control signal provided by the first initial control terminal S1, in the refresh frame and the hold frame, at least in the reset phase, the first initial voltage provided by the first initial voltage terminal I1 is written into the second terminal of the driving circuit 11 to control the driving transistors included in the driving circuit 11 to be in a biased state.

[0142] The second terminal of the driving circuit 11 is electrically connected to the light-emitting element E0, and is used to drive the light-emitting element E0 under the control of the potential of the control terminal of the driving circuit 11.

[0143] In at least one embodiment of this disclosure, the initialization circuit includes a second initialization sub-circuit; the initial control terminal includes a second initial control terminal; and the initial voltage terminal includes a second initial voltage terminal.

[0144] The second initialization sub-circuit is electrically connected to the second initial control terminal, the second initial voltage terminal, and the first terminal of the driving circuit, respectively, and is used to write the second initial voltage provided by the second initial voltage terminal into the first terminal of the driving circuit under the control of the second initial control signal provided by the second initial control terminal, in the refresh frame and the hold frame, at least in the reset phase.

[0145] As shown in Figure 2, the pixel circuit described in at least one embodiment of this disclosure may include a light-emitting element E0, a driving circuit 11, an energy storage circuit 12, an initialization circuit, and a compensation control circuit 14; the display cycle of the pixel circuit includes a refresh frame and a hold frame; the refresh frame and the hold frame respectively include a reset phase and a light-emitting phase set sequentially.

[0146] The energy storage circuit 12 is electrically connected to the control terminal of the drive circuit and is used to store electrical energy.

[0147] The compensation control circuit 14 is electrically connected to the compensation control terminal NG, the control terminal of the drive circuit 11, and the second terminal of the drive circuit 11, respectively, and is used to control the connection between the control terminal of the drive circuit 11 and the second terminal of the drive circuit 11 under the control of the compensation control signal provided by the compensation control terminal NG.

[0148] The initialization circuit includes a second initialization sub-circuit 132; the initial control terminal includes a second initial control terminal S2; and the initial voltage terminal includes a second initial voltage terminal I2.

[0149] The second initialization sub-circuit 132 is electrically connected to the second initial control terminal S2, the second initial voltage terminal I2, and the first terminal of the driving circuit 11, respectively. Under the control of the second initial control signal provided by the second initial control terminal S2, in the refresh frame and the holding frame, at least in the reset phase, the second initial voltage provided by the second initial voltage terminal I2 is written into the first terminal of the driving circuit 11 to control the driving transistors included in the driving circuit 11 to be in a biased state.

[0150] The second terminal of the driving circuit 11 is electrically connected to the light-emitting element E0, and is used to drive the light-emitting element E0 under the control of the potential of the control terminal of the driving circuit 11.

[0151] In at least one embodiment of this disclosure, the initialization circuit includes a first initialization sub-circuit and a second initialization sub-circuit; the initial control terminal includes a first initial control terminal and a second initial control terminal; and the initial voltage terminal includes a first initial voltage terminal and a second initial voltage terminal.

[0152] The first initialization sub-circuit is electrically connected to the first initial control terminal, the first initial voltage terminal, and the second terminal of the driving circuit, respectively, and is used to write the first initial voltage provided by the first initial voltage terminal into the second terminal of the driving circuit under the control of the first initial control signal provided by the first initial control terminal, in the refresh frame and the hold frame, at least in the reset phase.

[0153] The second initialization sub-circuit is electrically connected to the second initial control terminal, the second initial voltage terminal, and the first terminal of the driving circuit, respectively, and is used to write the second initial voltage provided by the second initial voltage terminal into the first terminal of the driving circuit under the control of the second initial control signal provided by the second initial control terminal, in the refresh frame and the hold frame, at least in the reset phase.

[0154] As shown in Figure 3, the pixel circuit described in at least one embodiment of this disclosure may include a light-emitting element E0, a driving circuit 11, an energy storage circuit 12, an initialization circuit, and a compensation control circuit 14; the display cycle of the pixel circuit includes a refresh frame and a hold frame; the refresh frame and the hold frame respectively include a reset phase and a light-emitting phase set sequentially.

[0155] The energy storage circuit 12 is electrically connected to the control terminal of the drive circuit and is used to store electrical energy.

[0156] The compensation control circuit 14 is electrically connected to the compensation control terminal NG, the control terminal of the drive circuit 11, and the second terminal of the drive circuit 11, respectively, and is used to control the connection between the control terminal of the drive circuit 11 and the second terminal of the drive circuit 11 under the control of the compensation control signal provided by the compensation control terminal NG.

[0157] The initialization circuit includes a first initialization sub-circuit 131 and a second initialization sub-circuit 132; the initial control terminal includes a first initial control terminal S1 and a second initial control terminal S2; and the initial voltage terminal includes a first initial voltage terminal I1 and a second initial voltage terminal I2.

[0158] The first initialization sub-circuit 131 is electrically connected to the first initial control terminal S1, the first initial voltage terminal I1 and the second terminal of the driving circuit, respectively, and is used to write the first initial voltage provided by the first initial voltage terminal I1 into the second terminal of the driving circuit 11 under the control of the first initial control signal provided by the first initial control terminal S1, in the refresh frame and the holding frame, at least in the reset phase.

[0159] The second initialization sub-circuit is electrically connected to the second initial control terminal S2, the second initial voltage terminal I2 and the first terminal of the driving circuit 11, respectively, and is used to write the second initial voltage provided by the second initial voltage terminal I2 into the first terminal of the driving circuit 11 under the control of the second initial control signal provided by the second initial control terminal S2, in the refresh frame and the holding frame, at least in the reset phase.

[0160] The second terminal of the driving circuit 11 is electrically connected to the light-emitting element E0, and is used to drive the light-emitting element E0 under the control of the potential of the control terminal of the driving circuit 11.

[0161] Optionally, the first initialization sub-circuit includes a first transistor;

[0162] The control electrode of the first transistor is electrically connected to the first initial control terminal, the first electrode of the first transistor is electrically connected to the first initial voltage terminal, and the second electrode of the first transistor is electrically connected to the second terminal of the driving circuit.

[0163] Optionally, the second initialization sub-circuit includes a second transistor;

[0164] The control electrode of the second transistor is electrically connected to the second initial control terminal, the first electrode of the second transistor is electrically connected to the second initial voltage terminal, and the second electrode of the second transistor is electrically connected to the first terminal of the driving circuit.

[0165] Optionally, the first initialization sub-circuit includes a first transistor, and the second initialization sub-circuit includes a second transistor;

[0166] The control electrode of the first transistor is electrically connected to the first initial control terminal, the first electrode of the first transistor is electrically connected to the first initial voltage terminal, and the second electrode of the first transistor is electrically connected to the second terminal of the driving circuit.

[0167] The control electrode of the second transistor is electrically connected to the second initial control terminal, the first electrode of the second transistor is electrically connected to the second initial voltage terminal, and the second electrode of the second transistor is electrically connected to the first terminal of the driving circuit.

[0168] The pixel circuit described in at least one embodiment of this disclosure further includes a first light-emitting control circuit, a second light-emitting control circuit, and a data writing circuit;

[0169] The first light-emitting control circuit is electrically connected to the first light-emitting control terminal, the power supply voltage terminal, and the first terminal of the driving circuit, respectively, and is used to control the connection between the power supply voltage terminal and the first terminal of the driving circuit under the control of the first light-emitting control signal provided by the first light-emitting control terminal.

[0170] The second light-emitting control circuit is electrically connected to the second light-emitting control terminal, the second terminal of the driving circuit, and the first electrode of the light-emitting element, respectively, and is used to control the connection between the second terminal of the driving circuit and the first electrode of the light-emitting element under the control of the second light-emitting control signal provided by the second light-emitting control terminal; the second electrode of the light-emitting element is electrically connected to the first voltage terminal.

[0171] The data writing circuit is electrically connected to the write control terminal, the data line, and the first terminal of the drive circuit, respectively, and is used to control the connection between the data line and the first terminal of the drive circuit under the control of the write control signal provided by the write control terminal.

[0172] In a specific implementation, the first light-emitting control circuit and the second light-emitting control circuit are used to control light emission, and the data writing circuit is used to write data voltage.

[0173] In at least one embodiment of this disclosure, the pixel circuit further includes a reset circuit;

[0174] The reset circuit is electrically connected to the reset control terminal, the reset voltage terminal, and the first electrode of the light-emitting element, respectively, and is used to control the reset voltage provided by the reset voltage terminal to be written into the first electrode of the light-emitting element under the control of the reset control signal provided by the reset control terminal.

[0175] In a specific implementation, the reset circuit, under the control of the reset control signal, writes a reset voltage into the first electrode of the light-emitting element to control the light-emitting element to not emit light and to clear the residual charge on the first electrode of the light-emitting element.

[0176] As shown in Figure 4, based on at least one embodiment of the pixel circuit shown in Figure 1, the pixel circuit of at least one embodiment of this disclosure further includes a first light-emitting control circuit 41, a second light-emitting control circuit 42, a data writing circuit 43, and a reset circuit 44.

[0177] The first light-emitting control circuit 41 is electrically connected to the first light-emitting control terminal E1, the power supply voltage terminal VDD, and the first terminal of the driving circuit 11, respectively, and is used to control the connection between the power supply voltage terminal VDD and the first terminal of the driving circuit 11 under the control of the first light-emitting control signal provided by the first light-emitting control terminal E1.

[0178] The second light-emitting control circuit 42 is electrically connected to the second light-emitting control terminal E2, the second terminal of the driving circuit 11, and the first electrode of the light-emitting element E0, respectively. It is used to control the second terminal of the driving circuit 11 to connect with the first electrode of the light-emitting element E0 under the control of the second light-emitting control signal provided by the second light-emitting control terminal E2. The second electrode of the light-emitting element E0 is electrically connected to the first voltage terminal V1.

[0179] The data writing circuit 43 is electrically connected to the write control terminal S0, the data line D1 and the first terminal of the drive circuit 11 respectively, and is used to control the connection between the data line D1 and the first terminal of the drive circuit 11 under the control of the write control signal provided by the write control terminal S0.

[0180] The reset circuit 44 is electrically connected to the reset control terminal S3, the reset voltage terminal I3, and the first electrode of the light-emitting element E0, respectively, and is used to control the reset voltage provided by the reset voltage terminal I3 to be written into the first electrode of the light-emitting element E0 under the control of the reset control signal provided by the reset control terminal S3.

[0181] In at least one embodiment of the pixel circuit shown in FIG4 of this disclosure, when in operation, the refresh frame includes a first initialization stage, a first reset stage, a first charging stage, a first reset stage, and a first light emission stage set sequentially.

[0182] During the first initialization phase, the first initialization sub-circuit 131, under the control of the first initial control signal, writes the first initial voltage Vi1 provided by the first initial voltage terminal I1 into the second terminal of the drive circuit 11; under the control of the compensation control signal, the compensation control circuit 14 controls the connection between the control terminal of the drive circuit 11 and the second terminal of the drive circuit 11.

[0183] During the first reset phase, the reset circuit 44, under the control of the reset control signal, writes the reset voltage Vi3 provided by the reset voltage terminal I3 into the first electrode of the light-emitting element E0. Under the control of the second light-emitting control signal, the second light-emitting control circuit 42 controls the second terminal of the driving circuit 11 to connect with the first electrode of the light-emitting element E0. Under the control of the compensation control signal, the compensation control circuit 14 controls the control terminal of the driving circuit 11 to connect with the second terminal of the driving circuit 11.

[0184] During the first charging stage, the data writing circuit 43 writes the data voltage provided by the data line D1 into the first terminal of the driving circuit 11, and the compensation control circuit 14 controls the connection between the control terminal of the driving circuit 11 and the second terminal of the driving circuit 11 under the control of the compensation control signal.

[0185] During the first reset phase, the first initialization sub-circuit 131, under the control of the first initial control signal, writes the first initial voltage Vi1 provided by the first initial voltage terminal I1 into the second terminal of the driving circuit 11; under the control of the potential of its control terminal, the driving circuit 11 controls the first terminal of the driving circuit 11 to connect with the second terminal of the driving circuit 11, so as to control the driving transistors included in the driving circuit 11 to be in a biased state.

[0186] In the first light-emitting stage, the first light-emitting control circuit 41, under the control of the first light-emitting control signal, controls the power supply voltage terminal VDD to connect with the first terminal of the driving circuit 11; the second light-emitting control circuit 42, under the control of the second light-emitting control signal, controls the second terminal of the driving circuit 11 to connect with the first electrode of the light-emitting element E0; the driving circuit 11, under the control of the potential of its control terminal, drives the light-emitting element E0 to emit light.

[0187] In at least one embodiment of the pixel circuit shown in FIG4 of this disclosure, when in operation, the holding frame includes a second initialization stage, a second reset stage, a second resetting stage, and a second light emission stage that are set sequentially.

[0188] During the holding frame, under the control of the compensation control signal, the compensation control circuit 14 controls the control terminal of the drive circuit 11 to disconnect from the second terminal of the drive circuit 11;

[0189] During the second initialization phase, the first initialization sub-circuit 131, under the control of the first initial control signal, writes the first initial voltage Vi1 provided by the first initial voltage terminal I1 into the second terminal of the drive circuit 11.

[0190] During the second reset phase, under the control of the reset control signal, the reset circuit 44 writes the reset voltage Vi3 provided by the reset voltage terminal I3 into the first pole of the light-emitting element E0, and under the control of the second light-emitting control signal, the second light-emitting control circuit 42 controls the second terminal of the driving circuit 11 to connect with the first pole of the light-emitting element E0.

[0191] During the second reset phase, the first initialization sub-circuit 131, under the control of the first initial control signal, writes the first initial voltage Vi1 provided by the first initial voltage terminal I1 into the second terminal of the driving circuit 11; under the control of the potential of its control terminal, the driving circuit 11 controls the first terminal of the driving circuit 11 to connect with the second terminal of the driving circuit 11, so as to control the driving transistors included in the driving circuit 11 to be in a biased state.

[0192] In the second light-emitting stage, the first light-emitting control circuit 41, under the control of the first light-emitting control signal, controls the power supply voltage terminal VDD to connect with the first terminal of the driving circuit 11; the second light-emitting control circuit 42, under the control of the second light-emitting control signal, controls the second terminal of the driving circuit 11 to connect with the first electrode of the light-emitting element E0; the driving circuit 11, under the control of the potential of its control terminal, drives the light-emitting element E0 to emit light.

[0193] In at least one embodiment of the pixel circuit shown in FIG4, when in operation, the holding frame may further include a holding set phase disposed between the second reset phase and the second reset phase;

[0194] During the hold-set phase, the data writing circuit 43 writes the voltage signal provided by the data line D1 to the first terminal of the drive circuit 11.

[0195] As shown in Figure 5, based on at least one embodiment of the pixel circuit shown in Figure 2, the pixel circuit of at least one embodiment of this disclosure further includes a first light-emitting control circuit 41, a second light-emitting control circuit 42, a data writing circuit 43, and a reset circuit 44.

[0196] The first light-emitting control circuit 41 is electrically connected to the first light-emitting control terminal E1, the power supply voltage terminal VDD, and the first terminal of the driving circuit 11, respectively, and is used to control the connection between the power supply voltage terminal VDD and the first terminal of the driving circuit 11 under the control of the first light-emitting control signal provided by the first light-emitting control terminal E1.

[0197] The second light-emitting control circuit 42 is electrically connected to the second light-emitting control terminal E2, the second terminal of the driving circuit 11, and the first electrode of the light-emitting element E0, respectively. It is used to control the second terminal of the driving circuit 11 to connect with the first electrode of the light-emitting element E0 under the control of the second light-emitting control signal provided by the second light-emitting control terminal E2. The second electrode of the light-emitting element E0 is electrically connected to the first voltage terminal V1.

[0198] The data writing circuit 43 is electrically connected to the write control terminal S0, the data line D1 and the first terminal of the drive circuit 11 respectively, and is used to control the connection between the data line D1 and the first terminal of the drive circuit 11 under the control of the write control signal provided by the write control terminal S0.

[0199] The reset circuit 44 is electrically connected to the reset control terminal S3, the reset voltage terminal I3, and the first electrode of the light-emitting element E0, respectively, and is used to control the reset voltage provided by the reset voltage terminal I3 to be written into the first electrode of the light-emitting element E0 under the control of the reset control signal provided by the reset control terminal S3.

[0200] In at least one embodiment of the pixel circuit shown in FIG5 of this disclosure, when in operation, the refresh frame includes a first initialization stage, a first reset stage, a first charging stage, a first reset stage, and a first light emission stage set sequentially.

[0201] During the first initialization phase, the second initialization sub-circuit 132, under the control of the second initial control signal, writes the second initial voltage Vi2 provided by the second initial voltage terminal I2 into the first terminal of the drive circuit 11; under the control of the compensation control signal, the compensation control circuit 14 controls the connection between the control terminal of the drive circuit 11 and the second terminal of the drive circuit 11.

[0202] During the first reset phase, the reset circuit 44, under the control of the reset control signal, writes the reset voltage Vi3 provided by the reset voltage terminal I3 into the first electrode of the light-emitting element E0; the second light-emitting control circuit 42, under the control of the second light-emitting control signal, controls the second terminal of the driving circuit 11 to connect with the first electrode of the light-emitting element E0; the compensation control circuit 14, under the control of the compensation control signal, controls the control terminal of the driving circuit 11 to connect with the second terminal of the driving circuit 11.

[0203] During the first charging stage, the data writing circuit 43 writes the data voltage Vdata provided by the data line D1 into the first terminal of the driving circuit 11, and the compensation control circuit 14 controls the connection between the control terminal of the driving circuit 11 and the second terminal of the driving circuit 11 under the control of the compensation control signal.

[0204] During the first reset phase, the second initialization sub-circuit 132, under the control of the second initial control signal, writes the second initial voltage Vi2 provided by the second initial voltage terminal i2 into the first terminal of the drive circuit 11; under the control of the potential of its control terminal, the drive circuit 11 controls the first terminal of the drive circuit 11 to be connected to the second terminal of the drive circuit 11, so as to control the drive transistors included in the drive circuit 11 to be in a biased state.

[0205] In the first light-emitting stage, the first light-emitting control circuit 41, under the control of the first light-emitting control signal, controls the power supply voltage terminal VDD to connect with the first terminal of the driving circuit 11; the second light-emitting control circuit 42, under the control of the second light-emitting control signal, controls the second terminal of the driving circuit 11 to connect with the first electrode of the light-emitting element E0; the driving circuit 11, under the control of the potential of its control terminal, drives the light-emitting element E0 to emit light.

[0206] In at least one embodiment of the pixel circuit shown in FIG5 of this disclosure, when in operation, the holding frame includes a second initialization stage, a second reset stage, a second resetting stage, and a second light emission stage that are set sequentially.

[0207] During the holding frame, under the control of the compensation control signal, the compensation control circuit 14 controls the control terminal of the drive circuit 11 to disconnect from the second terminal of the drive circuit 11;

[0208] During the second initialization phase, the second initialization sub-circuit 132, under the control of the second initial control signal, writes the second initial voltage Vi2 provided by the second initial voltage terminal I2 into the first terminal of the drive circuit 11.

[0209] During the second reset phase, the reset circuit 44, under the control of the reset control signal, writes the reset voltage Vi3 provided by the reset voltage terminal I3 into the first pole of the light-emitting element E0; the second light-emitting control circuit 42, under the control of the second light-emitting control signal, controls the second terminal of the driving circuit 11 to connect with the first pole of the light-emitting element E0.

[0210] During the second reset phase, the second initialization sub-circuit 132, under the control of the second initial control signal, writes the second initial voltage Vi2 provided by the second initial voltage terminal I2 into the first terminal of the drive circuit 11; under the control of the potential of its control terminal, the drive circuit 11 controls the first terminal of the drive circuit 11 to be connected to the second terminal of the drive circuit 11, so as to control the drive transistors included in the drive circuit 11 to be in a biased state.

[0211] In the second light-emitting stage, the first light-emitting control circuit 41, under the control of the first light-emitting control signal, controls the power supply voltage terminal VDD to connect with the first terminal of the driving circuit 11; the second light-emitting control circuit 42, under the control of the second light-emitting control signal, controls the second terminal of the driving circuit 11 to connect with the first electrode of the light-emitting element E0; the driving circuit 11, under the control of the potential of its control terminal, drives the light-emitting element E0 to emit light.

[0212] In at least one embodiment of the pixel circuit shown in FIG5, when in operation, the holding frame further includes a holding set phase disposed between the second reset phase and the second reset phase;

[0213] During the hold-set phase, the data writing circuit 43 writes the voltage signal provided by the data line D1 to the first terminal of the drive circuit 11.

[0214] As shown in Figure 6, based on at least one embodiment of the pixel circuit shown in Figure 3, the pixel circuit of at least one embodiment of this disclosure further includes a first light-emitting control circuit 41, a second light-emitting control circuit 42, and a data writing circuit 43.

[0215] The first light-emitting control circuit 41 is electrically connected to the first light-emitting control terminal E1, the power supply voltage terminal VDD, and the first terminal of the driving circuit 11, respectively, and is used to control the connection between the power supply voltage terminal VDD and the first terminal of the driving circuit 11 under the control of the first light-emitting control signal provided by the first light-emitting control terminal E1.

[0216] The second light-emitting control circuit 42 is electrically connected to the second light-emitting control terminal E2, the second terminal of the driving circuit 11, and the first electrode of the light-emitting element E0, respectively. It is used to control the second terminal of the driving circuit 11 to connect with the first electrode of the light-emitting element E0 under the control of the second light-emitting control signal provided by the second light-emitting control terminal E2. The second electrode of the light-emitting element E0 is electrically connected to the first voltage terminal V1.

[0217] The data writing circuit 43 is electrically connected to the write control terminal S0, the data line D1 and the first terminal of the drive circuit 11, respectively, and is used to control the connection between the data line D1 and the first terminal of the drive circuit 11 under the control of the write control signal provided by the write control terminal S0.

[0218] In at least one embodiment of the pixel circuit shown in FIG6 of this disclosure, when in operation, the refresh frame includes a first reset stage, a first charging stage, a first reset stage and a first light emission stage arranged sequentially.

[0219] During the first reset phase, the first initialization sub-circuit 131, under the control of the first initial control signal, writes the first initial voltage Vi1 provided by the first initial voltage terminal I1 into the second terminal of the drive circuit 11. Under the control of the compensation control signal, the compensation control circuit 14 controls the connection between the control terminal of the drive circuit 11 and the second terminal of the drive circuit 11.

[0220] During the first charging stage, the data writing circuit 43 writes the data voltage Vdata provided by the data line D1 into the first terminal of the driving circuit 11, and the compensation control circuit 14 controls the connection between the control terminal of the driving circuit 11 and the second terminal of the driving circuit 11 under the control of the compensation control signal.

[0221] During the first reset phase, the second initialization sub-circuit 132, under the control of the second initial control signal, writes the second initial voltage Vi2 provided by the second initial voltage terminal I2 into the first terminal of the driving circuit 11. Under the control of the potential of its control terminal, the driving circuit 11 controls the first terminal of the driving circuit 11 to be connected to the second terminal of the driving circuit 11, so as to control the driving transistors included in the driving circuit 11 to be in a biased state.

[0222] In the first light-emitting stage, the first light-emitting control circuit 41, under the control of the first light-emitting control signal, controls the power supply voltage terminal VDD to connect with the first terminal of the driving circuit 11; the second light-emitting control circuit 42, under the control of the second light-emitting control signal, controls the second terminal of the driving circuit 11 to connect with the first electrode of the light-emitting element E0; the driving circuit 11, under the control of the potential of its control terminal, drives the light-emitting element E0 to emit light.

[0223] In at least one embodiment of the pixel circuit shown in FIG6 of this disclosure, when in operation, the holding frame includes a second initialization stage, a second reset stage, a second resetting stage, and a second light emission stage that are set sequentially.

[0224] During the holding frame, under the control of the compensation control signal, the compensation control circuit 14 controls the control terminal of the drive circuit 11 to disconnect from the second terminal of the drive circuit 11;

[0225] During the second reset phase, the first initialization sub-circuit 131, under the control of the first initial control signal, writes the first initial voltage Vi1 provided by the first initial voltage terminal I1 into the second terminal of the drive circuit 11.

[0226] During the second reset phase, the second initialization sub-circuit 132, under the control of the second initial control signal, writes the second initial voltage Vi2 provided by the second initial voltage terminal I2 into the first terminal of the driving circuit 11. Under the control of the potential of its control terminal, the driving circuit 11 controls the first terminal of the driving circuit 11 to be connected to the second terminal of the driving circuit 11, so as to control the driving transistors included in the driving circuit 11 to be in a biased state.

[0227] In the second light-emitting stage, the first light-emitting control circuit 41, under the control of the first light-emitting control signal, controls the power supply voltage terminal VDD to connect with the first terminal of the driving circuit 11; the second light-emitting control circuit 42, under the control of the second light-emitting control signal, controls the second terminal of the driving circuit 11 to connect with the first electrode of the light-emitting element E0; the driving circuit 11, under the control of the potential of its control terminal, drives the light-emitting element E0 to emit light.

[0228] In at least one embodiment of the pixel circuit shown in FIG6, when in operation, the holding frame further includes a holding set phase disposed between the second reset phase and the second reset phase;

[0229] During the hold-set phase, the data writing circuit 43 writes the voltage signal provided by the data line D1 to the first terminal of the drive circuit 11.

[0230] As shown in Figure 7, based on at least one embodiment of the pixel circuit shown in Figure 6, the pixel circuit of at least one embodiment of this disclosure further includes a reset circuit 44;

[0231] The reset circuit 44 is electrically connected to the reset control terminal S3, the reset voltage terminal I3, and the first electrode of the light-emitting element E0, respectively, and is used to control the reset voltage provided by the reset voltage terminal I3 to be written into the first electrode of the light-emitting element E0 under the control of the reset control signal provided by the reset control terminal S3.

[0232] At least one embodiment of the pixel circuit shown in FIG7 of this disclosure, when in operation,

[0233] During the first reset phase, the reset circuit 44, under the control of the reset control signal, writes the reset voltage Vi3 provided by the reset voltage terminal I3 into the first pole of the light-emitting element E0.

[0234] During the second reset phase, the reset circuit 44, under the control of the reset control signal, writes the reset voltage Vi3 provided by the reset voltage terminal I3 into the first pole of the light-emitting element E0.

[0235] Optionally, the compensation control circuit includes a third transistor, the first light-emitting control circuit includes a fourth transistor, the second light-emitting control circuit includes a fifth transistor, the data writing circuit includes a sixth transistor, and the driving circuit includes a driving transistor.

[0236] The control electrode of the third transistor is electrically connected to the compensation control terminal, the first electrode of the third transistor is electrically connected to the control terminal of the driving circuit, and the second electrode of the third transistor is electrically connected to the second terminal of the driving circuit.

[0237] The control electrode of the fourth transistor is electrically connected to the first light-emitting control terminal, the first electrode of the fourth transistor is electrically connected to the power supply voltage terminal, and the second electrode of the fourth transistor is electrically connected to the first terminal of the driving circuit.

[0238] The control electrode of the fifth transistor is electrically connected to the second light-emitting control terminal, the first electrode of the fifth transistor is electrically connected to the second terminal of the driving circuit, and the second electrode of the fifth transistor is electrically connected to the first electrode of the light-emitting element.

[0239] The control electrode of the sixth transistor is electrically connected to the write control terminal, the first electrode of the sixth transistor is electrically connected to the data line, and the second electrode of the sixth transistor is electrically connected to the first terminal of the drive circuit.

[0240] The control electrode of the driving transistor is electrically connected to the control terminal of the driving circuit, the first electrode of the driving transistor is electrically connected to the first terminal of the driving circuit, and the second electrode of the driving transistor is electrically connected to the second terminal of the driving circuit.

[0241] In at least one embodiment of this disclosure, the third transistor is an oxide thin-film transistor.

[0242] Optionally, the reset circuit includes a seventh transistor;

[0243] The control electrode of the seventh transistor is electrically connected to the reset control terminal, the first electrode of the seventh transistor is electrically connected to the reset voltage terminal, and the second electrode of the seventh transistor is electrically connected to the first electrode of the light-emitting element.

[0244] In at least one embodiment of this disclosure, the seventh transistor is an oxide thin-film transistor.

[0245] As shown in Figure 8, based on at least one embodiment of the pixel circuit shown in Figure 4, the first initialization sub-circuit 131 includes a first transistor T1; the driving circuit 11 includes a driving transistor T0; the light-emitting element is an organic light-emitting diode O1; and the energy storage circuit 12 includes a storage capacitor C1.

[0246] The gate of the first transistor T1 is electrically connected to the first initial control terminal S1, the source of the first transistor T1 is electrically connected to the first initial voltage terminal I1, and the drain of the first transistor T1 is electrically connected to the drain of the driving transistor T0.

[0247] The compensation control circuit 14 includes a third transistor T3, the first light-emitting control circuit 41 includes a fourth transistor T4, the second light-emitting control circuit 42 includes a fifth transistor T5, and the data writing circuit 43 includes a sixth transistor T6.

[0248] The gate of the third transistor T3 is electrically connected to the compensation control terminal NG, the source of the third transistor T3 is electrically connected to the gate of the driving transistor T0, and the drain of the third transistor T3 is electrically connected to the drain of the driving transistor T0.

[0249] The gate of the fourth transistor T4 is electrically connected to the first light-emitting control terminal E1, the source of the fourth transistor T4 is electrically connected to the power supply voltage terminal VDD, and the drain of the fourth transistor T4 is electrically connected to the source of the driving transistor T0.

[0250] The gate of the fifth transistor T5 is electrically connected to the second light-emitting control terminal E2, the source of the fifth transistor T5 is electrically connected to the drain of the driving transistor T0, and the drain of the fifth transistor T5 is electrically connected to the anode of the organic light-emitting diode O1.

[0251] The gate of the sixth transistor T6 is electrically connected to the write control terminal S0, the source of the sixth transistor T6 is electrically connected to the data line D1, and the drain of the sixth transistor T6 is electrically connected to the source of the driving transistor T0.

[0252] The reset circuit includes a seventh transistor T7;

[0253] The gate of the seventh transistor T7 is electrically connected to the reset control terminal S3, the source of the seventh transistor T7 is electrically connected to the reset voltage terminal I3, and the drain of the seventh transistor T7 is electrically connected to the anode of the organic light-emitting diode O1.

[0254] The cathode of the organic light-emitting diode O1 is electrically connected to the low-voltage terminal VSS.

[0255] The first terminal of the storage capacitor C1 is electrically connected to the gate of the driving transistor T0, and the second terminal of the storage capacitor C1 is electrically connected to the power supply voltage terminal VDD.

[0256] In at least one embodiment of the pixel circuit shown in Figure 8, T3 and T7 are oxide thin-film transistors, T1, T4, T5, T6 and T0 are LTPS (low-temperature polycrystalline silicon) thin-film transistors, T3 and T7 are n-type transistors, and T1, T4, T5, T6 and T0 are p-type transistors, but not limited thereto.

[0257] As shown in Figure 9, when at least one embodiment of the pixel circuit shown in Figure 8 of this disclosure is in operation, the refresh frame includes a first initialization stage S11, a first reset stage S12, a first charging stage S13, a first reset stage S14, and a first light emission stage S15 that are set sequentially.

[0258] In the first initialization phase S11, E2 provides a high voltage signal, E1 provides a high voltage signal, S3 provides a low voltage signal, NG provides a high voltage signal, S1 provides a low voltage signal, S0 provides a high voltage signal, and I1 provides a first initial voltage Vi1, as shown in Figure 10A. T1 and T3 are turned on to write the first initial voltage Vi1 into the drain and gate of T0 to initialize the drain voltage and gate voltage of T0. The first initial voltage Vi1 is a positive voltage; for example, Vi1 can be a 5V voltage signal, but it is not limited to this.

[0259] In the first reset phase S12, E2 provides a low voltage signal, E1 provides a high voltage signal, S3 provides a high voltage signal, NG provides a high voltage signal, S1 provides a high voltage signal, and S0 provides a high voltage signal, as shown in Figure 10B. T7 is turned on, I3 provides a reset voltage Vi3, T5 is turned on, T3 is turned on, and T0 is turned on, so that the reset voltage Vi3 is written into the anode of O1, the drain of T0, the gate of T0, and the source of T0 to control O1 from emitting light, clear the residual charge on the anode of O1, and reset the gate voltage, source voltage, and drain voltage of T0, so that T0 can be turned on at the beginning of the first charging phase S13. The reset voltage Vi3 can be a negative voltage, for example, Vi3 can be a -3V voltage signal, but is not limited thereto.

[0260] In the first charging phase S13, E2 provides a high voltage signal, E1 provides a high voltage signal, S3 provides a low voltage signal, NG provides a high voltage signal, S1 provides a high voltage signal, and S0 provides a low voltage signal, as shown in Figure 10C. T6 is turned on, and D1 provides the data voltage Vdata; T3 is turned on. At the beginning of the first charging phase S13, T0 is turned on, and the data voltage Vdata charges C1 through T6, T0, and T3 to increase the gate voltage of T0 until T0 is turned off. At this time, the gate voltage of T0 is Vdata + Vth, where Vth is the threshold voltage of T0.

[0261] In the first reset phase S14, E2 provides a high voltage signal, E1 provides a high voltage signal, S3 provides a low voltage signal, NG provides a low voltage signal, S1 provides a low voltage signal, S0 provides a high voltage signal, and I1 provides a first initial voltage Vi1, as shown in Figure 10D. T1 is turned on, and T0 is turned on to reset the drain voltage and source voltage of T0 to Vi1, so that T0 is in a bias state and the hysteresis phenomenon is improved.

[0262] In the first light-emitting stage S15, E2 provides a low voltage signal, E1 provides a low voltage signal, S3 provides a low voltage signal, NG provides a low voltage signal, S1 provides a high voltage signal, and S0 provides a high voltage signal, as shown in Figure 10E. T4 and T5 are turned on, and T0 drives O1 to emit light.

[0263] In at least one embodiment of the pixel circuit shown in FIG8 of this disclosure, when in operation, the voltage value of the first initial voltage Vi1 can be greater than or equal to 4V and less than or equal to 7V, and the voltage value of the reset voltage Vi3 can be greater than or equal to -4V and less than or equal to -2V, but is not limited thereto.

[0264] As shown in Figure 11, when at least one embodiment of the pixel circuit shown in Figure 8 of this disclosure is in operation, the holding frame includes a second initialization stage S21, a second reset stage S22, a holding set stage S23, a second reset stage S24, and a second light emission stage S25 that are set sequentially.

[0265] During the hold frame, NG provides a low voltage signal, T3 is turned off, and the gate of T0 is disconnected from the drain of T0 to maintain the gate voltage of T0.

[0266] In the second initialization phase S21, E2 provides a high voltage signal, E1 provides a high voltage signal, S3 provides a low voltage signal, S1 provides a low voltage signal, S0 provides a high voltage signal, I1 provides a first initial voltage Vi1, and T1 is turned on to write the first initial voltage Vi1 to the drain of T0 to initialize the drain voltage of T0; the first initial voltage Vi1 is a positive voltage, for example, Vi1 can be a 5V voltage signal, but is not limited thereto;

[0267] In the second reset phase S22, E2 provides a low voltage signal, E1 provides a high voltage signal, S3 provides a high voltage signal, S1 provides a high voltage signal, S0 provides a high voltage signal, T7 is turned on, I3 provides a reset voltage Vi3, and T5 is turned on, so that the reset voltage Vi3 is written into the anode of O1 and the drain of T0 to control O1 from emitting light, clear the residual charge on the anode of O1, and reset the drain voltage of T0; the reset voltage Vi3 can be a negative voltage, for example, Vi3 can be a -3V voltage signal, but is not limited thereto;

[0268] During the hold-set phase S23, E2 provides a high voltage signal, E1 provides a high voltage signal, S3 provides a low voltage signal, S1 provides a high voltage signal, S0 provides a low voltage signal, T6 is turned on, and D1 provides a voltage signal to the source of T0;

[0269] During the holding and setting phase S23, the voltage signal provided by D1 can be a positive voltage to set the source voltage of T0, thereby providing a bias voltage to the driving transistor T0, so that T0 is in a biased state to improve the hysteresis phenomenon.

[0270] In the second reset phase S24, E2 provides a high voltage signal, E1 provides a high voltage signal, S3 provides a low voltage signal, S1 provides a low voltage signal, S0 provides a high voltage signal, I1 provides a first initial voltage Vi1, T1 is turned on, and T0 is turned on to reset the drain voltage and source voltage of T0 to Vi1, so that T0 is in a bias state and the hysteresis phenomenon is improved.

[0271] In the second light-emitting stage S25, E2 provides a low voltage signal, E1 provides a low voltage signal, S3 provides a low voltage signal, S1 provides a high voltage signal, S0 provides a high voltage signal, T4 and T5 are turned on, and T0 drives O1 to emit light.

[0272] In specific implementation, during the hold reset phase, the voltage signal provided by the data line D1 can be a data voltage Vdata. This data voltage Vdata is the data voltage provided by the data line D1 during the first charging phase, and its voltage range can be, for example, greater than or equal to 1V and less than or equal to 6.5V; or...

[0273] During the reset phase, the voltage signal provided by the data line D1 can be a reset voltage signal, and the voltage value range of the reset voltage signal can be greater than or equal to 4.6V and less than or equal to 7V.

[0274] However, this is not the limit.

[0275] In at least one embodiment of the pixel circuit shown in FIG8, when the display is in operation, the display cycle includes a refresh frame and a hold frame during low-frequency display. In the second reset phase of the hold frame, the driving transistors included in the driving circuit are biased such that the potential of the source and the potential of the drain of the driving transistors in the driving circuit are consistent with the refresh frame during the second reset phase of the hold frame, thereby improving the flickering phenomenon.

[0276] As shown in Figure 12, based on at least one embodiment of the pixel circuit shown in Figure 5, the second initialization sub-circuit 132 includes a second transistor T2; the driving circuit 11 includes a driving transistor T0; the light-emitting element is an organic light-emitting diode O1; and the energy storage circuit 12 includes a storage capacitor C1.

[0277] The gate of the second transistor T2 is electrically connected to the second initial control terminal S2, the source of the second transistor T2 is electrically connected to the second initial voltage terminal I2, and the drain of the second transistor T2 is electrically connected to the source of the driving transistor T0.

[0278] The compensation control circuit 14 includes a third transistor T3, the first light-emitting control circuit 41 includes a fourth transistor T4, the second light-emitting control circuit 42 includes a fifth transistor T5, and the data writing circuit 43 includes a sixth transistor T6.

[0279] The gate of the third transistor T3 is electrically connected to the compensation control terminal NG, the source of the third transistor T3 is electrically connected to the gate of the driving transistor T0, and the drain of the third transistor T3 is electrically connected to the drain of the driving transistor T0.

[0280] The gate of the fourth transistor T4 is electrically connected to the first light-emitting control terminal E1, the source of the fourth transistor T4 is electrically connected to the power supply voltage terminal VDD, and the drain of the fourth transistor T4 is electrically connected to the source of the driving transistor T0.

[0281] The gate of the fifth transistor T5 is electrically connected to the second light-emitting control terminal E2, the source of the fifth transistor T5 is electrically connected to the drain of the driving transistor T0, and the drain of the fifth transistor T5 is electrically connected to the anode of the organic light-emitting diode O1.

[0282] The gate of the sixth transistor T6 is electrically connected to the write control terminal S0, the source of the sixth transistor T6 is electrically connected to the data line D1, and the drain of the sixth transistor T6 is electrically connected to the source of the driving transistor T0.

[0283] The reset circuit 44 includes a seventh transistor T7;

[0284] The gate of the seventh transistor T7 is electrically connected to the reset control terminal S3, the source of the seventh transistor T7 is electrically connected to the reset voltage terminal I3, and the drain of the seventh transistor T7 is electrically connected to the anode of the organic light-emitting diode O1.

[0285] The cathode of the organic light-emitting diode O1 is electrically connected to the low-voltage terminal VSS.

[0286] The first terminal of the storage capacitor C1 is electrically connected to the gate of the driving transistor T0, and the second terminal of the storage capacitor C1 is electrically connected to the power supply voltage terminal VDD.

[0287] In at least one embodiment of the pixel circuit shown in Figure 12, T3 is an oxide thin-film transistor, T2, T4, T5, T6, T7 and T0 are LTPS (low-temperature polycrystalline silicon) thin-film transistors, T3 is an n-type transistor, and T2, T4, T5, T6, T7 and T0 are p-type transistors, but not limited thereto.

[0288] As shown in FIG13, when at least one embodiment of the pixel circuit shown in FIG12 of this disclosure is in operation, the refresh frame includes a first initialization stage S11, a first reset stage S12, a first charging stage S13, a first reset stage S14 and a first light emission stage S15 set sequentially.

[0289] In the first initialization phase S11, E2 provides a high voltage signal, E1 provides a high voltage signal, S2 provides a low voltage signal, NG provides a high voltage signal, S3 provides a low voltage signal, S0 provides a high voltage signal, I2 provides a second initial voltage Vi2, and I3 provides a reset voltage Vi3. Vi2 is a positive voltage, and Vi3 is a negative voltage; for example, Vi2 can be a 5V voltage signal, and Vi3 can be a -3V voltage signal. As shown in Figure 14A, T7 is turned on to write Vi3 into the anode of O1, so that O1 does not emit light and to clear the residual charge on the anode of O1. T2, T0, and T3 are turned on to initialize the source voltage, drain voltage, and gate voltage of T0.

[0290] In the first reset phase S12, E2 provides a low voltage signal, E1 provides a high voltage signal, S2 provides a high voltage signal, NG provides a high voltage signal, S3 provides a low voltage signal, S0 provides a high voltage signal, and I3 provides a reset voltage Vi3. As shown in Figure 14B, T7 is turned on to write Vi3 into the anode of O1, so that O1 does not emit light and the residual charge on the anode of O1 is cleared. T3 and T0 are turned on to write Vi3 into the gate, drain, and source of T0, so that T0 can be turned on when the first charging phase S13 begins.

[0291] In the first charging phase S13, E2 provides a high voltage signal, E1 provides a high voltage signal, S2 provides a high voltage signal, NG provides a high voltage signal, S3 provides a high voltage signal, S0 provides a low voltage signal, and D1 provides the data voltage Vdata, as shown in Figure 14C. T6 is turned on, and T3 is turned on.

[0292] At the start of the first charging stage S13, T0 is turned on, and Vdata charges C1 through T6, T0 and T3 until T0 is turned off. At this time, the gate voltage of T0 is Vdata + Vth.

[0293] In the first reset phase S14, E2 provides a high voltage signal, E1 provides a high voltage signal, S2 provides a low voltage signal, NG provides a low voltage signal, S3 provides a low voltage signal, S0 provides a high voltage signal, and I2 provides a second initial voltage Vi2, as shown in Figure 14D. T2, T0, and T7 are turned on to write Vi2 to the source and drain of T0, thereby resetting the drain voltage and source voltage of T0 to Vi2, so that T0 is in a bias state, improving the hysteresis phenomenon; and Vi3 is written to the anode of O1 to control O1 from emitting light and to clear the residual charge on the anode of O1.

[0294] In the first light-emitting stage S15, E2 provides a low voltage signal, E1 provides a low voltage signal, S2 provides a high voltage signal, NG provides a low voltage signal, S3 provides a high voltage signal, and S0 provides a high voltage signal, as shown in Figure 14E. T4 and T5 are turned on, and T0 drives O1 to emit light.

[0295] As shown in FIG15, when at least one embodiment of the pixel circuit shown in FIG12 of this disclosure is in operation, the holding frame includes a second initialization stage S21, a second reset stage S22, a holding set stage S23, a second reset stage S24, and a second light emission stage S25 that are set sequentially.

[0296] During the hold frame, NG provides a low voltage signal, T3 is turned off, and the gate of T0 is disconnected from the drain of T0 to maintain the gate voltage of T0.

[0297] In the second initialization phase S21, E2 provides a high voltage signal, E1 provides a high voltage signal, S2 provides a low voltage signal, S3 provides a low voltage signal, S0 provides a high voltage signal, I2 provides a second initial voltage Vi2, and I3 provides a reset voltage Vi3. Vi2 is a positive voltage, and Vi3 is a negative voltage; for example, Vi2 can be a 5V voltage signal, and Vi3 can be a -3V voltage signal. T7 is turned on to write Vi3 into the anode of O1, so that O1 does not emit light and to clear the residual charge on the anode of O1. T2 and T0 are turned on to initialize the source voltage and drain voltage of T0.

[0298] In the second reset phase S22, E2 provides a low voltage signal, E1 provides a high voltage signal, S2 provides a high voltage signal, S3 provides a low voltage signal, S0 provides a high voltage signal, and I3 provides a reset voltage Vi3; T7 is turned on to write Vi3 into the anode of O1, so that O1 does not emit light and to clear the residual charge on the anode of O1; T0 is turned on to write Vi3 into the drain and source of T0;

[0299] During the hold-set phase S23, E2 provides a high voltage signal, E1 provides a high voltage signal, S2 provides a high voltage signal, S3 provides a high voltage signal, S0 provides a low voltage signal, D1 provides a voltage signal, T6 is turned on, and D1 provides a voltage signal to the source of T0;

[0300] During the holding and setting phase S23, the voltage signal provided by D1 can be a positive voltage to set the source voltage of T0, thereby providing a bias voltage to the driving transistor T0, so that T0 is in a biased state to improve the hysteresis phenomenon.

[0301] In the second reset phase S24, E2 provides a high voltage signal, E1 provides a high voltage signal, S2 provides a low voltage signal, S3 provides a low voltage signal, S0 provides a high voltage signal, I2 provides a second initial voltage Vi2, T2 is turned on, T0 is turned on, and T7 is turned on to write Vi2 to the source and drain of T0, thereby resetting the drain voltage and source voltage of T0 to Vi2, so that T0 is in a bias state and the hysteresis phenomenon is improved; and Vi3 is written to the anode of O1 to control O1 from emitting light and to clear the residual charge on the anode of O1.

[0302] In the second light-emitting stage S25, E2 provides a low voltage signal, E1 provides a low voltage signal, S2 provides a high voltage signal, S3 provides a high voltage signal, S0 provides a high voltage signal, T4 and T5 are turned on, and T0 drives O1 to emit light.

[0303] In specific implementation, during the hold reset phase, the voltage signal provided by the data line D1 can be a data voltage Vdata. This data voltage Vdata is the data voltage provided by the data line D1 during the first charging phase, and its voltage range can be, for example, greater than or equal to 1V and less than or equal to 6.5V; or...

[0304] During the reset phase, the voltage signal provided by the data line D1 can be a reset voltage signal, and the voltage value range of the reset voltage signal can be greater than or equal to 4.6V and less than or equal to 7V.

[0305] However, this is not the limit.

[0306] Figure 16 is a second operating timing diagram of at least one embodiment of the pixel circuit shown in Figure 12 of this disclosure in a holding frame.

[0307] The difference between Figure 16 and Figure 15 is that during the hold frame, S0 provides a high voltage signal, T6 is turned off, and the voltage signal provided by D1 is stopped from being written to the source of T0.

[0308] In at least one embodiment of the pixel circuit shown in FIG12 of this disclosure, when in operation, the voltage value of the second initial voltage Vi2 can be greater than or equal to 4V and less than or equal to 7V, and the voltage value of the reset voltage Vi3 can be greater than or equal to -4V and less than or equal to -2V, but is not limited thereto.

[0309] In at least one embodiment of the pixel circuit shown in FIG12, when the display is in operation, the display cycle includes a refresh frame and a hold frame during low-frequency display. In the second reset phase of the hold frame, the driving transistors included in the driving circuit are biased such that the potential of the source and the potential of the drain of the driving transistors in the driving circuit are consistent with the refresh frame during the second reset phase of the hold frame, thereby improving the flickering phenomenon.

[0310] As shown in Figure 17, based on at least one embodiment of the pixel circuit shown in Figure 6, the first initialization sub-circuit 131 includes a first transistor T1; the second initialization sub-circuit 132 includes a second transistor T2; the driving circuit 11 includes a driving transistor T0; the light-emitting element is an organic light-emitting diode O1; and the energy storage circuit 12 includes a storage capacitor C1.

[0311] The gate of the first transistor T1 is electrically connected to the first initial control terminal S1, the source of the first transistor T1 is electrically connected to the first initial voltage terminal I1, and the drain of the first transistor T1 is electrically connected to the drain of the driving transistor T0.

[0312] The gate of the second transistor T2 is electrically connected to the second initial control terminal S2, the source of the second transistor T2 is electrically connected to the second initial voltage terminal I2, and the drain of the second transistor T2 is electrically connected to the source of the driving transistor T0.

[0313] The compensation control circuit 14 includes a third transistor T3, the first light-emitting control circuit 41 includes a fourth transistor T4, the second light-emitting control circuit 42 includes a fifth transistor T5, and the data writing circuit 43 includes a sixth transistor T6.

[0314] The gate of the third transistor T3 is electrically connected to the compensation control terminal NG, the source of the third transistor T3 is electrically connected to the gate of the driving transistor T0, and the drain of the third transistor T3 is electrically connected to the drain of the driving transistor T0.

[0315] The gate of the fourth transistor T4 is electrically connected to the first light-emitting control terminal E1, the source of the fourth transistor T4 is electrically connected to the power supply voltage terminal VDD, and the drain of the fourth transistor T4 is electrically connected to the source of the driving transistor T0.

[0316] The gate of the fifth transistor T5 is electrically connected to the second light-emitting control terminal E2, the source of the fifth transistor T5 is electrically connected to the drain of the driving transistor T0, and the drain of the fifth transistor T5 is electrically connected to the anode of the organic light-emitting diode O1.

[0317] The gate of the sixth transistor T6 is electrically connected to the write control terminal S0, the source of the sixth transistor T6 is electrically connected to the data line D1, and the drain of the sixth transistor T6 is electrically connected to the source of the driving transistor T0.

[0318] The cathode of the organic light-emitting diode O1 is electrically connected to the low-voltage terminal VSS.

[0319] The first terminal of the storage capacitor C1 is electrically connected to the gate of the driving transistor T0, and the second terminal of the storage capacitor C1 is electrically connected to the power supply voltage terminal VDD.

[0320] Based on at least one embodiment of the pixel circuit shown in Figure 17, T3 is an oxide thin-film transistor, T1, T2, T4, T5, T6 and T0 are LTPS thin-film transistors, T3 is an n-type transistor, and T1, T2, T4, T5, T6 and T0 are p-type transistors, but not limited thereto.

[0321] As shown in FIG18, based on at least one embodiment of the pixel circuit shown in FIG17, the reset circuit 44 includes a seventh transistor T7;

[0322] The gate of the seventh transistor T7 is electrically connected to the reset control terminal S3, the source of the seventh transistor T7 is electrically connected to the reset voltage terminal I3, and the drain of the seventh transistor T7 is electrically connected to the anode of the organic light-emitting diode O1.

[0323] Based on at least one embodiment of the pixel circuit shown in Figure 18, T7 is an LTPS thin-film transistor, T7 is a p-type transistor, but is not limited thereto.

[0324] As shown in FIG19, when at least one embodiment of the pixel circuit shown in FIG18 of this disclosure is in operation, the refresh frame includes a first reset stage S12, a first charging stage S13, a first reset stage S14 and a first light emission stage S15 arranged sequentially.

[0325] In the first reset phase S12, S1 provides a low voltage signal, S0 provides a high voltage signal, NG provides a high voltage signal, S3 provides a high voltage signal, E1 and E2 provide high voltage signals, and I1 provides a first initial voltage Vi1, as shown in Figure 20A. T1 is turned on to write Vi1 to the drain of T0, and T3 is turned on to write Vi1 to the gate of T0, so that T0 can be turned on when the first charging phase S13 begins. The first initial voltage Vi1 is a negative voltage, for example, Vi1 can be a -3V voltage signal, but is not limited to this.

[0326] In the first charging phase S13, S1 provides a high voltage signal, S0 provides a low voltage signal, NG provides a high voltage signal, S3 provides a high voltage signal, E1 and E2 provide high voltage signals, and D1 provides the data voltage Vdata, as shown in Figure 20B. T6 and T3 are turned on to write Vdata to the source of T0.

[0327] At the start of the first charging stage S13, T0 is turned on, and Vdata charges C1 through T6, T0 and T3 until T0 is turned off. At this time, the gate voltage of T0 is Vdata + Vth, and Vth is the threshold voltage of T0.

[0328] In the first reset phase S14, S1 provides a high voltage signal, S0 provides a high voltage signal, NG provides a low voltage signal, S3 provides a low voltage signal, and E1 and E2 provide high voltage signals, as shown in Figure 20C. T2 is turned on, and I2 provides a second initial voltage Vi2; Vi2 is a positive voltage; for example, Vi2 can be a 5V voltage signal. T0 is turned on to reset the drain voltage and source voltage of T0 to Vi2, so that T0 is in a bias state, improving the hysteresis phenomenon. T7 is turned on, and I3 provides a reset voltage Vi3 to control O1 from emitting light and to clear the residual charge on the anode of O1; Vi3 is a negative voltage, for example, Vi3 can be a -3V voltage signal.

[0329] In the first light-emitting stage S15, S1 provides a high voltage signal, S0 provides a high voltage signal, NG provides a low voltage signal, S3 provides a high voltage signal, and E1 and E2 provide low voltage signals, as shown in Figure 20D. T4 and T5 are turned on, and T0 drives O1 to emit light.

[0330] In at least one embodiment of the pixel circuit shown in Figure 18 of this disclosure, when in operation, Vi1 can be greater than or equal to -4V and less than or equal to -2V, Vi2 can be greater than or equal to 4V and less than or equal to 7V, and Vi3 can be greater than or equal to -4V and less than or equal to -2V, but is not limited thereto.

[0331] As shown in FIG21, when at least one embodiment of the pixel circuit shown in FIG18 of this disclosure is in operation, the holding frame includes a second reset stage S22, a second reset stage S24 and a second light emission stage S25 arranged sequentially.

[0332] During the hold frame, NG provides a low voltage signal, T3 is turned off, and the gate of T0 is disconnected from the drain of T0 to maintain the gate voltage of T0.

[0333] During the hold frame, S0 provides a high voltage signal, T6 is turned off, and the writing of the voltage signal provided by D1 to the source of T0 stops;

[0334] In the second reset phase S22, S1 provides a low voltage signal, S0 provides a high voltage signal, S3 provides a high voltage signal, E1 and E2 provide high voltage signals, I1 provides a first initial voltage Vi1, and T1 is turned on to write Vi1 to the drain of T0.

[0335] In the second reset phase S24, S1 provides a high voltage signal, S0 provides a high voltage signal, S3 provides a low voltage signal, E1 and E2 provide high voltage signals, T2 is turned on, and I2 provides a second initial voltage Vi2; Vi2 is a positive voltage; for example, Vi2 can be a 5V voltage signal; T0 is turned on to reset the drain voltage and source voltage of T0 to Vi2, so that T0 is in a bias state, improving the hysteresis phenomenon; T7 is turned on, and I3 provides a reset voltage Vi3 to control O1 from emitting light and to clear the residual charge on the anode of O1; Vi3 is a negative voltage, for example, Vi3 can be a -3V voltage signal;

[0336] In the second light-emitting stage S25, S1 provides a high voltage signal, S0 provides a high voltage signal, S3 provides a high voltage signal, E1 and E2 provide low voltage signals, T4 and T5 are turned on, and T0 drives O1 to emit light.

[0337] As shown in FIG22, when at least one embodiment of the pixel circuit shown in FIG18 of this disclosure is in operation, the holding frame includes a second reset stage S22, a holding set stage S23, a second reset stage S24 and a second light emission stage S25 arranged sequentially.

[0338] During the hold frame, NG provides a low voltage signal, T3 is turned off, and the gate of T0 is disconnected from the drain of T0 to maintain the gate voltage of T0.

[0339] In the second reset phase S22, S1 provides a low voltage signal, S0 provides a high voltage signal, S3 provides a high voltage signal, E1 and E2 provide high voltage signals, I1 provides a first initial voltage Vi1, and T1 is turned on to write Vi1 to the drain of T0.

[0340] During the hold-set phase S23, S1 provides a high voltage signal, S0 provides a low voltage signal, S3 provides a high voltage signal, E1 and E2 provide high voltage signals, T6 is turned on, D1 provides a voltage signal, and the voltage signal provided by D1 is written to the source of T0.

[0341] During the holding and setting phase S23, the voltage signal provided by D1 can be a positive voltage to set the source voltage of T0, thereby providing a bias voltage to the driving transistor T0, so that T0 is in a biased state to improve the hysteresis phenomenon.

[0342] In the second reset phase S24, S1 provides a high voltage signal, S0 provides a high voltage signal, S3 provides a low voltage signal, E1 and E2 provide high voltage signals, T2 is turned on, and I2 provides a second initial voltage Vi2; Vi2 is a positive voltage; for example, Vi2 can be a 5V voltage signal; T0 is turned on to reset the drain voltage and source voltage of T0 to Vi2, so that T0 is in a bias state, improving the hysteresis phenomenon; T7 is turned on, and I3 provides a reset voltage Vi3 to control O1 from emitting light and to clear the residual charge on the anode of O1; Vi3 is a negative voltage, for example, Vi3 can be a -3V voltage signal;

[0343] In the second light-emitting stage S25, S1 provides a high voltage signal, S0 provides a high voltage signal, S3 provides a high voltage signal, E1 and E2 provide low voltage signals, T4 and T5 are turned on, and T0 drives O1 to emit light.

[0344] In specific implementation, during the hold reset phase, the voltage signal provided by the data line D1 can be a data voltage Vdata. This data voltage Vdata is the data voltage provided by the data line D1 during the first charging phase, and its voltage range can be, for example, greater than or equal to 1V and less than or equal to 6.5V; or...

[0345] During the reset phase, the voltage signal provided by the data line D1 can be a reset voltage signal, and the voltage value range of the reset voltage signal can be greater than or equal to 4.6V and less than or equal to 7V.

[0346] However, this is not the limit.

[0347] In at least one embodiment of the pixel circuit shown in FIG17, when the present disclosure is in operation, during low-frequency display, the display cycle includes a refresh frame and a hold frame. In the second reset phase of the hold frame, the present disclosure embodiment biases the driving transistors included in the driving circuit so that in the reset phase of the hold frame, the potential of the source and the potential of the drain of the driving transistors in the driving circuit are consistent with the refresh frame, which can improve the flickering phenomenon.

[0348] The driving method described in this embodiment is applied to the pixel circuit described above, wherein the display cycle of the pixel circuit includes a refresh frame and a hold frame; the refresh frame and the hold frame respectively include a reset phase and a light emission phase set sequentially; the driving method includes:

[0349] During the refresh frame and the hold frame, at least during the reset phase, the initialization circuit, under the control of the initial control signal provided by the initial control terminal, controls the initial voltage provided by the initial voltage terminal to be supplied to the first terminal and / or the second terminal of the drive circuit.

[0350] In the driving method described in the embodiments of this disclosure, under the control of the initial control signal, the initialization circuit, at least during the reset phase in the refresh frame and the hold frame, controls the initial voltage provided by the initial voltage terminal to be provided to the first terminal and / or the second terminal of the driving circuit, so as to provide a bias voltage to the driving transistors included in the driving circuit, so that the driving transistors included in the driving circuit are in a biased state, thereby improving the hysteresis phenomenon and enhancing the display effect.

[0351] Optionally, the initialization circuit includes a first initialization sub-circuit; the pixel circuit further includes a first light-emitting control circuit, a second light-emitting control circuit, a data writing circuit, and a reset circuit; the refresh frame includes a first initialization stage, a first reset stage, a first charging stage, a first reset stage, and a first light-emitting stage set sequentially; the driving method described in at least one embodiment of this disclosure includes:

[0352] During the first initialization phase, the first initialization sub-circuit, under the control of the first initial control signal, writes the first initial voltage provided by the first initial voltage terminal into the second terminal of the drive circuit; under the control of the compensation control signal, the compensation control circuit controls the connection between the control terminal of the drive circuit and the second terminal of the drive circuit.

[0353] During the first reset phase, the reset circuit, under the control of the reset control signal, writes the reset voltage provided by the reset voltage terminal into the first electrode of the light-emitting element. Under the control of the second light-emitting control signal, the second light-emitting control circuit controls the second terminal of the driving circuit to connect with the first electrode of the light-emitting element. Under the control of the compensation control signal, the compensation control circuit controls the control terminal of the driving circuit to connect with the second terminal of the driving circuit.

[0354] During the first charging phase, the data writing circuit writes the data voltage provided by the data line into the first terminal of the driving circuit, and the compensation control circuit controls the connection between the control terminal of the driving circuit and the second terminal of the driving circuit under the control of the compensation control signal.

[0355] During the first reset phase, the first initialization sub-circuit, under the control of the first initial control signal, writes the first initial voltage provided by the first initial voltage terminal into the second terminal of the driving circuit; under the control of the potential of its control terminal, the driving circuit controls the connection between the first terminal and the second terminal of the driving circuit, so as to control the driving transistors included in the driving circuit to be in a biased state.

[0356] In the first light-emitting stage, the first light-emitting control circuit, under the control of the first light-emitting control signal, controls the connection between the power supply voltage terminal and the first terminal of the driving circuit; the second light-emitting control circuit, under the control of the second light-emitting control signal, controls the connection between the second terminal of the driving circuit and the first electrode of the light-emitting element; the driving circuit, under the control of the potential of its control terminal, drives the light-emitting element to emit light.

[0357] In at least one embodiment of this disclosure, the initialization circuit includes a first initialization sub-circuit; the pixel circuit further includes a first light emission control circuit, a second light emission control circuit, a data writing circuit, and a reset circuit; the holding frame includes a second initialization stage, a second reset stage, a second reset stage, and a second light emission stage set sequentially; the driving method includes:

[0358] During the holding frame, under the control of the compensation control signal, the compensation control circuit controls the control terminal of the drive circuit to disconnect from the second terminal of the drive circuit;

[0359] In the second initialization phase, the first initialization sub-circuit, under the control of the first initial control signal, writes the first initial voltage provided by the first initial voltage terminal into the second terminal of the driving circuit;

[0360] In the second reset phase, under the control of the reset control signal, the reset circuit writes the reset voltage provided by the reset voltage terminal into the first electrode of the light-emitting element, and under the control of the second light-emitting control signal, the second light-emitting control circuit controls the second terminal of the driving circuit to connect with the first electrode of the light-emitting element.

[0361] During the second reset phase, the first initialization sub-circuit, under the control of the first initial control signal, writes the first initial voltage provided by the first initial voltage terminal into the second terminal of the driving circuit; under the control of the potential of its control terminal, the driving circuit controls the connection between the first terminal and the second terminal of the driving circuit, so as to control the driving transistors included in the driving circuit to be in a biased state.

[0362] In the second light-emitting stage, the first light-emitting control circuit, under the control of the first light-emitting control signal, controls the connection between the power supply voltage terminal and the first terminal of the driving circuit; the second light-emitting control circuit, under the control of the second light-emitting control signal, controls the connection between the second terminal of the driving circuit and the first electrode of the light-emitting element; the driving circuit, under the control of the potential of its control terminal, drives the light-emitting element to emit light.

[0363] In at least one embodiment of this disclosure, the holding frame further includes a holding set phase disposed between the second reset phase and the second reset phase; the driving method further includes:

[0364] During the hold-set phase, the data writing circuit writes the voltage signal provided by the data line to the first terminal of the drive circuit.

[0365] Optionally, the initialization circuit includes a second initialization sub-circuit; the pixel circuit further includes a first light-emitting control circuit, a second light-emitting control circuit, a data writing circuit, and a reset circuit; the refresh frame includes a first initialization stage, a first reset stage, a first charging stage, a first reset stage, and a first light-emitting stage set sequentially; the driving method described in at least one embodiment of this disclosure includes:

[0366] During the first initialization phase, the second initialization sub-circuit, under the control of the second initial control signal, writes the second initial voltage provided by the second initial voltage terminal into the first terminal of the drive circuit; the compensation control circuit, under the control of the compensation control signal, controls the connection between the control terminal of the drive circuit and the second terminal of the drive circuit.

[0367] During the first reset phase, the reset circuit, under the control of the reset control signal, writes the reset voltage provided by the reset voltage terminal into the first electrode of the light-emitting element; the second light-emitting control circuit, under the control of the second light-emitting control signal, controls the second terminal of the driving circuit to connect with the first electrode of the light-emitting element; the compensation control circuit, under the control of the compensation control signal, controls the control terminal of the driving circuit to connect with the second terminal of the driving circuit.

[0368] During the first charging phase, the data writing circuit writes the data voltage provided by the data line into the first terminal of the driving circuit, and the compensation control circuit controls the connection between the control terminal of the driving circuit and the second terminal of the driving circuit under the control of the compensation control signal.

[0369] During the first reset phase, the second initialization sub-circuit, under the control of the second initial control signal, writes the second initial voltage provided by the second initial voltage terminal into the first terminal of the driving circuit; under the control of the potential of its control terminal, the driving circuit controls the connection between the first terminal and the second terminal of the driving circuit, so as to control the driving transistors included in the driving circuit to be in a biased state.

[0370] In the first light-emitting stage, the first light-emitting control circuit, under the control of the first light-emitting control signal, controls the connection between the power supply voltage terminal and the first terminal of the driving circuit; the second light-emitting control circuit, under the control of the second light-emitting control signal, controls the connection between the second terminal of the driving circuit and the first electrode of the light-emitting element; the driving circuit, under the control of the potential of its control terminal, drives the light-emitting element to emit light.

[0371] In at least one embodiment of this disclosure, the initialization circuit includes a second initialization sub-circuit; the pixel circuit further includes a first light emission control circuit, a second light emission control circuit, a data writing circuit, and a reset circuit; the holding frame includes a second initialization stage, a second reset stage, a second reset stage, and a second light emission stage set sequentially; the driving method includes:

[0372] During the holding frame, under the control of the compensation control signal, the compensation control circuit controls the control terminal of the drive circuit to disconnect from the second terminal of the drive circuit;

[0373] During the second initialization phase, the second initialization sub-circuit, under the control of the second initial control signal, writes the second initial voltage provided by the second initial voltage terminal into the first terminal of the drive circuit.

[0374] During the second reset phase, the reset circuit, under the control of the reset control signal, writes the reset voltage provided by the reset voltage terminal into the first electrode of the light-emitting element; the second light-emitting control circuit, under the control of the second light-emitting control signal, controls the second terminal of the driving circuit to connect with the first electrode of the light-emitting element.

[0375] During the second reset phase, the second initialization sub-circuit, under the control of the second initial control signal, writes the second initial voltage provided by the second initial voltage terminal into the first terminal of the driving circuit; under the control of the potential of its control terminal, the driving circuit controls the connection between the first terminal and the second terminal of the driving circuit, so as to control the driving transistors included in the driving circuit to be in a biased state.

[0376] In the second light-emitting stage, the first light-emitting control circuit, under the control of the first light-emitting control signal, controls the connection between the power supply voltage terminal and the first terminal of the driving circuit; the second light-emitting control circuit, under the control of the second light-emitting control signal, controls the connection between the second terminal of the driving circuit and the first electrode of the light-emitting element; the driving circuit, under the control of the potential of its control terminal, drives the light-emitting element to emit light.

[0377] In at least one embodiment of this disclosure, the holding frame further includes a holding set phase disposed between the second reset phase and the second reset phase; the driving method further includes:

[0378] During the hold-set phase, the data writing circuit writes the voltage signal provided by the data line to the first terminal of the drive circuit.

[0379] Optionally, the initialization circuit includes a first initialization sub-circuit and a second initialization sub-circuit; the pixel circuit further includes a first light-emitting control circuit, a second light-emitting control circuit, and a data writing circuit; the refresh frame includes a first reset stage, a first charging stage, a first reset stage, and a first light-emitting stage set sequentially; the driving method described in at least one embodiment of this disclosure includes:

[0380] During the first reset phase, the first initialization sub-circuit, under the control of the first initial control signal, writes the first initial voltage provided by the first initial voltage terminal into the second terminal of the driving circuit. Under the control of the compensation control signal, the compensation control circuit controls the connection between the control terminal of the driving circuit and the second terminal of the driving circuit.

[0381] During the first charging phase, the data writing circuit writes the data voltage provided by the data line into the first terminal of the driving circuit, and the compensation control circuit controls the connection between the control terminal of the driving circuit and the second terminal of the driving circuit under the control of the compensation control signal.

[0382] During the first reset phase, the second initialization sub-circuit, under the control of the second initial control signal, writes the second initial voltage provided by the second initial voltage terminal into the first terminal of the driving circuit. Under the control of the potential of its control terminal, the driving circuit controls the first terminal of the driving circuit to connect with the second terminal of the driving circuit, so as to control the driving transistors included in the driving circuit to be in a biased state.

[0383] In the first light-emitting stage, the first light-emitting control circuit, under the control of the first light-emitting control signal, controls the connection between the power supply voltage terminal and the first terminal of the driving circuit; the second light-emitting control circuit, under the control of the second light-emitting control signal, controls the connection between the second terminal of the driving circuit and the first electrode of the light-emitting element; the driving circuit, under the control of the potential of its control terminal, drives the light-emitting element to emit light.

[0384] In at least one embodiment of this disclosure, the pixel circuit further includes a reset circuit; the driving method further includes:

[0385] During the first reset phase, the reset circuit, under the control of the reset control signal, writes the reset voltage provided by the reset voltage terminal into the first electrode of the light-emitting element.

[0386] Optionally, the initialization circuit includes a first initialization sub-circuit and a second initialization sub-circuit; the pixel circuit further includes a first light emission control circuit, a second light emission control circuit, and a data writing circuit; the holding frame includes a second initialization stage, a second reset stage, a second reset stage, and a second light emission stage set sequentially; the driving method described in at least one embodiment of this disclosure includes:

[0387] During the holding frame, under the control of the compensation control signal, the compensation control circuit controls the control terminal of the drive circuit to disconnect from the second terminal of the drive circuit;

[0388] During the second reset phase, the first initialization sub-circuit, under the control of the first initial control signal, writes the first initial voltage provided by the first initial voltage terminal into the second terminal of the driving circuit;

[0389] During the second reset phase, the second initialization sub-circuit, under the control of the second initial control signal, writes the second initial voltage provided by the second initial voltage terminal into the first terminal of the driving circuit. Under the control of the potential of its control terminal, the driving circuit controls the first terminal of the driving circuit to connect with the second terminal of the driving circuit, so as to control the driving transistors included in the driving circuit to be in a biased state.

[0390] In the second light-emitting stage, the first light-emitting control circuit, under the control of the first light-emitting control signal, controls the connection between the power supply voltage terminal and the first terminal of the driving circuit; the second light-emitting control circuit, under the control of the second light-emitting control signal, controls the connection between the second terminal of the driving circuit and the first electrode of the light-emitting element; the driving circuit, under the control of the potential of its control terminal, drives the light-emitting element to emit light.

[0391] Optionally, the pixel circuit further includes a reset circuit; the driving method described in at least one embodiment of this disclosure further includes:

[0392] During the second reset phase, the reset circuit, under the control of the reset control signal, writes the reset voltage provided by the reset voltage terminal into the first electrode of the light-emitting element.

[0393] In at least one embodiment of this disclosure, the holding frame further includes a holding set phase disposed between the second reset phase and the second reset phase; the driving method further includes:

[0394] During the hold-set phase, the data writing circuit writes the voltage signal provided by the data line to the first terminal of the drive circuit.

[0395] The display device described in this disclosure includes the pixel circuit described above.

[0396] The display device provided in this disclosure can be any product or component with display function, such as a mobile phone, tablet computer, television, monitor, laptop computer, digital photo frame, or navigator.

[0397] The above description represents the preferred embodiments of this disclosure. It should be noted that those skilled in the art can make various improvements and modifications without departing from the principles described herein, and these improvements and modifications should also be considered within the scope of protection of this disclosure.

Claims

1. A pixel circuit, comprising a light-emitting element, a driving circuit, an energy storage circuit, an initialization circuit, and a compensation control circuit; the display cycle of the pixel circuit includes a refresh frame and a hold frame; the refresh frame and the hold frame respectively include a reset phase and a light-emitting phase set sequentially; the energy storage circuit is electrically connected to the control terminal of the driving circuit for storing electrical energy; the compensation control circuit is electrically connected to a compensation control terminal, the control terminal of the driving circuit, and a second terminal of the driving circuit, respectively, for controlling the connection between the control terminal of the driving circuit and the second terminal of the driving circuit under the control of the compensation control signal provided by the compensation control terminal; the initialization circuit is electrically connected to an initial control terminal and an initial voltage terminal, and the initialization circuit is electrically connected to a first terminal and / or a second terminal of the driving circuit, respectively, for controlling the connection between the initial control terminal and the second terminal of the driving circuit under the control of the initial voltage signal provided by the initial control terminal. Under the control of a control signal, during the refresh frame and the hold frame, at least during the reset phase, the initial voltage provided by the initial voltage terminal is supplied to the first terminal and / or the second terminal of the driving circuit; the second terminal of the driving circuit is electrically connected to the light-emitting element and is used to drive the light-emitting element under the control of the potential of the control terminal of the driving circuit; the pixel circuit further includes a first light-emitting control circuit, a second light-emitting control circuit, a data writing circuit, and a reset circuit; the initialization circuit includes a first initialization sub-circuit; the refresh frame includes a first initialization phase, a first reset phase, a first charging phase, and a first reset phase set sequentially; the first initialization sub-circuit is used to write the first initial voltage provided by the first initial voltage terminal to the second terminal of the driving circuit under the control of the first initial control signal during the first initialization phase; The compensation control circuit is used to connect the control terminal of the driving circuit and the second terminal of the driving circuit under the control of the compensation control signal during the first initialization phase; the reset circuit is used to write the reset voltage provided by the reset voltage terminal to the first electrode of the light-emitting element under the control of the reset control signal during the first reset phase; the second light-emitting control circuit is used to connect the second terminal of the driving circuit and the first electrode of the light-emitting element under the control of the second light-emitting control signal during the first reset phase; the compensation control circuit is used to connect the control terminal of the driving circuit and the second terminal of the driving circuit under the control of the compensation control signal during the first reset phase; the data writing circuit is used to write the data voltage provided by the data line to the first terminal of the driving circuit during the first charging phase; the compensation control circuit is used to... Under the control of the compensation control signal, the control terminal of the driving circuit is connected to the second terminal of the driving circuit; the first initialization sub-circuit is used to write the first initial voltage provided by the first initial voltage terminal to the second terminal of the driving circuit under the control of the first initial control signal during the first reset phase; the driving circuit is used to control the connection between the first terminal and the second terminal of the driving circuit under the control of the potential of the control terminal of the driving circuit during the first reset phase; or, the initialization circuit includes a second initialization sub-circuit; the refresh frame includes a first initialization phase, a first reset phase, a first charging phase and a first reset phase set sequentially; the second initialization sub-circuit is used to write the second initial voltage provided by the second initial voltage terminal to the first terminal of the driving circuit under the control of the second initial control signal during the first initialization phase; The compensation control circuit is used to connect the control terminal of the driving circuit and the second terminal of the driving circuit under the control of the compensation control signal during the first initialization phase; the reset circuit is used to write the reset voltage provided by the reset voltage terminal to the first electrode of the light-emitting element under the control of the reset control signal during the first reset phase; the second light-emitting control circuit is used to connect the second terminal of the driving circuit and the first electrode of the light-emitting element under the control of the second light-emitting control signal during the first reset phase; the compensation control circuit is used to connect the control terminal of the driving circuit and the second terminal of the driving circuit under the control of the compensation control signal during the first reset phase; the data writing circuit is used to write the data voltage provided by the data line to the first terminal of the driving circuit during the first charging phase; the compensation control circuit is used to connect the control terminal of the driving circuit and the second terminal of the driving circuit under the control of the compensation control signal during the first charging phase; the second initialization sub-circuit is used to write the second initial voltage provided by the second initial voltage terminal to the first terminal of the driving circuit under the control of the second initial control signal during the first reset phase. The driving circuit is used to control the connection between the first terminal and the second terminal of the driving circuit under the control of the potential of the control terminal of the driving circuit during the first reset phase; or, the initialization circuit includes a first initialization sub-circuit and a second initialization sub-circuit; the refresh frame includes a first reset phase, a first charging phase, and a first reset phase set sequentially; the first initialization sub-circuit is used to write the first initial voltage provided by the first initial voltage terminal to the second terminal of the driving circuit under the control of the first initial control signal during the first reset phase; the compensation control circuit is used to control the connection between the control terminal of the driving circuit and the second terminal of the driving circuit under the control of the compensation control signal during the first reset phase. The second end of the circuit is connected; the data writing circuit is used to write the data voltage provided by the data line to the first end of the driving circuit during the first charging stage; the compensation control circuit is used to control the connection between the control end of the driving circuit and the second end of the driving circuit under the control of the compensation control signal during the first charging stage; the second initialization sub-circuit is used to write the second initial voltage provided by the second initial voltage terminal to the first end of the driving circuit under the control of the second initial control signal during the first reset stage; the driving circuit is used to control the connection between the first end of the driving circuit and the second end of the driving circuit under the control of the potential of the control end of the driving circuit during the first reset stage.

2. The pixel circuit as described in claim 1, wherein, The driving circuit includes a p-type driving transistor, and the initial voltage is a positive voltage.

3. The pixel circuit as described in claim 1, wherein, The initialization circuit includes a first initialization sub-circuit; the initial control terminal includes a first initial control terminal, and the initial voltage terminal includes a first initial voltage terminal; the first initialization sub-circuit is electrically connected to the first initial control terminal, the first initial voltage terminal, and the second terminal of the driving circuit, respectively, and is used to write the first initial voltage provided by the first initial voltage terminal to the second terminal of the driving circuit under the control of the first initial control signal provided by the first initial control terminal, at least during the reset phase in the refresh frame and the hold frame.

4. The pixel circuit as described in claim 1, wherein, The initialization circuit includes a second initialization sub-circuit; the initial control terminal includes a second initial control terminal, and the initial voltage terminal includes a second initial voltage terminal; the second initialization sub-circuit is electrically connected to the second initial control terminal, the second initial voltage terminal, and the first terminal of the driving circuit, respectively, and is used to write the second initial voltage provided by the second initial voltage terminal into the first terminal of the driving circuit under the control of the second initial control signal provided by the second initial control terminal, at least during the reset phase in the refresh frame and the hold frame.

5. The pixel circuit as described in claim 1, wherein, The initialization circuit includes a first initialization sub-circuit and a second initialization sub-circuit; the initial control terminal includes a first initial control terminal and a second initial control terminal, and the initial voltage terminal includes a first initial voltage terminal and a second initial voltage terminal; the first initialization sub-circuit is electrically connected to the first initial control terminal, the first initial voltage terminal, and the second terminal of the driving circuit, respectively, and is used to write the first initial voltage provided by the first initial voltage terminal into the second terminal of the driving circuit under the control of the first initial control signal provided by the first initial control terminal, during the refresh frame and the hold frame, at least during the reset phase; the second initialization sub-circuit is electrically connected to the second initial control terminal, the second initial voltage terminal, and the first terminal of the driving circuit, respectively, and is used to write the second initial voltage provided by the second initial voltage terminal into the first terminal of the driving circuit under the control of the second initial control signal provided by the second initial control terminal, during the refresh frame and the hold frame, at least during the reset phase.

6. The pixel circuit as described in claim 3, wherein, The first initialization sub-circuit includes a first transistor; the control electrode of the first transistor is electrically connected to the first initial control terminal, the first electrode of the first transistor is electrically connected to the first initial voltage terminal, and the second electrode of the first transistor is electrically connected to the second terminal of the driving circuit.

7. The pixel circuit as described in claim 4, wherein, The second initialization sub-circuit includes a second transistor; the control electrode of the second transistor is electrically connected to the second initial control terminal, the first electrode of the second transistor is electrically connected to the second initial voltage terminal, and the second electrode of the second transistor is electrically connected to the first terminal of the driving circuit.

8. The pixel circuit as described in claim 5, wherein, The first initialization sub-circuit includes a first transistor, and the second initialization sub-circuit includes a second transistor; the control electrode of the first transistor is electrically connected to the first initial control terminal, the first electrode of the first transistor is electrically connected to the first initial voltage terminal, and the second electrode of the first transistor is electrically connected to the second terminal of the driving circuit; the control electrode of the second transistor is electrically connected to the second initial control terminal, the first electrode of the second transistor is electrically connected to the second initial voltage terminal, and the second electrode of the second transistor is electrically connected to the first terminal of the driving circuit.

9. The pixel circuit according to any one of claims 1 to 8, wherein, The first light-emitting control circuit is electrically connected to the first light-emitting control terminal, the power supply voltage terminal, and the first terminal of the driving circuit, respectively, and is used to control the connection between the power supply voltage terminal and the first terminal of the driving circuit under the control of the first light-emitting control signal provided by the first light-emitting control terminal; the second light-emitting control circuit is electrically connected to the second light-emitting control terminal, the second terminal of the driving circuit, and the first electrode of the light-emitting element, respectively, and is used to control the connection between the second terminal of the driving circuit and the first electrode of the light-emitting element under the control of the second light-emitting control signal provided by the second light-emitting control terminal; the second electrode of the light-emitting element is electrically connected to the first voltage terminal; the data writing circuit is electrically connected to the write control terminal, the data line, and the first terminal of the driving circuit, respectively, and is used to control the connection between the data line and the first terminal of the driving circuit under the control of the write control signal provided by the write control terminal.

10. The pixel circuit as claimed in claim 9, wherein, The reset circuit is electrically connected to the reset control terminal, the reset voltage terminal, and the first electrode of the light-emitting element, respectively, and is used to control the reset voltage provided by the reset voltage terminal to be written into the first electrode of the light-emitting element under the control of the reset control signal provided by the reset control terminal.

11. The pixel circuit as claimed in claim 9, wherein, The compensation control circuit includes a third transistor, the first light-emitting control circuit includes a fourth transistor, the second light-emitting control circuit includes a fifth transistor, the data writing circuit includes a sixth transistor, and the driving circuit includes a driving transistor. The control electrode of the third transistor is electrically connected to the compensation control terminal, the first electrode of the third transistor is electrically connected to the control terminal of the driving circuit, and the second electrode of the third transistor is electrically connected to the second terminal of the driving circuit. The control electrode of the fourth transistor is electrically connected to the first light-emitting control terminal, the first electrode of the fourth transistor is electrically connected to the power supply voltage terminal, and the second electrode of the fourth transistor is electrically connected to the first terminal of the driving circuit. The control electrode of the fifth transistor is electrically connected to the second light-emitting control terminal, the first electrode of the fifth transistor is electrically connected to the second terminal of the driving circuit, and the second electrode of the fifth transistor is electrically connected to the first electrode of the light-emitting element. The control electrode of the sixth transistor is electrically connected to the write control terminal, the first electrode of the sixth transistor is electrically connected to the data line, and the second electrode of the sixth transistor is electrically connected to the first terminal of the driving circuit. The control electrode of the driving transistor is electrically connected to the control terminal of the driving circuit, the first electrode of the driving transistor is electrically connected to the first terminal of the driving circuit, and the second electrode of the driving transistor is electrically connected to the second terminal of the driving circuit.

12. The pixel circuit as claimed in claim 11, wherein, The third transistor is an oxide thin-film transistor.

13. The pixel circuit as claimed in claim 10, wherein, The reset circuit includes a seventh transistor; the control electrode of the seventh transistor is electrically connected to the reset control terminal, the first electrode of the seventh transistor is electrically connected to the reset voltage terminal, and the second electrode of the seventh transistor is electrically connected to the first electrode of the light-emitting element.

14. The pixel circuit as claimed in claim 13, wherein, The seventh transistor is an oxide thin-film transistor.

15. A driving method applied to a pixel circuit as claimed in any one of claims 1 to 14, wherein the display cycle of the pixel circuit includes a refresh frame and a hold frame; The refresh frame and the hold frame each include a reset phase and a light emission phase set sequentially; the driving method includes: In the refresh frame and the hold frame, at least in the reset phase, the initialization circuit, under the control of the initial control signal provided by the initial control terminal, controls the initial voltage provided by the initial voltage terminal to be provided to the first terminal and / or the second terminal of the driving circuit; the initialization circuit includes a first initialization sub-circuit; the pixel circuit further includes a first light emission control circuit, a second light emission control circuit, a data writing circuit, and a reset circuit; the refresh frame includes a first initialization phase, a first reset phase, a first charging phase, and a first reset phase set sequentially; the driving method includes: in the first initialization phase, the first initialization sub-circuit, under the control of the first initial control signal, controls the initial voltage provided by the first initial voltage terminal to be provided to the first terminal and / or the second terminal of the driving circuit; the initialization circuit includes a first initialization sub-circuit, under the control of the first initial control signal, controls the initial voltage provided by the ... The first initial voltage is written to the second terminal of the driving circuit; under the control of the compensation control signal, the compensation control circuit controls the connection between the control terminal of the driving circuit and the second terminal of the driving circuit; in the first reset phase, under the control of the reset control signal, the reset circuit writes the reset voltage provided by the reset voltage terminal to the first electrode of the light-emitting element; under the control of the second light-emitting control signal, the second light-emitting control circuit controls the connection between the second terminal of the driving circuit and the first electrode of the light-emitting element; under the control of the compensation control signal, the compensation control circuit controls the connection between the control terminal of the driving circuit and the second terminal of the driving circuit; in the first charging phase, the data writing circuit writes the data voltage provided by the data line to... The first terminal of the driving circuit is connected to the second terminal of the driving circuit under the control of the compensation control signal; during the first reset phase, the first initialization sub-circuit, under the control of the first initial control signal, writes the first initial voltage provided by the first initial voltage terminal to the second terminal of the driving circuit; the driving circuit, under the control of the potential of its control terminal, controls the connection between the first terminal and the second terminal of the driving circuit; or, the initialization circuit includes a second initialization sub-circuit; the pixel circuit further includes a first light emission control circuit, a second light emission control circuit, a data writing circuit, and a reset circuit; the refresh frame includes a first initialization set sequentially. The driving method includes a first initialization stage, a first reset stage, a first charging stage, and a first reset stage; the driving method includes: in the first initialization stage, the second initialization sub-circuit, under the control of the second initial control signal, writes the second initial voltage provided by the second initial voltage terminal into the first terminal of the driving circuit; the compensation control circuit, under the control of the compensation control signal, controls the connection between the control terminal of the driving circuit and the second terminal of the driving circuit; in the first reset stage, the reset circuit, under the control of the reset control signal, writes the reset voltage provided by the reset voltage terminal into the first electrode of the light-emitting element; the second light-emitting control circuit, under the control of the second light-emitting control signal, controls the connection between the second terminal of the driving circuit and the first electrode of the light-emitting element;Under the control of the compensation control signal, the compensation control circuit connects the control terminal of the driving circuit to the second terminal of the driving circuit; in the first charging stage, the data writing circuit writes the data voltage provided by the data line to the first terminal of the driving circuit, and under the control of the compensation control signal, the compensation control circuit connects the control terminal of the driving circuit to the second terminal of the driving circuit; in the first reset stage, the second initialization sub-circuit, under the control of the second initial control signal, writes the second initial voltage provided by the second initial voltage terminal to the first terminal of the driving circuit; under the control of the potential of its control terminal, the driving circuit connects the first terminal of the driving circuit to the second terminal of the driving circuit; or, the initialization circuit includes a first initialization sub-circuit and a second initialization sub-circuit; the pixel circuit further includes a first light emission control circuit, a second light emission control circuit, and a data writing circuit; the refresh frame includes a first reset stage and a first charging stage set sequentially. The driving method includes a charging phase and a first reset phase; the driving method includes: in the first reset phase, the first initialization sub-circuit, under the control of a first initial control signal, writes a first initial voltage provided by a first initial voltage terminal into the second terminal of the driving circuit, and the compensation control circuit, under the control of a compensation control signal, controls the connection between the control terminal of the driving circuit and the second terminal of the driving circuit; in the first charging phase, the data writing circuit writes a data voltage provided by a data line into the first terminal of the driving circuit, and the compensation control circuit, under the control of a compensation control signal, controls the connection between the control terminal of the driving circuit and the second terminal of the driving circuit; in the first reset phase, the second initialization sub-circuit, under the control of a second initial control signal, writes a second initial voltage provided by a second initial voltage terminal into the first terminal of the driving circuit, and the driving circuit, under the control of the potential of its control terminal, controls the connection between the first terminal of the driving circuit and the second terminal of the driving circuit.

16. The driving method as described in claim 15, wherein, The initialization circuit includes a first initialization sub-circuit; the refresh frame further includes a first light-emitting stage set after the first reset stage; the driving method further includes: in the first light-emitting stage, the first light-emitting control circuit, under the control of a first light-emitting control signal, controls the power supply voltage terminal to be connected to the first terminal of the driving circuit; the second light-emitting control circuit, under the control of a second light-emitting control signal, controls the second terminal of the driving circuit to be connected to the first electrode of the light-emitting element; the driving circuit, under the control of the potential of its control terminal, drives the light-emitting element to emit light.

17. The driving method as described in claim 15, wherein, The initialization circuit includes a first initialization sub-circuit; the pixel circuit further includes a first light-emitting control circuit, a second light-emitting control circuit, a data writing circuit, and a reset circuit; the holding frame includes a second initialization stage, a second reset stage, a second reset stage, and a second light-emitting stage set sequentially; the driving method includes: in the holding frame, the compensation control circuit, under the control of a compensation control signal, controls the control terminal of the driving circuit to disconnect from the second terminal of the driving circuit; in the second initialization stage, the first initialization sub-circuit, under the control of a first initial control signal, writes the first initial voltage provided by the first initial voltage terminal into the second terminal of the driving circuit; in the second reset stage, the reset circuit, under the control of a reset control signal, writes the reset voltage provided by the reset voltage terminal into the first electrode of the light-emitting element, and the second light-emitting control circuit, under the control of a second light-emitting control signal, controls the second terminal of the driving circuit to connect with the first electrode of the light-emitting element; in the... In the second reset phase, the first initialization sub-circuit, under the control of the first initial control signal, writes the first initial voltage provided by the first initial voltage terminal into the second terminal of the driving circuit; the driving circuit, under the control of the potential of its control terminal, controls the connection between the first terminal and the second terminal of the driving circuit; in the second light emission phase, the first light emission control circuit, under the control of the first light emission control signal, controls the connection between the power supply voltage terminal and the first terminal of the driving circuit; the second light emission control circuit, under the control of the second light emission control signal, controls the connection between the second terminal of the driving circuit and the first electrode of the light-emitting element; the driving circuit, under the control of the potential of its control terminal, drives the light-emitting element to emit light; the holding frame further includes a holding set phase set between the second reset phase and the second reset phase; the driving method further includes: in the holding set phase, the data writing circuit writes the voltage signal provided by the data line into the first terminal of the driving circuit.

18. The driving method as described in claim 15, wherein, The initialization circuit includes a second initialization sub-circuit; the refresh frame further includes a first light-emitting stage set after the first reset stage; the driving method further includes: in the first light-emitting stage, the first light-emitting control circuit, under the control of a first light-emitting control signal, controls the connection between the power supply voltage terminal and the first terminal of the driving circuit; the second light-emitting control circuit, under the control of a second light-emitting control signal, controls the connection between the second terminal of the driving circuit and the first electrode of the light-emitting element; the driving circuit, under the control of the potential of its control terminal, drives the light-emitting element to emit light.

19. The driving method as described in claim 15, wherein, The initialization circuit includes a second initialization sub-circuit; the pixel circuit further includes a first light-emitting control circuit, a second light-emitting control circuit, a data writing circuit, and a reset circuit; the holding frame includes a second initialization stage, a second reset stage, a second reset stage, and a second light-emitting stage set sequentially; the driving method includes: in the holding frame, the compensation control circuit, under the control of a compensation control signal, controls the control terminal of the driving circuit to disconnect from the second terminal of the driving circuit; in the second initialization stage, the second initialization sub-circuit, under the control of a second initial control signal, writes the second initial voltage provided by the second initial voltage terminal into the first terminal of the driving circuit; in the second reset stage, the reset circuit, under the control of a reset control signal, writes the reset voltage provided by the reset voltage terminal into the first electrode of the light-emitting element; the second light-emitting control circuit, under the control of the second light-emitting control signal, controls the second terminal of the driving circuit to connect with the first electrode of the light-emitting element; in the... In the second reset phase, the second initialization sub-circuit, under the control of the second initial control signal, writes the second initial voltage provided by the second initial voltage terminal into the first terminal of the driving circuit; the driving circuit, under the control of the potential of its control terminal, controls the connection between the first terminal and the second terminal of the driving circuit; in the second light emission phase, the first light emission control circuit, under the control of the first light emission control signal, controls the connection between the power supply voltage terminal and the first terminal of the driving circuit; the second light emission control circuit, under the control of the second light emission control signal, controls the connection between the second terminal of the driving circuit and the first electrode of the light-emitting element; the driving circuit, under the control of the potential of its control terminal, drives the light-emitting element to emit light; the holding frame further includes a holding set phase set between the second reset phase and the second reset phase; the driving method further includes: in the holding set phase, the data writing circuit writes the voltage signal provided by the data line into the first terminal of the driving circuit.

20. The driving method as described in claim 15, wherein, The initialization circuit includes a first initialization sub-circuit and a second initialization sub-circuit; The refresh frame includes a first light-emitting stage set after the first reset stage; the driving method further includes: in the first light-emitting stage, the first light-emitting control circuit, under the control of the first light-emitting control signal, controls the connection between the power supply voltage terminal and the first terminal of the driving circuit; The second light-emitting control circuit, under the control of the second light-emitting control signal, controls the connection between the second terminal of the driving circuit and the first electrode of the light-emitting element; the driving circuit, under the control of the potential of its control terminal, drives the light-emitting element to emit light.

21. The driving method as described in claim 20, wherein, The pixel circuit further includes a reset circuit; the driving method further includes: in the first reset stage, the reset circuit, under the control of the reset control signal, writes the reset voltage provided by the reset voltage terminal into the first electrode of the light-emitting element.

22. The driving method as described in claim 15, wherein, The initialization circuit includes a first initialization sub-circuit and a second initialization sub-circuit; the pixel circuit further includes a first light-emitting control circuit, a second light-emitting control circuit, and a data writing circuit; the holding frame includes a second reset stage, a second reset stage, and a second light-emitting stage set sequentially; the driving method includes: in the holding frame, under the control of a compensation control signal, the compensation control circuit controls the control terminal of the driving circuit to disconnect from the second terminal of the driving circuit; in the second reset stage, under the control of a first initial control signal, the first initialization sub-circuit writes the first initial voltage provided by the first initial voltage terminal into the second terminal of the driving circuit; in the second reset stage, under the control of the second initial control signal, the second initialization sub-circuit writes the second initial voltage provided by the second initial voltage terminal into the first terminal of the driving circuit, and the driving circuit controls the first terminal of the driving circuit to connect with the second terminal of the driving circuit under the control of the potential of its control terminal; in the second light-emitting stage, under the control of the first light-emitting control signal, the first light-emitting control circuit controls the power supply voltage terminal to connect with the first terminal of the driving circuit; the second light-emitting control circuit controls the second terminal of the driving circuit to connect with the first electrode of the light-emitting element under the control of the second light-emitting control signal; and the driving circuit drives the light-emitting element to emit light under the control of the potential of its control terminal.

23. The driving method as described in claim 22, wherein, The pixel circuit further includes a reset circuit; the driving method further includes: in the second reset stage, the reset circuit, under the control of the reset control signal, writes the reset voltage provided by the reset voltage terminal into the first electrode of the light-emitting element.

24. The driving method as described in claim 22, wherein, The holding frame further includes a holding set phase set between the second reset phase and the second reset phase; the driving method further includes: during the holding set phase, the data writing circuit writes the voltage signal provided by the data line to the first terminal of the driving circuit.

25. A display device comprising a pixel circuit as described in any one of claims 1 to 14.

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