Multi-carrier modulation and coding system and method approaching capacity

Abstract

The present invention relates to a capacity-approaching multicarrier modulation and coding system and method. A multicarrier transmitter apparatus is disclosed. The apparatus includes an outer encoder, a shell mapper, and an inner encoder. The outer encoder is configured to receive a signal, perform error correction on the received signal using an outer code, and generate an outer encoder signal. The shell mapper is configured to perform constellation shaping on a subset of bits from the outer encoder signal and generate one or more constellation-shaped bits. The inner encoder is configured to perform inner error correction / coding on a second subset of bits from the outer encoder signal using the inner code and generate an inner correction signal.

Description

[0001] This application is a divisional application. The name of the invention of the parent application is “Multi-carrier modulation and coding system and method approaching capacity”, the application date is May 23, 2019, and the application number is 201910433950.6.

[0002] References to Related Applications

[0003] This application claims the benefit of U.S. Provisional Application No. 62 / 675,184, filed May 23, 2018, the contents of which are incorporated herein by reference in their entirety. Technical Field

[0004] Various embodiments relate generally to communications, and more particularly to modulation and coding for communications. Background Art

[0005] The demands and expectations placed on communication devices, such as cable modems (CMs), digital subscriber lines (DSLs), etc., continue to increase. For example, new designs may desire and / or require higher reliability and higher throughput.

[0006] Some of the techniques used for communication include modulation and coding. Modulation involves changing the properties of a signal (such as a carrier signal) to convey information. Coding is a technique for controlling or mitigating noise and / or errors in a communication signal / channel.

[0007] What is needed are techniques that facilitate communications through enhanced modulation and coding techniques. BRIEF DESCRIPTION OF THE DRAWINGS

[0008] Figure 1 is a diagram illustrating an example communication system in accordance with one or more embodiments.

[0009] Figure 2 is a diagram illustrating a shell mapping encoder system using LDPC according to one or more embodiments.

[0010] Figure 3 is a diagram illustrating example cosets for an inner encoder in accordance with one or more embodiments.

[0011] Figure 4 is a table 400 illustrating an example generation of QAM symbols according to one or more embodiments.

[0012] Figure 5 is a diagram illustrating an example of shell mapping according to one or more embodiments.

[0013] Figure 6 is a table illustrating an example lookup table (LUT) according to one or more embodiments.

[0014] Figure 7 is a table illustrating an example of a direct addressing scheme for a shell mapper according to one or more embodiments.

[0015] Figure 8 is a table illustrating example shaping gains according to one or more embodiments.

[0016] Figure 9 is a diagram illustrating an example mapping of bits to symbols in accordance with one or more embodiments.

[0017] Figure 10 is a diagram illustrating a decoder system for a receiver according to one or more embodiments. DETAILED DESCRIPTION

[0018] The present disclosure will now be described with reference to the accompanying drawings, in which the same reference numerals are used to refer to the same elements throughout, and the structures and devices illustrated therein are not necessarily drawn to scale. The same reference numerals may be used in different figures to identify the same or similar elements. In the following description, for the purpose of explanation and not limitation, specific details such as specific structures, architectures, interfaces, technologies, etc. are set forth, thereby providing a thorough understanding of the various aspects of each embodiment. However, it will be apparent to those skilled in the art who benefit from the present disclosure that various aspects of each embodiment can be put into practice in other examples that depart from these specific details. In some cases, the description of known devices, circuits, and methods has been omitted to avoid obscuring the description of each embodiment with unnecessary details.

[0019] As mentioned above, enhanced modulation and coding are needed to further increase data rates and reliability. Generally, modulation involves changing the properties of a signal (such as a carrier signal) to convey information, and coding is a technique to control or mitigate noise and / or errors in a communication signal / channel.

[0020] Communication systems utilize a variety of media including cable, air (wireless), twisted pair, copper wire, etc.

[0021] For cable-based systems, in order to further increase data rates to 10 Gbit / s over twisted-pair copper lines, channel capacity needs to be more efficient. Digital Subscriber Line (DSL) standards / technologies include xDSL and G.fast. G.fast is a digital subscriber line (DSL) protocol standard for local loops shorter than 500 meters (m).

[0022] These DSL systems may use techniques such as discrete multi-tone (DMT) modulation, in which each carrier is modulated with an adjustable QAM constellation per carrier, using an integer bit allocation between 1 and 12, 14, or 15 bits. To reduce bit error rates and improve efficiency, data is protected by interleaving using trellis-coded modulation (TCM) as the inner code and Reed-Solomon code as the outer code.

[0023] In recent years, capacity-achieving forward error correction (FEC) schemes, such as low-density parity-check (LDPC), have been introduced into wireless communication standards. However, applying FEC schemes such as LDPC to transmission over copper wires is problematic because the channel quality typically varies significantly from the lowest used frequency (highest channel quality) to the highest used frequency (low channel quality).

[0024] The coding and modulation schemes for copper lines are optimized or configured for low quality channels at low frequencies and high quality channels at low frequencies with the same FEC coding settings.

[0025] Furthermore, since most error correction coding schemes are optimized or configured for low channel quality (e.g., wireless channels), the challenge is to achieve high efficiency (high channel quality) in high SNR regions.

[0026] Probabilistic constellation shaping is a candidate solution to improve the performance in high SNR regions.

[0027] One or more embodiments are included that facilitate communications, particularly wired communications, such as communications based on two-wire or copper wires. These embodiments provide high efficiency for higher quality channels and provide suitable noise handling by encoding lower quality channels.

[0028] Figure 1 is a diagram illustrating an example communication system 100 in accordance with one or more embodiments. System 100 is provided for illustrative purposes, and it should be appreciated that suitable variations are contemplated.

[0029] System 100 includes a digital front-end (DFE) chip 102 and an analog front-end (AFE) 104. DFE 102 and AFE 104 are connected via an interface and / or signal line 106. In an alternative embodiment, DFE 102 is a baseband chip and AFE 104 is a transceiver chip. It should be appreciated that DFE 102 and AFE 104 can be located on a single chip.

[0030] The DFE chip 102 is configured to generate and receive baseband signals. These signals may include various data / information, such as user data, application data, etc. The DFE chip 102 generates baseband signals 106 in a digital format. In addition, the DFE chip 102 may receive signals (received baseband signals) from the AFE 104.

[0031] The AFE 104 may be configured for operation utilizing wired communications, such as DSL, xDSL, g.Fast, DOCSIS, etc. The AFE 104 is coupled to a medium or infrastructure 108. The infrastructure or medium may include two-wire, copper wire, cable, etc.

[0032] The AFE 104 typically includes transmitter circuitry, receiver circuitry, modulation circuitry, demodulation circuitry, and the like.

[0033] The system 100 may be compliant with one or more standards, requirements, specifications, etc. It should also be appreciated that suitable variations of the system 100 include using air as a medium or wireless communication.

[0034] Figure 2 is a diagram illustrating a shell mapping encoder system 200 using LDPC according to one or more embodiments. The encoder system 200 is provided for illustrative purposes, and it should be appreciated that suitable variations are contemplated.

[0035] The encoder system 200 may be used with the system 100 described above. The system 200 is shown as an encoder for operation with a transmitter. However, it should be appreciated that the system 200 may be modified to operate as a decoder for operation with a receiver system.

[0036] The encoder system 200 includes an outer (eg, Reed-Solomon) encoder 202 , a shell mapper 204 , an inner (eg, LDPC) encoder 206 , and a shell QAM modulator 208 .

[0037] System 200 may achieve higher performance than other approaches, such as those using Reed-Solomon and TCM for all constellation sizes.

[0038] Compared to other inner code methods (such as LDPC) that protect all bits, the inner code or LDPC code used with system 200 is generally more efficient to use and operates close to or near the channel capacity regardless of the SNR and constellation size. In addition, the LDPC encoder / decoder operates at a lower rate than systems that protect all bits, which reduces complexity and power consumption.

[0039] When additional probabilistic constellation shaping is used, efficiency in high SNR regions can be improved. Compared to other shaping schemes, there is no significant error propagation, and the number of bits per symbol is constant for small carrier blocks, so no additional buffering is required.

[0040] The system 200 is independent of whether inner or outer coding is used and thus can operate in conjunction with either TCM or LCM.

[0041] Coding and modulation schemes can be used to adapt the bit allocation on each carrier to the channel quality on that carrier. Standard QAM constellations are generally unable to modulate bits on carriers with high signal-to-noise ratios (SNRs). There is typically a shaping gap of up to 1.53 dB between typical QAM modulation and (Gaussian) modulation approaching capacity at higher SNRs. Probabilistic constellation shaping allows this gap to be reduced or even eliminated.

[0042] Several techniques / schemes exist for probabilistic constellation shaping, such as lattice shaping, Huffman coding, or shell mapping. However, the shaping scheme must be combined with the chosen FEC code and take into account the fact that shaping is performed on carrier groups at different constellation sizes. For target applications using high-speed data connections, such as MGfast, which targets a data rate of 10 Gbit / s, the implementation should have reasonable hardware complexity and low power consumption.

[0043] Data transmitted over a channel is typically protected by FEC. In one example, two FEC codes are used: an inner FEC code (LDPC or Trellis) and an outer FEC code (e.g., a Reed-Solomon code). The inner FEC code protects only the modulated bits with the highest error probability, while the outer FEC code corrects the remaining errors in the inner code and protects bits not protected by the inner code. Probability shaping is selected and parameterized for a given inner and outer FEC coding scheme.

[0044] It should be appreciated that some xDSL and G.fast systems use QAM that allocates an integer number of bits per carrier. Each QAM constellation point is transmitted with equal probability, and the bit allocation per carrier is optimized for the requested data rate and channel quality to achieve a specific target data rate.

[0045] To protect against and / or mitigate the effects of sudden changes in noise levels or channel changes, some SNR margin is typically used to reduce the data rate and improve the robustness / operation of the link.

[0046] In one example, forward error correction (FEC) is implemented using an inner trellis code that protects the two least significant bits (LSBs) of each constellation and adds 1 bit of overhead for every two constellations, resulting in an overhead of 1 / 2 bit per carrier. An outer Reed-Solomon code with interleaving is used to correct trellis error bursts and errors caused by unprotected bits. The overhead of the Reed-Solomon code is adjusted based on the selected data rate.

[0047] It will be appreciated that in some applications, including mobile phones, 2.5GBaseT Ethernet, and DOCSIS 3.1, LDPC codes can be used instead of lattice coding as inner FEC. By using LDPC, all data bits are protected with / can be protected with LDPC codes at a specific code rate that is selected for a specific signal-to-noise ratio (SNR) region. The Cable Data Service Interface Specification (DOCSIS) 3.1 utilizes outer codes (e.g., Bose-Chaudhuri-Hocquenghem (BCH) codes). G.hn (a specification for home networking) uses LDPC codes where the overhead can be adjusted to the average channel quality, but the same overhead is used for all carriers regardless of the actual SNR on each individual carrier.

[0048] It should also be appreciated that LDPC coded modulation (LCM) can be used for Very High-Speed Digital Subscriber Line 2 (VDSL2) and G.fast. In the case of LCM, the LDPC overhead is more optimized for a mix of different constellation sizes.

[0049] Additionally, it should be appreciated that probabilistic constellation shaping may be used for single carrier transmissions, such as V34 (modem standard / specification) voice band modems, as well as for other single carrier applications, such as optical fiber.

[0050] System 200 illustrates a coding and modulation framework with probability shaping (hull mapper 204), QAM modulation (modulator 208), inner LDPC code (LDPC encoder 206) using LCM for inner trellis coded modulation (TCM), and outer Reed-Solomon code (Reed-Solomon encoder 202).

[0051] The bit allocation may be per-tune adjustable. The constellation size may be adjusted in bit steps or fractions of a bit. The constellation may be divided into multiple circular shells, and the probability of using different shells may be adjusted by the shell mapper 204 to improve capacity.

[0052] The shell mapper 204 may operate on small tone groups (eg, 8, 16, or 32 carriers) to mitigate error propagation.

[0053] LCM can protect some LSBs of each constellation (e.g., 2 or 4 LSBs) with an LDPC code with a specific / selected overhead (e.g., a rate 3 / 4 code gives an overhead of 1 / 2 bit per carrier, or 4 LSBs in the case of a rate 3 / 4 code gives an overhead of 1 bit per carrier). Inner codes such as LDPC codes are not typically used to protect the shaping bits.

[0054] It will be appreciated that the shaping bits may be protected with an outer code such as a Reed-Solomon code.

[0055] As shown above, system 200 includes outer encoder 202, inner encoder 206, shell mapper 204, and modulator 208. The system receives an input signal, which may be a baseband signal and / or other signal, and generates a modulated signal as an output signal.

[0056] The outer encoder 202 uses an outer code, such as a Reed-Solomon code, a BCH code, or the like. The outer encoder 202 is configured to perform error correction using the outer code on the received / input signal to generate an outer encoder signal. The inner encoder 206 uses the inner code and protects a subset of bits for a larger constellation and / or a number of modulated bits for a smaller constellation. The inner encoder is configured to perform inner error correction using the inner code on a subset or portion of the bits from the outer encoder signal and generate an inner corrected signal.

[0057] The shell mapper 204 is configured to perform probability shaping and / or constellation shaping on another subset or portion of the bits from the outer encoder signal and generate a shell mapper signal. The shell mapper signal may include one or more constellation shaped bits.

[0058] The QAM modulator 208 is configured to generate an output signal for transmission based on the received outer encoder signal, shell mapper signal, and inner correction signal.The modulator 208 may generate one or more modulation symbols in the output signal.

[0059] The outer encoder 202 is configured to operate on the binary data of the input signal. rs The code block of bytes includes K rs data bytes and R rs redundant bytes. rs Bytes are also called output bytes.

[0060] Multiple Reed-Solomon code blocks (N rs bytes) can be mapped into a single data transmission unit (DTU), and interleaving can be applied between different code blocks within the DTU.

[0061] Typically, a DTU (or a single Reed-Solomon (RS) code block) is not aligned with a DMT or OFDM symbol boundary. One or each DTU may span multiple symbols, or a symbol may contain multiple DTUs. For each RS code block, K rs input bytes and convert them into N rs Output bytes: N rs =K rs +R rs This N is processed by the shell mapper 204, the inner encoder 206 and the modulator 208. rs output bytes.

[0062] The inner encoder 206 protects the b of each carrier. lem least significant bits, or if the number of bits per carrier b is less than or equal to b lem (b≤b lem ) (eg, if the number of least significant bits is equal to the number of bits per carrier), then all bits are protected.

[0063] In this example, the inner code is an LDPC code or a trellis code. If a trellis code or another convolutional code is used, the inner code is terminated after a specific / selected number of carriers (e.g., the number of carriers K of one DMT symbol) to form an inner code block. If an LDPC code is used as the inner code, the code can be shortened and / or punctured to adjust the block size to the DMT symbol size. Alternatively, the block size is independent of the number of carriers, and the LDPC blocks are not aligned with DMT symbol boundaries.

[0064] Typically, the inner code creates b for K carriers lcm K=N ldpc output bits (which may or may not match the number of carriers in a DMT / OFDM symbol). For each inner code block, take K from the outer code ldpc bits, which depends on the LDPC code rate s<1, such as N ldpc =K ldpc / s.

[0065] Since the inner code is modulated on b lcm bits, so the inner code can distinguish These distinct constellation points are called cosets. The coset labels are distributed in a larger QAM constellation where equal coset labels have maximum distances from each other. lcm is an even number, for example, b lcm =2 or b lcm =4, this distribution can be achieved.

[0066] exist Figure 3 Target b lcm= 2 shows an example of a coset. However, it should be appreciated that other coset configurations for the inner encoder 206 are contemplated.

[0067] Figure 3 is a diagram illustrating an example coset 300 for the inner encoder 206 in accordance with one or more embodiments. The example is provided for illustrative purposes, and it should be appreciated that suitable variations are contemplated.

[0068] This example illustrates labeled constellation points with different coset labels from one group 301. At the receiver, the receiver uses the result of the inner code to The decision is made between one of the constellation points, while the remaining bits can be obtained by decision or hard decision based on the results of the inner decoder.

[0069] The QAM modulator 208 uses the three input bit streams to modulate a carrier with a constellation size of b bits, with b bits per carrier from the inner encoder 206. lcm bits (least significant bit), from the constellation shaping performed by the shell mapper 204 k bits, and the remaining bb from the outer code or outer encoder 202 k -b lcm bit.

[0070] If b=b lcm +b k , then the bits are taken only from the output of the shaper / mapper 204 and the output of the inner encoder 206 (e.g., LDPC), and no bits are taken from the outer code. lcm +b k , the output of the shaper / mapper 204 is not used, and bits are taken from the output of the inner encoder 206 and the output of the outer encoder 202. lcm , all bits are taken from the LDPC output.

[0071] Figure 4 is a table 400 illustrating an example generation of QAM symbols according to one or more embodiments. The examples are provided for illustrative purposes, and it should be appreciated that suitable variations are contemplated.

[0072] This example has b lcm =2 and b k =3, and illustrates the use of bits from different inputs to generate QAM symbols by the modulator 208.

[0073] Table 400 depicts various values of b from 1 to 7 and the corresponding components / bits from the inner encoder 206 and the outer encoder 202 .

[0074] ​​Typically, the shaper 206 may be disabled for smaller constellations because the shaping gain provided by the shaper 206 is substantially present for larger constellation sizes.

[0075] The shaper 206 may be configured to divide the constellation into In this example, each shell contains the same number of constellation points. Therefore, for b=8 and N k =8(b k =3), each shell includes A constellation point.

[0076] Figure 5 is a diagram illustrating an example of a shell map 500 in accordance with one or more embodiments. Map 500 is provided for illustrative purposes, and it should be appreciated that other suitable maps are contemplated.

[0077] Map 500 may be generated by shell mapper 204 as described above.

[0078] It should be appreciated that there is no requirement that hulls be aligned with cosets or coset labels.

[0079] Constellations can be constructed using the following rules:

[0080] 1) Assign coset labels to each constellation point in the usual way,

[0081] 2) For each coset label, sort the constellation points in ascending order of power,

[0082] 3) assigning an equal number of constellation points with each coset label to each shell,

[0083] 4) The number of constellation points per shell chosen for each coset label is 2 (bb k -b lcm ), requirement 2(bb k -b lcm ) is greater than or equal to one,

[0084] 5) For b k +b lcm , no shell mapping is applied.

[0085] It should be appreciated that the shell mapping scheme for constellation shaping does not require a specific bit mapping within the shell. This can be done in the most convenient way for hardware implementation.

[0086] exist Figure 5 In the example shown in FIG, the shell mapping is for b=6 bits (6 bits per carrier). And 4 shells or shell mappings are obtained. k = 2 bits to address these 4 shells. Within the shell, for coset labels 0,…,3, b​lcm = 2 bits to address the constellation point and the remaining 2 bits give the in-shell position.

[0087] In one example, the shell mapping utilizes 4 shells for constellations with b=6 bits and 8 shells for constellations with b>6 bits.

[0088] To perform shell mapping, the shell mapper 204 is configured as a group of K k carriers about b shell Input bits are allocated to shell bits, where b shell k K k The carriers in the carrier group can have different constellation sizes as long as b≥b k +b lcm The degrees of freedom gained by mapping a lower number of input bits to a higher number of shell bits are used to select those groups of shell bits for each carrier group that have the lowest energy.

[0089] To simplify the strategy, the calculation of the actual energy of each shell can be omitted. Instead, each shell can be assigned an ascending power value i k =0,…,N k -1. According to the k K for each carrier group of carriers k N k possible shell value combinations, choose the one with the lowest energy values.

[0090] In one example, the selection may be implemented in a lookup table (LUT).

[0091] Figure 6 6 is a table 600 illustrating an example lookup table (LUT) in accordance with one or more embodiments. The LUT is provided for illustrative purposes, and it should be appreciated that suitable variations are contemplated.

[0092] Table 600 includes columns for: Input Bits, Shell 1, Shell 2, and Power, and Shell Label. Several rows of relevant values are shown.

[0093] Table 600 is shown with elements in b shell =3 when K k =2 and N k =4. It will be appreciated that other suitable lookup tables that may be used by the shell mapper 204 are contemplated. k = 2 carriers and each carrier N k = 4 shells, table 600 shows the allocation of 3 input bits (labels 0, ..., 7) to 4 shell bits. ​

[0094] The lookup table may be arranged in ascending order of the input bits and the shell bits. Shell mapper 204 is configured to map from an input bit sequence to an output bit sequence at a transmitter or encoder system. The input bit sequence is a sequence of input bits. Shell mapper 204 may be configured to map from a shell bit sequence to a received / output bit sequence when used at a decoder / receiver system.

[0095] When the lookup table is arranged in ascending order of input bits and shell bits, it is easy to map from the input bit sequence to the shell bits at the transmitter, and from the shell bits to the output bit sequence at the receiver.

[0096] Lookup tables may be calculated and stored to reduce memory usage, among other things.

[0097] Additional shaping gains can be achieved using direct addressing schemes / techniques.

[0098] Figure 7 is a table 700 illustrating an example of a direct addressing scheme for the shell mapper 204 according to one or more embodiments. This example is provided for illustrative purposes, and it should be appreciated that suitable variations are contemplated.

[0099] Typically, skip dimensions beyond b shell = 24 LUTs (16.8 million entries). This assumption is based on a base constellation of b = 13.

[0100] In order to achieve a shaping gain exceeding 1dB, k =3, K is required k ≥16 (number of carriers), which makes the lookup table too large and too complex.

[0101] There are two techniques that can achieve higher shaping gains without substantially large and complex tables.

[0102] One possible solution (first technique) is the cascade of two shapers, e.g. to form a K k ·K k The first shaping stage selects the subset for each subcluster and the second shaping stage finally selects the shell for each carrier. This type of shaping can be performed using the same LUT twice, thereby increasing the effective number of shaped carriers.

[0103] The technique works as follows: Each entry of the LUT is labeled with a shell label 0,…,N k -1, and the labels are assigned in ascending order of the average shell power of the corresponding LUT entry. LUT entries have the same label, that is, the LUT entry with the smallest sum LUT entries have label 0, the sum of the LUT entries with higher values follows entries have label 1, and so on. Figure 6 An example of this technique is shown in Table 600 of .

[0104] Shell mappers 204 each have The carrier group of carriers is obtained by b shell bits, and create K from them k The inner shell label now uses b shell –b k The bits are used together with the assigned shell labels to select the actual shell for each carrier in the group.

[0105] Therefore, for the shell mapping, each The number of bits obtained from the outer encoder by the group is The resulting carrier group is much larger, but the resulting shaping is not the optimal or selected shaping since it is generated by a larger lookup table. However, this approach achieves over 1dB of shaping gain with minimal changes to the baseline implementation. Figure 8 The theoretical shaping gains are summarized in .

[0106] Figure 8 is a table 800 illustrating example shaping gains in accordance with one or more embodiments.

[0107] Table 800 includes information for Entries for b k =2 Gain b k =2, for b k =2 and gain b k =3.

[0108] Thus, table 800 shows the performance of the two cascaded shapers for a selected b using the same LUT. k and K k The theoretical shaping gain value of the value and b shell .

[0109] Another way to generate the gain value is to use the mathematical structure of a LUT to store it. The mathematical structure can be used to generate multiple stages of different lookup tables to provide the same or similar shaping gain as one large LUT, but with significantly reduced memory requirements.

[0110] In an example using mathematical structures, three steps / actions are used where the integer Mapping to K k shell labels 0,…,N kIn the first step, the sum of the shell labels for the corresponding input bit sequence I is derived from the first lookup table LUT1 This first lookup table has a small number of entries, e.g. for K k =16 and b k =3 has 21 items, of which

[0111] In the knowledge In the case of , the second lookup table LUT2 gives a weight list for multiple groups of shell bits. Each group contains K k bits, and there are b k These weights are the b of all carriers in the group. k The sum of some of the bits.

[0112] For each weight, there is a specific or selected number of possible permutations of 1s and 0s. These permutations are addressed in the third step. The third step can be solved by having This can be done with a lookup table of entries or can be calculated.

[0113] Figure 9 is a diagram illustrating an example mapping 900 of bits to symbols according to one or more embodiments. The symbols may be OFDM, DMT, etc. The illustrated mapping 900 is provided as an example for illustrative purposes, and it should be appreciated that suitable variations are contemplated.

[0114] It should be appreciated that from the Reed-Solomon encoder 202 to the DMT symbol modulation (inverse FFT), the data is reorganized and processed in multiple stages. These stages are Figure 9 , where boxes represent memory and circles represent processing functions.

[0115] Typically, data blocks do not need to be aligned across sublayers (e.g., DTUs may not be aligned with inner LDPC codewords, and shell mapper codewords and LDPC codewords may not be aligned with DMT symbols). However, alignment of processing blocks reduces buffering requirements.

[0116] The processing steps from higher layers to lower layers are as follows:

[0117] The outer code, such as the Reed-Solomon code, takes K from layer 2 rs data bytes and generate N rs coded bytes.

[0118] Multiple codewords of the outer code are combined in a data transmission unit (DTU), and interleaving is applied within the DTU to improve robustness against burst errors.

[0119] Shell mapper 206 receives b from DTU buffer shellbits and convert them into K k b k bits for QAM modulator 208.

[0120] LDPC encoder 206 receives K from the DTU buffer ldpc bits and convert them into N ldpc output bits for QAM modulator 208.

[0121] It should be appreciated that a TCM encoder may be used instead of an LDPC encoder.

[0122] The QAM modulator 208 receives 2N from the LDPC output buffer for each DMT symbol having K carriers. b＞1 +N b＝1 bits, where N b＞1 is the number of carriers with bit allocation b>0 in the DMT symbol, and N b-1 is the number of 1-bit carriers in a DMT symbol. In addition, the QAM modulator 208 receives the in is the bit allocation Finally, the QAM modulator 208 receives or obtains the remaining bits directly from the DTU buffer, i.e. bit.

[0123] In the final step, the tone ordering is mapped from the QAM modulator 208 output to the DMT symbols in natural tone order (first tone is the lowest frequency and last tone is the highest frequency).

[0124] Tone ordering can be used to equalize the margins between carriers by grouping carriers with lower and higher SNR margins together in one tone block in the shell mapper. Similarly, the intra-DTU interleaver can help correct error bursts caused by misdetection by the shell map decoder. For this purpose, the shell map bits are treated as one block from the DTU buffer.

[0125] The data rate is given by: At the DMT symbol encoder, the data rate is given by

[0126] in, is the length of the DMT symbol in time, and b (k) is the bit allocation on carrier k.

[0127] When correcting for LDPC and shell mapper overhead, the effective number of bits per DMT symbol is given by

[0128] Among them, the effective number of bits per carrier Given by the following formula

[0129]

[0130] Therefore, the data rate at the outer FEC input is given by:

[0131]

[0132] Additionally, the input rate to Layer 1 (γ interface) is equal to this rate (plus the overhead added in the DTU, if any). (k) and There is a fixed dependency such that the number of payload bits transmitted per DMT symbol, and therefore the data rate, is constant.

[0133] Figure 10 is a diagram illustrating a decoder system 1000 for a receiver according to one or more embodiments. System 1000 is provided as an example for illustrative purposes, and it should be appreciated that suitable variations are contemplated.

[0134] At the receiver side, decoder system 1000 performs the inverse steps of the encoder side (eg, system 200) to recover the data bits from the received signal. System 1000 may be used in a receiver.

[0135] System 1000 includes LLR calculation circuitry 1002, LDPC or inner decoder 1004, QAM demodulation stage 2 1006, shell demapper 1008, and Reed-Solomon decoder 1010. System 1000 obtains a received signal and generates a demodulated signal or baseband signal as its output.

[0136] The received signal (from the line) can be transformed into the frequency domain and the receive equalizer scales the per-tone signal to match the constellation grid. Thus, the received signal is transformed and scaled and provided as input 1012 to the LLR calculation circuit 1002 and QAM demodulation stage 2 1006.

[0137] The inner decoder 1004 is configured to decode the received signal using an inner code (LDPC) and generate an inner decoded signal. The demodulation stage 1006 is configured to demodulate the received signal using the inner decoded signal to generate a demodulated signal. The shell demapper 1008 is configured to demap at least a subset of the demodulated signal according to the carrier group and generate a demapped signal. The outer decoder 1010 is configured to decode the demodulated signal using the demapped signal to generate an outer decoded signal.

[0138] Due to the error correction code within LCM or TCM, QAM demodulation can utilize two stages or actions.

[0139] In the first stage, the LLR calculation circuit 1002 calculates the noise variance σ of the carrier k according to (k)，2 The knowledge of the received signal point and the position of the constellation grid is used to derive the b per carrier. lcm The derived values are provided to the LDPC decoder 1004. When all received LLR values for one LDPC code block have been received, the LDPC decoder 1004 operates and generates a final decision coset label.

[0140] The log-likelihood ratio (LLR) is the input format for (soft-decision) LDPC decoders. It is a value per bit and describes the probability that the transmitted bit is 1 or 0, depending on the received signal. For example, for a given received signal, there is a probability p0 that the transmitted bit is 0 and a probability p1 that the transmitted bit is 1. The log-likelihood ratio is log(p0)-log(p1). This value is negative when the bit is more likely to be 0, and positive when the transmitted bit is more likely to be 1. If the transmitted bit is unknown (e.g., erasure), the LLR value is 0.

[0141] The second stage of QAM demodulation is performed by QAM demodulation stage 2 1006. QAM stage 2 1006 is configured to receive the coset labels and signal 1012. QAM stage 2 performs a hard decision to convert the received signal point to the nearest constellation point with the corresponding coset label. This is based on the assumption that the LDPC decoder output is error-free.

[0142] Collect (determine the constellation shell) per carrier b k bits to form each group of K k carriers and forwards them to the shell demapper 1008. For each carrier group, the shell demapper 1008 searches the shell mapping lookup table for the entry that gives the best fit.

[0143] If no LUT entry matches b from the receiver k K k If a shell mapper bit is missing, a reception error occurs, and one or more techniques can be used to determine the transmitted shell mapper input bit sequence with the highest probability. Several shell mapper input sequence determination techniques are listed below:

[0144] 1. Search for the LUT entry with the minimum Hamming distance to the received shell bit,

[0145] 2. Searching for the LUT entry with the minimum metric distance between the received constellation point of the corresponding carrier group and the transmitted signal obtained by the selected LUT entry and other hard decision bits,

[0146] 3. Search for the LUT entry with the highest log-likelihood ratio for the received constellation point.

[0147] It should be appreciated that the first technique described above may result in multiple LUT entries having the same Hamming distance. In this case, an additional shell mapper input sequence determination technique may be used to obtain a final decision for a LUT entry.

[0148] The received DTU is formed using the data bits from the shell demapper 1008 and the hard decision output from the second stage of the QAM demodulator 1006, and after deinterleaving, Reed-Solomon decoding is performed at the decoder 1010. In one example, the resulting data bits are forwarded to Layer 2.

[0149] It will be appreciated that suitable variations of the decoder system 1000 are contemplated.In addition, reference may be made to the above-mentioned figures to further describe the decoder system 1000.

[0150] Additionally, it should be appreciated that the decoder system 1000 can mirror the encoder system 200. Furthermore, the decoder system 1000 can also be modified to operate as an encoder.

[0151] As used above and herein, the terms "component," "system," "interface," and the like are intended to refer to computer-related entities, hardware, software (e.g., software in execution), and / or firmware. For example, a component can be a processor, a process running on a processor, a controller, an object, an executable program, a program, a storage device, and / or a computer having a processing device. As an example, an application running on a server and the server can also be a component. One or more components can reside within a process, and a component can be located on one computer and / or distributed between two or more computers. This document may describe a group of elements or a group of other components, where the term "group" can be interpreted as "one or more."

[0152] Furthermore, the components can execute from various computer-readable storage media having various data structures stored thereon, such as by way of modules. The components can communicate via local and / or remote processes, such as according to signals having one or more data packets (e.g., data from a component interacting with another component in a local system, a distributed system, and / or across a network (e.g., the Internet, a local area network, a wide area network, or a similar network with other systems via signals).

[0153] As another example, a component can be a device having specific functionality provided by mechanical parts operated by electrical or electronic circuitry, wherein the electrical or electronic circuitry can be operated by a software application or firmware application executed by one or more processors. The one or more processors can be internal or external to the device and can execute at least a portion of the software or firmware application. As yet another example, a component can be a device that provides specific functionality through electronic components without mechanical parts; the electronic components can include one or more processors therein to execute software and / or firmware that at least partially imparts the functionality of the electronic components.

[0154] The use of the word "exemplary" is intended to present concepts in a concrete way. As used in this application, the term "or" means an inclusive "or" rather than an exclusive "or". That is, unless otherwise specified or clear from the context, "X employs A or B" means any of the natural inclusive arrangements. That is, if X employs A; X employs B; or X employs both A and B, then "X employs A or B" is satisfied under any of the preceding examples. In addition, the articles "a" and "an" as used in this application and the appended claims should generally be considered to mean "one or more" unless otherwise specified or clear from the context to be directed to a singular form. In addition, to the extent that the terms "including, includes," "having, has," "with," or variations thereof are used in the detailed description and claims, such terms are intended to be inclusive in a manner similar to the term "comprising."

[0155] As used herein, the term "circuitry" may refer to, be part of, or include an application specific integrated circuit (ASIC), an electronic circuit, a processor (shared, dedicated, or group) and / or memory (shared, dedicated, or group) that executes one or more software or firmware programs, combinational logic circuitry, and / or other suitable hardware components that provide the described functionality. In some embodiments, the circuit may be implemented in one or more software or firmware modules, or functionality associated with the circuit may be implemented by one or more software or firmware modules. In some embodiments, the circuit may include logic that is at least partially operable in hardware.

[0156] As used in this specification, the term "processor" may refer to substantially any computing processing unit or device, including but not limited to: a single-core processor; a single-core processor with software multi-threaded execution capability; a multi-core processor; a multi-core processor with software multi-threaded execution capability; a multi-core processor with hardware multi-threading technology; a parallel platform; and a parallel platform with distributed shared memory. In addition, a processor may refer to an integrated circuit, an application-specific integrated circuit, a digital signal processor, a field programmable gate array, a programmable logic controller, a complex programmable logic device, discrete gate or transistor logic, discrete hardware components, or any combination thereof designed to perform the functions and / or processes described herein. The processor may utilize nanoscale architectures, such as but not limited to molecular and quantum dot-based transistors, switches, and gates to optimize space usage or enhance the performance of mobile devices. The processor may also be implemented as a combination of computing processing units.

[0157] In this specification, terms such as "storage," "data storage," "data storage," "database," and substantially any other information storage component related to the operation and functionality of a component and / or process refer to a "memory component," or an entity embodied in "memory," or a component that includes memory. Note that the memory components described herein can be either volatile memory or nonvolatile memory, or can include both volatile and nonvolatile memory.

[0158] By way of example and not limitation, non-volatile memory may be included, for example, in memory, non-volatile memory (see below), disk storage (see below), and memory storage (see below). In addition, non-volatile memory may be included in read-only memory, programmable read-only memory, electrically programmable read-only memory, electrically erasable programmable read-only memory, or flash memory. Volatile memory may include random access memory, which acts as an external cache memory. By way of example and not limitation, random access memory is available in a variety of forms, such as synchronous random access memory, dynamic random access memory, synchronous dynamic random access memory, double data rate synchronous dynamic random access memory, enhanced synchronous dynamic random access memory, Synchlink dynamic random access memory, and direct Rambus random access memory. In addition, the memory components of the systems or methods disclosed herein are intended to include, but are not limited to, these and any other suitable types of memory.

[0159] Examples may include subject matter such as a method, a component for performing the actions or blocks of the method, at least one machine-readable medium including instructions that, when executed by a machine, cause the machine to perform the actions of the method, or an apparatus or system for concurrent communication using multiple communication technologies according to the embodiments and examples described herein.

[0160] Example 1 is a multicarrier transmitter apparatus. The apparatus includes an outer encoder, a shell mapper, and an inner encoder. The outer encoder is configured to receive a signal, perform error correction on the received signal using an outer code, and generate an outer encoder signal. The shell mapper is configured to perform constellation shaping on a subset of bits from the outer encoder signal and generate one or more constellation-shaped bits in the shell mapper signal. The inner encoder is configured to perform inner error correction on a second subset of bits from the outer encoder signal using an inner code and generate an inner correction signal.

[0161] Example 2 includes the subject matter of Example 1, including or omitting optional elements, wherein the outer code is a Reed-Solomon code or a BCH code.

[0162] Example 3 includes the subject matter of any of Examples 1-2, including or omitting the optional elements, wherein the inner code is LDPC.

[0163] Example 4 includes the subject matter of any of Examples 1-3, including or omitting the optional element, wherein the shell mapper is configured to operate on one or more carrier blocks, and each carrier block utilizes a constant number of bits.

[0164] Example 5 includes the subject matter of any of Examples 1-4, including or omitting the optional elements, wherein the shell mapper is configured to provide a constant input bit rate and a constant output bit rate per symbol.

[0165] Example 6 includes the subject matter of any of Examples 1-5, including or omitting the optional element, wherein the carrier blocks at the shell mapper are aligned with DMT symbols.

[0166] Example 7 includes the subject matter of any of Examples 1-6, including or omitting the optional element, wherein the shell mapper is configured to perform constellation shaping based on an absolute distance between a constellation point and one or more constellation points from a lookup table.

[0167] Example 8 includes the subject matter of any of Examples 1-7, including or omitting the optional element, wherein the shell mapper is configured to use variable bit loading based on multiple carriers.

[0168] Example 9 includes the subject matter of any of Examples 1-8, including or omitting optional elements, and further including a QAM modulator configured to generate one or more modulation symbols in an output signal based on the received outer encoder signal, the shell mapper signal, and the inner correction signal.

[0169] Example 10 includes the subject matter of any of Examples 1-9, including or omitting the optional element, wherein the QAM modulator is configured to generate one or more QAM constellations arranged in shell grouped constellation points.

[0170] Example 11 includes the subject matter of any of Examples 1-10, including or omitting the optional element, wherein the one or more QAM constellations include one or more even constellations based on a square QAM constellation with equal distances between adjacent constellation points.

[0171] Example 12 includes the subject matter of any of Examples 1-11, including or omitting the optional element, wherein the one or more QAM constellations include one or more odd constellations based on a selected subset of constellation points with low signal power.

[0172] Example 13 includes the subject matter of any of Examples 1-12, including or omitting the optional element, the QAM modulator utilizing a sequence of tones to modulate and generate the output signal.

[0173] Example 14 includes the subject matter of any of Examples 1-13, including or omitting the optional element, wherein the outer encoder is configured to combine multiple codewords of the outer code in a data transmission unit (DTU).

[0174] Example 15 is a multicarrier receiver apparatus for decoding, comprising an inner decoder, a demodulation stage, a shell demapper, and an outer decoder. The inner decoder is configured to decode a received signal using an inner code to generate an inner decoded signal. The demodulation stage is configured to demodulate the received signal using the inner decoded signal to generate a demodulated signal. The shell demapper is configured to demap at least a subset of the demodulated signal according to a carrier group to generate a demapped signal. The outer decoder is configured to decode the demodulated signal using the demapped signal to generate an outer decoded signal.

[0175] Example 16 includes the subject matter of Example 15, including or omitting the optional elements, further comprising a log-likelihood ratio circuit configured to determine log-likelihood ratios (LLRs) for coset bits based on the received signal and provide the determined LLRs to the inner decoder.

[0176] Example 17 includes the subject matter of any of Examples 15-16, including or omitting the optional element, wherein the shell demapper is configured to determine one or more coset bits based on the outer encoder signal.

[0177] Example 18 includes the subject matter of any of Examples 15-17, including or omitting optional elements, wherein the shell demapper is configured to obtain one or more shell bits for each shell mapping carrier group and search the one or more shell bits to identify shell bits that match the received shell mapping bits.

[0178] Example 19 is a method of encoding a transmission signal for multiple carriers. The method includes applying an outer code to an input signal to generate an outer encoder signal, wherein the outer code is a hard code; applying an inner code to a subset of bits from the outer encoder signal to generate an inner correction signal; performing constellation shaping on a second subset of bits from the outer encoder signal by a shell mapper circuit to generate a shell mapper signal having one or more constellations for each of a plurality of carriers; and modulating the outer encoder signal, the inner correction signal, and the shell mapper signal to generate an output signal for transmission.

[0179] Example 20 includes the subject matter of Example 19, including or omitting the optional element, wherein the shaping is performed based on carrier blocks of the plurality of carriers using a constant or variable number of bits per carrier.

[0180] Example 21 includes the subject matter of any of Examples 19-20, including or omitting the optional element, wherein the second subset for the shaping includes a selected number of bits for modulation.

[0181] Example 22 includes the subject matter of any of Examples 19-21, including or omitting the optional element, wherein the shaping further comprises referencing a lookup table based on a fixed number of bits of the second subset to select a shell from the plurality of shells.

[0182] Example 23 includes the subject matter of any of Examples 19-22, including or omitting the optional elements, wherein the shaping further comprises determining an energy value for each carrier group and selecting a shell from a plurality of shells for each carrier group based on the energy value.

[0183] Example 24 includes the subject matter of any of Examples 19-23, including or omitting the optional element, wherein the second subset of bits comprises a plurality of assignments of input bits to shell bits.

[0184] Example 25 includes the subject matter of any of Examples 19-24, including or omitting the optional elements, wherein the shaping utilizes a cascade of two or more shapers to form supergroups, wherein a first shaping selects a subset for each supergroup and a second shaping selects a shell for the selected subset.

[0185] Example 26 is an apparatus for encoding a transmission signal for multiple carriers. The apparatus includes means for applying an outer code to an input signal to generate an outer encoder signal; means for applying an inner code to a subset of bits from the outer encoder signal to generate an inner correction signal; and means for performing constellation shaping on a second subset of bits from the outer encoder signal by a shell mapper circuit to generate a shell mapper signal having one or more constellations for each of a plurality of carriers.

[0186] Example 27 includes the subject matter of Example 26, including or omitting optional elements, further comprising means for modulating the outer encoder signal, the inner correction signal, and the shell mapper signal to generate an output signal for transmission.

[0187] Example 28 includes the subject matter of any of Examples 26-27, including or omitting the optional elements, further comprising means for determining an energy value for each carrier group and selecting a shell from a plurality of shells for each carrier group based on the energy value.

[0188] Example 29 is a multicarrier receiver apparatus for decoding. The apparatus includes means for decoding a received signal using an inner code to generate an inner decoded signal; means for demodulating the received signal using the inner decoded signal to generate a demodulated signal; means for demapping at least a subset of the demodulated signal according to a carrier group to generate a demapped signal; and means for decoding the demodulated signal using the demapped signal to generate an outer decoded signal.

[0189] Example 30 includes the subject matter of Example 29, including or omitting the optional element, wherein the apparatus is a wired communication system.

[0190] Example 31 includes the subject matter of any of Examples 29-30, including or omitting the optional elements, wherein the wired communication system is a digital subscriber line (DSL).

[0191] Example 32 is one or more computer-readable media having instructions that, when executed, cause a multicarrier transmitter to: receive a signal; perform error correction on the received signal using an outer code and generate an outer encoder signal; perform constellation shaping on a subset of bits from the outer encoder signal and generate one or more constellation shaped bits in a shell mapper signal; and perform inner error correction on a second subset of bits from the outer encoder signal using an inner code and generate an inner correction signal.

[0192] Example 33 includes the subject matter of Example 32, including or omitting the optional elements, further comprising operating on one or more carrier blocks, and each carrier block utilizing a constant number of bits.

[0193] Example 34 includes the subject matter of any of Examples 32-33, including or omitting optional elements, and further comprising generating one or more modulation symbols in an output signal based on the received outer encoder signal, the shell mapper signal, and the inner correction signal.

[0194] It should be understood that the various aspects described herein can be implemented by hardware, software, firmware, or any combination thereof. When implemented in software, the functions can be stored as one or more instructions or codes on a computer-readable medium or transmitted via a computer-readable medium. Computer-readable media include both computer storage media and communication media, including any medium that facilitates the transfer of computer programs from one place to another. Storage media or computer-readable storage devices can be any available medium that can be accessed by a general-purpose or special-purpose computer. As an example and not a limitation, such computer-readable media can include RAM, ROM, EEPROM, CD-ROM or other optical disk storage, magnetic disk storage or other magnetic storage devices, or other tangible and / or non-temporary media that can be used to carry or store the required information or executable instructions. In addition, any connection is formally referred to as a computer-readable medium. For example, if a coaxial cable, fiber optic cable, twisted pair, digital subscriber line (DSL), or wireless technology (such as infrared, radio, and microwave) is used to transmit software from a website, server, or other remote source, the coaxial cable, fiber optic cable, twisted pair, DSL, or wireless technology (such as infrared, radio, and microwave) are all included in the definition of medium. Disk and disc, as used herein, include compact disc (CD), laser disc, optical disc, digital versatile disc (DVD), floppy disk, and Blu-ray disc, where disks usually reproduce data magnetically, while discs reproduce data optically with lasers. Combinations of the above should also be included within the scope of computer-readable media.

[0195] The various illustrative logics, logic blocks, modules, and circuits described in conjunction with the aspects disclosed herein may be implemented or performed using a general purpose processor, a digital signal processor (DSP), an application specific integrated circuit (ASIC), a field programmable gate array (FPGA) or other programmable logic device, discrete gate or transistor logic, discrete hardware components, or any combination thereof designed to perform the functions described herein. A general purpose processor may be a microprocessor, but in the alternative, the processor may be any conventional processor, controller, microcontroller, or state machine. A processor may also be implemented as a combination of computing devices, for example, a combination of a DSP and a microprocessor, a plurality of microprocessors, one or more microprocessors combined with a DSP core, or any other such configuration. Additionally, at least one processor may include one or more modules operable to perform one or more steps and / or actions described herein.

[0196] For software implementation, the techniques described herein can be implemented with modules (e.g., procedures, functions, etc.) that perform the functions described herein. The software code can be stored in a memory unit and executed by a processor. The memory unit can be implemented within the processor or external to the processor. In the latter case, the memory unit can be communicatively coupled to the processor by various means known in the art. In addition, at least one processor can include one or more modules that are operable to perform the functions described herein.

[0197] The technology described herein can be used in various wireless communication systems, such as CDMA, TDMA, FDMA, OFDMA, SC-FDMA, and other systems. The terms "system" and "network" are often used interchangeably. A CDMA system can implement radio technologies such as Universal Terrestrial Radio Access (UTRA) and CDMA1800. UTRA includes Wideband CDMA (W-CDMA) and other variants of CDMA. In addition, CDMA1800 covers IS-1800, IS-95, and IS-856 standards. A TDMA system can implement radio technologies such as Global System for Mobile Communications (GSM). An OFDMA system can implement radio technologies such as Evolved UTRA (E-UTRA), Ultra Mobile Broadband (UMB), IEEE 802.11 (Wi-Fi), IEEE 802.16 (WiMAX), IEEE 802.18, Flash-OFDM, and the like. UTRA and E-UTRA are part of the Universal Mobile Telecommunications System (UMTS). 3GPP Long Term Evolution (LTE) is a version of UMTS that uses E-UTRA, which uses OFDMA on the downlink and SC-FDMA on the uplink. UTRA, E-UTRA, UMTS, LTE, and GSM are described in documents from an organization called "3rd Generation Partnership Project" (3GPP). In addition, CDMA1800 and UMB are described in documents from an organization called "3rd Generation Partnership Project 2" (3GPP2). These technologies can also be used with New Radio (NR) 5G, also from the 3GPP organization. In addition, such wireless communication systems may also include peer-to-peer (e.g., mobile-to-mobile) ad hoc network systems, 802.xx wireless LANs, Bluetooth, and any other short-range or long-range wireless communication technologies, which typically use unpaired unlicensed spectrum.

[0198] Single-carrier frequency division multiple access (SC-FDMA), which utilizes single-carrier modulation and frequency domain equalization, is a technique that can be used with the disclosed aspects. SC-FDMA has similar performance to OFDMA systems and substantially similar overall complexity. Due to its inherent single-carrier structure, SC-FDMA signals have a lower peak-to-average power ratio (PAPR). SC-FDMA can be used in uplink communications, where a lower PAPR can benefit mobile terminals in terms of transmit power efficiency.

[0199] In addition, the various aspects or features described herein can be implemented as methods, devices or products using standard programming and / or engineering techniques. As used herein, the term "product" is intended to encompass computer programs accessible from any computer-readable device, carrier or medium. For example, computer-readable media can include, but are not limited to, magnetic storage devices (e.g., hard disks, floppy disks, magnetic strips, etc.), optical disks (e.g., compact disks (CDs), digital versatile disks (DVDs), etc.), smart cards and flash memory devices (e.g., EPROMs, cards, sticks, key drives, etc.). In addition, the various storage media described herein can represent one or more devices and / or other machine-readable media for storing information. The term "machine-readable medium" can include, but is not limited to, wireless channels and various other media capable of storing, accommodating and / or carrying (one or more) instructions and / or data. In addition, a computer program product can include a computer-readable medium having one or more instructions or codes that are operable to cause a computer to perform the functions described herein.

[0200] Communication media may embody computer-readable instructions, data structures, program modules, or other structured or unstructured data in a data signal (such as a modulated data signal, e.g., a carrier wave or other transport mechanism), and includes any information delivery or transmission media. The term "modulated data signal(s)" refers to a signal that has one or more of its characteristics set or changed in such a manner as to encode information in the signal(s). By way of example, and not limitation, communication media include wired media (such as a wired network or direct-wired connection) and wireless media (such as acoustic, RF, infrared, and other wireless media).

[0201] In addition, the actions of the methods or algorithms described in conjunction with the aspects disclosed herein may be embodied directly in hardware, in software modules executed by a processor, or in a combination of the two. The software modules may reside in RAM memory, flash memory, ROM memory, EPROM memory, EEPROM memory, registers, a hard disk, a removable disk, a CD-ROM, or any other form of storage medium known in the art. An exemplary storage medium may be coupled to the processor so that the processor can read information from the storage medium and write information to the storage medium. In an alternative, the storage medium may be integrated with the processor. In addition, in some aspects, the processor and storage medium may reside in an ASIC. In addition, the ASIC may reside in a user terminal. In an alternative, the processor and storage medium may reside in a user terminal as discrete components. In addition, in some aspects, the steps and / or actions of the methods or algorithms may reside as one or any combination or set of codes and / or instructions on a machine-readable medium and / or computer-readable medium that may be incorporated into a computer program product.

[0202] The above description of the illustrated embodiments of the present disclosure (including what is described in the Abstract) is not intended to be exhaustive or to limit the disclosed embodiments to the precise forms disclosed. Although specific embodiments and examples are described herein for illustrative purposes, various modifications are possible and are considered to be within the scope of such embodiments and examples, as those skilled in the relevant art will recognize.

[0203] In this regard, although the disclosed subject matter has been described in conjunction with various embodiments and corresponding figures, it is to be understood that other similar embodiments may be used or modifications and additions may be made to the described embodiments to perform the same, similar, alternative, or substitute functions of the disclosed subject matter, where applicable, without departing from the disclosed subject matter. Therefore, the disclosed subject matter should not be limited to any single embodiment described herein, but rather should be construed in breadth and scope in accordance with the claims appended hereto.

[0204] In particular, with respect to the various functions performed by the components (assemblies, devices, circuits, systems, etc.) described above, the terms used to describe such components (including references to "members") are intended to correspond (unless otherwise indicated) to any component or structure that performs the designated function of the described component (e.g., functionally equivalent), even if it is not structurally equivalent to the disclosed structure that performs the function in the exemplary embodiments illustrated herein of the present disclosure. In addition, although a particular feature may be disclosed with respect to only one of several embodiments, such feature may be combined with one or more other features of other embodiments as may be desired or advantageous for any given or particular application.

Claims

1. A device comprising: an encoder configured to perform error correction on the received signal using an error correction code to generate an encoder signal; a shell mapper configured to perform shaping on received signals on two or more carrier groups using different constellation sizes to generate a shaped signal; as well as A modulator is configured to generate an output signal based on the encoder signal and the shaped signal.

2. The apparatus of claim 1, wherein the error correction code is selected from a group of forward error correction (FEC) codes. The apparatus according to claim 1 , wherein the shaping comprises at least one of probability shaping or constellation shaping. The apparatus of claim 1 , wherein the shaped signal comprises one or more constellation shaping bits. The apparatus according to claim 4 , wherein the error correction code comprises an outer code, and the shaping bits are protected by the outer code. The apparatus of claim 1 , wherein error correction is performed on a subset of bits of the received signal.

7. The apparatus of claim 1 , wherein the shell mapper is disabled when the constellation size is below a threshold constellation size, the modulator being configured to adaptively generate an output signal without the shaped signal when the shell mapper is disabled.

8. The apparatus of claim 1, wherein the error correction code is configured to protect one or more least significant bits (LSBs) of each constellation.

9. The apparatus of claim 1, wherein the interleaved error correction code is used to correct at least one of: an error burst or an error due to an unprotected bit.

10. The apparatus of claim 1, wherein the shaping is to be performed on less than all bits of the received signal.

11. The device according to claim 1, wherein The shaping is performed based on carrier blocks of the plurality of carriers using a constant or variable number of bits per carrier.

12. The device according to claim 1, wherein The shaping further includes referencing a lookup table based on a fixed number of bits to select a shell from the plurality of shells.

13. The apparatus of claim 12, wherein the constellation is to be divided into a plurality of shells.

14. The apparatus of claim 1, wherein the shaping utilizes a cascade of two or more shapers to form a plurality of supergroups, wherein a first shaping selects a subset of bits for each supergroup in the plurality of supergroups and a second shaping selects a shell for the selected subset.

15. An apparatus comprising: a demodulation stage configured to demodulate a received signal to generate a demodulated signal, the received signal having been generated based on the encoder signal and a shaped signal generated by performing shaping on the received signals on two or more carrier groups using different constellation sizes; a shell demapper configured to demap at least a subset of the demodulated signals according to a carrier group to generate a demapped signal; as well as A decoder is configured to decode the received signal using the demapped signal.

16. The apparatus of claim 15, wherein the shell demapper is configured to obtain one or more shell bits for the carrier group, and to search the one or more shell bits to identify a matching shell bit.

17. The apparatus of claim 15, the shaped signal having been generated using at least one of probability shaping or constellation shaping.

18. A method comprising performing error correction on the received signal using an error correction code to generate an encoder signal; performing shaping on received signals on two or more carrier groups using different constellation sizes to generate a shaped signal; as well as An output signal is generated based on the encoder signal and the shaped signal. The method of claim 18 , wherein generating the output signal comprises generating one or more modulation symbols in the output signal.

20. The method of claim 18, wherein an error correction code is used in conjunction with interleaving to correct at least one of: error bursts or errors due to unprotected bits.

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