Edge computing gateway, inter-processor communication configuration method and device
By designing the direct connection ports of edge gateway modules and routing modules in edge computing gateways, the problems of poor expansion performance and high hardware cost in traditional technology are solved, and efficient communication between processors and improved gateway expansion performance are achieved.
Patent Information
- Application Number
- CN202311871673.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2023-12-29
- Publication Date
- 2025-03-21
- Estimated Expiration
- 2043-12-29
AI Technical Summary
Traditional edge computing gateways have poor performance when extending network interfaces, high hardware costs, and no true integration is achieved.
An edge computing gateway is designed, including an edge gateway module and a routing module, and directly connects the edge computing algorithm processor and the routing processor through the first and second data interfaces to realize direct communication between processors, reduce hardware costs and improve expansion performance.
It realizes efficient communication between processors, reduces hardware costs, avoids middleware equipment processing communication, and improves communication efficiency and gateway expansion performance.
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Figure CN118277322B_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the field of processor technology, and in particular to an edge computing gateway, a method and a device for configuring communication between processors. Background Art
[0002] Edge computing gateway is an important device for industrial intelligent applications, and its functions include local computing, message communication, data caching, etc. This gateway can realize local linkage and data processing and analysis of devices without networking. Usually, edge computing gateways have rich interfaces, including conventional communication methods such as RS232, RS485, CAN, and some also have 4G and 5G communication functions.
[0003] In traditional technology, when the network interface of the edge computing gateway needs to be expanded, the gateway usually needs to be connected to a switch or other device. It is often designed with a single network port and has poor expansion performance. If the network device needs to be expanded, it is connected through a switch or router. For a gateway with multiple network ports, the routing module is simply placed in the gateway, and communication is achieved through the respective PHY (Physical Layer) and network transformer.
[0004] However, traditional technology simply converts physically connected network cables into PCB traces, without achieving true integration, and the hardware cost is relatively high. Summary of the invention
[0005] Based on this, it is necessary to provide an edge computing gateway, inter-processor communication configuration method and device that can improve communication efficiency, enhance gateway expansion performance and reduce hardware costs in response to the above technical problems.
[0006] In a first aspect, the present application provides an edge computing gateway, which includes an edge gateway module and a routing module, the edge gateway module is communicatively connected to the routing module, the edge gateway module is communicatively connected to the cloud platform, and the routing module is also communicatively connected to the edge device;
[0007] The edge gateway module includes an edge computing algorithm processor, which is used to obtain edge device data packets, pre-process the edge device data packets, obtain processed edge device data, and configure the edge device based on the received adjustment control instructions to obtain edge device configuration data, including a first data interface;
[0008] The routing module includes a routing processor, which interacts with the edge computing algorithm processor for data and with the cloud server for information, and is used to transmit the processed edge device data to the cloud platform, and to update the information according to the routing information, obtain the updated routing information, obtain the edge device configuration data, select the path according to the updated routing information and the edge device configuration data, obtain the target forwarding routing path, and transmit the edge device configuration data to the target address based on the target forwarding routing path, including a second data interface, and the second data interface is connected to the first data interface.
[0009] In one embodiment, the first data interface uses a first gigabit medium independent interface, and the second data interface uses a second gigabit medium independent interface;
[0010] The transmitting end pin of the first Gigabit medium independent interface is connected to the receiving end pin of the second Gigabit medium independent interface, and the receiving end pin of the first Gigabit medium independent interface is connected to the transmitting end pin of the second Gigabit medium independent interface;
[0011] The pins include clock signal pins, control signal pins and data transmission pins.
[0012] In one of the embodiments, the edge gateway module further includes a first storage module and a first interface module;
[0013] A first storage module is connected to the edge gateway module and is used to store edge device configuration information and edge device data, and to cooperate with the edge computing algorithm processor to perform data processing and analysis;
[0014] The first interface module is connected to the edge gateway module and is used to access edge devices, external sensors or external controllers.
[0015] In one of the embodiments, the first storage module includes a first DRAM storage module and an eMMC storage module;
[0016] A first DRAM storage module, used to provide temporary storage and processing capabilities, the first DRAM storage module adopts a DDR4 memory module;
[0017] The eMMC storage module is used to provide storage space for the operating system.
[0018] In one embodiment, the first interface module includes a device expansion module and a serial communication module;
[0019] Device expansion module, used to access external devices connected by interfaces, including USB expansion interface module;
[0020] The serial communication module is used to realize the communication connection with the cloud platform and the edge device, including the RS232 serial port module and the RS485 serial port module. Both the RS232 serial port module and the RS485 serial port module use the UART serial communication protocol to communicate with the edge computing algorithm processor.
[0021] In one of the embodiments, the routing module further includes a second storage module connected to the routing processor and configured to store application data, routing configuration information and routing device data.
[0022] In one embodiment, the second storage module includes a second DRAM storage module and a flash memory storage module;
[0023] A second DRAM storage module is used to provide temporary storage and processing capabilities, and the second DRAM storage module adopts a DDR3 memory module;
[0024] The flash memory storage module is used to store codes such as a boot loader, routing configuration information, and routing device data. The flash memory storage module uses a NOR-Flash flash memory module.
[0025] In one embodiment, the routing module also includes a mobile communication module, and the mobile communication module adopts a 4G module or a 5G module.
[0026] In a second aspect, the present application provides a method for configuring communication between processors, applicable to any of the edge computing gateways described above, including:
[0027] When compiling the operating system, the device tree file is configured and modified according to the preset configuration parameter data to obtain the modified device tree file and the modified operating system;
[0028] Transferring the modified device tree file and the modified operating system to the target processor;
[0029] The modified operating system is run in the target processor, and virtual creation is performed according to the preset configuration function and the modified device tree file to obtain a virtual physical layer device.
[0030] In one embodiment, modifying the configuration of a device tree file according to preset configuration parameter data to obtain a modified device tree file and a modified operating system includes:
[0031] Get the property data to be modified from the device tree file;
[0032] The attribute data to be modified is modified according to the preset configuration parameter data to obtain the modified attribute parameter data.
[0033] In a third aspect, the present application further provides an inter-processor communication configuration device, comprising:
[0034] The system compilation module is used to modify the configuration of the device tree file according to the preset configuration parameter data when compiling the operating system, and obtain the modified device tree file and the modified operating system;
[0035] A communication transmission module, used for transmitting the modified device tree file and the modified operating system to the target processor;
[0036] The configuration operation module is used to run the modified operating system in the target processor, perform virtual creation according to the preset configuration function and the modified device tree file, and obtain the virtual physical layer device.
[0037] In a fourth aspect, the present application further provides a computer device, including a memory and a processor, wherein the memory stores a computer program, and when the processor executes the computer program, the following steps are implemented:
[0038] When compiling the operating system, the device tree file is configured and modified according to the preset configuration parameter data to obtain the modified device tree file and the modified operating system;
[0039] Transferring the modified device tree file and the modified operating system to the target processor;
[0040] The modified operating system is run in the target processor, and virtual creation is performed according to the preset configuration function and the modified device tree file to obtain a virtual physical layer device.
[0041] In a fifth aspect, the present application further provides a computer-readable storage medium having a computer program stored thereon, and when the computer program is executed by a processor, the following steps are implemented:
[0042] When compiling the operating system, the device tree file is configured and modified according to the preset configuration parameter data to obtain the modified device tree file and the modified operating system;
[0043] Transferring the modified device tree file and the modified operating system to the target processor;
[0044] The modified operating system is run in the target processor, and virtual creation is performed according to the preset configuration function and the modified device tree file to obtain a virtual physical layer device.
[0045] In a sixth aspect, the present application further provides a computer program product, including a computer program, which implements the following steps when executed by a processor:
[0046] When compiling the operating system, the device tree file is configured and modified according to the preset configuration parameter data to obtain the modified device tree file and the modified operating system;
[0047] Transferring the modified device tree file and the modified operating system to the target processor;
[0048] The modified operating system is run in the target processor, and virtual creation is performed according to the preset configuration function and the modified device tree file to obtain a virtual physical layer device.
[0049] The above-mentioned edge computing gateway, inter-processor communication configuration method, device, computer equipment, computer-readable storage medium and computer program product directly connect the internally set edge gateway module with the routing module, connect the edge computing algorithm processor with the routing processor through the first data interface and the second data interface, the edge computing gateway obtains edge device data from the edge device and pre-processes the edge device data to obtain processed edge device data, the routing module receives the processed edge device data transmitted by the edge computing gateway and can transmit it to the cloud platform, or the routing module transmits the instructions or data issued by the cloud platform to the edge computing gateway, and after being processed by the edge computing gateway, the routing module selects a suitable transmission path to transmit different data or instructions to the corresponding edge device, and realizes direct connection between the edge computing algorithm processor and the routing processor based on the data interface, and realizes communication between processors by using the pre-set underlying driver simulation, without the need for middleware devices to realize communication connection between processors, thereby reducing hardware costs, avoiding the processing of communication by middleware devices, and improving communication efficiency. BRIEF DESCRIPTION OF THE DRAWINGS
[0050] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the related technologies, the drawings required for use in the embodiments or the related technical descriptions are briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.
[0051] Figure 1 A schematic diagram of pin connections between an edge computing algorithm processor and a routing processor in one embodiment;
[0052] Figure 2 A schematic diagram of the structure of an edge computing gateway according to an embodiment;
[0053] Figure 3 A schematic diagram of a flow chart of a method for configuring communication between processors in one embodiment;
[0054] Figure 4 A structural block diagram of an inter-processor communication configuration device in one embodiment;
[0055] Figure 5 FIG. 4 is a diagram showing the internal structure of a computer device in one embodiment. DETAILED DESCRIPTION
[0056] In order to make the purpose, technical solution and advantages of the present application more clearly understood, the present application is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.
[0057] In one embodiment, an edge computing gateway is provided, the edge computing gateway comprising an edge gateway module and a routing module. The edge gateway module comprises a first data interface, the routing module comprises a second data interface, and the first data interface is connected to the second data interface.
[0058] The edge gateway module includes an edge computing algorithm processor. The edge gateway module obtains edge device data and / or sensor data through the routing module, then transmits the edge device data and / or sensor data to the edge computing algorithm processor, pre-processes it based on a preset edge computing algorithm or data processing model to obtain processed edge device data and / or processed sensor data, and then transmits the processed edge device data and / or processed sensor data to the cloud platform through the routing module.
[0059] The routing module includes a routing processor. When the cloud platform transmits control instructions and / or data to the edge device, the routing module transmits the control instructions and / or data to the edge gateway module, and processes the received control instructions and / or data through the edge computing algorithm processor to obtain the control instructions and / or data of different edge devices. The routing module uses the routing processor to select a suitable transmission path based on the control instructions and / or data of different edge devices to transmit the control instructions and / or data of different edge devices to the corresponding edge devices.
[0060] In this embodiment, the internally arranged edge gateway module is directly connected to the routing module, and the edge computing algorithm processor is connected to the routing processor through the first data interface and the second data interface. The edge computing gateway obtains edge device data from the edge device and preprocesses the edge device data to obtain processed edge device data. The routing module receives the processed edge device data transmitted by the edge computing gateway and can transmit it to the cloud platform, or the routing module transmits the instructions or data issued by the cloud platform to the edge computing gateway. After being processed by the edge computing gateway, the routing module selects a suitable transmission path to transmit different data or instructions to the corresponding edge device. The edge computing algorithm processor and the routing processor are directly connected based on the data interface, and the communication between the processors is realized by using the pre-set underlying driver simulation. There is no need for middleware devices to realize the communication connection between the processors, thereby reducing hardware costs, avoiding the processing of communication by middleware devices, and improving communication efficiency.
[0061] In an exemplary embodiment, the first data interface and the second data interface both use a Gigabit Media Independent Interface, that is, the first data interface is a first Gigabit Media Independent Interface and the second data interface is a second Gigabit Media Independent Interface. The Gigabit Media Independent Interface is a Reduced Gigabit Media Independent Interface (RGMII) interface.
[0062] like Figure 1 As shown, the pins of the Gigabit Media Independent Interface include a clock signal pin, a control signal pin and a data transmission pin, and the clock signal pin, the control signal pin and the data transmission pin are divided into output pins and input pins. The transmitting pin of the first Gigabit Media Independent Interface is connected to the receiving pin of the second Gigabit Media Independent Interface, and the receiving pin of the first Gigabit Media Independent Interface is connected to the transmitting pin of the second Gigabit Media Independent Interface.
[0063] In an exemplary embodiment, Figure 2 As shown, the edge gateway module also includes a first storage module and a first interface module, and the first storage module and the first module are both connected to the edge computing algorithm processor of the edge gateway module. And the first storage module includes a first DRAM (Dynamic Random Access Memory) module and an eMMC storage module. The first DRAM storage module can be but is not limited to DDR4
[0064] The eMMC storage module uses an SD (Secure Digital, independent storage medium) card channel and is connected to the edge computing algorithm processor based on 8 data lines.
[0065] In an exemplary embodiment, see Figure 2The first interface module includes a device expansion module and a serial communication module, and both the device expansion module and the serial communication module are connected to the edge computing algorithm processor of the edge gateway module. The device expansion module includes a USB (Universal Serial Bus) expansion interface module, specifically a USB Hub module. The serial communication module includes an RS232 serial port module and an RS485 serial port module, and both the RS232 serial port module and the RS485 serial port module use a UART (Universal Asynchronous Receiver / Transmitter) serial communication protocol to communicate with the edge computing algorithm processor.
[0066] In an exemplary embodiment, see Figure 2 The routing module also includes a second storage module, which includes a second DRAM storage module and a flash memory storage module. The second DRAM storage module uses DDR3
[0067] The memory module is a Double-Data-Rate Third Generation Synchronous Dynamic Random Access Memory (DDRMM), and the flash memory storage module uses a NOR-Flash flash memory module, which is read and written through a SPI (Serial Peripheral interface) channel.
[0068] In an exemplary embodiment, see Figure 2 The routing module also includes a wireless communication module, and the wireless communication module adopts a 4G module or a 5G module.
[0069] In an exemplary embodiment, Figure 3 As shown, a method for configuring inter-processor communication is provided, and the method includes the following steps 302 to 306. Among them:
[0070] Step 302, when compiling the operating system, modify the configuration of the device tree file according to the preset configuration parameter data to obtain a modified device tree file and a modified operating system.
[0071] Exemplarily, when compiling the operating system of the edge computing algorithm processor or the routing processor, search for nodes related to the Ethernet node in the device tree file, and search or add the phy-mode (Physica-mode, physical layer mode) attribute under the node, and set it to the rgmii-rxid (Reduced Gigabit Media Independent Interface, reduced gigabit media independent interface) attribute. rgmii-rxid means delay processing of received data in the virtual phy, and configuration settings are performed to obtain the modified device tree file and the modified operating system.
[0072] Step 304: Transmit the modified device tree file and the modified operating system to the target processor.
[0073] Among them, the target processor includes an edge computing algorithm processor and a routing processor.
[0074] Exemplarily, an operating system suitable for a corresponding edge computing algorithm processor or a routing processor is transmitted to a corresponding processor, ie, a target processor.
[0075] Step 306: Run the modified operating system in the target processor, perform virtual creation according to the preset configuration function and the modified device tree file, and obtain a virtual physical layer device.
[0076] Among them, the preset configuration function is the phy_connect_fixed (Physica_connect_fixed, physical layer fixed connection) function.
[0077] Exemplarily, when the edge computing algorithm processor or the routing processor is running, the modified operating system is started, and a virtual PHY device is created based on the configuration information in the modified device tree file using a preset configuration function. The specific process is: the modified device tree file is loaded into the memory, and then the memory is passed to the kernel of the target processor, the kernel parses the modified device tree file and initializes and configures the modified operating system, creates a virtual PHY device, and assigns it a virtual ID.
[0078] In the above-mentioned inter-processor communication configuration method, the communication between processors is realized by pre-setting the underlying driver simulation, and no middleware device is required to realize the communication connection between processors, thereby reducing hardware costs, avoiding the processing of communication by middleware devices, and improving communication efficiency.
[0079] In an exemplary embodiment, modifying the configuration of a device tree file according to preset configuration parameter data to obtain a modified device tree file and a modified operating system includes:
[0080] Acquire the attribute data to be modified from the device tree file; modify the attribute data to be modified according to the preset configuration parameter data to obtain the modified attribute parameter data.
[0081] For example, find the node related to Ethernet in the device tree file, find or add the phy-mode attribute under the node, and set it to the rgmii-rxid attribute, where rgmii-rxid indicates delay processing of received data in the virtual phy. Then add attributes to the node to specify the communication mode and rate, such as setting the full-duplex mode and the communication rate to 1000bps.
[0082] In this embodiment, the device tree file is modified at the compile time of the operating system to use Fixed PHY to drive the RGMII interface, simulate the function of PHY, and realize direct communication between the edge computing algorithm processor and the routing processor, thereby improving the data transmission speed and saving hardware costs.
[0083] In an exemplary embodiment, a method for configuring inter-processor communication is provided, the method comprising the following steps:
[0084] When compiling the operating system, the attribute data to be modified is obtained from the device tree file.
[0085] The attribute data to be modified is modified according to the preset configuration parameter data to obtain the modified attribute parameter data.
[0086] Transfer the modified device tree file and the modified operating system to the target processor.
[0087] The modified operating system is run in the target processor, and virtual creation is performed according to the preset configuration function and the modified device tree file to obtain a virtual physical layer device.
[0088] It should be understood that, although the steps in the flowcharts involved in the above embodiments are displayed in sequence according to the indication of the arrows, these steps are not necessarily executed in sequence according to the order indicated by the arrows. Unless there is a clear explanation in this article, the execution of these steps is not strictly limited in order, and these steps can be executed in other orders. Moreover, at least a part of the steps in the flowcharts involved in the above embodiments may include multiple steps or multiple stages, and these steps or stages are not necessarily executed at the same time, but can be executed at different times, and the execution order of these steps or stages is not necessarily carried out in sequence, but can be executed in turn or alternately with other steps or at least a part of the steps or stages in other steps.
[0089] Based on the same inventive concept, the embodiment of the present application also provides an inter-processor communication configuration device for implementing the inter-processor communication configuration method involved above. The implementation solution provided by the device to solve the problem is similar to the implementation solution recorded in the above method, so the specific limitations in the one or more inter-processor communication configuration device embodiments provided below can refer to the above limitations on the inter-processor communication configuration method, and will not be repeated here.
[0090] In an exemplary embodiment, Figure 4 As shown, a communication configuration device between processors is provided, including: a system compilation module 402, a communication transmission module 404 and a configuration operation module 406, wherein:
[0091] The system compiling module 402 is used to modify the configuration of the device tree file according to the preset configuration parameter data when compiling the operating system, and obtain the modified device tree file and the modified operating system.
[0092] The communication transmission module 404 is used to transmit the modified device tree file and the modified operating system to the target processor.
[0093] The configuration and operation module 406 is used to run the modified operating system in the target processor, perform virtual creation according to the preset configuration function and the modified device tree file, and obtain a virtual physical layer device.
[0094] In an exemplary embodiment, the system compilation module 402 is further configured to obtain the attribute data to be modified from the device tree file; modify the attribute data to be modified according to the preset configuration parameter data, and obtain the modified attribute parameter data.
[0095] Each module in the above-mentioned inter-processor communication configuration device can be implemented in whole or in part by software, hardware, or a combination thereof. Each of the above-mentioned modules can be embedded in or independent of the processor in the computer device in the form of hardware, or can be stored in the memory in the computer device in the form of software, so that the processor can call and execute the operations corresponding to each of the above modules.
[0096] In an exemplary embodiment, a computer device is provided. The computer device may be a server, and its internal structure diagram may be as shown in FIG. Figure 5As shown. The computer device includes a processor, a memory, an input / output interface (Input / Output, referred to as I / O) and a communication interface. The processor, the memory and the input / output interface are connected through a system bus, and the communication interface is connected to the system bus through the input / output interface. The processor of the computer device is used to provide computing and control capabilities. The memory of the computer device includes a non-volatile storage medium and an internal memory. The non-volatile storage medium stores an operating system, a computer program and a database. The internal memory provides an environment for the operation of the operating system and the computer program in the non-volatile storage medium. The database of the computer device is used to store device tree file configuration data. The input / output interface of the computer device is used to exchange information between the processor and an external device. The communication interface of the computer device is used to communicate with an external terminal through a network connection. When the computer program is executed by the processor, a method for configuring communication between processors is implemented.
[0097] Those skilled in the art will understand that Figure 5 The structure shown in the figure is only a block diagram of a part of the structure related to the solution of the present application, and does not constitute a limitation on the computer device to which the solution of the present application is applied. The specific computer device may include more or fewer components than those shown in the figure, or combine certain components, or have a different arrangement of components.
[0098] In an exemplary embodiment, a computer device is provided, including a memory and a processor, wherein a computer program is stored in the memory, and the processor implements the steps in the above-mentioned method embodiments when executing the computer program.
[0099] In one embodiment, a computer-readable storage medium is provided, on which a computer program is stored. When the computer program is executed by a processor, the steps in the above-mentioned method embodiments are implemented.
[0100] In one embodiment, a computer program product is provided, including a computer program, which implements the steps in the above method embodiments when executed by a processor.
[0101] It should be noted that the user information (including but not limited to user device information, user personal information, etc.) and data (including but not limited to data used for analysis, stored data, displayed data, etc.) involved in this application are all information and data authorized by the user or fully authorized by all parties, and the collection, use and processing of relevant data must comply with relevant regulations.
[0102] A person skilled in the art can understand that all or part of the processes in the above-mentioned embodiment methods can be implemented by instructing related hardware through a computer program. The computer program can be stored in a non-volatile computer-readable storage medium. When the computer program is executed, it can include the processes of the embodiments of the above-mentioned methods.
[0103] The technical features of the above embodiments may be combined arbitrarily. To make the description concise, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.
[0104] The above embodiments only express several implementation methods of the present application, and the descriptions thereof are relatively specific and detailed, but they cannot be understood as limiting the scope of the present application. It should be pointed out that, for a person of ordinary skill in the art, several variations and improvements can be made without departing from the concept of the present application, and these all belong to the protection scope of the present application. Therefore, the protection scope of the present application shall be subject to the attached claims.
Claims
1. An edge computing gateway, characterized in that: The edge computing gateway includes an edge gateway module and a routing module, the edge gateway module is communicatively connected to the routing module, the edge gateway module is communicatively connected to the cloud platform, and the routing module is also communicatively connected to the edge device; The edge gateway module includes an edge computing algorithm processor and a first data interface, which are used to obtain edge device data packets, pre-process the edge device data packets, obtain processed edge device data, and configure the edge device based on the received adjustment control instructions to obtain edge device configuration data; The routing module includes a routing processor and a second data interface, which performs data interaction with the edge computing algorithm processor and information interaction with the cloud server, and is used to transmit the processed edge device data to the cloud platform, and to update the routing information, obtain the updated routing information, obtain the edge device configuration data, perform path selection according to the updated routing information and the edge device configuration data, obtain the target forwarding routing path, and transmit the edge device configuration data to the target address based on the target forwarding routing path, and the second data interface is connected to the first data interface; When running the edge computing algorithm processor and the routing processor, a virtual PHY device is created, the edge computing algorithm processor is connected to the routing processor through the first data interface and the second data interface, and a pre-set virtual PHY device is used to drive the data interface to simulate the function of the PHY to realize the communication between the edge computing algorithm processor and the routing processor.
2. The edge computing gateway according to claim 1, characterized in that: The first data interface uses a first gigabit medium independent interface, and the second data interface uses a second gigabit medium independent interface; The transmitting end pin of the first gigabit medium independent interface is connected to the receiving end pin of the second gigabit medium independent interface, and the receiving end pin of the first gigabit medium independent interface is connected to the transmitting end pin of the second gigabit medium independent interface; The pins include a clock signal pin, a control signal pin and a data transmission pin.
3. The edge computing gateway according to claim 1, characterized in that: The edge gateway module also includes a first storage module and a first interface module; The first storage module is connected to the edge gateway module and is used to store edge device configuration information and edge device data, and cooperate with the edge computing algorithm processor to perform data processing and analysis; The first interface module is connected to the edge gateway module and is used to access an edge device, an external sensor or an external controller.
4. The edge computing gateway according to claim 3, characterized in that: The first storage module includes a first DRAM storage module and an eMMC storage module; The first DRAM storage module is used to provide temporary storage and processing capabilities, and the first DRAM storage module adopts a DDR4 memory module; The eMMC storage module is used to provide storage space for the operating system.
5. The edge computing gateway according to claim 3, characterized in that: The first interface module includes a device expansion module and a serial communication module; The device expansion module is used to access external devices connected by an interface, including a USB expansion interface module; The serial communication module is used to realize communication connection with the cloud platform and the edge device, and includes an RS232 serial port module and an RS485 serial port module. Both the RS232 serial port module and the RS485 serial port module use the UART serial communication protocol to communicate with the edge computing algorithm processor.
6. The edge computing gateway according to claim 1, characterized in that: The routing module also includes a second storage module connected to the routing processor and used for storing application data, routing configuration information and routing device data.
7. The edge computing gateway according to claim 6, characterized in that: The second storage module includes a second DRAM storage module and a flash memory storage module; The second DRAM storage module is used to provide temporary storage and processing capabilities, and the second DRAM storage module adopts a DDR3 memory module; The flash memory storage module is used to store a boot loader, routing configuration information and routing device data, and the flash memory storage module adopts a NOR-Flash flash memory module.
8. A method for configuring inter-processor communication, characterized in that: Applicable to the edge computing gateway as described in claims 1-7, the method comprising: When compiling the operating system of the edge computing algorithm processor or the routing processor, modify the configuration of the device tree file according to the preset configuration parameter data to obtain the modified device tree file and the modified operating system; Transmitting the modified device tree file and the modified operating system to a target processor; wherein the target processor includes an edge computing algorithm processor and a routing processor; The modified operating system is run in the target processor, and virtual creation is performed according to a preset configuration function and the modified device tree file to obtain a virtual physical layer device.
9. The inter-processor communication configuration method according to claim 8, characterized in that: The step of modifying the configuration of the device tree file according to the preset configuration parameter data to obtain the modified device tree file and the modified operating system includes: Get the property data to be modified from the device tree file; The attribute data to be modified is modified according to the preset configuration parameter data to obtain modified attribute parameter data.
10. An inter-processor communication configuration device, characterized in that: Applicable to the edge computing gateway as described in claims 1-7, the device comprises: A system compilation module, used to modify the configuration of the device tree file according to preset configuration parameter data when compiling the operating system of the edge computing algorithm processor or the routing processor, and obtain the modified device tree file and the modified operating system; A communication transmission module, used to transmit the modified device tree file and the modified operating system to a target processor; wherein the target processor includes an edge computing algorithm processor and a routing processor; The configuration operation module is used to run the modified operating system in the target processor, perform virtual creation according to the preset configuration function and the modified device tree file, and obtain the virtual physical layer device.
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