Cluster control and status register processing method, device, equipment and medium

By setting control and status registers for each node in the cluster architecture, monitoring and updating the node status, and synchronizing the status information, the application problem of CSR in the FPGA cluster architecture is solved, ensuring the stability of the service and the improvement of computing performance.

CN118426829BActive Publication Date: 2025-04-15TSINGHUA UNIVERSITY
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Patent Information

Application Number
CN202410463841.X
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2024-04-17
Publication Date
2025-04-15
Estimated Expiration
2044-04-17

AI Technical Summary

Technical Problem

The CSR features in the RiscV architecture cannot be directly used in a cluster architecture built with FPGA as the main architecture node, making it difficult to apply CSR.

Method used

By setting control and status registers for each node in the cluster architecture, monitoring the operating status of the node, updating the status information in the register, and sending the status information to the target host when the preset period sending conditions are met, synchronizing and managing CSR is achieved.

Benefits of technology

Enable CSR to work normally in a cluster architecture built with FPGA as the main architecture node, ensure the continuity and stability of cluster architecture services, and realize optimized scheduling of cluster nodes to improve computing performance.

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Abstract

The present application relates to a method, device, equipment and medium for processing the control and status register of a cluster, including: when the current running state of any node is different from the running state of the previous moment, the state information in the control and status register of the corresponding node is updated according to the current running state, and the control and status registers of all nodes send the state information in the corresponding node to the node connected to the target host, so as to apply for synchronization of control and status register information to the target host through the node connected to the target host, and when the running state of any node is in an abnormal state, the first abnormal reminder information is sent to the node connected to the target host, the abnormal report strategy is matched according to the first abnormal reminder information, and the report is made according to the abnormal report strategy. Thus, the problem that CSR is difficult to apply in the cluster architecture built with FPGA as the main architecture node is solved, and the continuity and stability of the cluster architecture service are guaranteed.
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Description

Technical Field

[0001] The present application relates to the field of communication technology, and in particular to a method, device, equipment and medium for processing control and status registers of a cluster. Background Art

[0002] In the field of computer science, a register is a storage unit inside the central processing unit (CPU) that is used to temporarily store instructions, data, and addresses. With the evolution of computer architecture, the types and functions of registers have gradually become richer to meet the needs of complex instruction sets and advanced functions. Control and Status Registers (CSRs) emerged in this context. They are designed to store and manage control and status information related to CPU operations. Taking the RISC-V architecture as an example, the RISC-V architecture is a relatively new and highly-watched open source instruction set architecture (ISA). CSRs are a very important component of the RiscV architecture, which is used to control and monitor the operating status of the processor.

[0003] However, the CSR feature in the RiscV architecture cannot be directly used in a cluster architecture built with FPGA (Field Programmable Gate Array) as the main architecture node, which needs to be solved urgently. Summary of the invention

[0004] The present application provides a method, device, equipment and medium for processing the control and status registers of a cluster to solve the problem that CSR is difficult to apply in a cluster architecture built with FPGA as the main architecture node. CSR can be enabled to play a role in a cluster architecture built with FPGA as the main architecture node, ensure the continuity and stability of the cluster architecture service, and achieve optimized scheduling of each node in the cluster, thereby improving the overall computing performance.

[0005] In a first aspect, an embodiment of the present application provides a method for processing a control and status register of a cluster, wherein each node in the cluster architecture is provided with a control and status register, and the current operating status of the corresponding node is monitored through the control and status register of each node in the cluster architecture, and the method comprises the following steps:

[0006] Determine whether there is any node whose current running state is different from that of the previous running state;

[0007] If the current running state of any node is different from the running state of the previous moment, the state information in the control and state register of the corresponding node is updated according to the current running state, and after the update is completed, it is determined whether all nodes meet the preset periodic sending conditions;

[0008] If all the nodes meet the preset periodic sending condition, the control and status registers of all the nodes send the status information in the corresponding nodes to the node connected to the target host, so as to apply to the target host for synchronization control and status register information through the node connected to the target host;

[0009] After monitoring the current operating state of the corresponding node through the control and status register of each node in the cluster architecture, the method further includes: determining whether the operating state of any node is in an abnormal state based on the operating state of each node;

[0010] If the operating status of any node is in an abnormal state, a first abnormal reminder message is generated and sent to the node connected to the target host. The node connected to the target host matches the abnormal reporting strategy according to the first abnormal reminder message and reports according to the abnormal reporting strategy.

[0011] Optionally, in some embodiments, the method for processing the control and status register of the cluster further includes:

[0012] Obtaining a message reading instruction of the target host, wherein the message reading instruction includes a message acquisition authority level and a message address of a control and status register to be read;

[0013] Based on the message acquisition permission level, determining whether the target host meets the preset message reading condition;

[0014] If the target host meets the reading condition of the preset message, information addressing is performed according to the message address of the control and status register to be read, and after the addressing is completed, the parameter information of the control and status register to be read is uploaded to the target host through the node connected to the target host.

[0015] Optionally, in some embodiments, after determining whether the running state of any node is in an abnormal state, the method further includes:

[0016] If the operation status of any node is in the abnormal status, the node in the abnormal status is used as a node to be reset, and a local reset process is performed on the abnormal position in the node to be reset according to a preset reset strategy.

[0017] Optionally, in some embodiments, after performing local reset processing on the abnormal position in the node to be reset, the method further includes:

[0018] Determine the number of times the node to be reset is reset within a preset time;

[0019] If the number of resets is greater than a preset threshold, abnormal information is generated, uploaded to the target host, and saved in the log information of the node with the abnormal state.

[0020] Optionally, in some embodiments, after monitoring the current running status of the corresponding node through the control and status register of each node in the cluster architecture, the method further includes:

[0021] Obtaining execution tasks of the cluster architecture;

[0022] Based on a preset load balancing strategy, according to the running status of each node, the execution tasks are assigned to obtain tasks to be executed for each node, and each node executes the corresponding tasks to be executed.

[0023] In a second aspect of the present application, an embodiment provides a processing device for a control and status register of a cluster, wherein each node in the cluster architecture is provided with a control and status register, and the current operating state of the corresponding node is monitored through the control and status register of each node in the cluster architecture, and the device includes:

[0024] The first judgment module is used to judge whether there is any node whose current running state is different from the running state at the previous moment;

[0025] An update module, used to update the status information in the control and status register of the corresponding node according to the current running status of any node when the current running status of the node is different from the running status of the previous moment, and to determine whether all nodes meet the preset periodic sending conditions after the update is completed;

[0026] A synchronization module, used for sending the status information of the control and status registers of all the nodes to the node connected to the target host when all the nodes meet the preset periodic sending condition, so as to apply to the target host for synchronization of control and status register information through the node connected to the target host;

[0027] After monitoring the current operating state of the corresponding node through the control and status register of each node in the cluster architecture, the method further includes: determining whether the operating state of any node is in an abnormal state based on the operating state of each node;

[0028] If the operating status of any node is in an abnormal state, a first abnormal reminder message is generated and sent to the node connected to the target host. The node connected to the target host matches the abnormal reporting strategy according to the first abnormal reminder message and reports according to the abnormal reporting strategy.

[0029] Optionally, in some embodiments, the method for processing the control and status register of the cluster further includes:

[0030] A first acquisition module, used to acquire a message reading instruction of the target host, wherein the message reading instruction includes a message acquisition authority level and a message address of a control and status register to be read;

[0031] A second judgment module, used to judge whether the target host meets the preset message reading condition based on the message acquisition permission level;

[0032] The upload module is used to perform information addressing according to the message address of the control and status register to be read when the target host meets the reading condition of the preset message, and after the addressing is completed, upload the parameter information of the control and status register to be read to the target host through the node connected to the target host.

[0033] Optionally, in some embodiments, after determining whether the running state of any node is in an abnormal state, the synchronization module further includes:

[0034] The reset unit is used to, when the running state of any node is in the abnormal state, take the node in the abnormal state as a node to be reset, and perform local reset processing on the abnormal position in the node to be reset according to a preset reset strategy.

[0035] Optionally, in some embodiments, after performing local reset processing on the abnormal position in the node to be reset, the reset unit further includes:

[0036] A judging subunit, used to judge the number of times the node to be reset has been reset within a preset time;

[0037] A generating subunit is used to generate abnormal information when the number of reset times is greater than a preset threshold, upload the abnormal information to the target host, and save the abnormal information in the log information of the node with the abnormal state.

[0038] Optionally, in some embodiments, after monitoring the current running status of the corresponding node through the control and status register of each node in the cluster architecture, the method further includes:

[0039] A second acquisition module, used to acquire the execution task of the cluster architecture;

[0040] The execution module is used to distribute the execution tasks to obtain the tasks to be executed for each node based on the preset load balancing strategy and the operating status of each node, and each node executes the corresponding tasks to be executed.

[0041] The third aspect of the present application provides an electronic device, comprising: a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the program to implement the method for processing the control and status registers of the cluster as described in the above embodiment.

[0042] A fourth aspect of the present application provides a computer-readable storage medium having a computer program stored thereon, the program being executed by a processor to implement the method for processing the control and status registers of the cluster as described in the above embodiment.

[0043] The fifth aspect of the present application provides a computer program product, including computer program instructions. When the computer program / instructions are executed by a processor, they are used to implement the method for processing the control and status registers of the cluster as described in any one of claims 1 to 5.

[0044] Therefore, this application has at least the following beneficial effects:

[0045] (1) High robustness: In a cluster architecture, if any node in the cluster fails, the CSR information corresponding to the node can be quickly obtained and used by other normally functioning nodes through message communication, ensuring service continuity and stability.

[0046] (2) Flexibility: In a cluster architecture, due to the independence of CSRs, each node can be independently configured and managed according to its specific task or application requirements, thereby achieving more refined control and optimization.

[0047] (3) Performance optimization: By properly configuring and managing CSR, we can optimize the scheduling of each node in the cluster, thereby improving the overall computing performance.

[0048] (4) Load balancing: By properly configuring and managing CSR, the load status of each node in the cluster can be obtained. Through scheduling management, the load can be evenly distributed and resource utilization can be improved.

[0049] Additional aspects and advantages of the present application will be given in part in the description below, and in part will become apparent from the description below, or will be learned through the practice of the present application. BRIEF DESCRIPTION OF THE DRAWINGS

[0050] The above and / or additional aspects and advantages of the present application will become apparent and easily understood from the following description of the embodiments in conjunction with the accompanying drawings, in which:

[0051] Figure 1 A flowchart of a method for processing a control and status register of a cluster provided according to an embodiment of the present application;

[0052] Figure 2 A schematic diagram of the communication principle between a host, a CSR management module and a CSR submodule provided according to an embodiment of the present application;

[0053] Figure 3 A flowchart of a method for processing a control and status register of a cluster provided according to an embodiment of the present application;

[0054] Figure 4 A schematic diagram of a method for processing a control and status register of a cluster provided according to an embodiment of the present application;

[0055] Figure 5 A schematic diagram of a CSR acquisition unit provided according to an embodiment of the present application;

[0056] Figure 6 A schematic diagram of a monitoring unit of a CSR provided according to an embodiment of the present application;

[0057] Figure 7 A schematic diagram of address allocation of a CSR provided according to an embodiment of the present application;

[0058] Figure 8 A block diagram of a processing device for a control and status register of a cluster provided according to an embodiment of the present application;

[0059] Fig. 9 It is a schematic diagram of the structure of an electronic device provided according to an embodiment of the present application. DETAILED DESCRIPTION

[0060] Embodiments of the present application are described in detail below, and examples of the embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals throughout represent the same or similar elements or elements having the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are intended to be used to explain the present application, and should not be construed as limiting the present application.

[0061] Before introducing the method for processing the control and status register of the cluster according to the embodiment of the present application, the purpose of the CSR is first introduced.

[0062] CSR has many uses. For example, CSR can be used to indicate the architecture features supported by the current processor, the current processor status, storage control information, system status, etc. Specifically, CSR can be used to set the privilege level of the processor, or record the interrupt status of the processor; CSR can also be used to record the status of the system, such as the currently running process, interrupt priority, etc. CSR can also be used to store control information, such as the processor's clock frequency, power management status, etc.

[0063] However, some of the above CSR characteristics are difficult to apply to the cluster architecture built with FPGA as the main architecture node. For this reason, the present application provides a method for processing the control and status registers of a cluster, in which it is determined whether the current running state of any node is different from the running state of the previous moment; if the current running state of any node is different from the running state of the previous moment, the state information in the control and status register of the corresponding node is updated according to the current running state, and after the update is completed, it is determined whether all nodes meet the preset periodic sending conditions; if all nodes meet the preset periodic sending conditions, the control and status registers of all nodes send the state information in the corresponding node to the node connected to the target host, so as to apply to the target host for synchronization of control and status register information through the node connected to the target host. Thus, the problem that CSR is difficult to apply in the cluster architecture built with FPGA as the main architecture node is solved, and CSR can play a role in the cluster architecture built with FPGA as the main architecture node, ensuring the continuity and stability of cluster architecture services.

[0064] Specifically, Figure 1 A flowchart of a method for processing a control and status register of a cluster provided in an embodiment of the present application.

[0065] like Figure 1 As shown, the method for processing the control and status registers of the cluster includes the following steps:

[0066] It should be noted that each node in the cluster architecture of the embodiment of the present application is provided with a control and status register, and the current operating status of the corresponding node is monitored through the control and status register of each node in the cluster architecture.

[0067] In step S101, it is determined whether the current running state of any node is different from the running state of the previous moment.

[0068] Specifically, Figure 2 As shown, the cluster architecture of the embodiment of the present application is built with FPGA as the main architecture node, and the FPGAs are connected and communicated with each other using a pre-designed cascade architecture. Each FPGA-composed node has a CSR register CSR sub-module, and each CSR register CSR sub-module is only responsible for status monitoring and control management of the corresponding node.

[0069] The CSR sub-module communicates with the CSR main control management module by sending messages at regular intervals, so that the CSR main control module can update the information of the CSR sub-module in real time. Specifically, the embodiment of the present application can determine whether the current operating status of any node is different from the operating status at the previous moment, to determine whether the operating status of the CSR sub-module has changed.

[0070] In step S102, if the current operating status of any node is different from the operating status at the previous moment, the status information in the control and status register of the corresponding node is updated according to the current operating status, and after the update is completed, it is determined whether all nodes meet the preset periodic sending conditions.

[0071] The preset period sending condition is that the preset period is reached.

[0072] In an embodiment of the present application, when no host actively reads the CSR and the CSR sub-module of the FPGA node does not detect an abnormal situation, the CSR sub-module of the FPGA node can monitor the status of the current FPGA node in real time, update the CSR information of the CSR sub-module, and periodically send messages to the CSR management module of the host connection node, so that the CSR management module can synchronize the CSR information of each sub-module.

[0073] In step S103, if all the nodes meet the preset periodic sending conditions, the control and status registers of all the nodes send the status information in the corresponding nodes to the nodes connected to the target host, so as to apply for synchronous control and status register information from the target host through the nodes connected to the target host.

[0074] Specifically, the CSR sub-module periodically sends messages to the CSR management module of the host connection node, so that the CSR management module can synchronize the CSR information of each sub-module. The information of the CSR management module is periodically actively transmitted through communication protocols such as PCIe (Peripheral Component Interconnect Express) to apply to the administrator host for synchronization of CSR information, so that the administrator can know the communication and status of each FPGA node in real time.

[0075] Optionally, in some embodiments, the method for processing the control and status registers of the above-mentioned cluster further includes: obtaining a message reading instruction of the target host, the message reading instruction including a message acquisition permission level and a message address of the control and status registers to be read; based on the message acquisition permission level, determining whether the target host meets the preset message reading conditions; if the target host meets the preset message reading conditions, performing information addressing according to the message address of the control and status registers to be read, and after the addressing is completed, uploading the parameter information of the control and status registers to be read to the target host through a node connected to the target host.

[0076] The reading condition of the preset message can be preset by the developer, for example, the reading condition of the preset message can be that the message acquisition permission level is a high-level permission. It is understandable that when the target host (administrator or ordinary user) needs to actively read the CSR, it can also actively send a synchronization message to notify any CSR submodule or all CSR submodules to update the information in the main control management module.

[0077] Specifically, when the target host needs to read the message of any CSR sub-module, it can send a message reading instruction to the CSR management module, wherein the message reading instruction may include a message acquisition permission level for permission verification; and a message address of the CSR to be read, for locating the CSR sub-module to be read.

[0078] The embodiment of the present application can determine whether the target host can obtain the CSR message to be read through the message acquisition permission level. In the actual execution process, when the message acquisition permission level of the target host is high management permission, it can be determined that the target host meets the reading conditions of the preset message.

[0079] like Figure 3 As shown, when the target host meets the reading conditions of the preset message, the CSR management module can perform information addressing according to the message address of the CSR to be read. After the addressing is completed, the CSR management module composes the parameter information of the CSR to be read into a message and sends it, which is transmitted through the message transmission channel to the node connected to the target host that initiates the read behavior. The target host can thereby obtain the content information of the CSR, wherein the parameter information of the CSR includes but is not limited to the data channel temporary storage content, the message channel temporary storage content, instruction decoding, access permission check, etc.

[0080] In the actual implementation process, Figure 4 As shown, the target host has the following three main ways to obtain CSR information.

[0081] (1) A host with high management privileges can obtain information by directly reading the address space where the CSR is located.

[0082] (2) Figure 2 As shown, a host with high management authority can obtain CSR information through message channel transmission in the FPGA cascade cluster architecture.

[0083] (3) Notify the host via a PCIe interrupt. If the current node is not directly connected to PCIe, the message is first transmitted to the FPGA node connected to the high-privilege host via the message channel in the FPGA cascade cluster architecture. After the node receives the message, it notifies the host via a PCIe interrupt.

[0084] Optionally, in some embodiments, after monitoring the current operating status of the corresponding node through the control and status registers of each node in the cluster architecture, it also includes: based on the operating status of each node, judging whether there is any node whose operating status is in an abnormal state; if there is any node whose operating status is in an abnormal state, generating a first abnormal reminder message, and sending the first abnormal reminder message to the node connected to the target host, the node connected to the target host matches the abnormal reporting strategy according to the first abnormal reminder information, and reports according to the abnormal reporting strategy.

[0085] Specifically, when the CSR submodule of the FPGA node detects an abnormality: the CSR submodule of the FPGA node immediately sends a message to the CSR management module of the host connection node to notify the abnormality of the current FPGA node. The CSR management module receives the message and decides how to report to the administrator host based on the type of abnormality:

[0086] Reporting method (1): Send a message to the message administrator host to report the abnormal situation.

[0087] Reporting method (2): Report abnormal conditions to the message administrator host by interruption.

[0088] Optionally, in some embodiments, after determining whether there is any node whose operating status is in an abnormal state, it also includes: if there is any node whose operating status is in the abnormal state, the node in the abnormal state is used as a node to be reset, and according to a preset reset strategy, a local reset processing is performed on the abnormal position in the node to be reset.

[0089] Specifically, for exceptions that the hardware can handle and recover on its own, the CSR submodule of the FPGA node, in addition to sending messages, will also perform operations such as local reset to the control exception location.

[0090] When the embodiment of the present application monitors the operating status of the corresponding node through the CSR of each node in the cluster architecture, an abnormal state may occur in a certain node. For example, when the monitoring unit of the CSR first detects that the communication status between the current node and other nodes has changed from normal communication to disconnected communication, the exception handling unit will attempt to locally reset the communication modules between the nodes to restore normal communication between the nodes.

[0091] In the actual execution process, when handling such exceptions, the exception handling unit will control other modules to operate, notify the administrator of the exception information through a high-authority host uplink message or interruption, and store the exception information in the log information of this node. Specifically, the embodiment of the present application monitors the operating status of the cluster architecture through CSR, including but not limited to monitoring error status, interrupt status, etc.; this step obtains these status information by reading a specific address of CSR. When an error state occurs, the communication content of CSR at the moment closest to the latch error state, for example, the data content from Host (host) to Device (hardware device), the message content from Host to Device, the data content from Device to Host, the message content from Device to Host, etc.

[0092] Optionally, in some embodiments, after resetting the node to be reset, it also includes: determining the number of reset times of the node to be reset within a preset time; if the number of reset times is greater than a preset threshold, generating exception information, uploading the exception information to the target host, and saving the exception information in the log information of the node with the abnormal status.

[0093] The preset time and the preset threshold may be preset by a user, obtained through a limited number of experiments, or obtained through a limited number of computer simulations, and are not specifically limited here.

[0094] It is understandable that not all abnormal situations can be handled by the cluster architecture itself. For example, the monitoring unit detects that the device temperature exceeds a predetermined threshold. Or, the monitoring unit detects that the communication between the current node and other nodes is disconnected, and multiple attempts to re-establish communication fail.

[0095] Specifically, after resetting the node to be reset, the present application determines the number of resets of the node to be reset within a certain period of time. If the number of resets is greater than a preset threshold, abnormal information is generated, uploaded to the target host, and saved in the log information of the node with abnormal status.

[0096] In the actual execution process, when handling such exceptions, the exception handling unit will immediately notify the administrator of the exception information by uplinking a message or interrupting the high-authority host, and store the exception information in the log information of this node.

[0097] Such abnormal FPGA will not perform other control operations, only notification, and the administrator will manually perform corresponding operations after receiving such abnormal information, such as abnormal communication between nodes, the administrator will check the physical connection between nodes, etc. Optionally, in some embodiments, after monitoring the current operating status of the corresponding node through the control and status register of each node in the cluster architecture, it also includes: obtaining the execution task of the cluster architecture; based on the preset load balancing strategy, according to the operating status of each node, the execution task is assigned to obtain the task to be executed of each node, and each node executes the corresponding task to be executed.

[0098] Among them, the operating status is determined by the device temperature, communication status, traffic conditions and computing resource usage.

[0099] It can be understood that the embodiments of the present application can monitor the operating status of the corresponding node through the CSR of each node in the cluster architecture. The operating status includes: the device temperature of each node in the cluster architecture, the traffic of each node, the communication status of each node (including the communication status of any node, the communication status of multiple nodes connected to any node, and the communication status of multiple sub-nodes within any node), and the real-time occupancy of computing resources of each node.

[0100] Traffic monitoring refers to the monitoring of data flows, which usually includes the speed of data in and out, total traffic, etc. The purpose of traffic monitoring is to allow and ensure the efficient transmission of useful data packets, while prohibiting or restricting the transmission of illegal data packets. Specifically, traffic monitoring is to manage and control network communication data packets, while optimizing and restricting them. Users can use traffic monitoring to understand in real time the programs that are accessing the Internet, as well as the real-time download and upload speeds of the programs. In addition, traffic monitoring is also widely used in network management, intrusion monitoring, protocol analysis, traffic engineering and other fields. It is an important basis for summarizing network traffic characteristics and analyzing network behavior, as well as the most important component of network security.

[0101] The communication status refers to the control device monitoring the status of each communication system and link during the operation of the software, and outputting the results in real time. When the communication link control module finds an abnormality, such as link disconnection, sender buffer, etc., it will immediately send the results to other members. The purpose of communication status monitoring is to ensure the normal operation of the communication system, and to select other links or use relay mode for transmission when encountering channel environment deterioration or interference, so as to ensure the continuity and stability of communication.

[0102] Traffic monitoring focuses on the transmission of data streams, while communication status focuses more on the operating status of communication systems and links. Both play an indispensable role in ensuring smooth and secure network communications.

[0103] Specifically, the embodiment of the present application can monitor the operating status of the corresponding node through the CSR of each node in the cluster architecture. When obtaining the execution task of the cluster architecture, the execution task can be distributed based on the preset load balancing strategy and the operating status of each node to obtain the tasks to be executed for each node. Each node executes the corresponding tasks to be executed to improve the processing power and response speed of the entire cluster.

[0104] During the actual execution process, the preset load balancing strategy can be determined according to different application scenarios and requirements. For example, the preset load balancing strategy can adopt a variety of scheduling algorithms, such as polling scheduling, weighted polling scheduling, least connection scheduling, etc. These algorithms can dynamically select the optimal scheduling strategy according to the characteristics of the task and the status of the cluster, thereby improving the performance and stability of the cluster.

[0105] In the embodiment of the present application, according to the preset load balancing strategy, according to the running status of each node, combined with the scheduling mechanism of the cluster, the execution task is assigned to obtain the task to be executed of each node, wherein the scheduling mechanism of the cluster may include the following:

[0106] Resource scheduling: mainly focuses on the allocation and management of computing resources, storage resources, network resources, etc. The scheduler will dynamically allocate resources to each task based on the resource conditions and task requirements of each node in the cluster to ensure the effective use of resources and avoid resource waste.

[0107] Task scheduling: responsible for allocating computing tasks, data tasks, network tasks, etc. to computing nodes in the cluster for execution. The scheduler will consider factors such as task priority, dependency, computing amount, and node load to allocate and schedule tasks to achieve parallel processing and load balancing of tasks.

[0108] Load balancing: Distribute requests to multiple computing nodes to optimize system performance. The load balancing strategy can be dynamically adjusted based on factors such as node load and task characteristics to ensure that each node can handle tasks evenly and improve the processing capacity and response speed of the entire cluster.

[0109] In summary, the embodiments of the present application can be Figure 5 The CSR acquisition unit acquires the parameter information of the communication module, as well as decodes the CSR access instruction and checks the access rights. Most of the CSR information of the acquisition unit is a read-only (RO) register, which is not open to users and administrators for modification, and can only obtain the content information of the register; some are read-write (RW) registers, that is, high-authority users or administrators can make certain configurations and modifications to the CSR content.

[0110] Take the example of an FPGA connected to a computing unit in a cluster architecture, where the user uses the cluster for training or reasoning tasks. When the computing unit connected to the FPGA is a general-purpose GPU, the FPGA can identify and obtain GPU information, and learn the maximum available computing resources and computing granularity. However, when the computing unit connected to the FPGA is a non-general-purpose self-developed chip, the administrator needs to make certain configurations to the maximum available computing resource register in the CSR of the node. This configuration is implemented by the administrator sending messages through the host.

[0111] The monitoring unit of the CSR of the embodiment of the present application can be as follows Figure 6 As shown, it is used to monitor the operation status of the cluster architecture. The information in the CSR, such as video memory usage, communication status node device temperature, data channel content node communication status, etc., are located in different addresses, such as Figure 7 As shown, on the basis of a determined and unique address, CSR information can be obtained through message communication.

[0112] According to the processing method of the control and status register of the cluster proposed in the embodiment of the present application, by judging whether the current running state of any node is different from the running state of the previous moment, if the current running state of any node is different from the running state of the previous moment, the state information in the control and status register of the corresponding node is updated according to the current running state, and after the update is completed, it is judged whether all nodes meet the preset periodic sending conditions, and if all nodes meet the preset periodic sending conditions, the control and status registers of all nodes send the state information in the corresponding nodes to the nodes connected to the target host, so as to apply to the target host for synchronization of control and status register information through the nodes connected to the target host. Thus, the problem that CSR is difficult to apply in the cluster architecture built with FPGA as the main architecture node is solved, and CSR can play a role in the cluster architecture built with FPGA as the main architecture node, ensuring the continuity and stability of cluster architecture services.

[0113] Next, a processing device for a control and status register of a cluster proposed in an embodiment of the present application will be described with reference to the accompanying drawings.

[0114] Figure 8 It is a block diagram of a processing device for a control and status register of a cluster according to an embodiment of the present application.

[0115] It should be noted that each node in the cluster architecture is provided with a control and status register, and the current operation status of the corresponding node is monitored through the control and status register of each node in the cluster architecture.

[0116] like Figure 8As shown, the processing device 10 of the control and status register of the cluster includes: a judgment module 100, an update module 200 and a synchronization module 300.

[0117] The first determination module 100 is used to determine whether there is any node whose current running state is different from that of the previous running state.

[0118] The update module 200 is used to update the status information in the control and status register of the corresponding node according to the current running status when the current running status of any node is different from the running status at the previous moment, and to determine whether all nodes meet the preset periodic sending conditions after the update is completed.

[0119] The synchronization module 300 is used to send the status information of the control and status registers of all nodes to the node connected to the target host when all nodes meet the preset periodic sending conditions, so as to apply to the target host for synchronization of the control and status register information through the node connected to the target host, wherein after monitoring the current operation status of the corresponding node through the control and status register of each node in the cluster architecture, it also includes: based on the operation status of each node, judging whether the operation status of any node is in an abnormal state;

[0120] If the operating status of any node is in an abnormal state, a first abnormal reminder message is generated and sent to the node connected to the target host. The node connected to the target host matches the abnormal reporting strategy according to the first abnormal reminder message and reports according to the abnormal reporting strategy.

[0121] Optionally, in some embodiments, the control and status register processing device 10 of the cluster further includes: a first acquisition module, a second determination module and an upload module.

[0122] The first acquisition module is used to acquire a message reading instruction of a target host, wherein the message reading instruction includes a message acquisition authority level and a message address of a control and status register to be read.

[0123] The second judgment module is used to judge whether the target host meets the preset message reading condition based on the message acquisition permission level.

[0124] The upload module is used to address the information according to the message address of the control and status register to be read when the target host meets the reading conditions of the preset message, and after the addressing is completed, upload the parameter information of the control and status register to be read to the target host through the node connected to the target host.

[0125] Optionally, in some embodiments, after determining whether the operating status of any node is in an abnormal state, the synchronization module further includes: a reset unit.

[0126] The reset unit is used to, when the operation status of any node is in an abnormal state, take the node in the abnormal state as a node to be reset, and perform local reset processing on the abnormal position in the node to be reset according to a preset reset strategy.

[0127] Optionally, in some embodiments, after performing local reset processing on the abnormal position in the node to be reset, the reset unit further includes: a judgment subunit and a generation subunit.

[0128] The judging subunit is used to judge the number of times the node to be reset is reset within a preset time.

[0129] The generation subunit is used to generate abnormal information when the number of resets is greater than a preset threshold, upload the abnormal information to the target host, and save the abnormal information in the log information of the node with abnormal status.

[0130] Optionally, in some embodiments, after monitoring the current operating status of the corresponding node through the control and status registers of each node in the cluster architecture, it also includes: a second acquisition module and an execution module.

[0131] The second acquisition module is used to acquire the execution tasks of the cluster architecture.

[0132] The execution module is used to distribute the execution tasks to obtain the tasks to be executed for each node based on the preset load balancing strategy and the operating status of each node, and each node executes the corresponding tasks to be executed.

[0133] It should be noted that the above explanation of the embodiment of the method for processing the control and status registers of a cluster is also applicable to the device for processing the control and status registers of the cluster of this embodiment, and will not be repeated here.

[0134] According to the processing device of the control and status register of the cluster proposed in the embodiment of the present application, by judging whether the current running state of any node is different from the running state of the previous moment, if the current running state of any node is different from the running state of the previous moment, the state information in the control and status register of the corresponding node is updated according to the current running state, and after the update is completed, it is judged whether all nodes meet the preset periodic sending conditions, and if all nodes meet the preset periodic sending conditions, the control and status registers of all nodes send the state information in the corresponding nodes to the nodes connected to the target host, so as to apply to the target host for synchronization of control and status register information through the nodes connected to the target host. Thus, the problem that CSR is difficult to apply in the cluster architecture built with FPGA as the main architecture node is solved, and CSR can play a role in the cluster architecture built with FPGA as the main architecture node, ensuring the continuity and stability of cluster architecture services.

[0135] Fig. 9 A schematic diagram of the structure of an electronic device provided in an embodiment of the present application. The electronic device may include:

[0136] A memory 901 , a processor 902 , and a computer program stored in the memory 901 and executable on the processor 902 .

[0137] When the processor 902 executes the program, the method for processing the control and status registers of the cluster provided in the above embodiment is implemented.

[0138] Furthermore, the electronic device further comprises:

[0139] The communication interface 903 is used for communication between the memory 901 and the processor 902 .

[0140] The memory 901 is used to store computer programs that can be executed on the processor 902 .

[0141] The memory 901 may include a high-speed RAM (Random Access Memory) memory, and may also include a non-volatile memory, such as at least one disk memory.

[0142] If the memory 901, the processor 902 and the communication interface 903 are implemented independently, the communication interface 903, the memory 901 and the processor 902 can be connected to each other through a bus and communicate with each other. The bus can be an ISA (Industry Standard Architecture) bus, a PCI (Peripheral Component Interconnect) bus or an EISA (Extended Industry Standard Architecture) bus, etc. The bus can be divided into an address bus, a data bus, a control bus, etc. For ease of representation, Fig. 9 Only one thick line is used in the diagram, but this does not mean that there is only one bus or only one type of bus.

[0143] Optionally, in a specific implementation, if the memory 901, the processor 902 and the communication interface 903 are integrated on a chip, the memory 901, the processor 902 and the communication interface 903 can communicate with each other through an internal interface.

[0144] The processor 902 may be a CPU (Central Processing Unit), or an ASIC (Application Specific Integrated Circuit), or one or more integrated circuits configured to implement the embodiments of the present application.

[0145] The embodiment of the present application further provides a computer-readable storage medium on which a computer program is stored. When the program is executed by a processor, the above-mentioned cluster control and status register processing method is implemented.

[0146] In the description of this specification, the description with reference to the terms "one embodiment", "some embodiments", "example", "specific example", or "some examples" etc. means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present application. In this specification, the schematic representations of the above terms are not necessarily directed to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described may be combined in any one or N embodiments or examples in a suitable manner. In addition, those skilled in the art may combine and combine the different embodiments or examples described in this specification and the features of the different embodiments or examples, without contradiction.

[0147] In addition, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Therefore, a feature defined as "first" or "second" may explicitly or implicitly include at least one of the features. In the description of this application, "N" means at least two, such as two, three, etc., unless otherwise clearly and specifically defined.

[0148] Any process or method description in a flowchart or otherwise described herein may be understood to represent a module, fragment or portion of code comprising one or more executable instructions for implementing the steps of a custom logical function or process, and the scope of the preferred embodiments of the present application includes alternative implementations in which functions may not be performed in the order shown or discussed, including performing functions in a substantially simultaneous manner or in reverse order depending on the functions involved, which should be understood by technicians in the technical field to which the embodiments of the present application belong.

[0149] It should be understood that the various parts of the present application can be implemented by hardware, software, firmware or a combination thereof. In the above-mentioned embodiment, the N steps or methods can be implemented by software or firmware stored in a memory and executed by a suitable instruction execution system. For example, if implemented by hardware, as in another embodiment, it can be implemented by any one of the following technologies known in the art or their combination: a discrete logic circuit having a logic gate circuit for implementing a logic function for a data signal, a dedicated integrated circuit having a suitable combination of logic gate circuits, a programmable gate array, a field programmable gate array, etc.

[0150] A person skilled in the art may understand that all or part of the steps in the method for implementing the above-mentioned embodiment may be completed by instructing related hardware through a program, and the program may be stored in a computer-readable storage medium, which, when executed, includes one or a combination of the steps of the method embodiment.

[0151] Although the embodiments of the present application have been shown and described above, it can be understood that the above embodiments are exemplary and cannot be understood as limitations on the present application. Ordinary technicians in this field can change, modify, replace and modify the above embodiments within the scope of the present application.

Claims

1. A method for processing control and status registers of a cluster, characterized in that: A cluster architecture is constructed with FPGA as the main architecture node, each node in the cluster architecture is provided with a control and status register, and the current operating status of the corresponding node is monitored through the control and status register of each node in the cluster architecture. The method comprises the following steps: Determine whether there is any node whose current running state is different from that of the previous running state; If the current running state of any node is different from the running state of the previous moment, the state information in the control and state register of the corresponding node is updated according to the current running state, and after the update is completed, it is determined whether all nodes meet the preset periodic sending conditions; If all the nodes meet the preset periodic sending condition, the control and status registers of all the nodes send the status information in the corresponding nodes to the node connected to the target host, so as to apply to the target host for synchronization control and status register information through the node connected to the target host; After monitoring the current operating state of the corresponding node through the control and status register of each node in the cluster architecture, the method further includes: determining whether the operating state of any node is in an abnormal state based on the operating state of each node; If the operating status of any node is in an abnormal state, a first abnormal reminder message is generated and sent to the node connected to the target host. The node connected to the target host matches the abnormal reporting strategy according to the first abnormal reminder message and reports according to the abnormal reporting strategy.

2. The method according to claim 1, characterized in that: Also includes: Obtaining a message reading instruction of the target host, wherein the message reading instruction includes a message acquisition authority level and a message address of a control and status register to be read; Based on the message acquisition permission level, determining whether the target host meets the preset message reading condition; If the target host meets the reading condition of the preset message, information addressing is performed according to the message address of the control and status register to be read, and after the addressing is completed, the parameter information of the control and status register to be read is uploaded to the target host through the node connected to the target host.

3. The method according to claim 1, characterized in that: After determining whether the running state of any node is in an abnormal state, the method further includes: If the operation status of any node is in the abnormal status, the node in the abnormal status is used as a node to be reset, and a local reset process is performed on the abnormal position in the node to be reset according to a preset reset strategy.

4. The method according to claim 3, characterized in that After performing local reset processing on the abnormal position in the node to be reset, the method further includes: Determine the number of times the node to be reset is reset within a preset time; If the number of resets is greater than a preset threshold, abnormal information is generated, uploaded to the target host, and saved in the log information of the node with the abnormal status.

5. The method according to claim 1, characterized in that After monitoring the current operating status of the corresponding node through the control and status register of each node in the cluster architecture, the method further includes: Obtaining execution tasks of the cluster architecture; Based on a preset load balancing strategy, according to the running status of each node, the execution tasks are assigned to obtain tasks to be executed for each node, and each node executes the corresponding tasks to be executed.

6. A processing device for a control and status register of a cluster, characterized in that: A cluster architecture built with FPGA as the main architecture node, each node in the cluster architecture is provided with a control and status register, and the current operating status of the corresponding node is monitored through the control and status register of each node in the cluster architecture, and the device includes: The first judgment module is used to judge whether there is any node whose current running state is different from the running state at the previous moment; An update module, used to update the status information in the control and status register of the corresponding node according to the current running status of any node when the current running status of the node is different from the running status of the previous moment, and to determine whether all nodes meet the preset periodic sending conditions after the update is completed; A synchronization module, used for sending the status information of the control and status registers of all the nodes to the node connected to the target host when all the nodes meet the preset periodic sending condition, so as to apply to the target host for synchronization of control and status register information through the node connected to the target host; After monitoring the current operating state of the corresponding node through the control and status register of each node in the cluster architecture, the method further includes: determining whether the operating state of any node is in an abnormal state based on the operating state of each node; If the operating status of any node is in an abnormal state, a first abnormal reminder message is generated and sent to the node connected to the target host. The node connected to the target host matches the abnormal reporting strategy according to the first abnormal reminder message and reports according to the abnormal reporting strategy.

7. The device according to claim 6, characterized in that Also includes: A first acquisition module, used for acquiring a message reading instruction of the target host, wherein the message reading instruction includes a message acquisition authority level and a message address of a control and status register to be read; A second judgment module, used to judge whether the target host meets the preset message reading condition based on the message acquisition permission level; The upload module is used to perform information addressing according to the message address of the control and status register to be read when the target host meets the reading condition of the preset message, and after the addressing is completed, upload the parameter information of the control and status register to be read to the target host through the node connected to the target host.

8. An electronic device, characterized in that: include: A memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the program to implement the method for processing the control and status register of the cluster as claimed in any one of claims 1 to 5.

9. A computer-readable storage medium having a computer program stored thereon, characterized in that: The program is executed by a processor to implement the method for processing the control and status register of a cluster as described in any one of claims 1 to 5.

10. A computer program product comprising computer program instructions, characterized in that When the computer program / instruction is executed by a processor, it is used to implement the method for processing the control and status register of the cluster as described in any one of claims 1-5.

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