A method and device for improving the low-temperature reliability and read performance of 3-D flash memory based on read reference voltage calibration

Abstract

A method and device for improving the low-temperature reliability and read performance of 3-D flash memory based on read reference voltage calibration, which relates to the field of solid-state storage. To solve the defect that there is no publicly disclosed technical solution for effectively improving the reliability and read performance of flash memory in a low-temperature environment in the prior art, the technical solution provided by the present invention is as follows: a method for establishing a low-temperature reliability improvement model of flash memory, the method comprising: a step of collecting a threshold voltage shift data set of the flash memory at different temperatures and performing preprocessing; a step of obtaining a preliminary relationship model between different temperatures and the optimal read reference voltage shift according to the data of the preprocessed threshold voltage shift data set; a step of correcting the preliminary relationship model according to the preset influencing factors of the flash memory to obtain a corrected model; a step of establishing a comprehensive compensation model according to the corrected model and the influencing factors. It is suitable for the work of read reference voltage calibration of NAND Flash.

Description

Technical Field

[0001] It relates to the field of solid-state storage, and specifically to the read reference voltage calibration of NAND Flash. Background Art

[0002] With the rapid development of information technology, flash memory, as a high-density and high-reliability non-volatile storage medium, has been widely used in the consumer electronics market. Especially the emergence of 3-D NAND flash memory technology, with its advantages of ultra-high storage density, low power consumption and high performance, has become an ideal choice for consumer electronic devices such as smart phones, tablets, smart wearable devices, and automotive electronics. These devices are usually used in non-fixed working environments and often face the challenge of temperature fluctuations. Especially in low-temperature environments, temperature changes have a significant impact on the performance and reliability of flash memory.

[0003] The working mechanism of flash memory storage units mainly depends on the tunneling effect. Data writing and erasing are achieved by forming a tunneling current between the floating gate and the control gate of the storage unit. Since the tunneling effect is extremely sensitive to temperature, flash memory can be regarded as a temperature-sensitive device. In a low-temperature environment, the tunneling current will decrease, resulting in an increase in the barrier height, which directly affects the ability of electrons to inject into the storage unit, thereby causing the threshold voltage distribution to drift. When the threshold voltage distribution is distorted, the accuracy of data reading will be affected, increasing the read error rate, and further leading to data corruption and system performance degradation.

[0004] The reliability and performance issues of flash memory in low-temperature environments have become pain points that need to be solved urgently in the current storage technology field. In practical applications, consumer electronic devices may work under extreme temperature conditions, such as in the outdoor environment in winter in high-latitude regions, cold chain logistics monitoring, aerospace and other special fields. Therefore, how to effectively improve the reliability and read performance of flash memory in low-temperature environments has become an important research direction. Summary of the Invention

[0005] To solve the defect that there is no disclosed technical solution in the prior art to effectively improve the reliability and read performance of flash memory in low-temperature environments, the technical solution provided by the present invention is as follows:

[0006] A method for establishing a flash memory low-temperature reliability improvement model, the method comprising:

[0007] The step of collecting the threshold voltage offset data set of the flash memory at different temperatures and performing preprocessing;

[0008] The step of obtaining a preliminary relationship model between different temperatures and the optimal read reference voltage offset according to the data of the preprocessed threshold voltage offset data set;

[0009] Steps of correcting the preliminary relationship model according to the preset influencing factors of the flash memory to obtain a corrected model;

[0010] Steps of establishing a comprehensive compensation model according to the corrected model and the influencing factors.

[0011] Furthermore, a preferred implementation is provided. According to the corrected model and the influencing factors, a comprehensive compensation model is established by multiple regression or machine learning methods.

[0012] Furthermore, a preferred implementation is provided, where the influencing factors include different temperatures, the layer position where the flash memory is located, and the P / E wear factor.

[0013] Furthermore, a preferred implementation is provided. The data of the preprocessed threshold voltage offset data set is initially fitted by linear regression or polynomial regression methods to obtain the preliminary relationship model.

[0014] Based on the same inventive concept, the present invention also provides a device for establishing a flash memory low-temperature reliability improvement model. The device includes:

[0015] A module for collecting a threshold voltage offset data set of the flash memory at different temperatures and preprocessing it;

[0016] A module for obtaining a preliminary relationship model between different temperatures and the optimal read reference voltage offset according to the data of the preprocessed threshold voltage offset data set;

[0017] A module for correcting the preliminary relationship model according to the preset influencing factors of the flash memory to obtain a corrected model;

[0018] A module for establishing a comprehensive compensation model according to the corrected model and the influencing factors.

[0019] Based on the same inventive concept, the present invention also provides a method for improving the low-temperature reliability and read performance of a 3-D flash memory based on read reference voltage calibration. The method includes:

[0020] Steps of collecting flash memory samples;

[0021] Steps of programming the flash memory samples at different temperatures and recording the threshold voltage offset data set of the flash memory samples at different temperatures;

[0022] Steps of establishing a relationship curve of the optimal read reference voltage offset coefficient for the flash memory samples at different temperatures;

[0023] Steps of processing the threshold voltage offset data set and the relationship curve of the optimal read reference voltage offset coefficient through the model established by the above method to obtain compensation data.

[0024] Based on the same inventive concept, the present invention also provides a device for improving the low-temperature reliability and read performance of a 3-D flash memory based on read reference voltage calibration, the device comprising:

[0025] a module for collecting flash memory samples;

[0026] a module for programming the flash memory samples at different temperatures and recording a threshold voltage shift data set of the flash memory samples at different temperatures;

[0027] a module for establishing a relationship curve of an optimal read reference voltage shift coefficient for the flash memory samples at different temperatures;

[0028] a module for processing the threshold voltage shift data set and the relationship curve of the optimal read reference voltage shift coefficient through a model established by the device to obtain compensation data.

[0029] Based on the same inventive concept, the present invention also provides a computer storage medium for storing a computer program, which when read by a computer, implements the method.

[0030] Based on the same inventive concept, the present invention also provides a computer comprising a processor and a storage medium, which when the computer program stored in the storage medium is read by the processor, implements the method.

[0031] Based on the same inventive concept, the present invention also provides a computer program product embedded with a computer program, which when the computer program is read by a processor, implements the method.

[0032] Compared with the prior art, the beneficial effects of the technical solution provided by the present invention are as follows:

[0033] A method for improving the low-temperature reliability and read performance of a 3-D flash memory based on read reference voltage calibration provided by the present invention ensures that the experiment can cover different life cycle stages and working temperature ranges by preprocessing the flash memory samples and designing a reasonable test scheme. This method ensures the comprehensiveness and reliability of the experimental data, thereby providing a reliable basis for subsequent data analysis.

[0034] A method for improving the low-temperature reliability and read performance of a 3-D flash memory based on read reference voltage calibration provided by the present invention determines the inhibitory effect of low temperature on flash memory programming through comparison between experimental data and theoretical analysis, and proposes a quantitative analysis method for the influence of programming temperature. This method enables quantification of the influence of different programming temperatures on the threshold voltage distribution, providing necessary data support for subsequent establishment of a compensation model.

[0035] A method for improving the low-temperature reliability and read performance of 3-D flash memory based on read reference voltage calibration constructs a conversion model between programming temperature and optimal read reference voltage based on experimental data. This model comprehensively considers the effects of different layer positions, cell states, and P / E cycles on low-temperature programming reliability, thereby improving the accuracy and precision of temperature compensation.

[0036] A method for improving the low-temperature reliability and read performance of 3-D flash memory based on read reference voltage calibration verifies the performance advantages of the strategy of the present invention in reducing the number of read retries by comparing it with existing advanced temperature compensation strategies. Experimental results show that this method performs excellently in alleviating the reliability problems caused by low-temperature programming, reducing the raw bit error rate on average, and also shows better effects in optimizing the read performance of flash memory.

[0037] A method for improving the low-temperature reliability and read performance of 3-D flash memory based on read reference voltage calibration fully considers the characteristics of flash memory in a low-temperature environment. Through careful experimental design and data analysis, a more accurate compensation model is established, thereby achieving remarkable effects in improving the low-temperature reliability and read performance of flash memory.

[0038] A method for improving the low-temperature reliability and read performance of 3-D flash memory based on read reference voltage calibration is suitable for use in the read reference voltage calibration of NAND Flash. Description of the Drawings

[0039] Figure 1 Comparison of threshold voltage distribution curves read at 20°C for different programming temperature experimental groups;

[0040] Figure 2 Comparison of offsets of different RRVs when the programming temperature changes;

[0041] Figure 3 Comparison of optimal RRV offsets of different layers of 3-D NAND flash memory at different programming temperatures;

[0042] Figure 4 Comparison of optimal RRV offset curves for high and low-temperature programming of different P / E worn flash memories;

[0043] Figure 5 For the linear fitting R of different layers of 3-D NAND flash memory 2 Index comparison;

[0044] Figure 6 Basic process of temperature compensation strategy;

[0045] Figure 7RBER distribution curve for flash memory at the end of its life

[0046] Figure 8 Comparison of the average number of rereads of flash memory blocks using different compensation strategies when the programming temperature changes Specific implementation manner

[0047] To make the advantages and beneficial effects of the technical solution provided by the present invention more clearly reflected, the technical solution provided by the present invention will now be further described in detail with reference to the accompanying drawings. Specifically:

[0048] Embodiment 1. This embodiment provides a method for establishing a flash memory low-temperature reliability improvement model. The method includes:

[0049] The step of collecting the threshold voltage offset data set of the flash memory at different temperatures and preprocessing it;

[0050] The step of obtaining a preliminary relationship model between different temperatures and the optimal read reference voltage offset according to the data of the preprocessed threshold voltage offset data set;

[0051] The step of correcting the preliminary relationship model according to the preset influencing factors of the flash memory to obtain a corrected model;

[0052] The step of establishing a comprehensive compensation model according to the corrected model and the influencing factors.

[0053] Embodiment 2. This embodiment further limits the method for establishing a flash memory low-temperature reliability improvement model provided in Embodiment 1. According to the corrected model and the influencing factors, a comprehensive compensation model is established by multiple regression or machine learning methods.

[0054] Embodiment 3. This embodiment further limits the method for establishing a flash memory low-temperature reliability improvement model provided in Embodiment 1. The influencing factors include different temperatures, the position of the flash memory layer, and the P / E wear factor.

[0055] Embodiment 4. This embodiment further limits the method for establishing a flash memory low-temperature reliability improvement model provided in Embodiment 1. The data of the preprocessed threshold voltage offset data set is preliminarily fitted by linear regression or polynomial regression methods to obtain the preliminary relationship model.

[0056] Embodiment 5. This embodiment provides a device for establishing a flash memory low-temperature reliability improvement model. The device includes:

[0057] A module for collecting the threshold voltage offset data set of the flash memory at different temperatures and preprocessing it;

[0058] A module for obtaining a preliminary relationship model between different temperatures and the optimal read reference voltage offset based on the data of the preprocessed threshold voltage offset data set;

[0059] A module for correcting the preliminary relationship model according to the preset influencing factors of the flash memory to obtain a corrected model;

[0060] A module for establishing a comprehensive compensation model according to the corrected model and the influencing factors.

[0061] Embodiment 6. This embodiment provides a method for improving the low-temperature reliability and read performance of 3-D flash memory based on read reference voltage calibration. The method includes:

[0062] A step of collecting flash memory samples;

[0063] A step of programming the flash memory samples at different temperatures and recording the threshold voltage offset data set of the flash memory samples at different temperatures;

[0064] A step of establishing a relationship curve of the optimal read reference voltage offset coefficient for the flash memory samples at different temperatures;

[0065] A step of processing the threshold voltage offset data set and the relationship curve of the optimal read reference voltage offset coefficient through the model established by the method provided in Embodiment 1 to obtain compensation data.

[0066] Specifically, the technical solution provided in this embodiment proposes a method for improving the low-temperature reliability of 3-D flash memory based on read reference voltage calibration. This method quantifies the read reference voltage offset data at different programming temperatures, constructs a conversion model between the programming temperature and the optimal read reference voltage, thereby compensating for the influence of low-temperature programming on the flash memory performance, and improving the reliability and read performance of the flash memory in a low-temperature environment.

[0067] 1. Data preprocessing

[0068] Input: Preprocessed flash memory samples

[0069] Purpose: Test samples covering different life cycle stages of the flash memory

[0070] Steps: Perform pre-programming and erasing operations on the flash memory samples to ensure that the test samples can cover different life cycle stages of the flash memory.

[0071] 2. Test scheme design

[0072] Input: Preprocessed test samples

[0073] Purpose: Threshold voltage distribution data at different programming temperatures

[0074] Steps: Design experiments according to the operating temperature of the calibration object, which are divided into three stages: programming, dwelling, and reading. Program the samples at different temperatures and record the threshold voltage distribution data of each group of flash memories.

[0075] 3. Temperature Characteristic Test and Data Analysis

[0076] Input: Threshold voltage distribution data at different programming temperatures

[0077] Purpose: Analysis results of the influence of programming temperature on the threshold voltage distribution

[0078] Steps: Use the flash memory algorithm verification platform to test the threshold voltage distribution data at different programming temperatures, and analyze the inhibitory effect of low temperature on flash memory programming and its influence on the threshold voltage distribution.

[0079] 4. Quantitative Analysis of the Influence of Programming Temperature

[0080] Input: Temperature characteristic test data

[0081] Purpose: Relationship curve between the optimal read reference voltage offset coefficient and the programming temperature

[0082] Steps: Plot the relationship curve of the optimal read reference voltage offset coefficient at different programming temperatures, and analyze the offset amount of different read reference voltages at different programming temperatures.

[0083] 5. Research on Interference Factors

[0084] Input: Quantitative data of the influence of programming temperature

[0085] Purpose: Temperature compensation model parameters considering factors such as layer position, P / E wear, etc.

[0086] Steps: Research the influence of factors such as 3-D flash memory layer position and P / E wear on the relationship between programming temperature and the optimal read reference voltage offset coefficient.

[0087] 6. Establish a Compensation Model

[0088] Input: Results of temperature characteristic test and data analysis

[0089] Purpose: Conversion model between programming temperature and the optimal read reference voltage

[0090] Steps: Based on the experimental data, construct a conversion model between programming temperature and the optimal read reference voltage, considering the influence of different layer positions, cell states, and P / E cycles on the reliability of low-temperature programming.

[0091] 7. Fitting Accuracy Analysis

[0092] Input: Compensation model

[0093] Objective: Evaluation results of the R-square parameter in linear fitting

[0094] Steps: Use a linear function to fit the read reference voltage offset at different programming temperatures, and evaluate the accuracy of the fitting through the R-square parameter.

[0095] 8. Implementation of temperature compensation strategy

[0096] Input: Compensation model parameters

[0097] Objective: Optimized read reference voltage calibration scheme

[0098] Steps: Apply the compensation model during the flash memory reading process to compensate for the distortion of the flash memory threshold voltage distribution caused by temperature changes and improve the reading performance in a low-temperature environment.

[0099] 9. Performance verification

[0100] Input: Optimized read reference voltage calibration scheme

[0101] Objective: Experimental data on flash memory reading performance and reliability

[0102] Steps: Verify the performance advantages of the present invention in reducing the number of read retries and lowering the raw bit error rate by comparing with the existing temperature compensation strategy.

[0103] Through multi-step experiments and data analysis, this technical solution establishes a programming temperature compensation model considering various factors, and finally improves the reliability and reading performance of 3-D flash memory in a low-temperature environment. This solution is not only innovative in technology but also shows significant performance improvement in practice.

[0104] Specifically, step 6 includes:

[0105] Collect experimental data

[0106] Input: Threshold voltage distribution data at different programming temperatures

[0107] Objective: Dataset of programming temperature and corresponding optimal read reference voltage offset

[0108] Steps: Extract the threshold voltage distribution data at different programming temperatures from the temperature characteristic test and data analysis, calculate the optimal read reference voltage offset corresponding to each temperature, and form a dataset.

[0109] Data cleaning and preprocessing

[0110] Input: Dataset of programming temperature and optimal read reference voltage offset

[0111] Objective: Cleaned effective dataset

[0112] Step: Clean the collected data, remove outliers and noise, ensure the accuracy and reliability of the data, and obtain an effective data set.

[0113] Preliminary fitting of the model

[0114] Input: The effective data set after cleaning

[0115] Purpose: The preliminary fitting model of the programming temperature and the read reference voltage offset

[0116] Step: Use linear regression or polynomial regression methods to perform a preliminary fit on the cleaned data to obtain a preliminary relationship model between the programming temperature and the optimal read reference voltage offset.

[0117] Verify the fitting accuracy

[0118] Input: The preliminarily fitted model

[0119] Purpose: The evaluation result of the fitting accuracy (such as the R-square value)

[0120] Step: Evaluate the accuracy of the preliminary fitting model by calculating indicators such as the R-square value to ensure that the model can better reflect the actual distribution of the data.

[0121] Study the influence of the layer position and P / E wear

[0122] Input: The preliminarily fitted model, layer position and P / E wear data

[0123] Purpose: The corrected model considering the layer position and P / E wear factors

[0124] Step: Introduce influencing factors such as the layer position and P / E wear of the 3-D flash memory to correct the preliminarily fitted model and construct a more accurate model including these factors.

[0125] Construct a comprehensive compensation model

[0126] Input: The corrected model and all influencing factor data

[0127] Purpose: The comprehensive compensation model

[0128] Step: Comprehensively consider multiple factors such as programming temperature, layer position, and P / E wear, and use multiple regression or machine learning methods to construct a comprehensive compensation model to ensure that the model can comprehensively reflect the actual situation.

[0129] Model verification and adjustment

[0130] Input: The comprehensive compensation model

[0131] Purpose: The final compensated model after verification

[0132] Steps: Validate the comprehensive compensation model using an independent dataset, and make necessary adjustments and optimizations to the model based on the validation results to ensure the reliability and accuracy of the model.

[0133] Model Solidification and Implementation

[0134] Input: The finally validated compensation model

[0135] Purpose: The parameters of the solidified compensation model

[0136] Steps: Solidify the parameters of the final compensation model to form a calibration scheme that can be applied during the actual flash memory reading process, providing an effective compensation mechanism for reading operations in low-temperature environments.

[0137] Embodiment Seven. This embodiment provides a device for improving the low-temperature reliability and reading performance of 3-D flash memory based on read reference voltage calibration. The device includes:

[0138] A module for collecting flash memory samples;

[0139] A module for programming the flash memory samples at different temperatures and recording the threshold voltage offset datasets of the flash memory samples at different temperatures;

[0140] A module for establishing the relationship curve of the optimal read reference voltage offset coefficient for the flash memory samples at different temperatures;

[0141] A module for processing the threshold voltage offset datasets and the relationship curve of the optimal read reference voltage offset coefficient through the model established by the device provided in Embodiment Five to obtain compensation data.

[0142] Embodiment Eight. This embodiment provides a computer storage medium for storing a computer program, which, when read by a computer, implements the method provided in Embodiment One.

[0143] Embodiment Nine. This embodiment provides a computer, including a processor and a storage medium, which, when the computer program stored in the storage medium is read by the processor, implements the method provided in Embodiment One.

[0144] Embodiment Ten. This embodiment provides a computer program product embedded with a computer program, which, when the computer program is read by a processor, implements the method provided in Embodiment One.

[0145] Embodiment Eleven. In combination with Figure 1-8 Describe this embodiment. This embodiment further describes the above-provided technical solutions in detail through specific embodiments. Specifically:

[0146] This embodiment relates to a method for calibrating the read reference voltage of a NAND Flash in the field of solid-state storage, and more particularly to a method for improving the reliability and read performance of 3-D NAND flash memories in a low-temperature environment. In a low-temperature environment, the reliability and read performance of flash memories will significantly decline. This is because flash memory storage technology relies on the tunneling effect to inject and release electrons in floating-gate transistors, thereby controlling the threshold voltage of storage cells. Temperature changes have a significant impact on the barrier height during the tunneling process. When the temperature drops, the tunneling barrier increases, making it more difficult to inject electrons into the floating-gate transistors, resulting in a low-temperature distortion of the flash memory threshold voltage distribution and ultimately leading to read errors. Read errors will reduce the one-time read success rate of the flash memory and increase the computational overhead of error correction by the flash memory controller. Therefore, low temperature also affects the performance of the flash memory. At present, the comprehensive optimization of the low-temperature reliability and performance of flash memories is a research hotspot.

[0147] This embodiment relates to a method for improving the low-temperature reliability and read performance of 3-D flash memories. This method quantifies and characterizes the offset relationship between the programming temperature of the flash memory and the optimal read reference voltage, fits an accurate offset model of the read reference voltage varying with the programming temperature, and further realizes the compensation for the temperature drift of the flash memory, thereby improving the reliability and read performance of the flash memory in a low-temperature environment.

[0148] Including:

[0149] Data preprocessing: Perform pre-programming / erasing processing on the flash memory samples to ensure that the test samples can cover different life cycle stages of the flash memory.

[0150] Test scheme design: It is necessary to design experiments according to the operating temperature of the calibration object. The focus needs to be on the operating temperature range of the calibration object, and it is required that the experimental temperature is within the operating range. Taking an industrial-grade flash memory chip as an example, its operating temperature range is -40°C to 65°C. The test is divided into three stages: programming, retention, and reading. First, the preprocessed test samples are divided into three groups according to the programming temperature, and each group consists of 4 * 200 flash memory blocks. These samples are programmed at specific temperatures of 20°C, -30°C, and 60°C respectively, and the same pseudo-random sequence is written in each experimental group. Secondly, all three groups of samples are retained at 60°C at room temperature. Finally, data is read at temperature conditions of 20°C, -30°C, and 60°C respectively, and the threshold voltage distribution data of each group of flash memories is statistically analyzed.

[0151] Temperature characteristic test and data analysis: Use a flash memory algorithm verification platform to test 3-D TLC NAND flash memories, and focus on the threshold voltage distribution data at different programming temperatures (see Figure 1 ).

[0152] The experimental data is the same as the result of the theoretical analysis. Low temperature has an inhibitory effect on flash memory programming, resulting in a decrease in the final programming temperature and an overall decrease (left shift) in the flash memory threshold voltage distribution.

[0153] Quantitative analysis of the influence of programming temperature: Analyze the specific influence of different programming temperatures on the threshold voltage distribution, and draw the relationship curve between the optimal read reference voltage offset coefficient and the programming temperature (see Figure 2 ).

[0154] Figure 2 Details show the offset coefficients of the other six read reference voltages in TLC flash memory except V a under different programming temperature conditions. Since the read redundancy of V a is significantly higher than that of other read reference voltages, and the discrimination between the erased state and the P1 state is very high, with almost no overlapping area, so V a is not taken into consideration. Analysis Figure 2 can draw three conclusions: First, programming at low temperature will cause all optimal RRV values to decrease significantly, and there is a linear correlation between the offset degree of the RRV calibration coefficient and the programming temperature. Second, the difference in the offset amount between different RRVs is particularly significant during low-temperature programming, with the maximum difference reaching nearly 16 offset units. Finally, different RRVs have different sensitivities to programming temperature, which can be judged according to the slopes of their respective offset curves.

[0155] Part of exploring other interference factors of the model: that is, studying whether factors such as layer position and P / E wear affect the mathematical quantification between programming temperature and the optimal read reference voltage offset coefficient. First, it is necessary to study the influence of the 3-D flash memory layer position on the model construction, Figure 3 and compare the optimal RRV offset and programming temperature curves of different layers.

[0156] Figure 3 Taking the flash memory word line number as the horizontal axis and the optimal RRV offset level as the vertical axis. By analyzing the data in Figure 3 , it is observed that there are significant interlayer differences in the optimal RRV offset at different layer positions. During programming, when the set maximum temperature difference reaches 90 °C, the RRV offset of the initial layer is relatively low, with an average offset of about 12.7 offset units. In contrast, the RRV offset of the last layer is more significant, with an average offset of 20.9 offset units.

[0157] Therefore, when constructing the programming temperature compensation model later, the performance differences between different flash memory layers must be carefully considered.

[0158] Figure 4 Analyzed the influence of P / E wear on the construction of the temperature compensation model.

[0159] At a programming temperature of 60 °C, it was observed that flash memories at different life stages showed a high degree of consistency in the optimal read reference voltage, with an average deviation of only 0.83 offset units. However, at lower programming temperatures, such as -30 °C, the average RRV of flash memories at the end of their life was 2.61 offset units lower than that of flash memories at the beginning of their life. This experimental result reveals an important phenomenon: as the number of P / E cycles increases, that is, as the flash memory wears more, the impact on its threshold voltage during low-temperature programming becomes more significant.

[0160] It is obtained that the programming temperature compensation algorithm should also include parameters related to the number of P / E cycles in order to more accurately compensate for the difference in low-temperature threshold voltage offset caused by P / E wear.

[0161] In summary, based on the in-depth testing of the programming temperature characteristics of 3-D flash memories, it is confirmed that the layer position difference, the type of RRV, and the degree of P / E wear have a significant impact on the programming temperature characteristics of flash memories. These factors should be fully considered when constructing the RRV calibration model for programming temperature compensation in the future.

[0162] Establish a compensation model: Based on the experimental data, construct a conversion model between the programming temperature and the optimal read reference voltage. This model can consider the effects of different layer positions, cell states, and P / E cycles on the reliability of low-temperature programming, as shown in Equation 1.

[0163] RRVOL = a0·T prog + C 1- lookup(N) + b0 (1)

[0164] Where RRVOL (RRV offset level) is the compensation offset coefficient of RRV at different programming temperatures, T prog is the programming temperature, C1 is the P / E wear compensation table, and N is the corresponding number of P / E cycles. a0 and b0 are constants that can be calculated by the least squares method according to the test data.

[0165] Fitting accuracy analysis: Use a linear function to fit the RRV offset at different programming temperatures, and evaluate the accuracy of the fit through the R-square parameter. The experimental data shows that the linear fitting error is extremely small, and the R-square value of all RRVs is greater than 0.93. As Figure 5 shown.

[0166] This embodiment uses a linear function model to describe the relationship between the read reference voltage offset and the programming temperature. In order to evaluate the accuracy of this model fit, the statistical index R square (R 2 ) is introduced. R 2It measures the degree to which the independent variables in a regression model explain the variation of the dependent variable, and its value range is between 0 and 1. The closer the value is to 1, the better the fitting effect of the model. The experimental results show that the adopted linear function model performs excellently in fitting the relationship between the RRV offset and the programming temperature, with extremely small errors. The R 2 values of all RRVs exceed 0.93, indicating a high fitting accuracy.

[0167] Temperature compensation strategy implementation: The strategy of this implementation method can compensate for the distortion of the flash memory threshold voltage distribution caused by the change of programming temperature. This strategy has little impact on the programming operation and only needs to record the current flash memory temperature additionally after programming. The strategy operation process during the flash memory reading process is as Figure 6 shown.

[0168] Performance verification: By comparing with the existing advanced temperature compensation strategies, the performance advantages of the strategy of this implementation method in reducing the number of read retries are verified. First, the reduction effect of the strategy of this implementation method on the original bit error rate is compared, as Figure 7 shown.

[0169] Figure 7 The data in it clearly shows that the strategy of this implementation method has played a significant role in alleviating the reliability problems of flash memory caused by low-temperature programming, and the original bit error rate of low-temperature programmed flash memory is reduced by an average of 74.4%.

[0170] The optimization effects of the current advanced temperature compensation strategy and the strategy of this implementation method on the flash memory reading performance are compared, and the comparison index is the average number of rereads of the flash memory block, as Figure 8 shown.

[0171] Among all the test samples below 0°C, the performance of this implementation method is better than that of the current advanced algorithm. The average number of block rereads is 83.9% and 80.2% lower than that of the mainstream algorithm 1 and the mainstream algorithm 2 respectively. The current temperature compensation algorithm fails to fully consider the potential impact of the inter-layer differences of flash memory on temperature reliability. In contrast, the strategy of this implementation method focuses on and comprehensively characterizes this key factor. Therefore, the optimization effect is more excellent, which not only improves the performance of flash-based solid-state storage devices, but also enhances their reliability under different temperature conditions.

[0172] The technical solution provided by this implementation method:

[0173] Provides a programming temperature compensation method based on read reference voltage calibration, which significantly improves the reliability and reading performance of flash memory in low-temperature scenarios.

[0174] This method considers factors such as P / E wear and layer differences, and obtains higher calibration accuracy.

[0175] This method is fully compatible with existing 3-D NAND flash technologies. Without large-scale modifications to the hardware platform, it can optimize the performance of flash memory in low-temperature environments.

[0176] This method has strong generality. Based on the inherent reliability characteristics of 3-D NAND flash memory, it is applicable to all current types of 3-D NAND Flash.

[0177] This method has low storage overhead. It only needs to store programming temperature data and linear fitting model parameters, with relatively low storage overhead and little impact on the overall system.

[0178] The implementation process of this method is simple and clear, easy to integrate into existing flash memory management systems, and convenient for popularization and application.

[0179] The above further details the technical solutions provided by the present invention through several specific implementation manners to highlight the advantages and beneficial effects of the technical solutions provided by the present invention. However, the above-mentioned several specific implementation manners are not used as limitations on the present invention. Any reasonable modifications and improvements, combinations of implementation manners, and equivalent replacements based on the spirit and principles of the present invention should be included within the protection scope of the present invention.

Claims

1. A method for improving the low-temperature reliability and read performance of 3-D flash memory based on read reference voltage calibration, which is applied to a low-temperature environment, and is characterized in that The method includes: the step of collecting flash memory samples; the step of programming the flash memory samples at different temperatures and recording the threshold voltage offset data sets of the flash memory samples at different temperatures; the step of establishing a relationship curve of the optimal read reference voltage offset coefficient for the flash memory samples at different temperatures; the step of processing the threshold voltage offset data sets and the relationship curve of the optimal read reference voltage offset coefficient through the established model to obtain compensation data; The established model includes: the step of collecting the threshold voltage offset data sets of the flash memory at different temperatures and preprocessing them; the step of obtaining a preliminary relationship model between different temperatures and the optimal read reference voltage offset according to the data of the preprocessed threshold voltage offset data sets; the step of correcting the preliminary relationship model according to the preset influencing factors of the flash memory to obtain a corrected model; the step of establishing a comprehensive compensation model according to the corrected model and the influencing factors; wherein, the comprehensive compensation model considers the influence of different layer positions, cell states and P / E cycles on the reliability of low-temperature programming, as follows: RRVOL = a0·T prog + C1_lookup(N)+ b0 Among them, RRVOL (RRV offset level) is the compensation offset coefficient of RRV at different programming temperatures, T prog is the programming temperature, C1 is the P / E wear compensation table, N is the corresponding number of P / E cycles, and a0 and b0 are constants calculated by the least squares method based on the test data; According to the compensation data, compensate for the distortion of the flash memory threshold voltage distribution caused by temperature changes and improve the reading performance in a low-temperature environment.

2. A 3-D flash memory low-temperature reliability and read performance improvement device based on read reference voltage calibration, which is applied to a low-temperature environment, is characterized in that The device includes: a module for collecting flash memory samples; a module for programming the flash memory samples at different temperatures and recording the threshold voltage offset data sets of the flash memory samples at different temperatures; a module for establishing a relationship curve of the optimal read reference voltage offset coefficient for the flash memory samples at different temperatures; a module for processing the threshold voltage offset data sets and the relationship curve of the optimal read reference voltage offset coefficient through the established model to obtain compensation data; The established model includes: the step of collecting the threshold voltage offset data sets of the flash memory at different temperatures and preprocessing them; the step of obtaining a preliminary relationship model between different temperatures and the optimal read reference voltage offset according to the data of the preprocessed threshold voltage offset data sets; the step of correcting the preliminary relationship model according to the preset influencing factors of the flash memory to obtain a corrected model; the step of establishing a comprehensive compensation model according to the corrected model and the influencing factors; wherein, the comprehensive compensation model considers the influence of different layer positions, cell states and P / E cycles on the reliability of low-temperature programming, as follows: RRVOL = a0·T prog + C1_lookup(N) + b0 Among them, RRVOL (RRV offset level) is the compensation offset coefficient of RRV at different programming temperatures, T prog is the programming temperature, C1 is the P / E wear compensation table, N is the corresponding number of P / E cycles, and a0 and b0 are constants calculated by the least squares method based on test data; According to the compensation data, compensate for the distortion of the flash memory threshold voltage distribution caused by temperature changes and improve the reading performance in a low-temperature environment.

3. A computer storage medium for storing a computer program, characterized in that, When the computer program is read by a computer, the method described in claim 1 is implemented.

4. A computer, comprising a processor and a storage medium, characterized in that, When the computer program stored in the storage medium is read by the processor, the method described in claim 1 is implemented.

5. A computer program product, embedded with a computer program, characterized in that, When the computer program is read by the processor, the method described in claim 1 is implemented.

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