Wafer hybrid bonding nanowire formation method and semiconductor device

By growing copper nanowires and covering the silver layer during the wafer hybrid bonding process, the problems of bonding strength and electrical connection stability in the prior art are solved, and higher bonding strength and electrical properties are achieved.

CN118737860BActive Publication Date: 2025-04-04BEIJING XINLI TECH INNOVATION CENT CO LTD
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Patent Information

Application Number
CN202410880552.X
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2024-07-02
Publication Date
2025-04-04
Estimated Expiration
2044-07-02

AI Technical Summary

Technical Problem

The prior art is difficult to ensure the bonding strength and electrical connection stability at the same time during the wafer mix bonding process, especially in the insufficient contact and oxidation problems caused by the difference in thermal expansion coefficients between Cu and the dielectric layer.

Method used

The mixing bonds and pads are formed by etching on the substrate of the wafer and the surface Cu is removed by using the Cu CMP process to generate a dish-shaped recessed morphology. Subsequently, the copper nanowires are grown along multiple pores of the porous film by electrochemical deposition process, and the surface is covered with silver layer, and finally a hybrid bonding process is performed.

Benefits of technology

The contact area between the hybrid bonded metals is significantly increased, the bonding force between metal and metal bonding is improved, the bonding strength of semiconductor devices is enhanced, and electrical and oxidation resistance is improved.

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Abstract

The present invention belongs to the field of semiconductor device manufacturing, and in particular, relates to a method for forming a wafer hybrid bonded nanowire and a semiconductor device. The wafer hybrid bonded nanowire forming method comprises the following steps: step S1, etching process: using the Damascus process to etch and form a hybrid bond and a pad on the substrate of the wafer, using the Cu CMP process to remove the Cu on the outermost surface part of the hybrid bond and the pad, thereby generating a dish-shaped concave morphology on the hybrid bond pad from the outermost part to the inside; step S2, porous film bonding process: covering and bonding the surface of the wafer with a porous film in a manner that can ensure that the copper nanowire grows upward from bottom to top at a specified position; step S3, nanowire growth process: generating multiple copper nanowires in multiple holes of the porous film by an electrochemical deposition process. The present invention significantly increases the contact area between the hybrid bonded metals by using the above-mentioned process method, thereby increasing the bonding force of the metal-to-metal bonding, and ultimately significantly increasing the bonding strength of the semiconductor device.
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Description

Technical Field

[0001] The present invention belongs to the field of semiconductor device manufacturing, and in particular relates to a wafer hybrid bonding nanowire forming method and a semiconductor device. Background Art

[0002] During the hybrid bonding process, it is necessary to ensure that the wafers can be electrically connected after bonding, and that the structural strength after bonding can also meet subsequent process requirements. For example, during wafer grinding and cutting, there is no fragmentation or peeling between wafers.

[0003] At present, the commonly used method is to use the Damascus process to make hybrid bonding pads on the bonded wafers. The key is to use the CMP process to remove the surface copper, and controlling the Cu morphology in the bonding pad is the most critical. The purpose is to allow the dielectric layers on both sides of the bonding interface to contact each other, and then perform an annealing process. Since the thermal expansion coefficients of Cu and the dielectric layer are different, the Cu on the upper and lower sides can expand and contact each other, thereby completing the bonding of the dielectric layer and the dielectric layer at the same time, Cu-Cu bonding. Thus, the hybrid bonding is completed, and the structural and electrical connection between wafers is realized.

[0004] At present, it is common to use CMP to control the hybrid bonding pad into a slightly Dishing morphology, so as to ensure that the dielectric layers can fit each other, laying the foundation for the smooth completion of the dielectric layer bonding later. In the subsequent annealing process, Cu expands and contacts each other, thus completing Cu-Cu bonding. If Cu is a slightly raised morphology, the dielectric layer cannot contact, and Cu-Cu bonding alone cannot meet the final bonding strength requirements. Summary of the invention

[0005] To this end, the present invention provides a method for forming wafer hybrid bonding nanowires, comprising the following steps:

[0006] Step S1, etching process: using a Damascus process to etch a hybrid bond and a pad on a substrate of a wafer, and using a Cu CMP process to remove Cu on the outermost surface portion of the hybrid bond and the pad, thereby generating a dish-shaped concave morphology on the hybrid bonding pad from the outermost portion inward;

[0007] Step S2, porous film laminating process: covering and laminating the surface of the wafer with a porous film in a manner that can ensure that the copper nanowires grow upward in a direction from bottom to top at a designated position;

[0008] Step S3, nanowire growth process: generating a plurality of copper nanowires along the plurality of pores of the porous film through an electrochemical deposition process.

[0009] In addition, preferably, the present invention provides a method for forming wafer hybrid bonded nanowires, wherein in step S1, the dish-shaped recess morphology is a bowl-shaped shape, and the gap at the bonding interface before the final annealing is controlled to ensure that the final gap can be filled by the expansion after annealing.

[0010] In addition, preferably, the present invention provides a method for forming wafer hybrid bonding nanowires, wherein the depth of the dish-shaped recessed morphology is 50-300 Å, and the nanowire has a maximum protrusion of no more than 150 Å.

[0011] In addition, preferably, the present invention provides a method for forming wafer hybrid bonded nanowires, which, after step S3, further comprises: step S4, coating the outermost layer of the copper nanowire to generate an Ag layer for subsequent hybrid bonded wafer stacking process.

[0012] In addition, preferably, the present invention provides a method for forming wafer hybrid bonding nanowires, wherein in the step S4, the thickness of the Ag layer is 10A-100A.

[0013] In addition, preferably, the present invention provides a wafer hybrid bonding nanowire formation method, in the step S1, before etching, there is also a step S11, a photoresist mask laminating process: using a photoresist mask to cover the surface of the wafer in a manner that can expose the outer surface of the hybrid bonding pad,

[0014] In addition, preferably, the present invention provides a method for forming wafer hybrid bonded nanowires, wherein in the step S1, after etching, there is also the following step S12: removing the photoresist mask.

[0015] In addition, preferably, the present invention provides a method for forming wafer hybrid bonded nanowires, in which in the step S3, after etching, there is also the following step S31: trimming the length of the copper nanowire by etching so that the distance between the trimmed nanowire and the top of the finally grown Ag protrusion and the opposite metal is 10A-50A.

[0016] In addition, preferably, the present invention provides a semiconductor device, which is generated by performing a hybrid bonding process to complete wafer-level stacking using wafer hybrid bonding nanowires obtained by the wafer hybrid bonding nanowire formation method described in any of the above inventions.

[0017] The present invention significantly increases the contact area between mixed bonding metals by utilizing the above process method, thereby increasing the bonding force between metals and metals, and ultimately significantly increasing the bonding strength of semiconductor devices. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] Figure 1A schematic diagram showing a hybrid bonding process in a method for forming wafer hybrid bonding nanowires according to an embodiment of the present invention.

[0019] Figure 2 A schematic diagram showing a hybrid bonding process in a method for forming wafer hybrid bonding nanowires according to another embodiment of the present invention.

[0020] Figure 3A A schematic diagram showing the working mechanism of the electrodeposition method in the wafer hybrid bonding nanowire formation method according to one embodiment of the present invention.

[0021] Figure 3B A schematic diagram showing a process flow of manufacturing a metal nanowire pattern on a substrate in a wafer hybrid bonding nanowire formation method according to one embodiment of the present invention.

[0022] Figure 3C A schematic diagram showing the cross-sectional morphology of a copper nanowire array formed on a substrate in a wafer hybrid bonding nanowire formation method according to one embodiment of the present invention.

[0023] Figure 4 The results of analyzing the silver material attached to the surface of the synthetic copper nanowire material obtained by the wafer hybrid bonding nanowire formation method according to one embodiment of the present invention are shown.

[0024] Figure 5 TEM images and analysis results of copper nanowires to which silver material is attached obtained by a wafer hybrid bonding nanowire formation method according to one embodiment of the present invention are shown.

[0025] Figure 6 A schematic diagram showing the growth mechanism of copper nanowires attached with silver material obtained by a wafer hybrid bonding nanowire formation method according to an embodiment of the present invention. DETAILED DESCRIPTION

[0026] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Other embodiments or variations obtained based on the embodiments in the present application by ordinary technicians in this field without creative work are all within the scope of protection of this application.

[0027] See also Figure 1 , Figure 1 Schematic diagram of a hybrid bonding process according to an embodiment of the present invention.

[0028] The requirements for CMP here are very high. The degree of Cu Dishing of the bonding pad needs to be precisely controlled. If the degree of Dishing (dish morphology) is too large, the contact between Cu and Cu will be insufficient after expansion, or even disconnected, and eventually there will be a risk of electrical disconnection between wafers. However, the fluctuation of the entire CMP is very large. After we adopted this method, we can expand the CMP window to 300A.

[0029] Since Cu-Cu has a Dishing morphology before annealing and does not contact during mixed bonding, the force between Cu-Cu is completely achieved by the expansion of annealed Cu grains, and the strength is relatively low. At the same time, since the electrical connection between wafers is completed only by the expansion of copper grains, the contact resistance at the bonding point is too large.

[0030] Therefore, currently, CMP is mainly used to control the Cu Dishing morphology of the dielectric layer and the bonding pad, the parameters related to the activation of bonding ions, the annealing temperature and time, etc. to optimize the hybrid bonding effect, and no other optimization schemes have been proposed.

[0031] At the same time, since Cu is easily oxidized in the air, it will lead to poor bonding effect in the later stage and excessive contact resistance. The commonly used method is to perform an additional CMP polishing after Cu CMP to remove the oxide on the Cu surface of the hybrid bonding pad, and then perform the hybrid bonding process; at the same time, it is also necessary to control the waiting time from CMP polishing to hybrid bonding to ensure the hybrid bonding effect, and the waiting time control is relatively strict.

[0032] At present, the D2W hybrid bonding process has attracted more and more attention due to its unique advantages. Among them, one of the biggest problems of Sequential Die to Wafer hybrid bonding is how to ensure the integrity of the metal on the die to be bonded later (try to avoid its oxidation). Since Cu will be oxidized quickly in the air, there is no good solution yet.

[0033] This solution is to grow Cu nanowires on the hybrid bonding Cu pads after the hybrid bonding Cu pads are made through the Damascus process, then cover the Cu nanowires with a layer of Ag, and then perform hybrid bonding to finally complete the wafer stacking process.

[0034] In addition, as a preferred embodiment of the present invention, the original bonding pad is optimized to a nanowire structure, which significantly increases the contact area between the mixed bonding metals, thereby increasing the bonding force between metals and metals, and ultimately significantly increases the bonding strength. Generally, the traditional strength is 1.8-2.0 J / ㎡, and the optimized strength is 2.7-3 J / ㎡.

[0035] In addition, as a preferred embodiment of the present invention, due to mechanical weaving and interlocking, there is no need for a long bonding process and a high temperature annealing process. At the same time, the nanowires exhibit a small spring structure, which can tolerate surface uncertainty of a certain thickness, expanding the CMP process window. The high tolerance of the nanowire bonding method to the surface also means a high tolerance to surface particles and residual contamination.

[0036] In addition, as a preferred embodiment of the present invention, Ag is less likely to be oxidized in the air than Cu. During the preparation process, the surface of the Cu nanowires is covered with Ag, which slows down metal oxidation. Therefore, the Q-time control can be relatively loose, and the structural strength and electrical properties after hybrid bonding are better.

[0037] In addition, as a preferred embodiment of the present invention, the Ag resistivity is 1.65*10 -8 Ω·m, the resistivity of Cu is 1.75*10 -8 Ω·m. The thermal expansion coefficient of Ag is 19.5*10 -6 / K, the thermal expansion coefficient of Cu is 17.5*10 -6 / K.

[0038] Due to the introduction of Ag, this invention has more advantages than Cu in terms of electrical properties after bonding and expansion bonding strength of the metal after annealing.

[0039] The production method of the present invention comprises the following process.

[0040] 1. Use the conventional Damascus process to make a hybrid bonding pad, complete the Cu CMP process, remove the Cu on the surface, and make the Cu of the pad into a Dishing morphology;

[0041] 2. Use photoresist to cover other areas and expose the hybrid bonding pads.

[0042] 3. Cover the wafer surface with a porous film to ensure that the nanowires can grow upward from bottom to top in a certain direction;

[0043] 4. Growth of Cu nanowires using electrochemical methods;

[0044] 5. Film removal;

[0045] 6. Use Etch process to trim the length of Cu nanowires;

[0046] 7. Remove residual photoresist;

[0047] 8. Continue with the hybrid bonding process to complete wafer-level stacking.

[0048] The overall process flow is as follows Figure 2shown.

[0049] Since the bonding pads are upgraded to nanowires, the bonding interface will present a state of mechanical weaving and interlocking. At this time, the volume of the structure expansion will be larger, and the entire contact surface area will be significantly increased. Therefore, the bonding time and high-temperature annealing process can be appropriately reduced to achieve the same bonding strength as the original traditional structure. If the same bonding time and high-temperature annealing process are adopted as before, the bonding strength can be significantly increased.

[0050] Since the nanowires in the bonding process have a certain degree of ductility, similar to the structure of a small spring, they can tolerate a certain degree of uncertainty in surface thickness after CMP, thereby gaining a larger process window for CMP. Similarly, this method greatly improves the tolerance to the surface, such as the degree of surface particles and residual contaminants, which reduces the requirements and is more friendly to processes such as front-end Clean. In summary, the nanowire structure significantly increases the window of processes such as Clean and CMP before bonding.

[0051] The present invention mainly generates Cu nanowires by electrochemistry and template film guidance on the basis of Cu Dishing morphology after Cu CMP, and then covers Ag on the surface of the Cu nanowires by chemical method. Due to the larger specific surface area of ​​the nanowires, the subsequent wafer hybrid bonding and metal grain expansion after annealing make the bonding between metals more sufficient; at the same time, with the help of Ag attached to the surface of the Cu nanowires, the electrical performance is better, the electrical performance after bonding is more advantageous, the thermal expansion coefficient is larger, the bonding strength is more advantageous, the anti-corrosion performance is better, the less the oxidized part of the interface metal is, the better the bonding effect is, and the process waiting time control is more flexible.

[0052] As a preferred embodiment of the present invention:

[0053] First, the metal surface of the bonding pad is a microstructure of Cu nanowires wrapped by Ag to ensure a larger contact area and better electrical performance for hybrid bonding;

[0054] Second, after Cu CMP, the Cu Dishing is 100A, and the grown Cu-Ag nanowires can be slightly raised, and the maximum Protrusion does not exceed 150A; after the preparation of the Cu nanowires, ethanol and glacial acetic acid are used to remove the surfactant and oxide, and after the preparation of the Cu nanowires covered with Ag, ethanol is used to remove the excess Ag(NH3)+ on the surface of the surface, and then the subsequent hybrid bonding process can be entered;

[0055] Third, after the Cu nanowires are prepared, ethanol and glacial acetic acid are used to remove the surfactant and oxide. After the Cu nanowires covered with Ag are prepared, ethanol is used to remove the excess Ag(NH3)+ on the surface of the Ag, and then the subsequent hybrid bonding process can be carried out.

[0056] Fourth, the optimization scheme is applicable to hybrid bonding processes such as W2W, D2W, and D2D;

[0057] Fifth, in addition to wafer-level stacking, the method can also be used for bonding processes of materials such as glass substrates that can grow nanowires;

[0058] In addition, the description on the growth of Cu nanowires is as follows.

[0059] Using the preferred synthesis method of the present invention, as shown in FIG3 , a thin copper seed layer needs to be deposited on the entire wafer surface by PVD before electroplating to ensure normal power supply during the subsequent electroplating process.

[0060] The template film is Patterned Porous Anodic Alumina Membranes (AAM), and the copper electrolytic cell contains 200g / l CuSO4·5H2O and 20g / l H2SO4. Using copper as an electrode, it can be seen that a Cu nanowire structure with strong directionality from bottom to top can be grown. After tensile testing, the stress between this type of nanowire and the substrate is 3.84kN / cm2, which can be regarded as a strong interaction force. The bonding force between the nanowire and the seed layer interface is greater than the bonding force between the seed layer and Si deposited by PVD. In summary, the strength of the nanowire itself is reliable.

[0061] The template film was removed by washing with 6.0 M KOH, washing with a large amount of deionized water and drying in air.

[0062] Furthermore, the description on the synthesis of Ag on the surface of Cu nanowires is as follows.

[0063] After the Cu nanowires were fabricated, ethanol and glacial acetic acid were used to remove the surfactant and oxide.

[0064] Ag was synthesized on the surface of Cu nanowires by galvanic replacement method, with Cu and AgNO3 as the main reactants.

[0065] The chemical equation is:

[0066] Cu+AgNO3→Cu(NO3)2+Ag

[0067] Similarly, the addition of surfactant PVA can inhibit the aggregation of Cu nanowires. At the same time, a magnetic stirring device is installed under the reaction pool during the reaction to ensure the uniform and consistent attachment of Ag to the surface of Cu nanowires.

[0068] After drying, the NWs with a certain mass were redispersed in ethanol and glacial acetic acid, and then added to silver-ammonia solutions of different concentrations, keeping the molar ratio of Cu to Ag at 2:1 (a) and 1:2 (b). It can be seen that the content of Ag is higher. EDS spectra (c) (d) Compared with the EDS spectrum (c) in Figure 3, there is no obvious increase in oxygen elements, indicating that the protective effect of Ag on the surface is very effective. The analysis results are shown in Figure 4 shown.

[0069] Figure 5 a shows a TEM image of copper nanowires with silver attached to the surface; Figure 5 b shows a TEM image of a single copper nanowire with silver attached to its surface and its elemental analysis image; Figure 5 The purple and yellow dots shown in c represent copper and silver elements respectively; Figure 6 The growth mechanism of silver-attached copper nanowires is shown.

[0070] In addition, since the electrical properties of silver are better than copper, the back-end of the Fab factory used to be copper metal, but it has evolved from aluminum technology to copper technology, and the performance has been greatly improved. After each Cu electroplating in the Fab factory, and after etching onto the previous metal, there will be an H2 annealing process, as well as CMP cleaning and wet cleaning to reduce the oxidized Cu. At the same time, the Q time of each Fab factory is strictly controlled to minimize the oxidation of copper.

[0071] In the bonding process, the waiting time in the middle is difficult to control. Especially in the bonding process of Die to Wafer, it is necessary to attach each die to the Wafer one by one. In this way, the surface of the subsequently bonded Die will be more easily oxidized. Therefore, it is particularly important for us to prevent oxidation. After comprehensively considering these factors, the inventors of the present invention selected Ag, which has better electrical properties than copper and a larger thermal expansion coefficient than copper. As a result, the process product of the present invention has better antioxidant properties and electrical properties, which is a significant improvement over traditional processes.

[0072] Figure 4 The silver concentration conditions range as follows:

[0073] The current density range is 0.5-3mA / cm 2

[0074] 100-600g / L CuSO4·5H2O

[0075] 10-60g / L H2SO4

[0076] 8-48g / L Ag2SO4

[0077] 112-672g / L potassium thiocyanate

[0078] Stirring speed 250rpm-1000rpm

[0079] Use 3-8 mol / L KOH solution to remove the film.

[0080] It should be noted that, in this article, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, the elements defined by the sentence "comprise a ..." do not exclude the existence of other identical elements in the process, method, article or device including the elements.

[0081] Each embodiment in this specification is described in a related manner, and the same or similar parts between the embodiments can be referenced to each other, and each embodiment focuses on the differences from other embodiments.

[0082] The above is only a specific embodiment of the present invention, but the protection scope of the present invention is not limited thereto. Any changes or substitutions that can be easily thought of by a person skilled in the art within the technical scope disclosed by the present invention should be included in the protection scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the protection scope of the claims.

[0083] The above embodiments of the present invention are merely examples for clearly illustrating the present invention, and are not intended to limit the embodiments of the present invention. For those skilled in the art, other different forms of changes or modifications can be made based on the above description. It is not necessary and impossible to list all the embodiments here. Any modifications, equivalent substitutions and improvements made within the spirit and principles of the present invention should be included in the protection scope of the claims of the present invention.

Claims

1. A method for forming wafer hybrid bonding nanowires, characterized in that: The following steps are involved: Step S1, etching process: using a Damascus process to etch a hybrid bond and a pad on a substrate of a wafer, and using a CuCMP process to remove Cu on the outermost surface portion of the hybrid bond and the pad, thereby generating a dish-shaped concave morphology on the hybrid bonding pad from the outermost portion inward; Step S2, porous film laminating process: covering and laminating the surface of the wafer with a porous film in a manner that can ensure that the copper nanowires grow upward in a direction from bottom to top at a designated position; Step S3, nanowire growth process: generating a plurality of copper nanowires along the plurality of holes of the porous film by an electrochemical deposition process, wherein in the step S1, the dish-shaped depression morphology is a bowl-shaped dish, and the gap of the bonding interface before the final annealing is controlled to ensure that the final gap can be filled by the expansion after annealing, the depression depth of the dish-shaped depression morphology is 50-300A, and the nanowire has a maximum protrusion of no more than 150A; Step S4, coating the outermost layer of the copper nanowire to generate an Ag layer for a subsequent hybrid bonding wafer stacking process, wherein the thickness of the Ag layer is 10A-100A.

2. The wafer hybrid bonding nanowire formation method according to claim 1, characterized in that: In the step S1, before etching, the following steps are also performed: Step S11, photoresist mask laminating process: using a photoresist mask to cover the surface of the wafer in a manner that the outer surface of the hybrid bonding pad is exposed.

3. The wafer hybrid bonding nanowire formation method according to claim 1, characterized in that: In the step S1, after etching, the following steps are also performed: Step S12: removing the photoresist mask.

4. The wafer hybrid bonding nanowire formation method according to claim 1, characterized in that: In the step S3, after etching, the following steps are also performed: Step S31: trim the length of the copper nanowire by etching so that the distance between the trimmed nanowire and the top of the finally grown Ag protrusion and the opposite metal is 10A-50A.

5. A semiconductor device, characterized in that: The semiconductor device is generated by performing a hybrid bonding process on wafer hybrid bonding nanowires obtained by the wafer hybrid bonding nanowire formation method according to any one of claims 1 to 4 to complete wafer-level stacking.

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