Method, apparatus and device for determining stop watch and storage medium

Abstract

The application discloses a shutdown timer determination method and device, equipment and storage medium, relates to the field of automobile control technology, and comprises the following steps: when a vehicle downlink high-voltage signal is detected, the application layer is controlled to start zero counting; when the application layer counting time reaches a first preset time, it is judged whether the vehicle control unit is in a sleep state; when the vehicle control unit is in the sleep state, the internal timing chip is controlled to start zero counting, and the first preset time is stored as first counting data; when a vehicle uplink high-voltage signal is detected, the current internal chip counting is stored as second counting data; and the total shutdown time of the vehicle is obtained based on the first counting data and the second counting data. The PHEV vehicle shutdown timer count specified in the regulation is accurately monitored, and the accurate increase of the shutdown timer is completed.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of automobile control, in particular to a stop timer determination method, device, equipment and storage medium. BACKGROUND

[0002] In the face of increasingly severe environmental pressure and oil energy shortage pressure, environmental protection and economy have become the key elements that the current automobile pursues. Hybrid cars are emerging. However, for the more intelligent PHEV (hybrid car) control, the traditional stop timer is not suitable for PHEV for the duration of the non-activated state of the PHEV drive system (stop timer) specified by the regulations. Because in the non-activated state of the drive system, it may involve intelligent power compensation, pre-charge and other conditions that wake up the VECU (vehicle control unit), which will cause the VECU to wake up in the middle, the stop timer will be temporarily interrupted, resulting in problems such as stop timer not increasing or inaccurate calculation, etc. Therefore, it is necessary to update the strategy for optimization to solve some OBD (on-board diagnostic system) parts diagnosis needs to introduce the stop timer as a diagnostic condition for judgment and evaporation system monitoring, and the denominator needs to be increased. The stop timer count needs to be higher than the 6 hours specified by the regulations and other problems.

[0003] Some technical solutions currently integrate and analyze the vehicle downlink high-voltage signal. The engine electronic control unit determines the effective stop timer signal according to the stop timer signal sent by the related controller, and calculates the engine operating time based on the engine operating time based on the engine operating time. This technical solution is suitable for traditional fuel vehicles, and uses engine stop time as a timer, but for PHEV hybrid cars, it does not consider complex stop conditions, and the engine does not work when it does not stop. It is not applicable.

[0004] The above content is only used to assist in understanding the technical solutions of the present application, and does not represent the acknowledgement of the above content as prior art. SUMMARY

[0005] The main purpose of the present application is to provide a stop timer determination method, device, equipment and storage medium, which aims to solve the technical problem that the prior art cannot accurately calculate the duration of the non-activated state of the vehicle drive system under the complex stop condition of the hybrid car.

[0006] To achieve the above purpose, the present application provides a stop timer determination method, which is applied to a stop timer system, the stop timer system comprising an application layer and an internal timing chip, and the method comprises:

[0007] When the vehicle downlink high-voltage signal is detected, the application layer is controlled to start zeroing the timer;

[0008] determining whether the vehicle control unit is in a sleep state when the application layer timing reaches a first preset time;

[0009] controlling the internal timing chip to start zero-clearing timing and storing the first preset time as first timing data when the vehicle control unit is in the sleep state;

[0010] storing the current timing of the internal chip as second timing data when a vehicle high-voltage signal is detected;

[0011] obtaining total vehicle downtime based on the first timing data and the second timing data.

[0012] In an embodiment, the step of controlling the internal timing chip to start zero-clearing timing and storing the first preset time as first timing data when the vehicle control unit is in the sleep state further comprises:

[0013] detecting whether the vehicle control unit is activated when the internal timing chip timing reaches a second preset time;

[0014] controlling the application layer to start zero-clearing timing and storing the second preset time as third timing data when the vehicle control unit is in an activated state;

[0015] controlling the internal timing chip to start zero-clearing timing and storing the current timing of the application layer as fourth timing data when it is detected that the vehicle control unit is in the sleep state.

[0016] In an embodiment, the step of storing the current timing of the application layer as fourth timing data further comprises:

[0017] obtaining total vehicle downtime based on the first timing data, the second timing data, the third timing data, and the fourth timing data.

[0018] In an embodiment, the step of detecting that the vehicle control unit is in the sleep state further comprises:

[0019] controlling the vehicle control unit to enter the sleep state when the application layer timing reaches a third preset time, wherein the third preset time is equal to the fourth timing data.

[0020] In an embodiment, the step of storing the current timing of the internal chip as second timing data when the vehicle high-voltage signal is detected further comprises:

[0021] controlling the application layer and the internal timing chip to stop timing when a power-off signal is detected;

[0022] resetting the stored timing data to 0;

[0023] controlling the application layer or the internal timing chip to re-time when a power-on signal is detected.

[0024] In an embodiment, the step of controlling the internal timing chip to start timing from 0 comprises:

[0025] controlling the application layer to generate an interrupt signal;

[0026] transmitting the interrupt signal to the internal timer, and clearing the historical timing data of the internal timer;

[0027] controlling the internal timer to start timing from 0.

[0028] In an embodiment, the step of controlling the application layer to start timing from 0 comprises:

[0029] controlling the application layer to generate an interrupt signal, and clearing the historical timing data of the application layer;

[0030] controlling the application layer to start timing from 0.

[0031] In addition, to achieve the above object, the present application further provides a downtime timer determination device, which comprises:

[0032] a response module, configured to control the application layer to start timing from 0 when a vehicle down high-voltage signal is detected;

[0033] a first timing module, configured to determine whether the vehicle control unit is in a sleep state when the timing time of the application layer reaches a first preset time; when the vehicle control unit is in the sleep state, control the internal timing chip to start timing from 0, and store the first preset time as first timing data;

[0034] a second timing module, configured to store the current timing of the internal chip as second timing data when a vehicle up high-voltage signal is detected;

[0035] an output module, configured to obtain the total downtime of the vehicle based on the first timing data and the second timing data.

[0036] In addition, to achieve the above object, the present application further provides a downtime timer determination device, which comprises a memory, a processor, and a computer program stored in the memory and executable on the processor, and the computer program is configured to implement the steps of the downtime timer determination method as described above.

[0037] In addition, to achieve the above object, the application further provides a storage medium, which is a computer readable storage medium, and a computer program is stored on the storage medium, and the computer program is executed by a processor to implement the steps of the shutdown timer determination method.

[0038] In addition, to achieve the above object, the application further provides a computer program product, which comprises a computer program, and the computer program is executed by a processor to implement the steps of the shutdown timer determination method.

[0039] The one or more technical solutions provided by the application have at least the following technical effects:

[0040] When the vehicle downlink high-voltage signal is detected, the control application layer starts to clear the timing; when the application layer timing time reaches the first preset time, it is judged whether the vehicle control unit is in a sleep state; when the vehicle control unit is in a sleep state, the internal timing chip is controlled to start to clear the timing, and the first preset time is stored as the first timing data; when the vehicle uplink high-voltage signal is detected, the current internal chip timing is stored as the second timing data; and the total shutdown time of the vehicle is obtained based on the first timing data and the second timing data. The PHEV vehicle shutdown timer count specified by the regulations is accurately monitored, and the accurate increase of the shutdown timer is completed. BRIEF DESCRIPTION OF DRAWINGS

[0041] The accompanying drawings, which are incorporated into and form part of the specification, illustrate embodiments consistent with the application and, together with the specification, serve to explain the principles of the application.

[0042] In order to more clearly illustrate the technical solutions in the embodiments of the application or the prior art, the accompanying drawings needed to be used in the embodiments or prior art description will be briefly introduced. Obviously, for those skilled in the art, other drawings can also be obtained without creative labor.

[0043] Figure 1 The flowchart provided for the first embodiment of the shutdown timer determination method of the application;

[0044] Figure 2 The flowchart provided for the second embodiment of the shutdown timer determination method of the application;

[0045] Figure 3 The structure block diagram provided for the second embodiment of the shutdown timer determination method of the application;

[0046] Figure 4 The flowchart provided for the third embodiment of the shutdown timer determination method of the application;

[0047] Figure 5 Module structure diagram for determining device of shutdown timer of embodiments of the present application;

[0048] Figure 6 Device structure diagram for hardware running environment involved in the shutdown timer determination method of embodiments of the present application.

[0049] The object implementation, functional features and advantages of the present application will be further described with reference to the embodiments and the accompanying drawings. DETAILED DESCRIPTION

[0050] It should be understood that the specific embodiments described herein are merely intended to explain the technical solutions of the present application, and are not intended to limit the present application.

[0051] In order to better understand the technical solutions of the present application, the specific embodiments will be described in detail below with reference to the drawings and the specific embodiments.

[0052] Since the prior art integrates and analyzes the time signals on the whole vehicle, the engine electronic control unit determines the effective shutdown timer signal according to the shutdown timer signal sent by the related controller.

[0053] The present application provides a solution that can accurately monitor the PHEV vehicle shutdown timer counting problem required by regulations, solve some OBD parts diagnosis needs to introduce the shutdown timer as the diagnosis condition of judgment and evaporation system monitoring, and the problem of increasing the denominator and requiring the shutdown timer counting to be higher than 6 hours required by regulations.

[0054] It should be noted that the execution subject of the present embodiment can be a computing service device with data processing, network communication and program running functions, such as a tablet computer, a personal computer, a mobile phone, etc., or an electronic device capable of realizing the above functions, a shutdown timer determination device, etc. The present embodiment and each of the following embodiments will be described below with the shutdown timer determination device as an example.

[0055] Based on this, the present embodiment of the present application provides a shutdown timer determination method, which is described in detail with reference to Figure 1 , Figure 1 Flowchart of the first embodiment of the shutdown timer determination device method of the present application.

[0056] In the present embodiment, the shutdown timer determination method is applied to a shutdown timer system, which includes an application layer and an internal timing chip, and the shutdown timer determination method includes steps S10-S50:

[0057] Step S10, when detecting a vehicle down high voltage signal, control the application layer to start zero counting;

[0058] It should be noted that the down-driving high-voltage signal refers to the power-off process of the high-voltage electrical system (usually used for drive motors and battery management systems) when the vehicle switches from driving to non-driving mode.

[0059] It should be understood that the application layer is used to collect and process sensor data and perform diagnostic and monitoring tasks.

[0060] Furthermore, the step of controlling the application layer to start resetting the timer includes: controlling the application layer to generate an interrupt signal to clear the historical timer data of the application layer;

[0061] Control the application layer to start timing from 0.

[0062] In practice, after detecting the high-voltage signal of the vehicle going down, the VECU resets the stop timer to 0 and restarts the stop timer by accumulating the application layer software runtime (e.g., running once every 10ms).

[0063] Step S20: When the application layer timeout reaches the first preset time, determine whether the vehicle control unit is in a sleep state.

[0064] It should be noted that the first preset time can be set freely or determined according to the actual application.

[0065] It should be understood that the vehicle control unit is responsible for coordinating and managing multiple key systems and functions of the vehicle. It integrates various control functions to improve vehicle performance, safety, energy efficiency, and driving experience.

[0066] It should be noted that when the vehicle control unit is in a dormant state, it means that it has been intentionally placed in a low-energy consumption mode to reduce energy consumption when the vehicle is not driving or parked.

[0067] Even when the VECU is in sleep mode, it continues to monitor the battery status to ensure that the battery is not over-discharged or excessively discharged when not needed. It continues to perform timing tasks, such as stop timers, using internal timing chips. It reduces or pauses data acquisition from non-critical sensors to save power and shuts down or reduces the activity frequency of communication modules to reduce energy consumption.

[0068] The VECU can be woken from sleep mode by the driver entering the vehicle and operating the ignition switch. When the vehicle is involved in a collision or intrusion, the safety system will wake the VECU to take appropriate action. Depending on the set time intervals, the VECU can also automatically wake up to perform certain tasks, such as vehicle health checks.

[0069] Step S30: When the vehicle control unit is in a sleep state, control the internal timing chip to start resetting the timing and store the first preset time as the first timing data;

[0070] It should be noted that the internal timing chip is a separate hardware component for providing accurate time measurement and timing functions, which can be a separate integrated circuit or integrated in the main processor of the VECU.

[0071] Further, the step of controlling the internal timing chip to start zeroing the timing includes: controlling the application layer to generate an interrupt signal;

[0072] transmitting the interrupt signal to the internal timer, and clearing the historical timing data of the internal timer;

[0073] controlling the internal timer to start timing from 0.

[0074] It should be noted that the application layer first generates an interrupt signal. The interrupt signal is a notification mechanism indicating that an event that needs to be handled immediately has occurred. Subsequently, the interrupt signal is transmitted to the internal timer. The internal timer is a dedicated hardware component responsible for providing accurate time measurement and timing functions. The arrival of the interrupt signal triggers the internal timer to perform two main operations: first, the historical timing data stored in the internal timer is cleared. This step ensures that the timer starts a new timing period from a known state (i.e. zero point), avoiding the influence of historical data on the new timing task. Secondly, the internal timer is set to start timing from 0. This means that the timer starts a new timing period and counts upwards from zero to track the time elapsed from this point.

[0075] Step S40, when the vehicle up-high voltage signal is detected, the current internal chip timing is stored as second timing data;

[0076] It should be noted that the up-high voltage signal refers to the process of reactivating the high-voltage electrical system when the vehicle transitions from a non-driving state (such as a parked or hibernation state) to a driving state.

[0077] Step S50, based on the first timing data and the second timing data, the total downtime of the vehicle is obtained.

[0078] It should be noted that the total downtime of the vehicle, i.e. the non-activation time, starts from the vehicle down-high voltage and ends at the next up-high voltage.

[0079] In specific implementation, the first timing data and the second timing data are accumulated to obtain the total non-activation time of the drive system.

[0080] This embodiment provides a method for determining a stop timer. When a downstream high-voltage signal is detected, the application layer is controlled to start resetting the timer. When the application layer's timer reaches a first preset time, it is determined whether the vehicle control unit is in a sleep state. If the vehicle control unit is in a sleep state, the internal timing chip is controlled to start resetting the timer and storing the first preset time as the first timing data. When an upstream high-voltage signal is detected, the current timing of the internal chip is stored as the second timing data. The total vehicle downtime is obtained based on the first and second timing data. This method accurately monitors the stop timer count for PHEV vehicles as stipulated by regulations and accurately increments the stop timer.

[0081] Based on the first embodiment of this application, in the second embodiment of this application, the content that is the same as or similar to that in the first embodiment described above can be referred to the above description, and will not be repeated hereafter. Based on this, please refer to... Figure 2 After step 30, the method for determining the stop timer further includes steps S301 to S304:

[0082] Step S301: When the internal timing chip reaches the second preset time, check whether the vehicle control unit is activated.

[0083] It should be noted that the second preset time can be set freely or determined according to the actual application.

[0084] It should be noted that traditional stop timers are not very suitable for PHEVs regarding the duration of inactive state of the PHEV drive system as stipulated by regulations (stop timer). This is because the inactive state of the drive system may involve situations that wake up the VECU, such as intelligent charging or scheduled charging, which may cause the VECU to wake up midway, and the stop timer will be temporarily interrupted. As a result, problems such as the stop timer not increasing or being calculated inaccurately may occur.

[0085] It should be understood that the active state of the vehicle control unit (VECU) refers to the state in which the ECU is fully operational and monitoring the vehicle system. In this state, the VECU can respond to various sensor inputs in real time, execute control algorithms, and manage multiple subsystems of the vehicle.

[0086] Step S302: When the vehicle control unit is in an active state, the control application layer starts to reset the timer and stores the second preset time as the third timer data;

[0087] Step S303: When the vehicle control unit is detected to be in a sleep state, the internal timing chip is controlled to start resetting the timing and storing the current application layer timing as the fourth timing data.

[0088] In the actual implementation, the internal chip timing restarts at this point, and the downtime is assigned a value.

[0089] Before the step S303, further comprising: when the application layer timing reaches a third preset time, controlling the vehicle control unit to enter a sleep state, wherein the third preset time is equal to the fourth timing data.

[0090] It should be understood that the first preset time, the second preset time and the third preset time are not related before, and can be freely set or determined according to actual application.

[0091] It should be noted that when the application layer timing does not reach the third preset time, the application layer timing is saved.

[0092] Step S304, based on the first timing data, the second timing data, the third timing data and the fourth timing data, the total vehicle downtime is obtained.

[0093] The first timing data, the second timing data, the third timing data and the fourth timing data are accumulated to obtain the total driving system inactivation time.

[0094] As shown in Figure 3 Before sleep, the application layer starts timing from 0 until a certain time point t1, after t1, the VECU enters the sleep state, at this time the internal chip starts timing from 0, timing t2, after time t2, the VECU is woken up, at this time the application layer starts timing again, timing t3, after waking up, if the VECU sleeps again, the internal chip starts timing from 0 again, timing t4, after the VECU wakes up, the total downtime timing time is assigned as t1+t2+t3, when the internal chip timing t4 ends, if the driving high voltage is activated, the total downtime timing time is assigned as t1+t2+t3+t4, and this value is maintained until the next driving high voltage is activated.

[0095] The embodiment provides a downtime timer determination method, which considers the working condition of waking up in the middle of sleep, and specially processes this, uses the application layer to continue timing when waking up, and then uses the internal chip to time after sleeping again, thereby avoiding interruption of the downtime timer.

[0096] Based on the first embodiment and the second embodiment of the present application, in the third embodiment of the present application, the same or similar contents as the above embodiments can be referred to the above introduction, and will not be described hereinafter. On this basis, please refer to Figure 4 , step S40 comprises steps S401-S403:

[0097] Step S401, when detecting the power-off signal, controlling the application layer and the internal timing chip to stop timing;

[0098] It should be noted that the VECU will detect the Battery-Disconnect signal. At this time, the VECU will directly power off and go into sleep mode. Timing errors may occur in the application layer timing and chip timing, which may cause the VECU to stop the timer from running incorrectly. At this time, the timing operation will be stopped.

[0099] Step S402: Reset the stored timing data to 0;

[0100] It should be noted that the VECU forces the total downtime to be reset to 0 to prevent the downtime from increasing erroneously and causing misdiagnosis or enable issues.

[0101] Step S403: When a power input signal is detected, control the application layer or internal timing chip to restart the timing.

[0102] It should be noted that when the battery is detected to be properly connected again, the VECU will detect the Battery-Valid signal. At this time, the shutdown timer will start counting down from 0 again, and the above process will be repeated.

[0103] This embodiment provides a method for determining a stop timer. When a power disconnection signal is detected, the application layer and the internal timing chip are controlled to stop timing; the stored timing data is reset to 0; when a power connection signal is detected, the application layer or the internal timing chip is controlled to restart timing. A special power disconnection scenario is considered. When this situation occurs, the stop timer will be forcibly reset to 0 to prevent the timer from growing incorrectly.

[0104] It should be noted that the above examples are only for understanding this application and do not constitute a limitation on the method for determining the stop timer in this application. Any simple modifications based on this technical concept are within the protection scope of this application.

[0105] This application also provides a stop timer determining device, please refer to... Figure 5 The stop timer determining device includes:

[0106] Response module 10 is used to control the application layer to start the zeroing timer when a high-voltage signal is detected on the vehicle.

[0107] The first timing module 20 is used to determine whether the vehicle control unit is in a sleep state when the application layer timing time reaches the first preset time.

[0108] The first timing module 20 is also used to control the internal timing chip to start resetting the timing when the vehicle control unit is in a dormant state, and to store the first preset time as the first timing data;

[0109] The second timing module 30 is configured to store the current internal chip timing as second timing data when the vehicle high-voltage signal is detected.

[0110] The output module 40 is configured to obtain the total vehicle downtime based on the first timing data and the second timing data.

[0111] The downtime timer determination apparatus provided in the present application adopts the downtime timer determination method in the above embodiments, and can solve the technical problem that the prior art cannot accurately calculate the duration of the non-activation state of the vehicle driving system in the complex downtime of the hybrid vehicle. Compared with the prior art, the downtime timer determination apparatus provided in the present application has the same beneficial effects as the downtime timer determination method provided in the above embodiments, and other technical features in the downtime timer determination apparatus are the same as the features disclosed in the above embodiments, which will not be repeated here.

[0112] The present application provides a downtime timer determination device, which comprises at least one processor and a memory connected with the at least one processor, wherein the memory stores instructions executable by the at least one processor, and the instructions are executed by the at least one processor to enable the at least one processor to perform the downtime timer determination method in the above embodiment one.

[0113] Reference will now be made to the drawings, and specific examples thereof will be described hereinbelow. Figure 6 The downtime timer determination device shown in the drawing is only an example, and should not impose any limitation on the functions and use range of the embodiments of the present application. Figure 6 The downtime timer determination device shown in the drawing is only an example, and should not impose any limitation on the functions and use range of the embodiments of the present application.

[0114] As shown in the drawing, Figure 6As shown, the stop timer determination device can include a processing device 1001 (e.g., a central processing unit, a graphics processing unit, etc.) that can perform various appropriate actions and processes according to programs stored in a read only memory (ROM) 1002 or programs loaded from a storage device 1003 into a random access memory (RAM) 1004. Various programs and data required for the operation of the stop timer determination device are also stored in the RAM 1004. The processing device 1001, the ROM 1002, and the RAM 1004 are connected to each other through a bus 1005. An input / output (I / O) interface 1006 is also connected to the bus. Generally, the following systems can be connected to the I / O interface 1006: input devices 1007 including, for example, a touch screen, a touch pad, a keyboard, a mouse, an image sensor, a microphone, an accelerometer, a gyroscope, etc.; output devices 1008 including, for example, a liquid crystal display (LCD), a speaker, a vibrator, etc.; the storage device 1003 including, for example, a magnetic tape, a hard disk, etc.; and a communication device 1009. The communication device 1009 can allow the stop timer determination device to communicate wirelessly or by wire with other devices to exchange data. Although the stop timer determination device with various systems is shown in the figure, it should be understood that all of the systems shown are not required to be implemented or possessed. More or fewer systems can be alternatively implemented or possessed.

[0115] In particular, the processes described above with reference to the flowcharts can be implemented as computer software programs according to embodiments of the present disclosure. For example, embodiments of the present disclosure include a computer program product comprising a computer program carried on a computer readable medium, the computer program containing program code for performing the methods shown in the flowcharts. In such embodiments, the computer program can be downloaded and installed from a network through the communication device, or installed from the storage device 1003, or installed from the ROM 1002. When the computer program is executed by the processing device 1001, the above-mentioned functions defined in the methods of embodiments of the present disclosure are performed.

[0116] The stop timer determination device provided by the present disclosure adopts the stop timer determination method in the above embodiments, and can solve the technical problem in the prior art that the duration of the non-activation state of the vehicle driving system in the complex stop condition of the hybrid vehicle cannot be accurately calculated. Compared with the prior art, the stop timer determination device provided by the present disclosure has the same beneficial effects as the stop timer determination method provided by the above embodiments, and other technical features in the stop timer determination device are the same as the features disclosed in the above method, which will not be described here.

[0117] It should be understood that various aspects of the disclosure can be implemented in hardware, software, firmware, or a combination thereof. In the description of the above embodiments, specific features, structures, materials or characteristics can be combined in any appropriate manner in any one or more embodiments or examples.

[0118] The above description is merely illustrative of the application and is not intended to limit the scope of the application. Any modifications or equivalents of the application should be construed as falling within the scope of the application. The scope of the application should be determined by the appended claims.

[0119] The application provides a computer readable storage medium having stored thereon computer readable program instructions (i.e., a computer program) for performing the shutdown timer determination method in the above embodiments.

[0120] The computer readable storage medium provided by the application may, for example, be a U disk, but is not limited to an electric, magnetic, optical, electromagnetic, infrared, or semiconductor system, system, or device, or any combination thereof. More specific examples of the computer readable storage medium can include, but are not limited to, an electric connection with one or more conductive wires, a portable computer disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any appropriate combination thereof. In the present embodiment, the computer readable storage medium can be any tangible medium containing or storing a program that can be used by or in conjunction with an instruction execution system, system, or device. The program code contained on the computer readable storage medium can be transmitted by any appropriate medium, including but not limited to an electric wire, an optical cable, an RF (Radio Frequency), etc., or any appropriate combination thereof.

[0121] The above computer readable storage medium can be included in the shutdown timer determination device, or can exist separately without being assembled into the shutdown timer determination device.

[0122] The computer readable storage medium carries one or more programs, when the one or more programs are executed by the shutdown timer determination device, the shutdown timer determination device is caused to: control the application layer to start zero-clearing timing when a vehicle off-highway high-voltage signal is detected; determine whether the vehicle control unit is in a sleep state when the application layer timing time reaches a first preset time; control the internal timing chip to start zero-clearing timing and store the first preset time as first timing data when the vehicle control unit is in the sleep state; store the current internal chip timing as second timing data when a vehicle on-highway high-voltage signal is detected; and obtain the total shutdown time of the vehicle based on the first timing data and the second timing data.

[0123] Computer program code for carrying out operations of the present application can be written in any combination of one or more programming languages, including an object oriented programming language such as Java, Smalltalk, C++ or the like and conventional procedural programming languages, such as the "C" programming language or similar programming languages. The program code can execute entirely on the user's computer, partly on the user's computer, as a stand-alone software package, partly on the user's computer and partly on a remote computer or entirely on the remote computer or server. In the latter scenario, the remote computer can be connected to the user's computer through any type of network, including a local area network (LAN) or a wide area network (WAN), or the connection can be made to an external computer (for example, through the Internet using an Internet Service Provider).

[0124] The flow diagrams and the block diagrams in the drawings are illustrations of architectures, functionalities, and operations of possible implementations of systems, methods, and computer program products according to various embodiments of the present application. In this regard, each block in the flow diagrams or block diagrams can represent a module, a procedure, or a part of code, which comprises one or more executable instructions for implementing the specified logical functions. It should also be noted that in some alternative implementations, the functions noted in the blocks can occur out of the order noted in the figures. For example, two blocks shown in succession may, in fact, be executed substantially concurrently or in the reverse order, depending on the functionality involved. It is also noted that each block of the block diagrams and / or flow diagrams and combinations of blocks in the block diagrams and / or flow diagrams can be implemented by dedicated hardware-based systems that perform the specified functions or operations, or by combinations of dedicated hardware and computer instructions.

[0125] The modules described in the embodiments of the present application can be implemented in the form of software or in the form of hardware. In some cases, the name of the module does not constitute a limitation on the module itself.

[0126] The readable storage medium provided by the present application is a computer readable storage medium, which stores computer readable program instructions (i.e., a computer program) for executing the above-mentioned shutdown timer determination method, and can solve the technical problem that the prior art cannot accurately calculate the duration of the non-activated state of the vehicle drive system in the complex shutdown condition of the hybrid vehicle. Compared with the prior art, the computer readable storage medium provided by the present application has the same beneficial effects as the shutdown timer determination method provided by the above-mentioned embodiments, and will not be described here.

[0127] The present application also provides a computer program product comprising a computer program, which, when executed by a processor, implements the steps of the above-mentioned shutdown timer determination method.

[0128] The computer program product provided by the present application can solve the technical problem that the prior art cannot accurately calculate the duration of the non-activated state of the vehicle drive system in the complex shutdown condition of the hybrid vehicle. Compared with the prior art, the computer program product provided by the present application has the same beneficial effects as the shutdown timer determination method provided by the above-mentioned embodiments, and will not be described here.

[0129] The above-mentioned is only some embodiments of the present application, and does not limit the patent scope of the present application, and any equivalent structural transformation, direct / indirect application in other related technical fields made by using the content of the present application specification and drawings are included in the patent protection scope of the present application.

Claims

1. A method of determining a stop watch time, characterized by, The stop timer determination method is applied to a stop timer system comprising an application layer and an internal timing chip, and the method comprises: controlling the application layer to start zero-clearing timing when a vehicle off-highway high-voltage signal is detected; judging whether a vehicle control unit is in a sleep state when a timing time of the application layer reaches a first preset time; controlling the internal timing chip to start zero-clearing timing and storing the first preset time as first timing data when the vehicle control unit is in the sleep state; storing a current timing of the internal timing chip as second timing data when a vehicle on-highway high-voltage signal is detected; obtaining a total stop time of the vehicle based on the first timing data, the second timing data, third timing data and fourth timing data; after the step of controlling the internal timing chip to start zero-clearing timing and storing the first preset time as first timing data when the vehicle control unit is in the sleep state, the method further comprises: detecting whether the vehicle control unit is activated when a timing time of the internal timing chip reaches a second preset time; controlling the application layer to start zero-clearing timing and storing the second preset time as third timing data when the vehicle control unit is in an activated state; controlling the internal timing chip to start zero-clearing timing and storing a current timing of the application layer as fourth timing data when it is detected that the vehicle control unit is in the sleep state.

2. The stall timer determination method of claim 1, wherein, before the step of detecting that the vehicle control unit is in the sleep state, the method further comprises: controlling the vehicle control unit to enter the sleep state when a timing of the application layer reaches a third preset time, wherein the third preset time is equal to the fourth timing data.

3. The stall timer determination method of claim 1, wherein, before the step of storing a current timing of the internal timing chip as second timing data when a vehicle on-highway high-voltage signal is detected, the method further comprises: controlling the application layer and the internal timing chip to stop timing when a power-off signal is detected; resetting stored timing data to 0; controlling the application layer or the internal timing chip to re-timing when a power-on signal is detected.

4. The stall timer determination method of claim 1, wherein, the step of controlling the internal timing chip to start zero-clearing timing comprises: controlling the application layer to generate an interrupt signal; transmitting the interrupt signal to an internal timer and clearing historical timing data of the internal timer; controlling the internal timer to start timing from 0.

5. The stall timer determination method of claim 1, wherein, the step of controlling the application layer to start zero-clearing timing comprises: controlling the application layer to generate an interrupt signal and clearing historical timing data of the application layer; controlling the application layer to start timing from 0.

6. A stop watch determining apparatus characterized by comprising: The device comprises a memory, a processor and a computer program stored on the memory and executable on the processor, and the computer program is configured to implement the steps of the stop timer determination method according to any one of claims 1 to 5.

7. A storage medium, characterized by The storage medium is a computer-readable storage medium, and the storage medium stores a computer program, and the computer program is executed by a processor to implement the steps of the stop timer determination method according to any one of claims 1 to 5.

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