Display panel and display device

Abstract

The application discloses a display panel and a display device, relates to the technical field of display, and further relates to an array substrate, a color film substrate, an electric field shielding layer, a shielding electric field insulating layer and a data line arrangement layer. The color film substrate is not provided with a black matrix corresponding to the data line on the side of the array substrate. The electric field shielding layer comprises a plurality of shielding electrodes. The orthographic projection of each shielding electrode on the substrate covers the orthographic projection of each data line on the array substrate body. The shielding electric field insulating layer comprises a first insulating part, a second insulating part and a third insulating part which are sequentially connected. The second insulating part is arranged corresponding to the shielding electrode. The thickness of the second insulating part is greater than the thickness of the first insulating part and the thickness of the third insulating part. The application reduces the pressure difference and improves the transmittance through the above design.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of display, in particular to a display panel and a display device. BACKGROUND

[0002] Display devices such as liquid crystal display (LCD) have become necessities in people's life. With the increasing demand of people, in order to improve the display quality of display devices and avoid the influence of the deviation of the array substrate and the color filter substrate on the aperture ratio and the problem of light leakage when the array substrate and the color filter substrate are boxed, the integrated technology (COA) of integrating the color filter and the array substrate is applied. The COA technology is to set the black matrix and the color filter on the array substrate.

[0003] In the pixel pattern design of COA, the data line corresponding to the array substrate on the color filter substrate side has no black matrix, but the common electrode above the data line shields the data line signal to prevent the liquid crystal in this area from being disordered. This design can effectively increase the aperture ratio.

[0004] In the pixel pattern design of non-COA, the data line corresponding to the array substrate on the color filter substrate side has a black matrix, and the common electrode tracks are on the left and right sides of the data line. The functions of this common electrode track mainly include two aspects: forming a storage capacitor and shielding an electric field. After the electric field is shielded, the voltage difference above the Acom is zero, and the liquid crystal will stand up completely to prevent the liquid crystal near the pixel and the data line from being disordered. At the same time, there is a black matrix above the data line to block the position of the disordered liquid crystal to prevent light leakage. Considering the matching accuracy of the black matrix and the common electrode track of the array substrate below, the black matrix will cover the common electrode tracks on both sides and exceed the common electrode tracks. The width of the black matrix is greater than or equal to the edge of the common electrode track on both sides by 5 μm. In this way, the aperture ratio of the pixel will be reduced. Therefore, this is a problem that needs to be solved urgently. SUMMARY

[0005] The purpose of the present application is to provide a display panel and a display device which can reduce the pressure difference and improve the penetration rate.

[0006] The application discloses a display panel, comprising a color film substrate, an array substrate and a liquid crystal layer, the color film substrate and the array substrate are oppositely arranged, and the liquid crystal layer is arranged between the color film substrate and the array substrate; the color film substrate comprises a color film substrate body and a common electrode layer, the common electrode layer is arranged on a side of the first substrate facing the array substrate; the array substrate comprises a substrate and a data arrangement layer, the data arrangement layer is arranged on the substrate, and the data arrangement layer comprises a plurality of data lines, and the plurality of data lines are arranged at intervals along a first direction; a side of the color film substrate facing the array substrate does not be provided with a black matrix corresponding to the data lines; the array substrate further comprises an electric field shielding layer and a shielding electric field insulating layer, the electric field shielding layer is arranged between the substrate and the data lines, the shielding electric field insulating layer is arranged between the electric field shielding layer and the data lines, the electric field shielding layer comprises a plurality of shielding electrodes, and the orthographic projection of each shielding electrode on the substrate covers the orthographic projection of each data line on the array substrate body; wherein the shielding electric field insulating layer comprises a first insulating part, a second insulating part and a third insulating part connected in sequence, the second insulating part is arranged corresponding to the shielding electrode, and the thickness of the second insulating part is greater than the thickness of the first insulating part and the thickness of the third insulating part.

[0007] Optionally, the array substrate further comprises a first pixel electrode and a second pixel electrode, the first pixel electrode is arranged on one side of the data line, the second pixel electrode is arranged on the other side of the data line, the shielding electrode comprises a first end and a second end which are away from each other, the orthographic projection of the first pixel electrode on the substrate partially overlaps the orthographic projection of the first end on the substrate, the orthographic projection of the second pixel electrode on the substrate partially overlaps the orthographic projection of the second end on the substrate, the distance between the first pixel electrode and the second pixel electrode is 9 microns-13.8 microns, and the width of the shielding electrode is 10 microns-14 microns.

[0008] Optionally, the thickness of the second insulating part is 4 times the thickness of the first insulating part and the thickness of the third insulating part.

[0009] Optionally, the width of the second insulating part is greater than the width of the shielding electrode, the second insulating part is divided into a first insulating end and a second insulating end, the first insulating end is arranged corresponding to the first end, the second insulating end is arranged corresponding to the second end, the width of the first insulating end is greater than 2 microns-3 microns of the width of the first end, and the width of the second insulating end is greater than 2 microns-3 microns of the width of the second end.

[0010] Optionally, the second insulation part is divided into a first insulation end part, a second insulation end part and a third insulation end part connected in sequence, the data line overlaps the shielding electrode to form an overlapping area, the second insulation end part is arranged corresponding to the overlapping area, the first insulation end part is arranged on one side of the overlapping area, the third insulation end part is arranged on the other side of the overlapping area, the thickness of the second insulation end part is greater than the thickness of the first insulation end part and the thickness of the third insulation end part, the thickness of the first insulation end part is greater than the thickness of the first insulation part, and the thickness of the third insulation end part is greater than the thickness of the third insulation part.

[0011] Optionally, the second insulation part is divided into a first insulation end part, a second insulation end part and a third insulation end part connected in sequence, the data line overlaps the shielding electrode to form an overlapping area, the second insulation end part is arranged corresponding to the overlapping area, the first insulation end part is arranged on one side of the overlapping area, the third insulation end part is arranged on the other side of the overlapping area, the thickness of the first insulation end part and the thickness of the third insulation end part are greater than the thickness of the second insulation end part, the thickness of the first insulation end part is greater than the thickness of the first insulation part, and the thickness of the third insulation end part is greater than the thickness of the third insulation part.

[0012] Optionally, the display panel further comprises a scan arrangement layer, the scan arrangement layer comprises a plurality of scan lines, the plurality of scan lines are arranged corresponding to the plurality of data lines one by one, the shielding electrode is arranged in suspension and is not connected with the two adjacent scan lines, the shielding electric field insulation layer is provided with a through hole corresponding to the data line, the data line is partially arranged in the through hole, and the data line is connected with the shielding electrode through the through hole.

[0013] The application further discloses a preparation method of the display panel, comprising the following steps:

[0014] providing a substrate;

[0015] coating an electric field shielding material on the substrate to form an electric field shielding layer;

[0016] coating a shielding electric field insulation material on the electric field shielding layer to form a shielding electric field insulation layer comprising a first insulation part, a second insulation part and a third insulation part by using a process;

[0017] arranging a data line on the shielding electric field insulation layer;

[0018] forming a first pixel electrode corresponding to the first insulation part on one side of the data line;

[0019] forming a second pixel electrode corresponding to the third insulation part on one side of the data line to complete the preparation of the array substrate;

[0020] The color film substrate is arranged opposite to the array substrate;

[0021] A liquid crystal layer is injected between the color film substrate and the array substrate to form a complete display panel;

[0022] The second insulation part is arranged corresponding to the shielding electrode, the first insulation part and the third insulation part are arranged away from each other and connected with the second insulation part respectively, and the thickness of the second insulation part is greater than the thickness of the first insulation part and the thickness of the third insulation part.

[0023] Optionally, the step of coating shielding electric field insulation material on the electric field shielding layer to form a shielding electric field insulation layer including a first insulation part, a second insulation part and a third insulation part comprises the following steps:

[0024] The shielding electric field insulation material is coated on the electric field shielding layer;

[0025] The transmittance is increased to 4 times corresponding to the position of the shielding electrode by using a mask process

[0026] The application further discloses a display device including a backlight module and the display panel as described above, wherein the backlight module is arranged on one side of the display panel to provide a backlight source for the display panel.

[0027] Compared with the pixel pattern design of the prior art non-COA, the color film substrate side corresponding to the data line of the array substrate needs to be provided with a black matrix to shield the position of liquid crystal disorder and prevent light leakage. The array substrate of the application further includes a substrate, an electric field shielding layer, a shielding electric field insulation layer and a data line arrangement layer. The electric field shielding layer is arranged between the substrate and the data line, the shielding electric field insulation layer is arranged between the electric field shielding layer and the data line, the color film substrate side corresponding to the data line of the array substrate is not provided with a black matrix, the electric field shielding layer includes a plurality of shielding electrodes, and the orthographic projection of each shielding electrode on the substrate covers the orthographic projection of each data line on the array substrate body. The shielding electric field insulation layer includes a first insulation part, a second insulation part and a third insulation part connected in sequence. The second insulation part is arranged corresponding to the shielding electrode, and the thickness of the second insulation part is greater than the thickness of the first insulation part and the thickness of the third insulation part. In this way, an electric field is formed between the shielding electrode and the common electrode layer of the color film substrate side to shield the liquid crystal disorder phenomenon in the vicinity. Although the liquid crystal corresponding to the data line in the middle will be disordered, it is far away from the pixel display area, the data line is metal and does not transmit light, and therefore will not cause light leakage phenomenon. Moreover, by increasing the spacing between the color film substrate and the array substrate, the capacitance between the data line and the shielding electrode is reduced, the transmittance is improved, and the flash screen problem is avoided. BRIEF DESCRIPTION OF DRAWINGS

[0028] The accompanying drawings, which are included to provide a further understanding of the embodiments of the application and are incorporated in and constitute a part of this specification, illustrate embodiments of the application and together with the description serve to explain the principles of the application. It is readily understood that the drawings are merely illustrative of some embodiments of the application and therefore are not to be taken too restrictively. In the accompanying drawings:

[0029] Figure 1 is a pixel structure schematic diagram of the display panel of the present application;

[0030] Figure 2 is a pixel structure schematic diagram of the display panel of the present application; Figure 1 is a cross-sectional structure schematic diagram along the cross-sectional line A-A';

[0031] Figure 3 is a cross-sectional structure schematic diagram of the array substrate of the present application;

[0032] Figure 4 is a block structure schematic diagram of the display device of the present application;

[0033] Figure 5 is a flow step schematic diagram of the preparation method of the display panel provided by the present application;

[0034] Figure 6 is a flow step schematic diagram of the preparation method of the display panel provided by the present application; Figure 5 is a further flow schematic diagram of step S3 in the method;

[0035] Figure 7 is a pixel structure schematic diagram of the display panel provided by the fourth embodiment of the present application;

[0036] Figure 8 is a pixel structure schematic diagram of the display panel provided by the fourth embodiment of the present application; Figure 7 is a cross-sectional structure schematic diagram along the cross-sectional line B-B';

[0037] Figure 9 is a cross-sectional structure schematic diagram along the cross-sectional line C-C'; Figure 7 is a cross-sectional structure schematic diagram along the cross-sectional line C-C'.

[0038] 10, display device; 100, display panel; 110, color film substrate; 111, color film substrate body; 112, common electrode layer; 120, array substrate; 121, substrate; 122, data arrangement layer; 123, data line; 124, electric field shielding layer; 125, shielding electrode; 126, first end; 127, second end; 130, first pixel electrode; 140, second pixel electrode; 150, shielding electric field insulation layer; 151, first insulation part; 152, second insulation part; 153, third insulation part; 154, first insulation end; 155, second insulation end; 156, first insulation end part; 157, second insulation end part; 158, third insulation end part; 160, liquid crystal layer; 170, via hole; 200, backlight module. DETAILED DESCRIPTION

[0039] It is to be understood that the terminology used herein is for the purpose of describing specific embodiments only and is not intended to be limiting, and that the application can be practiced by many alternative forms without departing from the spirit thereof.

[0040] In the description of the present application, the terms "first", "second", "third", etc. are used only for the purpose of description, and should not be interpreted as indicating relative importance or implying the number of the technical features indicated. Therefore, unless otherwise specified, the features defined with "first", "second", etc. can explicitly or implicitly include one or more of the features; the meaning of "multiple" is two or more. In addition, the terms indicating the orientation or positional relationship, such as "up", "down", "left", "right", "vertical", "horizontal", etc. are described based on the orientation or relative positional relationship shown in the drawings, and are only for the convenience of the simplified description of the present application, and should not be interpreted as indicating that the devices or elements indicated must have a particular orientation, be constructed and operated in a particular orientation, and therefore should not be interpreted as limiting the present application. For those skilled in the art, the specific meaning of the above terms in the present application can be understood according to the specific circumstances.

[0041] Figure 1 is a schematic diagram of a pixel structure of the display panel 100 of the present application, Figure 2 is Figure 1 is a schematic diagram of the cross-sectional structure along the cross-sectional line A-A', Figure 3 is a schematic diagram of the cross-sectional structure of the array substrate 120 of the present application, in combination with Figures 1-3It can be known that the application discloses a display panel 100, which comprises a color film substrate 110, an array substrate 120 and a liquid crystal layer 160. The color film substrate 110 is arranged opposite to the array substrate 120, and the liquid crystal layer 160 is arranged between the color film substrate 110 and the array substrate 120. The color film substrate 110 comprises a color film substrate body 111 and a common electrode layer 112, and the common electrode layer 112 is arranged on the side of the first substrate facing the array substrate 120. The array substrate 120 comprises a substrate 121 and a data arrangement layer 122, and the data arrangement layer 122 is arranged on the substrate 121. The data arrangement layer 122 comprises a plurality of data lines 123, and the plurality of data lines 123 are arranged at intervals along a first direction. The side of the color film substrate 110 facing the array substrate 120 does not be provided with a black matrix corresponding to the data lines 123. The array substrate 120 further comprises an electric field shielding layer 124 and a shielding electric field insulating layer 150. The electric field shielding layer 124 is arranged between the substrate 121 and the data lines 123, and the shielding electric field insulating layer 150 is arranged between the electric field shielding layer 124 and the data lines 123. The electric field shielding layer 124 comprises a plurality of shielding electrodes 125, and the orthographic projection of each shielding electrode 125 on the substrate 121 covers the orthographic projection of each data line 123 on the array substrate 120 body. The shielding electric field insulating layer 150 comprises a first insulating part 151, a second insulating part 152 and a third insulating part 153 which are sequentially connected. The second insulating part 152 is arranged corresponding to the shielding electrode 125, and the thickness of the second insulating part 152 is greater than the thickness of the first insulating part 151 and the thickness of the third insulating part 153.

[0042] Compared with the pixel pattern design of the prior art non-COA, the data line 123 of the color film substrate 110 side corresponding to the array substrate 120 needs to be provided with a black matrix to shield the position of liquid crystal disorder and prevent light leakage. The array substrate 120 of the present application further comprises a substrate 121, an electric field shielding layer 124, a shielding electric field insulating layer 150 and a data line 123 arrangement layer. The electric field shielding layer 124 is arranged between the substrate 121 and the data line 123. The shielding electric field insulating layer 150 is arranged between the electric field shielding layer 124 and the data line 123. The color film substrate 110 side corresponding to the data line 123 is not provided with a black matrix. The electric field shielding layer 124 comprises a plurality of shielding electrodes 125. The orthogonal projection of each shielding electrode 125 on the substrate 121 covers the orthogonal projection of each data line 123 on the array substrate 120 body. The shielding electric field insulating layer 150 comprises a first insulating part 151, a second insulating part 152 and a third insulating part 153 connected in sequence. The second insulating part 152 is arranged corresponding to the shielding electrode 125. The thickness of the second insulating part 152 is greater than the thickness of the first insulating part 151 and the thickness of the third insulating part 153. In this way, an electric field is formed between the shielding electrode 125 and the common electrode layer 112 of the color film substrate 110 side, shielding the liquid crystal disorder phenomenon in the vicinity. Although the liquid crystal corresponding to the data line 123 in the middle will be disorder, it is far away from the pixel display area. The data line 123 is metal and does not transmit light, so it will not cause light leakage phenomenon. By increasing the distance between the color film substrate 110 and the array substrate 120, the capacitance between the data line 123 and the shielding electrode 125 is reduced, thereby improving the transmittance and avoiding the flashing screen problem.

[0043] Figure 4 The display device of the present application is a block structure schematic diagram as shown in Figure 4 The display device 10 comprises a backlight module 200 and a display panel 100. The backlight module 200 is arranged on one side of the display panel 100 to provide a backlight source for the display panel 100. The display device 10 assembled by the display panel 100 has high pixel aperture ratio, which improves the display quality. The display device 10 can be a mobile phone, a tablet computer, a television, a display, a notebook computer, a digital photo frame, a navigator or any product or component with display function.

[0044] In the liquid crystal display panel 100, the shield electrode 125 is arranged between the pixel electrode and the common electrode to shield the electric field generated between the pixel electrode and the data line 123. However, the voltage on the data line 123 is periodically changed, so the pixel electrode and the common electrode will generate electric field with the data line 123, and the direction of the electric field is perpendicular to the direction of the data line 123. The initial arrangement direction of the liquid crystal molecules in the liquid crystal layer 160 is along the direction of the data line 123, so the electric field generated between the pixel electrode and the common electrode and the data line 123 will affect the liquid crystal molecules, causing the liquid crystal molecules to deflect, thereby causing light leakage. Therefore, the shield electrode 125 can offset or shield part of the electric field generated between the pixel electrode (and the common electrode) and the data line 123, and shield the data line 123, thereby effectively improving the light leakage problem. Therefore, the width of the shield electrode 125 is widened to block light, but the overlapping area between the data line 123 and the shield electrode is increased, which eventually causes the capacitance load of the data line 123 to be too high. Because the capacitance is too large, the gamma voltage difference cannot be too large, and the transmittance is not as expected. The material of the shield electrode 125 is transparent conductive oxide or metal. For example, indium tin oxide TIO, or thin metal silver.

[0045] Therefore, the present application adjusts the thickness of the insulating layer between the shield electrode 125 and the data line 123, and the following detailed description of the present application is made with reference to the accompanying drawings and optional embodiments.

[0046] First embodiment:

[0047] The thickness of the second insulating portion 152 is 4 times the thickness of the first insulating portion 151 and the third insulating portion 153. The inventors have found through experiments that in the COA display panel 100 having the above-mentioned problem, 320 data lines 123 are originally arranged, and then the data lines 123 are cut one by one. When the 80th data line 123 is cut, the capacitance of the data line 123 in the COA display panel 100 is reduced to 1 / 4 of the original, which is equivalent to half of the capacitance of the black matrix design. At this time, the transmittance can be improved without the problem of flicker.

[0048] The array substrate 120 further comprises a first pixel electrode 130 and a second pixel electrode 140, the first pixel electrode 130 is arranged at one side of the data line 123, the second pixel electrode 140 is arranged at the other side of the data line 123, the shielding electrode 125 comprises a first end 126 and a second end 127 which are opposite to each other, the orthographic projection of the first pixel electrode 130 on the substrate 121 partially overlaps the orthographic projection of the first end 126 on the substrate 121, the orthographic projection of the second pixel electrode 140 on the substrate 121 partially overlaps the orthographic projection of the second end 127 on the substrate 121, the interval d between the first pixel electrode 130 and the second pixel electrode 140 is 9-13.8 microns, and the width of the shielding electrode 125 is 10-14 microns. Normally, the width of the shielding electrode 125 is equal to the width between the first pixel electrode 130 and the second pixel electrode 140, because the opening between the first pixel electrode 130 and the second pixel electrode 140 needs to be ensured to avoid the problem of affecting the transmittance due to the too small opening. Now the interval between the first pixel electrode 130 and the second pixel electrode 140 is designed to be slightly narrower than the width of the shielding electrode 125. On the one hand, after the thickness of the second insulating part 152 is increased, the first pixel electrode 130 and the second pixel electrode 140 on the top will be relatively high when setting, and the adhesion of the film layer will be affected to a certain extent. Therefore, the side of the first pixel electrode 130 and the second pixel electrode 140 close to the data line 123 can be appropriately widened, and on the other hand, the interval between the first pixel electrode 130 and the second pixel electrode 140 is controlled to ensure the aperture ratio.

[0049] In addition, the width of the second insulating part 152 is greater than the width of the shielding electrode 125, the second insulating part 152 is divided into a first insulating end 154 and a second insulating end 155, the first insulating end 154 is arranged corresponding to the first end 126, the second insulating end 155 is arranged corresponding to the second end 127, the width of the first insulating end 154 is greater than the width of the first end 126 by 2-3 microns, and the width of the second insulating end 155 is greater than the width of the second end 127 by 2-3 microns.

[0050] Preferably, the width of the second insulation part 152 is h1, and the width of the shielding electrode 125 is h2, wherein h1 = h2 + 4um, that is, on the basis of the width of the shielding electrode 125, 2um is added to each side to form the width of the second insulation part 152. Since the two sides of the shielding electrode 125 are already the display area of the pixel, if the width of the second insulation part 152 is much larger than the width of the shielding electrode 125, the thickness of the shielding electrode 125 insulation layer corresponding to the larger area of the entire pixel electrode will be thin, which will increase the leakage current and cause problems in pixel display. If the width of the second insulation part 152 is smaller than the width of the shielding electrode 125, the weakening effect of the capacitance load between the shielding electrode 125 and the data line 123 will not be obvious.

[0051] Since the thickness of the second insulation part 152 is relatively large, the difference between the first insulation part 151 and the second insulation part 152 and the difference between the third insulation part 153 and the second insulation part 152 will increase. After the data line 123 is arranged at the position corresponding to the second insulation part 152, and the thickness of the data line 123 itself is added, the film layer is formed above the data line 123, and the climbing will be relatively high. Therefore, a planarization layer can be arranged above the data line 123 to perform planarization. The planarization layer is made of a fusible polytetrafluoroethylene material. The fusible polytetrafluoroethylene material can be made to have a relatively large thickness and good planarization effect.

[0052] Figure 5 The flow chart of the preparation method of the display panel provided by the present application is shown in FIG. 1. Figure 5 The present application also discloses a preparation method of a display panel, which is used for the display panel as described above, and comprises the following steps:

[0053] S1: providing a substrate;

[0054] S2: coating an electric field shielding material on the substrate to form an electric field shielding layer;

[0055] S3: coating a shielding electric field insulation material on the electric field shielding layer by using a process to form a shielding electric field insulation layer comprising a first insulation part, a second insulation part and a third insulation part;

[0056] S4: arranging a data line on the shielding electric field insulation layer;

[0057] S5: forming a first pixel electrode on one side of the data line corresponding to the first insulation part;

[0058] S6: forming a second pixel electrode on one side of the data line corresponding to the third insulation part to complete the preparation of the array substrate;

[0059] S7: disposing the color filter substrate opposite to the array substrate;

[0060] S8: injecting a liquid crystal layer between the color filter substrate and the array substrate to form a complete display panel;

[0061] The second insulation part is arranged corresponding to the shielding electrode, the first insulation part and the third insulation part are arranged away from each other and connected with the second insulation part respectively, and the thickness of the second insulation part is greater than the thickness of the first insulation part and the thickness of the third insulation part.

[0062] In addition, Figure 6 is Figure 5 The further flowchart of step S3 is shown in FIG. 3B. Figure 6 As shown in FIG. 3B, after the step of arranging the data line on the shielding electric field insulation layer, the method can further include the following steps:

[0063] Coating a planar material on the first insulation part, the second insulation part, the third insulation part and the data line to form a planar layer.

[0064] The step of coating the shielding electric field insulation material on the electric field shielding layer to form the shielding electric field insulation layer including the first insulation part, the second insulation part and the third insulation part includes the following steps:

[0065] S31: coating the shielding electric field insulation material on the electric field shielding layer;

[0066] S32: using a mask process to increase the transmittance to 4 times corresponding to the position of the shielding electrode.

[0067] The shielding electric field insulation material is SiNx (silicon nitride), and a shielding electric field insulation layer mask process can be added. The mask process is divided into zones. The shielding electric field insulation material corresponding to the shielding electrode 125 is not transparent, and the transmittance of the mask in other places is 100%. After the shielding electrode layer is completed, the entire array glass substrate is coated with shielding electric field insulation material with a thickness of 4 times. Then, a positive photoresist is coated, and then exposed and developed. Finally, the shielding electric field insulation layer 150 corresponding to the shielding electrode 125 is protected by the photoresist, and the other two places are not protected by the photoresist. Next, an etching process is used to etch the thickness of the first insulation part 151 and the third insulation part 153 to only 1 / 4 of the original. Next, the positive photoresist of the second insulation part 152 corresponding to the position of the shielding electrode 125 is stripped, and finally the thickness of the shielding electric field insulation layer at different positions is obtained.

[0068] Second embodiment:

[0069] As a second embodiment of the present application, the second embodiment is different from the first embodiment in that the second insulating portion 152 is divided into a first insulating end portion 156, a second insulating end portion 157 and a third insulating end portion 158 connected in sequence, the data line 123 and the shielding electrode 125 overlap to form an overlapping region, the second insulating end portion 157 is provided corresponding to the overlapping region, the first insulating end portion 156 is provided on one side of the overlapping region, the third insulating end portion 158 is provided on the other side of the overlapping region, the thickness of the second insulating end portion 157 is greater than the thickness of the first insulating end portion 156 and the thickness of the third insulating end portion 158; the thickness of the first insulating end portion 156 is greater than the thickness of the first insulating portion 151; the thickness of the third insulating end portion 158 is greater than the thickness of the third insulating portion 153, wherein the thickness of the second insulating end portion 157 can be set to 4 times the thickness of the first insulating portion 151 or the thickness of the third insulating portion 153, and the thickness of the first insulating end portion 156 and the thickness of the third insulating end portion 158 can be set to 3 times the thickness of the first insulating portion 151 or the thickness of the third insulating portion 153.

[0070] In this way, the insulating layer of the shielding electrode 125 forms a gradually decreasing film layer structure from thick to medium thick to thin, and the thickness of the insulating layer of the shielding electrode 125 is the largest below the data line 123 with the largest capacitive load, which plays the most important role in reducing the capacitive load between the data line 123 and the shielding electrode 125. The first insulating end portion 156 and the second insulating end portion 157 are located on both sides of the second insulating portion 152, and are still relatively close to the data line 123, so there is a certain capacitive load at these two positions. Therefore, the thickness of the insulating layer of the shielding electrode 125 at these two positions can be set to the second thickness for reducing the capacitive load, and the first insulating portion 151 and the third insulating portion 153 are located on the same horizontal plane as the shielding electrode 125, so the thickness of the first insulating portion 151 and the third insulating portion 153 at this position can be set to be relatively the thinnest. In addition, this design forms a ladder shape, which also helps to climb the slope of the wiring between the data line 123 and the shielding electrode 125 to prevent disconnection.

[0071] Third embodiment:

[0072] As a third embodiment of this application, this embodiment differs from the second embodiment in that the thickness of the first insulating end 156 and the thickness of the third insulating end 158 are both greater than the thickness of the second insulating end 157; the thickness of the first insulating end 156 is greater than the thickness of the first insulating portion 151; and the thickness of the third insulating end 158 is greater than the thickness of the third insulating portion 153. In this case, the thickness of the first insulating end 156 and the thickness of the third insulating end 158 can be set to 4-5 times the thickness of the first insulating portion 151 or the thickness of the third insulating portion 153, while the thickness of the second insulating end 157 can be set to 2-3 times the thickness of the first insulating portion 151 or the thickness of the third insulating portion 153. In this way, the first insulating end 156, the second insulating end 157, and the third insulating end 158 can also appropriately reduce the capacitive load of the data line 123, achieve the effect of increasing the opening ratio, and also avoid the problem of reducing the case thickness.

[0073] Fourth embodiment:

[0074] Figure 7 This is a schematic diagram of the pixel structure of the display panel 100 provided in the fourth embodiment of this application. Figure 8 yes Figure 7 A schematic diagram of the cross-sectional structure along section line B-B'. Figure 9 yes Figure 7 A schematic diagram of the cross-sectional structure along section line C-C', combined with... Figures 7-9 As shown, as the fourth embodiment of this application, this embodiment differs from the first, second, and third embodiments in that the display panel 100 further includes a scanning arrangement layer. The scanning arrangement layer includes multiple scanning lines, which are arranged in a one-to-one correspondence with multiple data lines 123. The shielding electrode 125 is suspended and not connected to any of the adjacent two scanning lines. The shielding electric field insulating layer 150 is provided with through holes 170 corresponding to the data lines 123. Part of the data lines 123 are disposed in the through holes 170, and the data lines 123 are connected to the shielding electrode 125 through the through holes 170.

[0075] That is, the through hole 170 penetrates the shielding electrode 125 insulating layer in the direction perpendicular to the substrate 121, the data line 123 and the shielding electrode 125 are connected by the through hole 170 to form the same voltage, which can avoid the influence of the shielding electrode 125 below the data line 123 on the capacitance load of the data line 123, at the same time, the pixel electrode and the common electrode signal of the color filter substrate 110 are still formed by the pressure difference, which can ensure the normal charging of the pixel electrode, and further ensure the normal display of the display panel 100. At the same time, the shielding electrode 125 is disconnected with the signals on both sides, so it will not cause the storage capacitor formed between the other effective common signal and the pixel electrode signal, and it also has certain guarantee for the taste of the product.

[0076] In the process of the through hole 170, a mask process can be added to the shielding electrode insulating layer 150 to etch a through hole connected with the data line and the shielding electrode, so that the data line 123 and the shielding electrode 125 are connected.

[0077] It should be noted that the steps involved in the present scheme are not limited to the order of execution, and the steps written in the front can be executed first, or executed later, or even executed simultaneously, as long as the scheme can be implemented, it should be considered as belonging to the protection scope of the present application.

[0078] It should be noted that the inventive concept of the present application can form a very large number of embodiments, but the length of the application file is limited and cannot be listed one by one, therefore, on the premise of not conflicting, the above described various embodiments or technical features can be combined to form new embodiments, and the combination of each embodiment or technical feature will enhance the original technical effect.

[0079] The above is a further detailed description of the present application in combination with specific optional embodiments, and the specific implementation of the present application cannot be limited to these descriptions. For ordinary skilled persons in the art to which the present application belongs, without departing from the concept of the present application, a number of simple deductions or substitutions can be made, which should be considered as belonging to the protection scope of the present application.

Claims

1. A display panel, comprising a color film substrate, an array substrate and a liquid crystal layer, the color film substrate and the array substrate are oppositely arranged, and the liquid crystal layer is arranged between the color film substrate and the array substrate; the color film substrate comprises a color film substrate body and a common electrode layer, the common electrode layer is arranged on a side of the color film substrate body facing the array substrate; the array substrate comprises a substrate and a data arrangement layer, the data arrangement layer is arranged on the substrate, and the data arrangement layer comprises a plurality of data lines, the plurality of data lines are arranged in a first direction; characterized in that no black matrix is arranged on a side of the color film substrate corresponding to the data lines; the array substrate further comprises an electric field shielding layer and a shielding electric field insulating layer, the electric field shielding layer is arranged between the substrate and the data lines, the shielding electric field insulating layer is arranged between the electric field shielding layer and the data lines, the electric field shielding layer comprises a plurality of shielding electrodes, and a projection of each shielding electrode on the substrate covers a projection of each data line on the array substrate body; wherein the shielding electric field insulating layer comprises a first insulating portion, a second insulating portion and a third insulating portion connected in sequence, the second insulating portion is arranged corresponding to the shielding electrodes and covers the shielding electrodes; a thickness of the second insulating portion is greater than a thickness of the first insulating portion and a thickness of the third insulating portion; the array substrate further comprises a first pixel electrode and a second pixel electrode, the first pixel electrode is arranged on one side of the data line, the second pixel electrode is arranged on the other side of the data line, and the first pixel electrode and the second pixel electrode are both arranged between the liquid crystal layer and the shielding electric field insulating layer; a projection of part of the first pixel electrode on the substrate overlaps a projection of the first insulating portion on the substrate; a projection of part of the second pixel electrode on the substrate overlaps a projection of the third insulating portion on the substrate. the shielding electrode comprises a first end and a second end facing away from each other, a projection of the first pixel electrode on the substrate partially overlaps a projection of the first end on the substrate, a projection of the second pixel electrode on the substrate partially overlaps a projection of the second end on the substrate, a spacing between the first pixel electrode and the second pixel electrode is 9 microns-13.8 microns, and a width of the shielding electrode is 10 microns-14 microns. the thickness of the second insulating portion is 4 times the thickness of the first insulating portion and the thickness of the third insulating portion.

2. The display panel of claim 1, wherein, a width of the second insulating portion is greater than a width of the shielding electrode, the second insulating portion is divided into a first insulating end and a second insulating end, the first insulating end is arranged corresponding to the first end, the second insulating end is arranged corresponding to the second end, a width of the first insulating end is greater than 2 microns-3 microns of a width of the first end, and a width of the second insulating end is greater than 2 microns-3 microns of a width of the second end.

3. The display panel of claim 1, wherein, ​ 4. The display panel of claim 2, wherein, ​ 5. The display panel of claim 1, wherein, The second insulation part is divided into a first insulation end part, a second insulation end part and a third insulation end part connected in sequence, the data line and the shielding electrode overlap to form an overlapping area, the second insulation end part is arranged corresponding to the overlapping area, the first insulation end part is arranged on one side of the overlapping area, the third insulation end part is arranged on the other side of the overlapping area, the thickness of the second insulation end part is greater than the thickness of the first insulation end part and the thickness of the third insulation end part, the thickness of the first insulation end part is greater than the thickness of the first insulation part, and the thickness of the third insulation end part is greater than the thickness of the third insulation part.

6. The display panel of claim 1, wherein, The second insulation part is divided into a first insulation end part, a second insulation end part and a third insulation end part connected in sequence, the data line and the shielding electrode overlap to form an overlapping area, the second insulation end part is arranged corresponding to the overlapping area, the first insulation end part is arranged on one side of the overlapping area, the third insulation end part is arranged on the other side of the overlapping area, the thickness of the first insulation end part and the thickness of the third insulation end part are greater than the thickness of the second insulation end part, the thickness of the first insulation end part is greater than the thickness of the first insulation part, and the thickness of the third insulation end part is greater than the thickness of the third insulation part.

7. The display panel of claim 1, wherein, The display panel further comprises a scan arrangement layer, the scan arrangement layer comprises a plurality of scan lines, the plurality of scan lines and the plurality of data lines are arranged in one-to-one correspondence, the shielding electrode is arranged in suspension and is not connected with the adjacent two scan lines, the shielding electric field insulation layer is provided with a through hole corresponding to the data line, the data line is partially arranged in the through hole, and the data line is connected with the shielding electrode through the through hole.

8. A method for manufacturing a display panel, characterized by, The method comprises the steps of: providing a substrate; coating an electric field shielding material on the substrate to form an electric field shielding layer; coating a shielding electric field insulation material on the electric field shielding layer, and using a process to form a shielding electric field insulation layer comprising a first insulation part, a second insulation part and a third insulation part; arranging a data line on the shielding electric field insulation layer; forming a first pixel electrode corresponding to the first insulation part on one side of the data line; forming a second pixel electrode corresponding to the third insulation part on one side of the data line to complete the preparation of the array substrate; arranging a color filter substrate in a cell with the array substrate; injecting a liquid crystal layer between the color filter substrate and the array substrate to form a complete display panel; The electric field shielding layer comprises a plurality of shielding electrodes, the second insulation part is arranged corresponding to the shielding electrode, the first insulation part and the third insulation part are arranged away from each other and are connected with the second insulation part respectively, the thickness of the second insulation part is greater than the thickness of the first insulation part and the thickness of the third insulation part; The array substrate further comprises a first pixel electrode and a second pixel electrode, the first pixel electrode is arranged on one side of the data line, the second pixel electrode is arranged on the other side of the data line, and the first pixel electrode and the second pixel electrode are arranged between the liquid crystal layer and the shielding electric field insulation layer. Part of the first pixel electrode on the substrate orthographic projection and the first insulating part on the substrate orthographic projection overlap; Part of the second pixel electrode on the substrate orthographic projection and the third insulating part on the substrate orthographic projection overlap.

9. The method of manufacturing a display panel according to claim 8, wherein, The step of coating the electric field shielding layer with an electric field shielding insulating material to form an electric field shielding insulating layer comprising a first insulating part, a second insulating part and a third insulating part, comprises the steps of: coating the electric field shielding layer with an electric field shielding insulating material; corresponding to the position of the shielding electrode, the transmittance is increased to 4 times by using a mask process.

10. A display device, characterized by comprising: The display panel as claimed in any one of claims 1-7, wherein a backlight module is arranged on one side of the display panel to provide a backlight source for the display panel.

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