A method, device and electronic device for meshing a chip packaging structure

Abstract

The present application relates to a method, device, and electronic device for meshing a chip packaging structure, the method comprising: determining at least one key area in the chip packaging structure; determining at least one layer of area boundaries outside the at least one key area; determining at least one area to be divided according to at least one layer of area boundaries, and obtaining a priority of the area to be divided; and meshing the at least one area to be divided according to the grid density corresponding to the priority of the at least one area to be divided. The technical solution of the present application determines the area to be divided based on the key area in the chip packaging structure, and meshes the area according to the grid density corresponding to the priority of the area to be divided. It can automatically divide the area based on the key position in the chip packaging structure, and reasonably control the number of grids in different areas, thereby ensuring the accuracy and efficiency of the simulation analysis.

Description

Technical Field

[0001] The present application relates to the technical field of integrated chip packaging structures, and in particular to a grid division method, device, electronic device and storage medium for a chip packaging structure. Background Art

[0002] The grid generation of chip packaging structure is a necessary process for numerical simulation of the physical field of chip packaging structure. At this stage, the spatial domain where the physical field is located is decomposed into a large number of discrete units, and each discrete unit will participate in the numerical calculation as a minimum solution unit, where each discrete unit is a grid. Under this premise, the quality of grid division of chip packaging structure has a close impact on the accuracy and efficiency of numerical simulation. Summary of the invention

[0003] In response to the above technical problems, the present application provides a grid division method, device, electronic device and storage medium for a chip packaging structure, which can automatically divide areas based on key positions in the chip packaging structure and reasonably control the number of grids in different areas, thereby ensuring the accuracy and efficiency of simulation analysis.

[0004] In order to solve the above technical problems, the present application provides a method for meshing a chip packaging structure, the method comprising the following steps:

[0005] Determining at least one critical area in the chip package structure;

[0006] Determine at least one layer of area boundary around the at least one key area;

[0007] Determine at least one area to be divided according to the at least one layer of area boundaries, and obtain the priority of the at least one area to be divided;

[0008] The at least one area to be divided is grid-divided according to the grid density corresponding to the priority of the at least one area to be divided.

[0009] In some embodiments, determining at least one critical area in the chip packaging structure includes:

[0010] Acquiring characteristic data of the chip packaging structure;

[0011] The at least one key area is determined according to the characteristic data.

[0012] In some embodiments, determining at least one layer of area boundary around the at least one key area includes:

[0013] Obtaining a priority of the at least one key area;

[0014] Determining area boundary generation parameters according to the priority of the at least one key area;

[0015] The at least one layer of region boundaries is determined at the periphery of the at least one key region according to the region boundary generation parameters.

[0016] In some embodiments, determining the priority of the at least one key area includes at least one of the following:

[0017] When the key area is a power plane, determining the priority of the key area according to the power density of the power plane;

[0018] When the key area is a material block, the priority of the key area is determined according to the thermal conductivity of the material block.

[0019] In some embodiments, the region boundary generation parameters include the number of region boundary layers corresponding to each of the at least one key region and the priority of the region boundary corresponding to each of the at least one key region, and determining the at least one layer of region boundary at the periphery of the at least one key region according to the region boundary generation parameters includes:

[0020] Determining the order of generating the area boundaries according to the priorities of the area boundaries corresponding to the at least one key area;

[0021] The region boundary corresponding to the at least one key region is generated according to the region boundary generation order until the number of layers of the region boundary corresponding to each of the at least one key region reaches the number of the region boundaries corresponding to each of the key regions.

[0022] In some embodiments, the region boundary generation order indicates that the region boundaries are generated in descending order of priority of the region boundaries, and region boundaries of the same priority between different key regions are generated synchronously.

[0023] In some embodiments, generating the at least one layer of region boundaries according to the region boundary generation order includes:

[0024] Determine the currently generated region boundary according to the region boundary generation order;

[0025] Determining whether, in the currently generated area boundary, area boundaries between adjacent key areas meet a first preset condition, and / or whether the currently generated area boundary and an adjacent key area meet a second preset condition;

[0026] If the first preset condition and / or the second preset condition is met, the currently generated area boundary is adjusted.

[0027] In some embodiments, a region boundary close to the corresponding key region has a higher priority than a region boundary far from the key region.

[0028] In some embodiments, determining at least one area to be divided according to the at least one layer of area boundaries and obtaining the priority of the at least one area to be divided includes:

[0029] In the region boundaries corresponding to the at least one key region, the space formed by the region boundaries closest to the key region is used as the region to be divided, and the spaces between the other adjacent layer region boundaries are used as the region to be divided, so as to determine the at least one region to be divided;

[0030] The priority of the area to be divided is obtained according to the distance relationship between the at least one area to be divided and the corresponding key area and / or according to the priority of the area boundary corresponding to the at least one area to be divided.

[0031] In some embodiments, obtaining the priority of the area to be divided according to the distance relationship between the at least one area to be divided and the corresponding key area and / or according to the priority of the area boundary corresponding to the at least one area to be divided includes at least one of the following:

[0032] The priority of the area to be divided decreases in sequence as the distance between the area to be divided and the key area increases;

[0033] The priority of the area to be divided adopts the higher priority in the corresponding area boundary.

[0034] In some embodiments, the grid division of the at least one area to be divided according to the grid density corresponding to the priority of the at least one area to be divided comprises:

[0035] Determine a target area to be divided among the at least one area to be divided;

[0036] Generating a first grid line in the target area to be divided according to a boundary in the target area to be divided;

[0037] According to the grid density corresponding to the priority of the target area to be divided, a second grid line is generated between two adjacent mutually parallel first grid lines to perform grid division on the target area to be divided.

[0038] The present application also provides a chip packaging structure grid division device, comprising:

[0039] A key area determination module, used to determine at least one key area in the chip packaging structure;

[0040] An area boundary determination module, used to determine at least one layer of area boundary around the at least one key area;

[0041] A module for determining an area to be divided, used for determining at least one area to be divided according to the at least one layer of area boundaries, and obtaining a priority of the area to be divided;

[0042] The grid division module is used to perform grid division on the at least one area to be divided according to the grid density corresponding to the priority of the at least one area to be divided.

[0043] The present application also provides an electronic device, including a storage medium and a controller, characterized in that a computer program is stored on the storage medium, and when the computer program is executed by the controller, the steps of the grid division method of the chip packaging structure as described above are implemented.

[0044] The present application also provides a storage medium having a computer program stored thereon. When the computer program is executed by a processor, the steps of the grid division method for the chip packaging structure as described above are implemented.

[0045] The grid division method, device, electronic device and storage medium of the chip packaging structure of the present application include: determining at least one key area in the chip packaging structure; determining at least one layer of area boundary outside the at least one key area; determining at least one area to be divided according to at least one layer of area boundary, and obtaining the priority of the area to be divided; and gridding the at least one area to be divided according to the grid density corresponding to the priority of the at least one area to be divided. The technical solution of the present application determines the area to be divided based on the key area in the chip packaging structure, and performs grid division according to the grid density corresponding to the priority of the area to be divided. It can automatically divide the area based on the key position in the chip packaging structure, and reasonably control the number of grids in different areas, so as to ensure the accuracy and efficiency of simulation analysis. BRIEF DESCRIPTION OF THE DRAWINGS

[0046] Figure 1 The figure is a flow chart of a method for meshing a chip packaging structure according to an embodiment.

[0047] Figure 2 is a schematic diagram showing a key area and its corresponding area boundary according to an embodiment.

[0048] Figure 3 is a schematic diagram showing a sequence for generating area boundaries according to an embodiment.

[0049] Figure 4 It is a schematic diagram showing that the area boundaries of adjacent key areas meet the first condition according to an embodiment.

[0050] Figure 5 It is a schematic diagram showing that a region boundary and an adjacent key region meet the second condition according to an embodiment.

[0051] Figure 6 It is a schematic diagram showing after the first grid lines are generated in the target area to be divided according to an embodiment.

[0052] Figure 7 It is a schematic diagram showing another direction after the first grid lines are generated in the target area to be divided according to an embodiment.

[0053] Figure 8 It is a schematic diagram showing after second grid lines are generated in the target area to be divided according to an embodiment.

[0054] Fig. 9 It is a schematic diagram of another direction after the second grid lines are generated in the target area to be divided according to an embodiment.

[0055] Fig.10 It is a structural schematic diagram of a grid division device for a chip packaging structure according to an embodiment. DETAILED DESCRIPTION

[0056] In order to facilitate the understanding of the present invention, the present invention will be described more fully below with reference to the relevant drawings. The preferred embodiments of the present invention are given in the drawings. However, the present invention can be implemented in many different forms and is not limited to the embodiments described herein. On the contrary, the purpose of providing these embodiments is to make the disclosure of the present invention more thoroughly understood.

[0057] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those generally understood by those skilled in the art of the present invention. The terms used herein in the specification of the present invention are only for the purpose of describing specific embodiments and are not intended to limit the present invention. The term "and / or" used herein includes any and all combinations of one or more related listed items. In the present invention, "each" includes one and more than two quantities.

[0058] Figure 1 FIG. 1 is a flow chart of a method for meshing a chip packaging structure according to an embodiment. Figure 1 As shown, a grid division method of a chip packaging structure of the present application includes the following steps:

[0059] S1, determining at least one key area in the chip packaging structure;

[0060] S2, determining at least one layer of area boundary outside at least one key area;

[0061] S3, determining at least one area to be divided according to at least one layer of area boundaries, and obtaining a priority of at least one area to be divided;

[0062] S4, grid-dividing the at least one area to be divided according to the grid density corresponding to the priority of the at least one area to be divided.

[0063] The chip packaging structure is a chip packaging structure that requires physical field numerical simulation, such as the entire chip packaging structure or a local area in the chip packaging structure. The key area is the area that is focused on during the design process and is also the area that is focused on in the numerical simulation. It is usually a relatively precise area in the chip packaging structure that is more prone to problems.

[0064] Based on the key areas, the chip package structure is meshed for simulation. When determining the area boundaries, each key area can be expanded in three dimensions. Please refer to Figure 2 , each area boundary and its corresponding key area form a nested multi-layer structure, that is, one key area corresponds to multiple nested area boundaries. Each time a region boundary is generated, the range expanded in the three-dimensional direction can be automatically generated or manually set, and the distance between adjacent region boundaries can be equal or unequal.

[0065] Taking the region boundary as the boundary, multiple regions to be divided for mesh division can be delineated. For each key region, the regions to be divided divided by the region boundary outside it have different priorities, wherein the priority of the region to be divided is used to indicate the importance of the region to be divided in numerical simulation. On this basis, the grid density corresponding to the region to be divided is determined based on the priority of the region to be divided. When dividing the grid, the number of grids can be associated with the importance of the corresponding region. Dense grids are drawn for regions with higher importance, and sparse grids are drawn for regions with lower importance. Thus, the analysis accuracy of regions with higher importance is improved, the number of grids in regions with lower importance is reduced, and the efficiency of analysis is improved.

[0066] Through the above method, the area can be automatically divided based on the key positions in the chip packaging structure, which reduces the professional requirements for users and improves the accuracy of the division results. At the same time, the number of grids in different areas can be reasonably controlled to ensure the accuracy and efficiency of simulation analysis.

[0067] In some embodiments, step S1, determining at least one key area in the chip packaging structure, includes:

[0068] Acquire characteristic data of chip packaging structure;

[0069] At least one key area is determined according to the characteristic data.

[0070] The characteristic data includes structural data and / or power data. The structural data includes all the material blocks that make up the chip packaging structure. Each material block has corresponding geometric information and material information. The geometric information includes the shape of the material block (usually a cuboid) and its corresponding spatial position. The material information includes material properties (material parameters required for subsequent simulations, such as thermal conductivity required for thermal simulation, electrical conductivity required for electrical simulation, etc.). The power data includes the power value and spatial distribution of the power devices in the chip packaging structure (because the power devices are located in the device layer of the chip, the thickness of this layer can be almost ignored, so it can be regarded as a rectangular plane with a thickness of 0 in the Z direction, which will not be repeated below).

[0071] Each area that plays an important role in numerical simulation can be used as a key area, such as a power plane or a material block. Considering that various types of boundary conditions need to be set in numerical simulation, the key area can also be a boundary condition plane, and the boundary condition plane can be a rectangular boundary condition plane at any position. The boundary condition refers to the value of the variable to be sought given on the boundary of the solution area or the law of change of the variable based on time and space. The boundary condition plane is a plane formed by the solution area related to the variable to be sought. In some embodiments, from the perspective of heat transfer, the heat in the chip packaging structure mainly comes from the internal power device, and the highest temperature often appears inside or near the power device, which is the key area of ​​numerical simulation. In circuit science, this position is the most precise but also the most prone to problems. It is the area that users focus on. Therefore, the power plane can be selected as the key area by default. In actual implementation, users can also select material blocks or boundary condition planes as key areas as needed.

[0072] In some embodiments, step S2, determining at least one layer of area boundaries around at least one key area, includes:

[0073] Obtaining the priority of at least one key area;

[0074] Determining region boundary generation parameters according to the priority of at least one key region;

[0075] At least one layer of region boundaries is determined at the periphery of at least one key region according to the region boundary generation parameters.

[0076] In some embodiments, when the key area is a material block, the priority of the key area can be determined according to the thermal conductivity of the material block. Generally, the priority of the material block is negatively correlated with its material thermal conductivity. The smaller the material thermal conductivity, the higher the priority. When the key area is a power plane, the priority of the key area is determined according to the power density of the power plane. Generally, the priority of the power plane is positively correlated with its power density. The greater the power density, the higher the priority. A table of priority and power density is set inside the program for algorithm query, as shown in Table 1.

[0077] Table 1. Key area and power density lookup table

[0078]

[0079] In some embodiments, the region boundary generation parameters include the number of region boundary layers corresponding to at least one key region and the priority of the region boundary corresponding to at least one key region, wherein the priority of the region boundary is determined before the region boundary is generated. Generally, the higher the priority of the key region, the more region boundary layers it corresponds to, so that a finer level of grid density division can be performed to improve the accuracy of the analysis. Please refer to Figure 2 , taking the key area with priority 4 as an example, it will generate four layers of area boundaries, and each layer of area boundaries corresponds to priorities 4, 3, 2, and 1 respectively. In some embodiments, the priority of the area boundary is determined according to its distance from the key area, and the priority of the area boundary close to the key area is higher than the priority of the area boundary far from the key area. The priority of the area boundary decreases in sequence as its distance from the key area increases.

[0080] By defining the priority of the region boundary, the generation order of the region boundary can be managed when generating the region boundary, so as to realize the orderly generation of the region boundary. In some embodiments, at least one layer of region boundary is determined around at least one key region according to the region boundary generation parameters, including:

[0081] Determining the order of generating the regional boundaries according to the priorities of the regional boundaries corresponding to at least one key region;

[0082] The region boundary corresponding to at least one key region is generated according to the region boundary generation order until the number of layers of the region boundary corresponding to each of the at least one key region reaches the number of the region boundaries corresponding to each of the key regions.

[0083] When generating the region boundaries, the region boundaries may be generated for each key region one by one, or the region boundaries may be generated for all key regions simultaneously, so as to improve the processing efficiency.

[0084] In some embodiments, when all key areas generate area boundaries synchronously, the area boundary generation order indicates that the area boundaries are generated in order of the priorities from high to low, and the area boundaries of the same priority between different key areas are generated synchronously. Among them, for all key areas, the area boundaries are generated in order of the priorities from high to low. Please refer to 3. The area boundary of the priority 4 of the key area with a priority of 4 is generated first, and then the area boundary of the priority 3 of the key area with a priority of 4 is generated. On the basis of generating area boundaries in order of the priorities from high to low, the area boundaries of the same priority between different key areas are generated synchronously. For example, when there are other key areas with a priority of 4 at the same time, the area boundaries of the priority 4 of these key areas with a priority of 4 are generated synchronously. For another example, Figure 3 The key area with priority 2 shown in the figure, when generating the area boundary of priority 2 of the key area with priority 4, the area boundary of priority 2 of the key area with priority 2 is generated synchronously, and when generating the area boundary of priority 1 of the key area with priority 4, the area boundary of priority 1 of the key area with priority 2 is generated synchronously.

[0085] In some embodiments, the order of generating region boundaries is managed based on the priority of region boundaries, and the region boundaries generated in a specific scenario can be adjusted to avoid overlapping of the regions to be divided and improve the accuracy of the grid division results. In some embodiments, at least one layer of region boundaries is generated according to the order of generating region boundaries, including:

[0086] According to the order in which the region boundaries are generated, the currently generated region boundaries are determined;

[0087] Determine whether the region boundaries of adjacent key regions in the currently generated region boundaries meet a first preset condition, and / or whether the region boundaries of the currently generated region and the adjacent key regions meet a second preset condition;

[0088] If the first preset condition and / or the second preset condition is met, the currently generated region boundary is adjusted.

[0089] The region boundaries of adjacent key regions meet the first preset condition, including at least one of the region boundaries of adjacent key regions intersecting, connecting, or having a distance less than a preset distance value. Figure 4 The figure above illustrates the situation where the region boundary of the priority 2 of the key region with priority 4 intersects with the region boundary of the priority 2 of the key region with priority 2. When the region boundaries of adjacent key regions meet the first preset condition, a merging process is performed between the region boundaries, and the merging process includes:

[0090] Generate a new area boundary surrounding the adjacent key area according to the area boundary of the adjacent key area that meets the first preset condition;

[0091] The region boundary before merging is deleted, and the priority assigned to the new region boundary is the maximum value among the priorities of all region boundaries that meet the first preset condition.

[0092] refer to Figure 4 As shown in the figure below, the new region boundary after the merge process is the new region boundary of priority 2. It can be seen that the new region boundary surrounds both the key region of priority 4 and the key region of priority 2. Afterwards, the region boundary of the next priority is generated based on the adjusted region boundary. At this time, the region boundary of the next priority is located outside the adjusted region boundary.

[0093] The boundary of the currently generated region and the adjacent key region meet the second preset condition, including at least one of the following: the boundary of the currently generated region and the adjacent key region intersect, touch, or the distance between them is less than a preset distance value. Figure 5 The figure above shows the situation where the region boundary of the priority 3 of the key region with priority 4 intersects with the key region with priority 2. When the region boundary currently generated meets the second preset condition with the adjacent key region, since the region boundary with a higher priority is generated earlier, the priority of the adjacent key region must be lower than the priority of the currently generated region boundary. At this time, the priority of the adjacent key region is raised to the same priority as the currently generated region boundary. At the same time, the currently generated region boundary will be readjusted so that its spatial range further includes the adjacent key region and expands to a certain distance in three dimensions. Reference Figure 5 As shown in the figure below, the adjusted new regional boundary is the new regional boundary of priority 3. Afterwards, the regional boundary of the next priority is generated according to the adjusted regional boundary. At this time, the regional boundary of the next priority is located outside the adjusted regional boundary.

[0094] In some embodiments, step S3, determining at least one area to be divided according to at least one layer of area boundaries, and obtaining a priority of at least one area to be divided, includes:

[0095] In the region boundaries corresponding to at least one key region, the space formed by the region boundaries closest to the key region is used as the region to be divided, and the spaces between the region boundaries of other adjacent layers are used as the regions to be divided, so as to determine at least one region to be divided;

[0096] The priority of a region to be divided is obtained according to a distance relationship between at least one region to be divided and a corresponding key region and / or according to a priority of a region boundary corresponding to at least one region to be divided.

[0097] After determining at least one layer of region boundaries, multiple groups of region boundaries in a multi-layer nested relationship are formed, and each group of region boundaries corresponds to one or more key regions. For each group of region boundaries, the space formed by the region boundaries closest to the key region is used as the region to be divided, and the space between the other adjacent layers of region boundaries is used as the region to be divided, so as to determine at least one region to be divided. In other words, the regions to be divided also present a mutually nested relationship. It can be understood that when the region boundaries are generated by the above adjustment method, some of the regions to be divided finally obtained have only one key region (such as Figure 4 In the figure below, the key areas with priority 4 and priority 2 are located in the areas to be divided. Some areas to be divided may have two or more key areas (there are more than two key areas corresponding to the area boundary adjustment), and some areas to be divided may not have key areas (such as Figure 4 The area to be divided does not have a key area in the figure below).

[0098] Next, the priority of a region to be divided is obtained according to the distance relationship between the region to be divided and the corresponding key region, and / or the priority of the region to be divided is obtained according to the priority of the region boundary corresponding to the region to be divided. Among them, the priority of the region to be divided that is closer to the key region is higher (that is, the priority of the region to be divided decreases with the increase of the distance between the region to be divided and the corresponding key region), or the priority of the region to be divided adopts the higher priority of the corresponding region boundary. Therefore, when dividing the grid, the region to be divided that is closer to the key region is drawn with dense grids, and the region to be divided that is farther away from the key region is drawn with sparse grids, which can improve the analysis accuracy of the region with higher importance, reduce the number of grids in the region with lower importance, and improve the efficiency of analysis.

[0099] When generating the areas to be divided, this application takes into account the physical characteristics of the chip packaging structure in thermal simulation and the key positions that the user is concerned about in the simulation. Through reasonable priority settings and area boundary generation algorithms, it is possible to ensure high simulation accuracy while controlling the number of grids.

[0100] In some embodiments, step S4, gridding the at least one area to be divided according to the grid density corresponding to the priority of the at least one area to be divided, includes:

[0101] Determine a target area to be divided among at least one area to be divided;

[0102] Generating a first grid line in the target area to be divided along a boundary in the target area to be divided;

[0103] According to the grid density corresponding to the priority of the target division area, a second grid line is generated between two adjacent mutually parallel first grid lines to perform grid division on the target area to be divided.

[0104] Among them, the target area to be divided is the area currently being gridded, such as Figure 6 As shown in the figure above, the boundaries of the target area to be divided include the area boundary of the target area to be divided, the boundary of the material block, the boundary of the power plane, the boundary of the boundary condition plane, and the boundary of the inner sub-area. The inner sub-area is another area to be divided, and its priority is higher than the target area to be divided. The inner sub-area can be meshed or not, but it does not participate in the meshing of the target area to be divided. In other words, the meshing of different areas to be divided is independent of each other. Please refer to Figure 6 Lower middle picture (top view) and Figure 7 As shown in the front view, the first grid lines are drawn according to these boundaries to ensure that there will be no grids across these boundaries inside the area to be divided, avoiding model errors caused by grid division. The grid inside the inner sub-area is generated independently by the inner sub-area and is not affected by the area currently divided into grids.

[0105] When generating the first grid lines, the first grid lines can be extended along the x, y, and z directions of the chip packaging structure respectively. When the necessary grid lines (first grid lines) are drawn, the interval between two adjacent parallel first grid lines will be automatically filled to generate the second grid lines. At this time, the second grid lines will also be extended along the x, y, and z directions of the chip packaging structure respectively. Figure 8 (Top view) and Fig. 9 (Front view), where the grid lines can be spaced the same or different in the x, y, and z directions. The principle followed by the filling algorithm for the second grid lines is to maintain a smooth transition between adjacent first grid lines to avoid discrete errors caused by abrupt changes in the grid size. At the same time, the maximum size allowed for the grid in each of the three directions of xyz is set to ensure that there will be no excessively large grids that reduce the simulation accuracy. The maximum spacing size of the grid lines in the x, y, and z directions is determined by the priority of the area to be divided. The priority of the area to be divided and the maximum size of the grid in the three directions of xyz can be pre-set in the program for the algorithm to query, as shown in Table 2.

[0106] Table 2. Priority of the area to be divided and the maximum size of the grid lookup table

[0107]

[0108] In some embodiments, the first grid line and the second grid line jointly divide a structured grid, and the structured grid is used to ensure the strict orthogonality of the grid inside the region, thereby minimizing the discrete error caused by the non-orthogonality of the grid inside the region. At the same time, a filling algorithm is used to achieve a smooth transition of the intervals between adjacent grid lines under the maximum size limit of the grid, thereby ensuring that the details of the physical phenomenon are restored to the greatest extent and improving the accuracy of the simulation.

[0109] Fig.10 FIG. 1 is a schematic diagram of a structure of a grid division device for a chip packaging structure according to an embodiment. Fig.10 As shown, the present application also provides a chip packaging structure grid division device, comprising:

[0110] A key area determination module 51, used to determine at least one key area in the chip packaging structure;

[0111] An area boundary determination module 52, configured to determine at least one layer of area boundaries around at least one key area;

[0112] A to-be-divided area determination module 53, configured to determine at least one to-be-divided area according to at least one layer of area boundaries, and obtain a priority of the to-be-divided area;

[0113] The grid division module 54 is used to perform grid division on at least one area to be divided according to the grid density corresponding to the priority of at least one area to be divided.

[0114] In some embodiments, the key area determination module 51 is used to:

[0115] Acquire characteristic data of chip packaging structure;

[0116] At least one key area is determined according to the characteristic data.

[0117] In some embodiments, the region boundary determination module 52 is configured to:

[0118] Obtaining the priority of at least one key area;

[0119] Determining region boundary generation parameters according to the priority of at least one key region;

[0120] At least one layer of region boundaries is determined at the periphery of at least one key region according to the region boundary generation parameters.

[0121] In some embodiments, the key area determination module 51 is configured to perform at least one of the following:

[0122] When the key area is a power plane, the priority of the key area is determined according to the power density of the power plane;

[0123] When the critical area is a material block, the priority of the critical area is determined according to the thermal conductivity of the material block.

[0124] In some embodiments, the region boundary generation parameters include the number of region boundary layers corresponding to at least one key region and the priority of the region boundary corresponding to at least one key region. According to the region boundary generation parameters, at least one layer of region boundary is determined at the periphery of at least one key region. The region boundary determination module 52 is used to:

[0125] Determining the order of generating the regional boundaries according to the priorities of the regional boundaries corresponding to at least one key region;

[0126] The region boundary corresponding to at least one key region is generated according to the region boundary generation order until the number of layers of the region boundary corresponding to each of the at least one key region reaches the number of the region boundaries corresponding to each of the key regions.

[0127] In some embodiments, the region boundary generation order indicates that the region boundaries are generated in descending order of priority of the region boundaries, and region boundaries of the same priority between different key regions are generated synchronously.

[0128] In some embodiments, at least one layer of region boundaries is generated according to the region boundary generation order, and the region boundary determination module 52 is used to:

[0129] According to the order in which the region boundaries are generated, the currently generated region boundaries are determined;

[0130] Determine whether the region boundaries of adjacent key regions in the currently generated region boundaries meet a first preset condition, and / or whether the region boundaries of the currently generated region and the adjacent key regions meet a second preset condition;

[0131] If the first preset condition and / or the second preset condition is met, the currently generated area boundary is adjusted.

[0132] In some embodiments, a region boundary close to the corresponding key region is prioritized over a region boundary far from the key region.

[0133] In some embodiments, at least one area to be divided is determined according to at least one layer of area boundaries, and the priority of at least one area to be divided is obtained. The area to be divided determination module 53 is used to:

[0134] In the region boundaries corresponding to at least one key region, the space formed by the region boundaries closest to the key region is used as the region to be divided, and the spaces between the region boundaries of other adjacent layers are used as the regions to be divided, so as to determine at least one region to be divided;

[0135] The priority of a region to be divided is obtained according to a distance relationship between at least one region to be divided and a corresponding key region and / or according to a priority of a region boundary corresponding to at least one region to be divided.

[0136] In some embodiments, obtaining the priority of a region to be divided according to the distance relationship between at least one region to be divided and the corresponding key region and / or according to the priority of the region boundary corresponding to at least one region to be divided includes at least one of the following:

[0137] The priority of the area to be divided decreases as the distance between the area to be divided and the corresponding key area increases;

[0138] The priority of the area to be divided adopts the higher priority in the corresponding area boundary.

[0139] In some embodiments, the grid division module 54 is used to:

[0140] Determine a target area to be divided among at least one area to be divided;

[0141] Based on the boundary of the target area to be divided, a first grid line is generated in the target area to be divided;

[0142] According to the grid density corresponding to the priority of the target area to be divided, a second grid line is generated between two adjacent mutually parallel first grid lines to perform grid division on the target area to be divided.

[0143] For the specific implementation process of the steps executed by each module in the chip packaging structure grid division device, please refer to the description of the method embodiment and will not be repeated here.

[0144] The present application also provides an electronic device, including a storage medium and a controller, wherein the storage medium stores a computer program, and when the computer program is executed by the controller, the steps of the grid division method of the chip packaging structure described in the above embodiment are implemented.

[0145] The present application also provides a storage medium having a computer program stored thereon. When the computer program is executed by a processor, the steps of the method for meshing the chip packaging structure as described in the above embodiment are implemented.

[0146] The grid division method, device, electronic device and storage medium of the chip packaging structure of the present application include: determining at least one key area in the chip packaging structure; determining at least one layer of area boundary outside the at least one key area; determining at least one area to be divided according to at least one layer of area boundary, and obtaining the priority of the area to be divided; and gridding the at least one area to be divided according to the grid density corresponding to the priority of the at least one area to be divided. The technical solution of the present application determines the area to be divided based on the key area in the chip packaging structure, and performs grid division according to the grid density corresponding to the priority of the area to be divided. It can automatically divide the area based on the key position in the chip packaging structure, and reasonably control the number of grids in different areas, so as to ensure the accuracy and efficiency of simulation analysis.

[0147] The above-mentioned embodiments only express several implementation methods of the present application, and the descriptions thereof are relatively specific and detailed, but they cannot be understood as limiting the scope of the invention patent. It should be pointed out that, for a person of ordinary skill in the art, several variations and improvements can be made without departing from the concept of the present application, and these all belong to the protection scope of the present application. Therefore, the protection scope of the patent of the present application shall be subject to the attached claims.

Claims

1. A method for meshing a chip packaging structure, characterized in that: The method comprises the following steps: Determining at least one critical area in the chip package structure; Determine at least one layer of area boundary around the at least one key area; Determine at least one area to be divided according to the at least one layer of area boundaries, and obtain the priority of the at least one area to be divided according to the distance relationship between the at least one area to be divided and the corresponding key area and / or according to the priority of the area boundary corresponding to the at least one area to be divided; The at least one area to be divided is grid-divided according to the grid density corresponding to the priority of the at least one area to be divided.

2. The method according to claim 1, characterized in that The determining of at least one key area in the chip packaging structure includes: Acquiring characteristic data of the chip packaging structure, wherein the characteristic data includes structure data and / or power data; The at least one key area is determined according to the characteristic data.

3. The method according to claim 1, characterized in that Determining at least one layer of area boundary around the at least one key area includes: Obtaining a priority of the at least one key area; Determining region boundary generation parameters according to the priority of the at least one key region, wherein the region boundary generation parameters include the number of region boundary layers corresponding to each of the at least one key region and the priority of the region boundary corresponding to each of the at least one key region; The at least one layer of region boundaries is determined at the periphery of the at least one key region according to the region boundary generation parameters.

4. The method according to claim 3, characterized in that Determining the at least one layer of area boundaries at the periphery of the at least one key area according to the area boundary generation parameter includes: Determining the order of generating the area boundaries according to the priorities of the area boundaries corresponding to the at least one key area; The region boundary corresponding to the at least one key region is generated according to the region boundary generation order until the number of layers of the region boundary corresponding to each of the at least one key region reaches the number of the region boundaries corresponding to each of the key regions.

5. The method according to claim 4, characterized in that The region boundary generation order indicates that the region boundaries are generated in descending order of priority of the region boundaries, and region boundaries of the same priority between different key regions are generated synchronously.

6. The method according to claim 5, characterized in that Generating the area boundary corresponding to the at least one key area according to the area boundary generation order includes: Determine the currently generated region boundary according to the region boundary generation order; Determining whether, in the currently generated area boundary, area boundaries between adjacent key areas meet a first preset condition, and / or whether the currently generated area boundary and an adjacent key area meet a second preset condition; If the first preset condition and / or the second preset condition is met, the currently generated area boundary is adjusted.

7. The method according to any one of claims 1 to 6, characterized in that The step of determining at least one area to be divided according to the at least one layer of area boundaries includes: In the area boundaries corresponding to the at least one key area, the space formed by the area boundaries closest to the key area is used as the area to be divided, and the spaces between the remaining adjacent layer area boundaries are used as the areas to be divided, so as to determine the at least one area to be divided.

8. The method according to claim 7, characterized in that The obtaining the priority of the area to be divided according to the distance relationship between the at least one area to be divided and the corresponding key area and / or according to the priority of the area boundary corresponding to the at least one area to be divided includes at least one of the following: The priority of the area to be divided decreases in sequence as the distance between the area to be divided and the corresponding key area increases; The priority of the area to be divided adopts the higher priority in the corresponding area boundary.

9. The method according to any one of claims 1 to 6, characterized in that The grid division of the at least one area to be divided according to the grid density corresponding to the priority of the at least one area to be divided comprises: Determine a target area to be divided among the at least one area to be divided; Generating a first grid line in the target area to be divided according to a boundary in the target area to be divided; According to the grid density corresponding to the priority of the target area to be divided, a second grid line is generated between two adjacent mutually parallel first grid lines to perform grid division on the target area to be divided.

10. A grid division device for a chip packaging structure, characterized in that: include: A key area determination module, used to determine at least one key area in the chip packaging structure; An area boundary determination module, used to determine at least one layer of area boundary around the at least one key area; a module for determining an area to be divided, configured to determine at least one area to be divided according to the at least one layer of area boundaries, and to obtain a priority of the area to be divided according to a distance relationship between the at least one area to be divided and a corresponding key area and / or according to a priority of an area boundary corresponding to the at least one area to be divided; The grid division module is used to perform grid division on the at least one area to be divided according to the grid density corresponding to the priority of the at least one area to be divided.

11. An electronic device, comprising a storage medium and a controller, characterized in that: The storage medium stores a computer program, and when the computer program is executed by the controller, the steps of the grid division method of the chip packaging structure according to any one of claims 1 to 9 are implemented.

12. A storage medium, characterized in that: The storage medium stores a computer program, which, when executed by a processor, implements the steps of the grid division method for a chip packaging structure according to any one of claims 1 to 9.

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