A method and system for accelerating image feature processing

Abstract

This invention discloses a method and system for accelerating image feature processing, belonging to the field of image processing technology. The accelerated image feature processing method of this invention constructs an image acquisition model, an image simulation model, a feature capture model, a feature calculation model, and a feature generation model. During rigid image registration, it generates multiple translational image transformation matrices by performing a shift operation on the image correlation matrix, and obtains the image's feature elements based on the image transformation matrices. This allows for more comprehensive and accurate capture of image features, improving registration accuracy and robustness. Simultaneously, constructing a new feature space matrix using these feature elements effectively reduces the matrix order of the original image data, thereby significantly accelerating image feature processing, saving computational resources and time, shortening the feature processing cycle, meeting registration speed requirements, and making image registration more efficient.

Description

Technical Field

[0001] This invention relates to a method and system for accelerating image feature processing, belonging to the field of image processing technology. Background Technology

[0002] Rigid registration is a widely used method in computer vision and image processing, primarily for aligning two or more point clouds, images, or other geometric objects. Rigid registration only allows rotation and translation transformations, without involving scaling or other deformations. In other words, the shape and size of the object remain unchanged in rigid registration. It is used to align images obtained at different time points or using different imaging techniques. However, existing rigid registration methods suffer from the following main problems when performing image feature processing:

[0003] 1. Existing image feature processing algorithms may encounter computational efficiency issues when processing large-scale data, especially in applications that require real-time processing. This necessitates significant computational resources and time, resulting in long feature processing cycles that often fail to meet speed requirements and are not efficient enough.

[0004] 2. The accuracy of existing image feature processing algorithms mainly depends on feature points in the image, but these feature points are difficult to extract comprehensively and accurately, which affects the registration accuracy.

[0005] The information disclosed in this background section is only for understanding the background of the inventive concept, and therefore may include information that does not constitute prior art. Summary of the Invention

[0006] To address the aforementioned problems, or one of them, the present invention aims to provide a method for accelerating image feature processing. By constructing an image acquisition model, an image simulation model, a feature capture model, a feature calculation model, and a feature generation model, image features can be captured more comprehensively and accurately, improving the accuracy and robustness of registration. Simultaneously, by utilizing feature elements to construct a new feature space matrix, the matrix order of the original image data can be effectively reduced, thereby significantly accelerating image feature processing, saving computational resources and time, shortening the feature processing cycle, meeting the requirements for registration speed, and making image registration more efficient.

[0007] To address the aforementioned problems or one of them, the second objective of this invention is to provide a method and system for accelerating image feature processing. During rigid image registration, multiple translational image transformation matrices are generated by shifting the image correlation matrix. Feature elements of the image are then obtained based on these transformation matrices, thereby capturing image features more comprehensively and accurately, improving registration precision and robustness. Simultaneously, constructing a new feature space matrix using these feature elements effectively reduces the matrix order of the original image data, thus accelerating image feature processing, saving computational resources and time, shortening the feature processing cycle, meeting registration speed requirements, and making image registration more efficient.

[0008] To achieve one of the above objectives, the first technical solution of the present invention is as follows:

[0009] A method for accelerating image feature processing includes the following steps:

[0010] Step 1: Obtain at least one image to be registered using a pre-built image acquisition model;

[0011] Step 2: Using a pre-built image simulation model, generate a numerical matrix based on the image to represent the image information;

[0012] Step 3: Using a pre-built feature capture model, the numerical matrix is ​​shifted to generate multiple translational image transformation matrices.

[0013] Step 4: Using a pre-built feature calculation model, perform pairwise bitwise multiplication and summation on the generated image transformation matrix to obtain several feature elements;

[0014] Step 5: Based on the pre-built feature generation model, several feature elements are assembled to obtain a new feature space matrix, which is used to represent the registration feature information of the image; and based on the new feature space matrix, image feature processing is accelerated.

[0015] Through continuous exploration and experimentation, this invention constructs an image acquisition model, an image simulation model, a feature capture model, a feature calculation model, and a feature generation model. This allows for a more comprehensive and accurate capture of image features, improving the precision and robustness of registration. Simultaneously, by utilizing feature elements to construct a new feature space matrix, the matrix order of the original image data can be effectively reduced. This significantly accelerates image feature processing, saves computational resources and time, shortens the feature processing cycle, meets the requirements for registration speed, and makes image registration more efficient.

[0016] As a preferred technical measure:

[0017] Step 3, using a pre-built feature capture model, generates multiple translational image transformation matrices by shifting the numerical matrix as follows:

[0018] Step 31: Shift the numerical matrix 1*n, 2*n, and 3*n rows in the first direction respectively, and shift it down 1*m at the same time to obtain the first numerical matrix, the second numerical matrix, and the third numerical matrix.

[0019] Step 32: Shift the numerical matrix by 1*n, 2*n, and 3*n rows in the first direction, and shift it by 2*m in the second direction to obtain the fourth, fifth, and sixth numerical matrices.

[0020] Step 33: Shift the numerical matrix by 1*n, 2*n, and 3*n rows in the first direction, and shift it by 3*m in the second direction to obtain the seventh, eighth, and ninth numerical matrices.

[0021] Step 34: Fill or expand the blank rows in the first, second, third, fourth, fifth, sixth, seventh, eighth, and ninth numerical matrices to obtain the corresponding first, second, third, fourth, fifth, sixth, seventh, eighth, and ninth response matrices.

[0022] Step 35: Summarize the first response matrix, second response matrix, third response matrix, fourth response matrix, fifth response matrix, sixth response matrix, seventh response matrix, eighth response matrix and ninth response matrix to obtain nine image transformation matrices.

[0023] As a preferred technical measure:

[0024] Both n and m are positive integers, and their values ​​are 1, 2, 3, or 4; or / and, the first direction is right and the second direction is down.

[0025] As a preferred technical measure:

[0026] Step 4: Using a pre-built feature calculation model, the generated image transformation matrix is ​​multiplied pairwise and summed to obtain several feature elements. The method is as follows:

[0027] Step 41: Digitize multiple image transformation matrices to obtain multiple image storage data;

[0028] Step 42: Determine the bit width of each image storage data, and based on the determination result, group the image storage data to obtain a first image storage data group that can be used for accelerated calculation and a second image storage data group that is not used for accelerated calculation.

[0029] Step 43: Using the Single Instruction Multiple Data Stream (SID) algorithm and prefetch instruction, perform two-to-two multiplication and summation calculations on the image storage data in the first image storage data group to obtain the first set of feature elements;

[0030] Step 44: Use the SSE instruction to perform two-by-two multiplication and summation on the image storage data in the second image storage data group to obtain the second group of feature elements;

[0031] Step 45: Summarize the first group of feature elements and the second group of feature elements to obtain several feature elements.

[0032] As a preferred technical measure:

[0033] Step 42, determining the bit width of each image storage data, and based on the determination result, grouping the image storage data to obtain a first image storage data group that can be used for accelerated computation and a second image storage data group that is not used for accelerated computation, is as follows:

[0034] Step 421: Construct the first image storage data group and the second image storage data group, and set the bit width of each element to 32 bits;

[0035] Step 422: Determine whether the bit width of each image storage data is divisible by 256 bits.

[0036] When the data is divisible, the image storage data is stored in the first image storage data group;

[0037] If the image cannot be divided evenly, the image storage data is stored in the second image storage data group.

[0038] As a preferred technical measure:

[0039] The method for performing two-digit multiplication and summation on image storage data is as follows:

[0040] First, load the image storage data in the loop, and get the first row address of the image storage data through the matrix pointer;

[0041] Simultaneously, the prefetch instruction is used to preload the image storage data that needs to be loaded next time, resulting in two matrix variables;

[0042] Then, the vector multiplication function is used to multiply the two matrix variables to obtain the characteristic elements.

[0043] As a preferred technical measure:

[0044] The number of feature elements is eighty-one;

[0045] The feature space matrix is ​​a 9x9 matrix.

[0046] To achieve one of the above objectives, the second technical solution of the present invention is as follows:

[0047] A method for accelerating image feature processing includes the following steps:

[0048] Step 1: Obtain at least one image to be registered using a pre-built image acquisition model;

[0049] Step 2: Using a pre-built image simulation model, generate a numerical matrix based on the image to represent the image information;

[0050] Step 3: Using a pre-built feature capture model, the numerical matrix is ​​shifted to generate multiple translational image transformation matrices.

[0051] Step 4: Using a pre-built feature storage model, multiple image transformation matrices are digitized to obtain multiple sets of image transformation data;

[0052] Step 5: Using a pre-built feature calculation model, a single instruction multiple data stream algorithm and a prefetch instruction are employed to accelerate the processing of multiple sets of image transformation data to obtain several feature elements.

[0053] Step 6: Based on the pre-built feature generation model, several feature elements are assembled to obtain a low-order feature space matrix, thereby accelerating image feature processing.

[0054] Through continuous exploration and experimentation, this invention generates multiple translational image transformation matrices by shifting the image correlation matrix during rigid image registration. Based on these transformation matrices, the feature elements of the image are obtained, enabling more comprehensive and accurate capture of image features and improving registration precision and robustness. Simultaneously, constructing a new feature space matrix using these feature elements effectively reduces the matrix order of the original image data, thereby accelerating image feature processing, saving computational resources and time, shortening the feature processing cycle, and meeting registration speed requirements, resulting in more efficient image registration.

[0055] To achieve one of the above objectives, the third technical solution of the present invention is as follows:

[0056] A method for accelerating image feature processing includes the following:

[0057] Obtain at least one image to be registered;

[0058] Based on the image, a numerical matrix is ​​generated to represent the image information;

[0059] The numerical matrix is ​​shifted to generate multiple image transformation matrices after translation transformation;

[0060] The generated image transformation matrix is ​​multiplied pairwise and summed to obtain several feature elements;

[0061] By assembling several feature elements, a simplified feature space matrix is ​​obtained, thereby accelerating image feature processing.

[0062] This invention can capture image features more comprehensively and accurately, improving the accuracy and robustness of registration. At the same time, by using the feature space matrix for registration, the matrix order of the original image data can be effectively reduced, thereby effectively accelerating image feature processing, saving computing resources and time, shortening the feature processing cycle, meeting the requirements for registration speed, and making image registration more efficient.

[0063] To achieve one of the above objectives, the fourth technical solution of the present invention is as follows:

[0064] An accelerated image feature processing system, comprising:

[0065] One or more processors;

[0066] Storage device for storing one or more programs;

[0067] When the one or more programs are executed by the one or more processors, the one or more processors implement the above-described method for accelerating image feature processing.

[0068] Compared with existing technical solutions, the present invention has the following beneficial effects:

[0069] Through continuous exploration and experimentation, this invention constructs an image acquisition model, an image simulation model, a feature capture model, a feature calculation model, and a feature generation model. This allows for a more comprehensive and accurate capture of image features, improving the precision and robustness of registration. Simultaneously, by utilizing feature elements to construct a new feature space matrix, the matrix order of the original image data can be effectively reduced. This significantly accelerates image feature processing, saves computational resources and time, shortens the feature processing cycle, meets the requirements for registration speed, and makes image registration more efficient.

[0070] Furthermore, through continuous exploration and experimentation, this invention generates multiple displacement-transformed image transformation matrices by performing a shift operation on the image correlation matrix during rigid image registration. Based on these image transformation matrices, the feature elements of the image are obtained, thereby capturing image features more comprehensively and accurately, improving the accuracy and robustness of registration. Simultaneously, constructing a new feature space matrix using these feature elements effectively reduces the matrix order of the original image data, thus accelerating image feature processing, saving computational resources and time, shortening the feature processing cycle, meeting the requirements for registration speed, and making image registration more efficient. Attached Figure Description

[0071] Figure 1 This is a flowchart of an accelerated image feature processing method according to the present invention;

[0072] Figure 2 This is a flowchart of a single instruction multiple data stream algorithm of the present invention;

[0073] Figure 3 This is a schematic diagram of the cache structure of the present invention;

[0074] Figure 4 This is another flowchart of an accelerated image feature processing method according to the present invention. Detailed Implementation

[0075] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the invention.

[0076] Conversely, this invention encompasses any substitutions, modifications, equivalent methods, and solutions made within the spirit and scope of the invention as defined in the claims. Furthermore, to provide a better understanding of the invention, certain specific details are described in detail below. However, those skilled in the art will fully understand the invention even without these detailed descriptions.

[0077] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention pertains. The terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit the invention. The term "or / and" as used herein includes any and all combinations of one or more of the associated listed items.

[0078] like Figure 1 As shown, this is a first specific embodiment of an accelerated image feature processing method of the present invention:

[0079] A method for accelerating image feature processing includes the following steps:

[0080] Step 1: Obtain at least one image to be registered using a pre-built image acquisition model;

[0081] Step 2: Using a pre-built image simulation model, generate a numerical matrix based on the image to represent the image information;

[0082] Step 3: Using a pre-built feature capture model, the numerical matrix is ​​shifted to generate multiple translational image transformation matrices.

[0083] Step 4: Using a pre-built feature calculation model, perform pairwise bitwise multiplication and summation on the generated image transformation matrix to obtain several feature elements;

[0084] Step 5: Based on the pre-built feature generation model, several feature elements are assembled to obtain a new feature space matrix, which is used to represent the registration feature information of the image, thereby accelerating image feature processing.

[0085] In this embodiment, step 3, which uses a pre-built feature capture model to perform a shifting operation on the numerical matrix to generate multiple translational image transformation matrices, is as follows:

[0086] Step 31: Shift the numerical matrix 1*n, 2*n, and 3*n rows in the first direction respectively, and shift it down 1*m at the same time to obtain the first numerical matrix, the second numerical matrix, and the third numerical matrix.

[0087] Step 32: Shift the numerical matrix by 1*n, 2*n, and 3*n rows in the first direction, and shift it by 2*m in the second direction to obtain the fourth, fifth, and sixth numerical matrices.

[0088] Step 33: Shift the numerical matrix by 1*n, 2*n, and 3*n rows in the first direction, and shift it by 3*m in the second direction to obtain the seventh, eighth, and ninth numerical matrices.

[0089] Step 34: Fill or expand the blank rows in the first, second, third, fourth, fifth, sixth, seventh, eighth, and ninth numerical matrices to obtain the corresponding first, second, third, fourth, fifth, sixth, seventh, eighth, and ninth response matrices.

[0090] Step 35: Summarize the first response matrix, second response matrix, third response matrix, fourth response matrix, fifth response matrix, sixth response matrix, seventh response matrix, eighth response matrix and ninth response matrix to obtain nine image transformation matrices.

[0091] In this embodiment, n and m are both 1; the first direction is right and the second direction is down.

[0092] In this embodiment, step 4, using a pre-built feature calculation model, involves performing pairwise bitwise multiplication and summation on the generated image transformation matrix to obtain several feature elements, as follows:

[0093] Step 41: Digitize multiple image transformation matrices to obtain multiple image storage data;

[0094] Step 42: Determine the bit width of each image storage data, and based on the determination result, group the image storage data to obtain a first image storage data group that can be used for accelerated calculation and a second image storage data group that is not used for accelerated calculation.

[0095] Step 43: Using the Single Instruction Multiple Data Stream (SID) algorithm and prefetch instruction, perform two-to-two multiplication and summation calculations on the image storage data in the first image storage data group to obtain the first set of feature elements;

[0096] Step 44: Use the SSE instruction to perform two-by-two multiplication and summation on the image storage data in the second image storage data group to obtain the second group of feature elements;

[0097] Step 45: Summarize the first group of feature elements and the second group of feature elements to obtain several feature elements.

[0098] In this embodiment, step 42, which involves determining the bit width of each image storage data and grouping the image storage data based on the determination result to obtain a first image storage data group that can be used for accelerated computation and a second image storage data group that is not used for accelerated computation, is as follows:

[0099] Step 421: Construct the first image storage data group and the second image storage data group, and set the bit width of each element to 32 bits;

[0100] Step 422: Determine whether the bit width of each image storage data is divisible by 256 bits.

[0101] When the data is divisible, the image storage data is stored in the first image storage data group;

[0102] If the image cannot be divided evenly, the image storage data is stored in the second image storage data group.

[0103] In this embodiment, the method for performing two-digit multiplication and summation calculations on the image storage data is as follows:

[0104] First, load the image storage data in the loop, and get the first row address of the image storage data through the matrix pointer;

[0105] Simultaneously, the prefetch instruction is used to preload the image storage data that needs to be loaded next time, resulting in two matrix variables;

[0106] Then, the vector multiplication function is used to multiply the two matrix variables to obtain the characteristic elements.

[0107] In this embodiment, the number of feature elements is eighty-one;

[0108] The feature space matrix is ​​a 9x9 matrix.

[0109] A second specific embodiment of the method for accelerating image feature processing according to the present invention:

[0110] A method for accelerating image feature processing includes the following steps:

[0111] Step 1: Obtain at least one image to be registered using a pre-built image acquisition model;

[0112] Step 2: Using a pre-built image simulation model, generate a numerical matrix based on the image to represent the image information;

[0113] Step 3: Using a pre-built feature capture model, the numerical matrix is ​​shifted to generate multiple translational image transformation matrices.

[0114] Step 4: Using a pre-built feature storage model, multiple image transformation matrices are digitized to obtain multiple sets of image transformation data;

[0115] Step 5: Using a pre-built feature calculation model, a single instruction multiple data stream algorithm and a prefetch instruction are employed to accelerate the processing of multiple sets of image transformation data to obtain several feature elements.

[0116] Step 6: Based on the pre-built feature generation model, several feature elements are assembled to obtain a low-order feature space matrix, thereby accelerating image feature processing.

[0117] like Figure 2 , Figure 3 , Figure 4 As shown, this is a third specific embodiment of an accelerated image feature processing method of the present invention:

[0118] An accelerated image feature processing method is an optimization method for calculating rigid registration, which optimizes some operations in rigid registration. Specifically, it includes the following steps:

[0119] S1. Initialize and set relevant variables, including the following:

[0120] intwidth_mul=sizeof(_m256) / sizeof(float)

[0121] intveclen_mul=(A.cols / width_mul)*width_mul

[0122] The `width_mul` variable is used to calculate the amount of float data that can be stored in a 256-bit length, serving as the interval for subsequent data loading in a loop. The `veclen_mul` variable is used to calculate the length of data that can be stored in `_m256`. Data exceeding the `_m256` length (data exceeding the `_m256` variable) needs to be calculated using the standard SSE instruction set, while data smaller than the `_m256` length can be accelerated using SIMD.

[0123] S2. Load data in the loop, which includes the following:

[0124] const float*mat1_row_ptr=A.ptr <float>(i);

[0125] constfloat*mat2_row_ptr=B.ptr <float>(i);

[0126] const float*mat3_row_ptr=C.ptr <float>(i);

[0127] The loop needs to load data from the matrices for later use. The first row pointer array `mat1_row_ptr` takes the address of the first row of matrix A, the second row pointer array `mat2_row_ptr` takes the address of the first row of matrix B, and the third row pointer array `mat3_row_ptr` takes the address of the first row of matrix C. This is for subsequent calculations. Next, a prefetch instruction is used to preload the data that will be loaded next. This reduces subsequent loading time.

[0128] First, it checks if the data for the next calculation exists. If it does, the prefetch function `_mm_prefetch` is executed. `_mm_prefetch` translates into `PREFETCH` instructions, which are executed in the system. Its purpose is to load the next data at the appropriate time, and its expression is as follows:

[0129] mat1_row_ptr+j+width_mul, mat2_row_ptr+j+width_mul, mat3_row_ptr+j+width_mul

[0130] That is, the address of the data needed for the next calculation, and its specific code instructions are as follows:

[0131] if(j+step_size <veclen_mul)

[0132] {

[0133] _mm_prefetch(mat1_row_ptr+j+width_mul,_MM_HINT_NTA);

[0134] _mm_prefetch(mat2_row_ptr+j+width_mul,_MM_HINT_NTA);

[0135] _mm_prefetch(mat3_row_ptr+j+width_mul,_MM_HINT_NTA);

[0136] }

[0137] This part is also an optimization in the invention: preloading the data needed for the next calculation during the calculation to reduce the time consumption.

[0138] Then, three matrix loading variables _m256 are used to retrieve data from matrices A, B, and C for later calculations. The matrix loading instruction _mm256_loadu_ps can load 256 bits of data at a time, which is larger than the data loaded by SSE. The specific code instruction is shown below:

[0139] __m256load_mat1_a1=_mm256_loadu_ps(mat1_row_ptr+j);

[0140] __m256load_mat2_a1=_mm256_loadu_ps(mat2_row_ptr+j);

[0141] __m256load_mat3_a1=_mm256_loadu_ps(mat3_row_ptr+j);

[0142] S3. The calculations are performed in a loop, including the following:

[0143] The vector multiplication instruction `_mm256_mul_ps` is used to multiply the `_mm256` variables. The first statement multiplies the data of matrix A obtained in the previous step by the data of matrix B obtained in the previous step. The second statement multiplies the data of the loaded matrix A by the corresponding data of matrix C. The specific code instructions are as follows:

[0144] mul_resultd1=_mm256_mul_ps(load_mat1_a1,load_mat2_a1);

[0145] mul_resultd2=_mm256_mul_ps(load_mat1_a1,load_mat3_a1);

[0146] The vector multiplication instruction _mm256_mul_ps is used for multiplication calculations, which can perform 256-bit multiplications at a time. This allows for the calculation of more bits per instruction, thus speeding up the calculation process.

[0147] Here, the `_mm256_add_ps` instruction is used to add the `_mm256` variables. The first statement adds a portion of the data from the loaded matrix A to the corresponding data from matrix B, resulting in the first summary variable `sum_result1`. The second statement adds a portion of the data from the loaded matrix A to the corresponding data from matrix C, resulting in the second summary variable `sum_result2`. The specific code instructions are shown below:

[0148] sum_result1=_mm256_add_pd(sum_result1,mul_resultd1);

[0149] sum_result2=_mm256_add_pd(sum_result2,mul_resultd2);

[0150] The vector addition function `_mm256_add_pd` is used for addition calculations, allowing for the addition of 256 bits of data at a time. This is part of the optimization in the invention, ensuring that data for calculating matrix A is not repeatedly loaded; the calculation is completed in a single load. Traditionally, using OpenCV library functions results in matrix A being loaded twice. This increases the cache hit rate, thereby speeding up the calculation and reducing processing time.

[0151] After completing the current calculation, load subsequent data in a loop until all data has been processed.

[0152] S4. General calculations, which include the following:

[0153] The data that meets the 256-bit width requirement was processed using the AVX256 instruction set. To support cases where the data may not be divisible by 256, processing is added for data that does not meet the 256-bit width requirement. This remaining data is processed using ordinary SSE instructions, the specific code of which is shown below:

[0154] sum1+=double(mat1_row_ptr[j]*mat2_row_ptr[j]);

[0155] sum2+=double(mat1_row_ptr[j]*mat3_row_ptr[j]);

[0156] The first statement multiplies a portion of the data in matrix A by the corresponding data in matrix B, and then adds the result to the third summary variable, sum1.

[0157] The second statement multiplies a portion of the data in matrix A by the corresponding data in matrix C and then adds the result to the fourth summary variable, sum2.

[0158] S5. Summarize the results, which include the following:

[0159] The results of the previous calculations are divided into two parts. One part is stored in the first summary variable `sum_result1` and the second summary variable `sum_result2`, calculated according to the AVX256 instruction set. The other part is stored in the third summary variable `sum1` and the fourth summary variable `sum2`. These two parts need to be summed. Since the result of the first part is of type `_mm256`, it needs to be changed to type `float`. Therefore, it is necessary to loop `width_sum` times to add the float data in `_mm256` to the third summary variable `sum1` and the fourth summary variable `sum2` respectively. This summarizes the two parts together. The specific code instructions are shown below:

[0160] for(int i = 0; i <width_sum;++i)

[0161] {

[0162] sum1+=tmp_sum1[i];

[0163] sum2+=tmp_sum2[i];

[0164] }

[0165] Finally, sum1 and sum2 are the results of the calculation.

[0166] In this embodiment, SIMD technology is used (see...). Figure 2 This includes rigid registration algorithms that use instruction prefetching for acceleration. SIMD, short for Single Instruction Multiple Data, is a performance optimization technique based on a specific CPU instruction set. As the name suggests, it refers to the ability to perform calculations on multiple data items simultaneously during the execution of a single CPU instruction. This results in performance improvements of several times or even tens of times in data-intensive computing scenarios such as scientific computing and multimedia applications. For computer cache structures, see... Figure 3 Data can be retrieved faster in cache1, thus speeding up data retrieval by placing data in a closer cache. Prefetching refers to fetching instructions or data from slower memory to a faster local cache before they are actually needed, thereby improving execution performance; hence the name "prefetching".

[0167] A specific embodiment of the present invention for fast rigid image registration:

[0168] A fast rigid registration method for images includes the following steps:

[0169] The first step is to acquire two or more images to be registered using a pre-built image acquisition model;

[0170] The second step is to apply one of the above-mentioned accelerated image feature processing methods to process two or more images to obtain a corresponding number of feature space matrices.

[0171] The third step is to perform fast rigid registration on two or more images based on the corresponding feature space matrix.

[0172] In this embodiment, during rigid image registration, multiple translated image matrices are generated by shifting the image correlation matrix. These image matrices help to comprehensively and accurately capture image features, improving the accuracy and robustness of registration. During the translation process, to handle any empty rows or columns, filling methods, edge expansion, or cyclic filling can be used to process these empty rows, ensuring the integrity of the image matrix.

[0173] In this embodiment, the translation step size can be selected as 1, 2, or 3 rows, achieving a good balance between computational complexity and feature capture capability. The translation step size is an adjustable parameter that can be optimized according to actual needs. A larger translation step size can capture richer image features, but it will also increase computational complexity. Therefore, a trade-off needs to be struck between accuracy and efficiency.

[0174] In this embodiment, the feature matrix is ​​constructed by summing pairwise matrix multiplications, which essentially calculates the dot product between different translation positions. The dot product operation measures the alignment of two vectors (the translated image matrix) and captures the correlation features of the image at different translation positions. This method helps improve registration accuracy and forms a new feature space with a lower dimension than the original data, while retaining important similarity information. The resulting feature matrix can be viewed as the feature response matrix of the image at different translation positions, containing the registration feature information of the image. The accelerated image feature processing method of this invention is also applied at this stage, optimizing the calculation speed of pairwise matrix multiplications. Using the original scheme and the improved rigid registration with 10,000 input images, this invention can improve the speed by approximately 50%.

[0175] Furthermore, the improved rigid registration scheme of this invention was compared with the rigid registration scheme in the prior art. The test measured the time required to perform rigid registration on a 2048*2048 matrix, using 10,000 sets of data. The final results showed that the prior art scheme took nearly 10 seconds to complete one execution, while the scheme of this invention only took 5 seconds. This invention is twice as fast as the prior art scheme, thus improving the efficiency of the rigid registration algorithm.

[0176] A system embodiment of the accelerated image feature processing method of the present invention:

[0177] An accelerated image feature processing system, comprising:

[0178] One or more processors;

[0179] Storage device for storing one or more programs;

[0180] When the one or more programs are executed by the one or more processors, the one or more processors implement the above-described method for accelerating image feature processing.

[0181] An embodiment of a computer medium applying the method of the present invention:

[0182] A computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements the above-described method for accelerating image feature processing.

[0183] Those skilled in the art will understand that embodiments of this application can be provided as methods, systems, or computer program products. Therefore, this application can take the form of a completely hardware embodiment, a completely software embodiment, or an embodiment combining software and hardware aspects. Furthermore, this application can take the form of a computer program product embodied on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.

[0184] This application is described with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of this application. It will be understood that each block of the flowchart illustrations and / or block diagrams, as well as combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, special-purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create a machine for implementing the flowchart. Figure 1 One or more processes and / or boxes Figure 1 A device that provides the functions specified in one or more boxes.

[0185] These computer program instructions may also be stored in a computer-readable storage medium that can direct a computer or other programmable data processing device to function in a particular manner, such that the instructions stored in the computer-readable storage medium produce an article of manufacture including instruction means, which are implemented in a process Figure 1 One or more processes and / or boxes Figure 1 The function specified in one or more boxes.

[0186] These computer program instructions may also be loaded onto a computer or other programmable data processing equipment to cause a series of operational steps to be performed on the computer or other programmable equipment to produce a computer-implemented process, thereby providing instructions that execute on the computer or other programmable equipment for implementing the process. Figure 1 One or more processes and / or boxes Figure 1 The steps of the function specified in one or more boxes.

[0187] The model in this application is an object that uses physical or virtual representation to objectively describe the form and structure. The object is not the same as a physical object, and is not limited to physical or virtual. It can be a data processing function, software program, processing mode, usage method, operation mode, workflow, application process, electronic hardware, circuit module, processing system, system imitation or simulation object.

[0188] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention and not to limit it. Although the present invention has been described in detail with reference to the above embodiments, those skilled in the art can still modify or make equivalent substitutions to the specific implementation of the present invention. Any modifications or equivalent substitutions that do not depart from the spirit and scope of the present invention should be covered within the protection scope of the claims of the present invention.< / float> < / float> < / float>

Claims

1. A method for accelerating image feature processing, characterized in that: Includes the following steps: Step 1: Obtain at least one image to be registered using a pre-built image acquisition model; Step 2: Using a pre-built image simulation model, generate a numerical matrix based on the image to represent the image information; Step 3: Using a pre-built feature capture model, the numerical matrix is ​​shifted to generate multiple translational image transformation matrices; the method is as follows: Step 31: Shift the numerical matrix 1*n, 2*n, and 3*n rows in the first direction respectively, and shift it down 1*m at the same time to obtain the first numerical matrix, the second numerical matrix, and the third numerical matrix. Step 32: Shift the numerical matrix by 1*n, 2*n, and 3*n rows in the first direction, and shift it by 2*m in the second direction to obtain the fourth, fifth, and sixth numerical matrices. Step 33: Shift the numerical matrix by 1*n, 2*n, and 3*n rows in the first direction, and shift it by 3*m in the second direction to obtain the seventh, eighth, and ninth numerical matrices. Step 34: Fill or expand the blank rows in the first, second, third, fourth, fifth, sixth, seventh, eighth, and ninth numerical matrices to obtain the corresponding first, second, third, fourth, fifth, sixth, seventh, eighth, and ninth response matrices. Step 35: Summarize the first response matrix, second response matrix, third response matrix, fourth response matrix, fifth response matrix, sixth response matrix, seventh response matrix, eighth response matrix and ninth response matrix to obtain nine image transformation matrices; Step 4: Using a pre-built feature calculation model, perform pairwise bitwise multiplication and summation on the generated image transformation matrix to obtain several feature elements; The method is as follows: Step 41: Digitize multiple image transformation matrices to obtain multiple image storage data; Step 42: Determine the bit width of each image storage data, and based on the determination result, group the image storage data to obtain a first image storage data group that can be used for accelerated calculation and a second image storage data group that is not used for accelerated calculation. Step 43: Using the Single Instruction Multiple Data Stream (SID) algorithm and prefetch instruction, perform two-to-two multiplication and summation calculations on the image storage data in the first image storage data group to obtain the first group of feature elements; Step 44: Use the SSE instruction to perform two-by-two multiplication and summation on the image storage data in the second image storage data group to obtain the second group of feature elements; Step 45: Summarize the first group of feature elements and the second group of feature elements to obtain several feature elements; Step 5: Based on the pre-built feature generation model, several feature elements are assembled to obtain a new feature space matrix, which is used to represent the registration feature information of the image; and based on the new feature space matrix, image feature processing is accelerated.

2. The method for accelerating image feature processing as described in claim 1, characterized in that: Both n and m are positive integers, and their values ​​are 1, 2, 3, or 4; or / and, the first direction is right and the second direction is down.

3. The method for accelerating image feature processing as described in claim 1, characterized in that: Step 42, determining the bit width of each image storage data, and based on the determination result, grouping the image storage data to obtain a first image storage data group that can be used for accelerated computation and a second image storage data group that is not used for accelerated computation, is as follows: Step 421: Construct the first image storage data group and the second image storage data group, and set the bit width of each element to 32 bits; Step 422: Determine whether the bit width of each image storage data is divisible by 256 bits. When the data is divisible, the image storage data is stored in the first image storage data group; If the image cannot be divided evenly, the image storage data is stored in the second image storage data group.

4. The method for accelerating image feature processing as described in claim 3, characterized in that: The method for performing two-digit multiplication and summation on image storage data is as follows: First, load the image storage data in the loop, and get the first row address of the image storage data through the matrix pointer; Simultaneously, the prefetch instruction is used to preload the image storage data that needs to be loaded next time, resulting in two matrix variables; Then, the vector multiplication function is used to multiply the two matrix variables to obtain the characteristic elements.

5. The method for accelerating image feature processing as described in claim 1, characterized in that: The number of feature elements is eighty-one; The feature space matrix is ​​a 9x9 matrix.

6. An accelerated image feature processing system, characterized in that: It includes: One or more processors; Storage device for storing one or more programs; When the one or more programs are executed by the one or more processors, the one or more processors implement an accelerated image feature processing method as described in any one of claims 1-5.

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