A device and method for intelligently measuring dynamic on-resistance of a power semiconductor switch tube

Abstract

The present invention provides an intelligent measurement device and method for the dynamic on-resistance of a power semiconductor switch tube, a power switch tube characteristic characterization sampling system, which measures and characterizes the influence of dynamic drain voltage stress on the dynamic on-resistance of a power device to be measured, and performs sampling, operation, analysis and processing on the parameters of the power device to be measured; a temperature monitoring precision control system, which performs temperature monitoring during the measurement process and reliability evaluation of test data; a data acquisition automatic processing system, which automatically processes signal interference and measurement errors during the measurement data acquisition process; a test process intelligent analysis system, which intelligently analyzes the test process, adjusts test parameters and test conditions, and optimizes the test process; the present invention significantly prolongs the voltage stress application time and greatly optimizes the dynamic characteristic mechanism analysis.

Description

Technical Field

[0001] The present invention relates to the technical field of electronic circuits, and in particular to an intelligent measurement device and method for the dynamic on-resistance of a power semiconductor switch tube. Background Art

[0002] With the development of power semiconductor technology, power field effect transistors, as core components of power electronics technology, are increasingly widely used and are closely related to people's daily lives. At present, power field effect transistor devices are mainly Si-based devices, but due to the limitations of the switching speed and efficiency of Si-based power transistors, Si-based power transistors can no longer meet the needs of increased operating frequency, increased power density, and improved power conversion efficiency. Compared with Si-based devices, the third-generation wide bandgap semiconductor power devices (GaN devices and SiC devices) have the advantages of high withstand voltage, low on-resistance, and fast switching speed. They can meet the needs of increased operating frequency, increased power density, and improved power conversion efficiency, and are widely used in high voltage, medium and large power, and high switching frequency applications.

[0003] However, due to the characteristics of the materials used to prepare power field effect transistors, the dynamic characteristics of GaN and SiC field effect transistors have poor stability. Specifically, after the GaN field effect transistor is subjected to off-state drain voltage stress for a period of time, the device's on-resistance and threshold voltage and other characteristics will change. This instability of the device will affect the stability and safety of the circuit system, and in severe cases, the circuit system will not work properly. Therefore, in order to ensure the qualification and reliability of power field effect transistors, it is necessary to conduct strict and comprehensive testing and characterization of the dynamic on-resistance of power field effect transistors.

[0004] However, in the existing testing devices and methods, such as the document with application number CN202310239773.4, a method and device for characterizing the dynamic on-resistance of a power semiconductor field effect transistor is provided. After applying different drain voltages to the power field effect transistor, the on-resistance of the device is measured. However, the measurement method of this scheme does not solve the problem of measurement delay. There is a time lag in the process from when the device is subjected to drain voltage stress to when the dynamic on-resistance of the device is measured. It is impossible to avoid the problem of inaccurate on-resistance measurement results caused by defect recovery of the device within a period of time after the device stops working. Therefore, it is necessary to provide an intelligent measurement device and method for the dynamic on-resistance of a power semiconductor switch tube to partially solve the technical problems existing in the prior art. Summary of the invention

[0005] The present invention provides an intelligent measurement device and method for the dynamic on-resistance of a power semiconductor switch tube. By measuring the electrical parameters after applying drain voltage stress to the power device to be measured, data on the influence of different drain voltage stresses on the dynamic on-resistance of the device can be obtained; and by controlling whether the load resistor is connected, the application time of the drain voltage stress can be adjusted, the measurement delay can be reduced, and the measurement accuracy of the dynamic on-resistance can be improved.

[0006] The present invention provides an intelligent measurement device for dynamic on-resistance of a power semiconductor switch tube, comprising:

[0007] The power switch tube characteristic characterization sampling system measures and characterizes the influence of dynamic drain voltage stress on the dynamic on-resistance of the power device to be measured, and performs sampling, calculation and analysis on the parameters of the power device to be measured;

[0008] Temperature monitoring precision control system to monitor the temperature during the measurement process and evaluate the reliability of test data;

[0009] Data acquisition automatic processing system, automatically processing signal interference and measurement errors during measurement data acquisition;

[0010] The test process intelligent analysis system can intelligently analyze the test process, adjust the test parameters and test conditions, and optimize the test process;

[0011] The power switch tube characteristic characterization sampling system includes: a dynamic characteristic characterization circuit module and an electrical parameter acquisition calculation analysis processing module; the dynamic characteristic characterization circuit module includes: a drive signal output control circuit and a voltage stress time control circuit;

[0012] The dynamic characteristic characterization circuit module generates multiple sets of drive signals by using the drive signal output control circuit; applies drain voltage stress to the power device under test DUT according to the received drive signal through the voltage stress time control circuit, and enters the drain voltage stress application stage;

[0013] When the drain voltage stress application phase ends, the voltage stress time control circuit turns on the power device under test DUT according to the received driving signal and enters the on-resistance measurement phase;

[0014] A voltage stress time control circuit applies voltage stress to the drain of the power device to be tested, clamps and obtains the on-state voltage drop of the power device to be tested;

[0015] The electrical parameter acquisition, calculation, analysis and processing module is used to sample the on-state voltage drop and on-state current of the power device to be tested, and calculate the dynamic on-state resistance Ron of the power device to be tested;

[0016] The current Is on the current detection resistor Rs and the voltage Va across the diode D3 in the clamping circuit are sampled and acquired through the electrical parameter data acquisition module; V_D1_on represents the voltage across the diode D1;

[0017] According to the formula: Ron=(Va-V_D1_on) / Is, the dynamic on-resistance Ron of the power device under test DUT is obtained.

[0018] Preferably, the voltage stress time control circuit comprises: a switch transistor Q1 is connected in parallel at both ends of a load resistor R1; a drive signal output control circuit comprises an output pin 1 and an output pin 2;

[0019] Output pin 1 and output pin 2 respectively send the first drive signal and the second drive signal of the plurality of drive signals to the voltage stress time control circuit; the first drive signal of the plurality of drive signals controls the on-off of the first transistor, and the second drive signal of the plurality of drive signals controls the on-off of the second transistor;

[0020] One end of the positive electrode of the input capacitor Ci n is connected to the positive electrode of the high-voltage power supply Vin, and the other end of the input capacitor Ci n is connected to the negative electrode of the high-voltage power supply Vin.

[0021] Preferably, the temperature monitoring precision control system includes:

[0022] The temperature monitoring module of the power device to be tested is used to monitor the temperature of the power device to be tested in real time during the measurement process and obtain the process temperature of the power device to be tested;

[0023] The measurement process environment temperature monitoring module is used to monitor the environment temperature of the measurement device and obtain the measurement process environment temperature;

[0024] According to the process temperature of the power device to be tested and the ambient temperature of the measurement process, the reliability of the test data is evaluated; whether the process temperature of the power device to be tested has temperature anomalies, and the impact of the ambient temperature of the measurement process on the measurement status of the measuring element and the power device to be tested is evaluated.

[0025] Preferably, the data acquisition automatic processing system includes:

[0026] Signal interference shielding module, used for filtering and shielding signal interference during measurement data acquisition;

[0027] The measurement error compensation module is used to perform statistical processing on the errors of the measurement data and obtain measurement error statistical data.

[0028] Preferably, the test process intelligent analysis system includes:

[0029] The test process tracking intelligent analysis module intelligently analyzes the test process parameters according to the test process parameters and the test environment status, analyzes whether the dynamic on-resistance of the power device to be tested meets the reference dynamic on-resistance, and obtains the dynamic on-resistance analysis results;

[0030] The test parameter condition automatic adjustment module automatically corrects the process temperature offset of the power device to be tested according to the output dynamic on-resistance analysis results; it optimizes the error compensation of the measurement error statistics according to the measurement error statistics, and intelligently adjusts and optimizes the test process;

[0031] In the drain voltage stress application stage, whether the load resistor R1 is connected to the power circuit to limit the current and consume energy is controlled by controlling the on and off of the switching transistor Q1; when the switching transistor Q1 is turned on, the load resistor R1 is not connected to the power circuit, and does not consume energy in the freewheeling circuit in the voltage stress application stage, thereby reducing the falling speed of the inductor freewheeling current, so that the inductor current will not drop to zero in the drain voltage stress application stage, reducing the measurement delay of the on-resistance, and controlling the measurement accuracy; when the switching transistor Q1 is turned off, the load resistor R1 is connected to the power circuit to limit the current and consume energy, so that the circuit current will not continue to rise in the multi-pulse test, and the current over-limit program will be avoided; whether the load resistor R1 is connected or not can regulate the drain voltage stress application time.

[0032] The present invention provides an intelligent method for measuring the dynamic on-resistance of a power semiconductor switch tube, comprising:

[0033] S1, measuring and characterizing the influence of dynamic drain voltage stress on dynamic on-resistance of the power device to be measured, and performing sampling, calculation and analysis on parameters of the power device to be measured;

[0034] S2, conduct temperature monitoring during the measurement process and reliability assessment of test data;

[0035] S3, automatic processing of signal interference and measurement errors during measurement data acquisition;

[0036] S4, intelligently analyzes the test process, adjusts test parameters and test conditions, and optimizes the test process;

[0037] S1, including: generating multiple sets of drive signals by using a drive signal output control circuit through a dynamic characteristic characterization circuit module; applying drain voltage stress to the power device under test DUT according to the received drive signal through a voltage stress time control circuit, and entering a drain voltage stress application phase;

[0038] When the drain voltage stress application phase ends, the voltage stress time control circuit turns on the power device under test DUT according to the received driving signal and enters the on-resistance measurement phase;

[0039] A voltage stress time control circuit applies voltage stress to the drain of the power device to be tested, clamps and obtains the on-state voltage drop of the power device to be tested;

[0040] The electrical parameter acquisition, calculation, analysis and processing module is used to sample the on-state voltage drop and on-state current of the power device to be tested, and calculate the dynamic on-state resistance of the power device to be tested;

[0041] The current Is on the current detection resistor Rs and the voltage Va across the diode D3 in the clamping circuit are sampled and acquired through the electrical parameter data acquisition module; V_D1_on represents the voltage across the diode D1;

[0042] According to the formula: Ron=(Va-V_D1_on) / Is, the dynamic on-resistance of the power device under test is calculated to obtain the dynamic on-resistance Ron of the power device under test DUT.

[0043] Preferably, S1 further comprises:

[0044] S11, a switch transistor Q1 is connected in parallel at both ends of the load resistor R1; the drive signal output control circuit includes an output pin 1 and an output pin 2; the output pin 1 and the output pin 2 respectively send the first drive signal and the second drive signal of the multiple drive signals to the voltage stress time control circuit; the first drive signal of the multiple drive signals controls the on-off of the first transistor, and the second drive signal of the multiple drive signals controls the on-off of the second transistor

[0045] S12, one end of the positive electrode of the input capacitor C in is connected to the positive electrode of the high-voltage power supply Vin, and the other end of the input capacitor C in is connected to the negative electrode of the high-voltage power supply Vin.

[0046] Preferably, S2 comprises:

[0047] S21, used to monitor the temperature of the power device to be tested in real time during the measurement process, and obtain the process temperature of the power device to be tested;

[0048] S22, used to monitor the ambient temperature of the measuring device and obtain the ambient temperature of the measuring process;

[0049] According to the process temperature of the power device to be tested and the ambient temperature of the measurement process, the reliability of the test data is evaluated; whether the process temperature of the power device to be tested has temperature anomalies, and the impact of the ambient temperature of the measurement process on the measurement status of the measuring element and the power device to be tested is evaluated.

[0050] Preferably, S3 includes:

[0051] S31, used for filtering and shielding signal interference during the measurement data acquisition process;

[0052] S32 is used to perform statistical processing on the errors of the measurement data to obtain measurement error statistical data.

[0053] Preferably, S4 includes:

[0054] S41, intelligently analyzing the test process parameters according to the test process parameters and the test environment status, analyzing whether the dynamic on-resistance of the power device to be tested meets the reference dynamic on-resistance, and obtaining the dynamic on-resistance analysis result;

[0055] S42, automatically correcting the process temperature offset of the power device to be tested according to the output dynamic on-resistance analysis result; optimizing the error compensation of the measurement error statistics according to the measurement error statistics, and intelligently adjusting and optimizing the test process;

[0056] In the drain voltage stress application stage, whether the load resistor R1 is connected to the power circuit to limit the current and consume energy is controlled by controlling the on and off of the switching transistor Q1; when the switching transistor Q1 is turned on, the load resistor R1 is not connected to the power circuit, and does not consume energy in the freewheeling circuit in the voltage stress application stage, thereby reducing the falling speed of the inductor freewheeling current, so that the inductor current will not drop to zero in the drain voltage stress application stage, reducing the measurement delay of the on-resistance, and controlling the measurement accuracy; when the switching transistor Q1 is turned off, the load resistor R1 is connected to the power circuit to limit the current and consume energy, so that the circuit current will not continue to rise in the multi-pulse test, and the current over-limit program will be avoided; whether the load resistor R1 is connected or not can regulate the drain voltage stress application time.

[0057] Compared with the existing dynamic on-resistance characterization device and method, the present invention has the following advantages and beneficial effects: by regulating the drain voltage stress time of the power device to be measured and timely sampling to obtain the electrical parameters of the power device to be measured, the influence data of different drain voltage stresses on the dynamic on-resistance can be obtained, which can effectively reduce the dynamic on-resistance measurement delay, and help analyze and monitor the transient change of the on-resistance of the power device to be measured; under the premise of ensuring low measurement delay and high measurement accuracy, the present invention can extend the voltage stress application time in a single dynamic on-resistance characterization, and change the duty cycle of the voltage stress application time in a multi-pulse dynamic on-resistance characterization, providing a longer stress time observation window for the analysis of the dynamic characteristic mechanism of the device; it can reduce the measurement delay, improve the measurement accuracy, and make the measurement of the dynamic on-resistance of the power semiconductor field effect transistor more accurate and comprehensive.

[0058] Other features and advantages of the present invention will be described in the following description. The objectives and other advantages of the present invention can be realized and obtained through the structures particularly pointed out in the written description and the drawings.

[0059] The technical solution of the present invention is further described in detail below through the accompanying drawings and embodiments. BRIEF DESCRIPTION OF THE DRAWINGS

[0060] The accompanying drawings are used to provide a further understanding of the present invention and constitute a part of the specification. Together with the embodiments of the present invention, they are used to explain the present invention and do not constitute a limitation of the present invention. In the accompanying drawings:

[0061] Figure 1 This is a schematic diagram of the structure of an intelligent device for measuring the dynamic on-resistance of a power semiconductor switch tube;

[0062] Figure 2 A schematic diagram of the structure connection of an intelligent device for measuring the dynamic on-resistance of a power semiconductor switch tube;

[0063] Figure 3 A schematic diagram of electrical parameter waveforms corresponding to a measurement period of dynamic on-resistance of a power device DUT under test after being subjected to drain voltage stress in one embodiment of the present invention;

[0064] Figure 4 A schematic diagram of electrical parameter waveforms corresponding to a measurement period of dynamic on-resistance of a power device DUT under test after being subjected to drain voltage stress for a long time in one embodiment of the present invention;

[0065] Figure 5 The diagram is a schematic diagram of electrical parameter waveforms of long-term measurement and monitoring of dynamic on-resistance of a power device under test (DUT) after long-term exposure to drain voltage stress in one embodiment of the present invention. DETAILED DESCRIPTION

[0066] The drawings are for illustrative purposes only and should not be construed as limiting the present patent;

[0067] It should be clear that the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the embodiments of the present application.

[0068] When the following description refers to the drawings, unless otherwise indicated, the same numbers in different drawings represent the same or similar elements. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with the present application. Instead, they are only examples of devices and methods consistent with some aspects of the present application as detailed in the attached claims. The present invention is further described below in conjunction with the drawings and embodiments.

[0069] In order to solve the limitations of the prior art, this embodiment provides a technical solution, and the technical solution of the present invention is further described below in conjunction with the drawings and embodiments.

[0070] The present invention provides an intelligent measurement device for dynamic on-resistance of a power semiconductor switch tube, comprising:

[0071] The power switch tube characteristic characterization sampling system measures and characterizes the influence of dynamic drain voltage stress on the dynamic on-resistance of the power device to be measured, and performs sampling, calculation and analysis on the parameters of the power device to be measured;

[0072] Temperature monitoring precision control system to monitor the temperature during the measurement process and evaluate the reliability of test data;

[0073] Data acquisition automatic processing system, automatically processing signal interference and measurement errors during measurement data acquisition;

[0074] The test process intelligent analysis system can intelligently analyze the test process, adjust the test parameters and test conditions, and optimize the test process;

[0075] The power switch tube characteristic characterization sampling system includes: a dynamic characteristic characterization circuit module and an electrical parameter acquisition calculation analysis processing module; the dynamic characteristic characterization circuit module includes: a drive signal output control circuit and a voltage stress time control circuit;

[0076] The dynamic characteristic characterization circuit module generates multiple sets of drive signals by using the drive signal output control circuit; applies drain voltage stress to the power device under test DUT according to the received drive signal through the voltage stress time control circuit, and enters the drain voltage stress application stage;

[0077] When the drain voltage stress application phase ends, the voltage stress time control circuit turns on the power device under test DUT according to the received driving signal and enters the on-resistance measurement phase;

[0078] A voltage stress time control circuit applies voltage stress to the drain of the power device to be tested, clamps and obtains the on-state voltage drop of the power device to be tested;

[0079] The electrical parameter acquisition, calculation, analysis and processing module is used to sample the on-state voltage drop and on-state current of the power device to be tested, and calculate the dynamic on-state resistance Ron of the power device to be tested;

[0080] The current Is on the current detection resistor Rs and the voltage Va across the diode D3 in the clamping circuit are sampled and acquired through the electrical parameter data acquisition module; V_D1_on represents the voltage across the diode D1;

[0081] According to the formula: Ron = (Va-V_D1_on) / Is, the dynamic on-resistance Ron of the power device under test DUT is obtained;

[0082] Among them, the dynamic characteristic characterization circuit module includes a drive signal output control circuit, a voltage stress time control circuit and a clamping circuit; the drive signal output control circuit is connected to the transistor in the voltage stress control circuit; the clamping circuit is connected to the voltage stress time control circuit; the electrical parameter acquisition operation analysis processing module is connected to the clamping circuit; wherein the drive signal output control circuit is used to generate a drive signal for controlling the transistor in the voltage stress time control circuit; the voltage stress time control circuit is used to apply drain voltage stress to the power field effect transistor to be tested; the clamping circuit is used to measure and collect the on-state voltage between the drain and the source of the power device to be tested; the electrical parameter acquisition operation analysis processing module is used to sample and obtain the on-state voltage drop across the source and drain of the power device to be tested obtained on the clamping circuit and the on-state current between the source and drain of the power device to be tested, and calculate the dynamic on-state resistance of the power device to be tested.

[0083] In one embodiment, the voltage stress time control circuit includes: a switch transistor Q1 is connected in parallel across a load resistor R1; a drive signal output control circuit includes an output pin 1 and an output pin 2;

[0084] Output pin 1 and output pin 2 respectively send the first drive signal and the second drive signal of the plurality of drive signals to the voltage stress time control circuit; the first drive signal of the plurality of drive signals controls the on-off of the first transistor, and the second drive signal of the plurality of drive signals controls the on-off of the second transistor;

[0085] One end of the positive electrode of the input capacitor Ci n is connected to the positive electrode of the high-voltage power supply Vin, and the other end of the input capacitor Ci n is connected to the negative electrode of the high-voltage power supply Vin.

[0086] In one embodiment, the temperature monitoring precision control system includes:

[0087] The temperature monitoring module of the power device to be tested is used to monitor the temperature of the power device to be tested in real time during the measurement process and obtain the process temperature of the power device to be tested;

[0088] The measurement process environment temperature monitoring module is used to monitor the environment temperature of the measurement device and obtain the measurement process environment temperature;

[0089] According to the process temperature of the power device to be tested and the ambient temperature of the measurement process, the reliability of the test data is evaluated; whether the process temperature of the power device to be tested has temperature anomalies, and the impact of the ambient temperature of the measurement process on the measurement state of the measuring element and the power device to be tested is evaluated; according to the process temperature of the power device to be tested and the ambient temperature of the measurement process, the reliability of the test data is evaluated, including: when the semiconductor switch tube of the power device to be tested is dynamically turned on and off transiently, the dynamic parameter turning point is obtained; the dynamic doping turning point includes the intersection of the temperature characteristic curves of the inter-electrode voltage and the inter-electrode current; the two sides of the intersection of the temperature characteristic curve are respectively the positive temperature coefficient interval and the negative temperature coefficient interval; when in the positive temperature coefficient interval, the temperature rises within the interval When the inter-pole voltage is constant and the inter-pole current decreases, when the temperature decreases within the interval and the inter-pole voltage remains constant, the inter-pole current increases, and the dynamic on-resistance is in the state of temperature and current negative feedback, and shifts positively; in the negative temperature coefficient interval, when the temperature increases within the interval and the inter-pole voltage remains constant, the inter-pole current increases, and when the temperature decreases within the interval and the inter-pole voltage remains constant, the inter-pole current decreases, and the dynamic on-resistance is in the state of temperature and current positive feedback, and shifts negatively; according to the process temperature of the power device to be tested and the ambient temperature of the measurement process, the reliability of the test data is evaluated at the dynamic parameter turning point, the positive temperature coefficient interval, and the negative temperature coefficient interval respectively; temperature measurement includes infrared point temperature measurement, contact sensor measurement, and heat dissipation part measurement.

[0090] In one embodiment, the data collection automatic processing system includes:

[0091] Signal interference shielding module, used for filtering and shielding signal interference during measurement data acquisition;

[0092] The measurement error compensation module is used to perform statistical processing on the errors of the measurement data and obtain measurement error statistical data.

[0093] In one embodiment, the test process intelligent analysis system includes:

[0094] The test process tracking intelligent analysis module intelligently analyzes the test process parameters according to the test process parameters and the test environment status, analyzes whether the dynamic on-resistance of the power device to be tested meets the reference dynamic on-resistance, and obtains the dynamic on-resistance analysis results;

[0095] The test parameter condition automatic adjustment module automatically corrects the process temperature offset of the power device to be tested according to the output dynamic on-resistance analysis results; it optimizes the error compensation of the measurement error statistics according to the measurement error statistics, and intelligently adjusts and optimizes the test process;

[0096] In the drain voltage stress application stage, whether the load resistor R1 is connected to the power circuit to limit the current and consume energy is controlled by controlling the on and off of the switching transistor Q1; when the switching transistor Q1 is turned on, the load resistor R1 is not connected to the power circuit, and does not consume energy in the freewheeling circuit in the voltage stress application stage, thereby reducing the falling speed of the inductor freewheeling current, so that the inductor current will not drop to zero in the drain voltage stress application stage, reducing the measurement delay of the on-resistance, and controlling the measurement accuracy; when the switching transistor Q1 is turned off, the load resistor R1 is connected to the power circuit to limit the current and consume energy, so that the circuit current will not continue to rise in the multi-pulse test, and the current over-limit program will be avoided; whether the load resistor R1 is connected or not can regulate the drain voltage stress application time.

[0097] The present invention provides an intelligent method for measuring the dynamic on-resistance of a power semiconductor switch tube, comprising:

[0098] S1, measuring and characterizing the influence of dynamic drain voltage stress on dynamic on-resistance of the power device to be measured, and performing sampling, calculation and analysis on parameters of the power device to be measured;

[0099] S2, conduct temperature monitoring during the measurement process and reliability assessment of test data;

[0100] S3, automatic processing of signal interference and measurement errors during measurement data acquisition;

[0101] S4, intelligently analyzes the test process, adjusts test parameters and test conditions, and optimizes the test process;

[0102] S1, including: generating multiple sets of drive signals by using a drive signal output control circuit through a dynamic characteristic characterization circuit module; applying drain voltage stress to the power device under test DUT according to the received drive signal through a voltage stress time control circuit, and entering a drain voltage stress application phase;

[0103] When the drain voltage stress application phase ends, the voltage stress time control circuit turns on the power device under test DUT according to the received driving signal and enters the on-resistance measurement phase;

[0104] A voltage stress time control circuit applies voltage stress to the drain of the power device to be tested, clamps and obtains the on-state voltage drop of the power device to be tested;

[0105] The electrical parameter acquisition, calculation, analysis and processing module is used to sample the on-state voltage drop and on-state current of the power device to be tested, and calculate the dynamic on-state resistance of the power device to be tested;

[0106] The current Is on the current detection resistor Rs and the voltage Va across the diode D3 in the clamping circuit are sampled and acquired through the electrical parameter data acquisition module; V_D1_on represents the voltage across the diode D1;

[0107] According to the formula: Ron = (Va-V_D1_on) / Is, the dynamic on-resistance of the power device under test is calculated to obtain the dynamic on-resistance Ron of the power device under test DUT;

[0108] Among them, the dynamic characteristic characterization circuit module includes a drive signal output control circuit, a voltage stress time control circuit and a clamping circuit; the drive signal output control circuit is connected to the transistor in the voltage stress control circuit; the clamping circuit is connected to the voltage stress time control circuit; the electrical parameter acquisition operation analysis processing module is connected to the clamping circuit; wherein the drive signal output control circuit is used to generate a drive signal for controlling the transistor in the voltage stress time control circuit; the voltage stress time control circuit is used to apply drain voltage stress to the power field effect transistor to be tested; the clamping circuit is used to measure and collect the on-state voltage between the drain and the source of the power device to be tested; the electrical parameter acquisition operation analysis processing module is used to sample and obtain the on-state voltage drop across the source and drain of the power device to be tested obtained on the clamping circuit and the on-state current between the source and drain of the power device to be tested, and calculate the dynamic on-state resistance of the power device to be tested.

[0109] In one embodiment, S1 further includes:

[0110] S11, a switch transistor Q1 is connected in parallel at both ends of the load resistor R1; the drive signal output control circuit includes an output pin 1 and an output pin 2; the output pin 1 and the output pin 2 respectively send the first drive signal and the second drive signal of the multiple drive signals to the voltage stress time control circuit; the first drive signal of the multiple drive signals controls the on-off of the first transistor, and the second drive signal of the multiple drive signals controls the on-off of the second transistor;

[0111] S12, one end of the positive electrode of the input capacitor C in is connected to the positive electrode of the high-voltage power supply Vin, and the other end of the input capacitor C in is connected to the negative electrode of the high-voltage power supply Vin.

[0112] In one embodiment, S2 includes:

[0113] S21, used to monitor the temperature of the power device to be tested in real time during the measurement process, and obtain the process temperature of the power device to be tested;

[0114] S22, used to monitor the ambient temperature of the measuring device and obtain the ambient temperature of the measuring process;

[0115] According to the process temperature of the power device to be tested and the ambient temperature of the measurement process, the reliability of the test data is evaluated; whether the process temperature of the power device to be tested has temperature anomalies, and the impact of the ambient temperature of the measurement process on the measurement state of the measuring element and the power device to be tested is evaluated; according to the process temperature of the power device to be tested and the ambient temperature of the measurement process, the reliability of the test data is evaluated, including: when the semiconductor switch tube of the power device to be tested is dynamically turned on and off transiently, the dynamic parameter turning point is obtained; the dynamic doping turning point includes the intersection of the temperature characteristic curves of the inter-electrode voltage and the inter-electrode current; the two sides of the intersection of the temperature characteristic curve are respectively the positive temperature coefficient interval and the negative temperature coefficient interval; when in the positive temperature coefficient interval, the temperature rises within the interval When the inter-pole voltage is constant and the inter-pole current decreases, when the temperature decreases within the interval and the inter-pole voltage remains constant, the inter-pole current increases, and the dynamic on-resistance is in the state of temperature and current negative feedback, and shifts positively; in the negative temperature coefficient interval, when the temperature increases within the interval and the inter-pole voltage remains constant, the inter-pole current increases, and when the temperature decreases within the interval and the inter-pole voltage remains constant, the inter-pole current decreases, and the dynamic on-resistance is in the state of temperature and current positive feedback, and shifts negatively; according to the process temperature of the power device to be tested and the ambient temperature of the measurement process, the reliability of the test data is evaluated at the dynamic parameter turning point, the positive temperature coefficient interval, and the negative temperature coefficient interval respectively; temperature measurement includes infrared point temperature measurement, contact sensor measurement, and heat dissipation part measurement.

[0116] In one embodiment, S3 includes:

[0117] S31, used for filtering and shielding signal interference during the measurement data acquisition process;

[0118] S32 is used to perform statistical processing on the errors of the measurement data to obtain measurement error statistical data.

[0119] In one embodiment, S4 includes:

[0120] S41, intelligently analyzing the test process parameters according to the test process parameters and the test environment status, analyzing whether the dynamic on-resistance of the power device to be tested meets the reference dynamic on-resistance, and obtaining the dynamic on-resistance analysis result;

[0121] S42, automatically correcting the process temperature offset of the power device to be tested according to the output dynamic on-resistance analysis result; optimizing the error compensation of the measurement error statistics according to the measurement error statistics, and intelligently adjusting and optimizing the test process;

[0122] In the drain voltage stress application stage, whether the load resistor R1 is connected to the power circuit to limit the current and consume energy is controlled by controlling the on and off of the switching transistor Q1; when the switching transistor Q1 is turned on, the load resistor R1 is not connected to the power circuit, and does not consume energy in the freewheeling circuit in the voltage stress application stage, thereby reducing the falling speed of the inductor freewheeling current, so that the inductor current will not drop to zero in the drain voltage stress application stage, reducing the measurement delay of the on-resistance, and controlling the measurement accuracy; when the switching transistor Q1 is turned off, the load resistor R1 is connected to the power circuit to limit the current and consume energy, so that the circuit current will not continue to rise in the multi-pulse test, and the current over-limit program will be avoided; whether the load resistor R1 is connected or not can regulate the drain voltage stress application time.

[0123] The present invention provides an intelligent device for measuring the dynamic on-resistance of a power semiconductor switch tube. Figure 1 As shown, the device includes: a dynamic characteristic characterization circuit module and an electrical parameter acquisition operation analysis processing module; wherein the dynamic characteristic characterization circuit module includes a drive signal output control circuit, a voltage stress time control circuit and a clamp circuit; the drive signal output control circuit is connected to the transistor in the voltage stress control circuit; the clamp circuit is connected to the voltage stress time control circuit; the electrical parameter acquisition operation analysis processing module is connected to the clamp circuit; wherein the drive signal output control circuit is used to generate a drive signal for controlling the transistor in the voltage stress time control circuit; the voltage stress time control circuit is used to apply drain voltage stress to the power field effect transistor to be measured; the clamp circuit is used to measure and collect the on-state voltage between the drain and the source of the power device to be measured; the electrical parameter acquisition operation analysis processing module is used to sample and obtain the on-state voltage drop across the source and drain of the power device to be measured obtained on the clamp circuit and the on-state current between the source and drain of the power device to be measured, and calculate the dynamic on-state resistance of the power device to be measured.

[0124] The working principle of the above technical solution is: a dynamic characteristic characterization circuit module and an electrical parameter acquisition operation analysis and processing module; wherein the dynamic characteristic characterization circuit module includes a drive signal output control circuit, a voltage stress time control circuit and a clamping circuit; the drive signal output control circuit is connected to the transistor in the voltage stress control circuit; the clamping circuit is connected to the voltage stress time control circuit; the electrical parameter acquisition operation analysis and processing module is connected to the clamping circuit; wherein the drive signal output control circuit is used to generate a drive signal for controlling the transistor in the voltage stress time control circuit; the voltage stress time control circuit is used to apply drain voltage stress to the power field effect transistor to be tested; the clamping circuit is used to measure and collect the on-state voltage between the drain and the source of the power device to be tested; the electrical parameter acquisition operation analysis and processing module is used to sample and obtain the on-state voltage drop across the source and drain of the power device to be tested obtained on the clamping circuit and the on-state current between the source and drain of the power device to be tested, and calculate the dynamic on-state resistance of the power device to be tested.

[0125] The beneficial effects of the above technical solution are: by applying different drain voltage stresses to the power device to be tested and timely sampling to obtain the electrical parameters of the power device to be tested, the impact data of different drain voltage stresses on the dynamic on-resistance can be obtained, thereby reducing the dynamic on-resistance measurement delay, which is helpful to analyze and monitor the dynamic stability of the power device to be tested.

[0126] In one embodiment, the driving signal output control circuit is a field programmable gate array circuit; the driving signal output control circuit includes an output pin 1 and an output pin 2.

[0127] The working principle of the above technical solution is: the drive signal output control circuit is a field programmable gate array circuit; the drive signal output control circuit includes an output pin 1 and an output pin 2.

[0128] The beneficial effects of the above technical solution are as follows: by adopting the solution provided in this embodiment, the driving signal can be transmitted to the voltage stress time control circuit through the field programmable gate array and two output pins; the signal output pin 1 is connected to the gate of the switching transistor Q1 to control the on and off of the switching transistor Q1; the signal output pin 2 is connected to the gate of the power device DUT to be tested to control the on and off of the power device DUT to be tested.

[0129] In one embodiment, Figure 2 As shown, the voltage stress time control circuit includes a high-voltage power supply Vin, an input capacitor Ci n, a switching transistor Q1, a load resistor R1, a load inductor L1, a freewheeling diode D1, a power device to be tested DUT and a current detection resistor Rs; wherein:

[0130] One end of the positive electrode of the input capacitor C in is connected to the positive electrode of the high-voltage power supply Vin, and the other end of the input capacitor C in is connected to the negative electrode of the high-voltage power supply Vin; the working range of the high-voltage power supply Vin is above 1kV;

[0131] The drain end of the switch transistor Q1 is connected to the positive electrode of the input capacitor Ci n and the positive electrode of the high voltage power supply Vin, and the source end of the switch transistor Q1 is connected to one end of the load resistor R1 and one end of the load inductor L1;

[0132] One end of the load resistor R1 is connected to the drain of the switching transistor Q1 and the anode of the freewheeling diode D1, and the other end is connected to the source of the switching transistor Q1 and one end of the load inductor L1;

[0133] One end of the load inductor L1 is connected to the source of the switching transistor Q1 and one end of the load resistor R1, and the other end of the load inductor L1 is connected to the cathode of the freewheeling diode D1 and one end of the drain of the power device under test DUT;

[0134] The drain of the power device under test DUT is connected to the cathode of the freewheeling diode D1 and one end of the load inductor L1, and the source of the power device under test DUT is grounded;

[0135] One end of the current detection resistor Rs is connected to the negative electrode of the high voltage power supply Vin, and the other end is grounded.

[0136] The beneficial effect of the above technical solution is: by adopting the solution provided by this embodiment, drain voltage stress is applied to the power device under test DUT through the voltage stress time control circuit.

[0137] In one embodiment, Figure 2 The clamping circuit shown includes diodes D2, D3, a resistor R2 and a low voltage auxiliary power supply V1; wherein;

[0138] The anode of the diode D2 is connected to the cathode of the diode D3 and the positive electrode of the low-voltage auxiliary power supply V1, and the cathode of the diode D2 is connected to the drain of the power device DUT to be tested;

[0139] The anode of the diode D3 is connected to the source of the power device under test DUT, and the cathode of the diode D3 is connected to the anode of the diode D2 and the positive electrode of the low-voltage auxiliary power supply V1;

[0140] The positive electrode of the low-voltage auxiliary power supply V1 is connected to the cathode of the diode D3 and the anode of the diode D2, and the negative electrode of the low-voltage auxiliary power supply V1 is connected to the source of the power device DUT to be tested.

[0141] The beneficial effect of the above technical solution is: adopting the solution provided by this embodiment can improve the measurement accuracy of the on-state voltage drop across the source and drain of the power device DUT to be tested, and make the on-state resistance measurement of the power field effect transistor DUT more accurate.

[0142] In one embodiment, Figure 2 As shown, the electrical parameter acquisition, calculation, analysis and processing module is an oscilloscope and a corresponding probe; the electrical parameters directly measured by the probe include the current Is on the current detection resistor Rs and the voltage Va across the diode D3; the oscilloscope uses the probe to sample and obtain the electrical parameters directly measured by the probe.

[0143] The beneficial effect of the above technical solution is: by adopting the solution provided in this embodiment, the sampled electrical parameters are obtained through an oscilloscope to provide data condition support for the on-resistance characterization.

[0144] A method for intelligently measuring the dynamic on-resistance of a power semiconductor switch tube is provided, wherein the dynamic on-resistance of a power device under test (DUT) is obtained by the following steps:

[0145] S1: The driving signal output control circuit in the dynamic characteristic characterization circuit module generates a driving signal, and sends the driving signal to the voltage stress time control circuit through the two output pins;

[0146] S2: The voltage stress time control circuit applies drain voltage stress to the power device under test DUT according to the received driving signal;

[0147] S31: the voltage stress time control circuit turns on the power device under test DUT according to the received driving signal;

[0148] S32: the electric parameter acquisition operation analysis processing module samples and obtains the current Is on the current detection resistor Rs and the voltage Va across the diode D3 in the clamping circuit; V_D1_on represents the voltage across the diode D1;

[0149] S4: Calculate the dynamic on-resistance of the power device under test according to the formula: Ron=(Va-V_D1_on) / Is, and obtain the dynamic on-resistance Ron of the power device under test DUT;

[0150] The beneficial effect of the above technical solution is: by adopting the solution provided in this embodiment, by applying different drain voltage stresses to the power device DUT to be tested and timely sampling to obtain the electrical parameters of the power device to be tested, the impact data of different drain voltage stresses on the dynamic on-resistance can be obtained, thereby reducing the dynamic on-resistance measurement delay, which is helpful to analyze and monitor the dynamic stability of the power device to be tested.

[0151] In one embodiment, S2 includes: controlling whether the load resistor R1 is connected to the power circuit to limit the current and consume energy by controlling the on and off of the switching transistor Q1; when the switching transistor Q1 is turned on, the load resistor R1 is not connected to the power circuit; when the switching transistor Q1 is turned off, the load resistor R1 is connected to the power circuit to limit the current and consume energy.

[0152] In one embodiment, specifically, a measurement cycle for measuring the dynamic on-resistance of a power device under test DUT after being subjected to drain voltage stress specifically includes a drain voltage stress application phase and a dynamic on-resistance measurement phase, such as Figure 3 As shown in FIG. 1 , a schematic diagram of the electrical parameter waveform corresponding to the measurement method is shown. It is a double-pulse measurement method. In the time interval between two turn-on pulses, a drain voltage stress is applied to the power device DUT to be measured. When the second turn-on pulse is applied, the on-resistance of the power device DUT to be measured is measured. Specifically, Figure 3 As shown, VGS_Q1 is the driving voltage signal of the switching transistor Q1, VGS_DUT is the driving voltage signal of the transistor to be tested DUT, VDS_DUT is the voltage across the source and drain of the transistor to be tested DUT, IDS_DUT is the current flowing through the drain and source of the transistor to be tested DUT, and IL1 is the current flowing through the load inductor L1;

[0153] Specifically, during the measurement process, the switching transistor Q1 remains off, and the load resistor R1 is connected to the loop; the time from t0 to t1 is the first pulse turn-on time of the power device DUT to be tested, the load inductor L1 and the load resistor R1 limit the current, the currents IDS_DUT and IL1 start to rise from 0, and the load inductor L1 stores energy; the time from t1 to t2 is the drain voltage stress application stage of the power device DUT to be tested, at this time the diode D1 continues the current, the load resistor R1 consumes the energy of the load inductor L1, and the current decreases; the time from t2 to t3 is the second pulse turn-on time of the power device DUT to be tested, which is the on-resistance measurement stage, the current IDS_DUT flowing through the power device DUT to be tested starts to rise from the inductor current value at the time t2, the clamping circuit samples the on-voltage drop across the source and drain of the power device DUT to be tested, and the on-resistance value of the power device DUT to be tested is calculated; at t3, the transistor DUT is turned off, and a measurement cycle for measuring the dynamic on-resistance of the power device DUT to be tested after being subjected to the drain voltage stress ends.

[0154] The beneficial effects of the above embodiment are as follows: after the drain voltage stress application phase of the power device DUT to be tested is completed, the on-resistance measurement phase of the power device DUT to be tested is immediately entered, thereby reducing the measurement delay; and through the freewheeling function of the load inductor L1, within a relatively short drain voltage stress application time, the current at both ends of the source and drain of the power device DUT to be tested when the on-resistance measurement phase is started starts to rise from a certain value that is not zero, thereby improving the on-resistance measurement accuracy; due to the access of the load resistor, in order to ensure the measurement accuracy, the drain voltage stress application time cannot be too long; the relatively short drain voltage stress application time includes the voltage of the drain voltage stress application process not exceeding the gate oxide layer withstand voltage allowable time, thereby reducing the gate oxide layer damage rate when the voltage exceeds the maximum gate-source voltage; the pulse drain current of the power device DUT to be tested during the dynamic conduction process is lower than the conduction loss setting range, the current density of the source and drain of the power device DUT to be tested is limited to a range, and the measurement electrode contact resistance error is further reduced.

[0155] In one embodiment, specifically, a measurement cycle for measuring the dynamic on-resistance of a power device under test DUT after being subjected to drain voltage stress specifically includes a drain voltage stress application phase and a dynamic on-resistance measurement phase, such as Figure 4 As shown in FIG. 1 , a schematic diagram of the electrical parameter waveform corresponding to the measurement method is shown. It is a double-pulse measurement method. In the time interval between two turn-on pulses, a drain voltage stress is applied to the power device DUT to be measured. When the second turn-on pulse is applied, the on-resistance of the power device DUT to be measured is measured. Specifically, Figure 4 As shown, VGS_Q1 is the driving voltage signal of the switching transistor Q1, VGS_DUT is the driving voltage signal of the transistor to be tested DUT, VDS_DUT is the voltage across the source and drain of the transistor to be tested DUT, IDS_DUT is the current flowing through the drain and source of the transistor to be tested DUT, and IL1 is the current flowing through the load inductor L1;

[0156] Specifically, during the measurement process from t0 to t1, the switching transistor Q1 remains turned on, and the load resistor R1 is not connected to the loop; from t0 to t1, the first pulse turn-on time of the power device DUT to be tested is on, the load inductor L1 limits the current, the currents IDS_DUT and IL1 start to rise from 0, and the load inductor L1 stores energy; from t1 to t2, it is the drain voltage stress application stage of the power device DUT to be tested, at this time, the diode D1 is freewheeling, the freewheeling loop has no load to consume energy, the current can remain stable for a long time, and a long-term drain voltage stress is applied; from t2 to t3, it is the second pulse turn-on time of the power device DUT to be tested, which is the on-resistance measurement stage, the current IDS_DUT flowing through the power device DUT to be tested starts to rise from the inductor current value at t2, the clamping circuit samples the on-voltage drop across the source and drain of the power device DUT to be tested, and the on-resistance value of the power device DUT to be tested is calculated; at t3, the transistor DUT is turned off, and a measurement cycle for measuring the dynamic on-resistance of the power device DUT to be tested after being subjected to the drain voltage stress ends.

[0157] The beneficial effects of the above embodiments are as follows: while ensuring a low measurement delay, the drain voltage stress application time can be increased, providing an observation window with a longer stress time for the characterization of the device dynamic characteristic mechanism; after the drain voltage stress application phase of the power device DUT to be tested is completed, the on-resistance measurement phase of the power device DUT to be tested is immediately entered to reduce the measurement delay; and by keeping the switching transistor Q1 turned on, the load resistor R1 is not connected to the loop, and during the long drain voltage stress application time, there is no load to consume energy. Through the freewheeling function of the load inductor L1, during the long drain voltage stress application time, the current at both ends of the source and drain of the power device DUT to be tested when the on-resistance measurement phase is started starts to rise from a certain value that is not zero, thereby improving the on-resistance measurement accuracy.

[0158] In one embodiment, a long-term multi-pulse on-resistance measurement is performed on the power device DUT, specifically, including a drain voltage stress application stage and a dynamic on-resistance measurement stage, such as Figure 5 As shown in FIG. 1 , a schematic diagram of the electrical parameter waveform corresponding to the measurement method is a multi-pulse measurement method; a drain voltage stress is applied to the power device DUT under test in the time interval between the first turn-on pulse and the second turn-on pulse, and in the subsequent turn-on pulse, the two stages of stress application and dynamic on-resistance measurement are performed cyclically; specifically, as Figure 5 As shown, VGS_Q1 is the driving voltage signal of the switching transistor Q1, VGS_DUT is the driving voltage signal of the transistor to be tested DUT, VDS_DUT is the voltage across the source and drain of the transistor to be tested DUT, IDS_DUT is the current flowing through the drain and source of the transistor to be tested DUT, and I L1 is the current flowing through the load inductor L1;

[0159] Specifically, before time t2, the switch transistor Q1 remains on, and the load resistor R1 is not connected to the loop. After time t2, the switch transistor Q1 remains off, and the load resistor R1 is connected to the loop. Time t0 to t1 is the first pulse opening time of the power device DUT to be tested, and the load inductor L1 is current limiting. The current IDS_DUT and I L1 starts to rise from 0, and the load inductor L1 stores energy; from t1 to t2, it is the drain voltage stress application stage of the power device DUT to be tested. At this time, the diode D1 is freewheeling, and the freewheeling circuit has no load to consume energy. The current can remain stable for a long time, and a long-term drain voltage stress is applied; from t2 to t3, it is the second pulse start time of the power device DUT to be tested, which is the on-resistance measurement stage. The current IDS_DUT flowing through the power device DUT to be tested starts to rise from the inductor current value at t2, and the clamping circuit samples the on-voltage drop across the source and drain of the power device DUT to be tested, and the on-resistance value of the power device DUT to be tested is calculated; at t3, the transistor DUT is turned off, and at t4, the switching transistor Q1 is turned on, so that the load resistor is not connected to the freewheeling circuit, the inductor current is maintained stable, and the drain voltage stress time t4 to t5 is extended; at t5, the DUT is turned on and the on-resistance is measured; the subsequent cycles are the stress application stage and the on-resistance measurement stage, and the dynamic on-resistance is observed and monitored for a long time.

[0160] The beneficial effects of the above embodiments are as follows: in the long-term dynamic on-resistance measurement process of multiple pulses, the duty cycle of the voltage stress application time can be regulated, and the drain voltage stress application time and the switch duty cycle of the device can be changed while ensuring low measurement delay, so as to simulate the dynamic characteristics of the DUT under different working conditions, and provide a stress condition that is more in line with the actual working environment for the characterization of the dynamic characteristics mechanism of the device. After the drain voltage stress application phase of the power device DUT to be tested is completed, the on-resistance measurement phase of the power device DUT to be tested is immediately entered to reduce the measurement delay; and the load resistor R1 is controlled to be connected to the loop through the selective conduction and shutdown of the switching transistor Q1, and the freewheeling function of the load inductor L1 is used to control the current flowing through the DUT, thereby improving the measurement accuracy and reducing the measurement delay; in the long-term multi-pulse measurement process, the loop current is maintained stable by controlling whether the load resistor is connected; the load resistor is not connected to the loop to extend the voltage stress application time, and in the long During the drain voltage stress application phase, the current is maintained stable and the measurement delay of the on-resistance is reduced. During the device startup phase, the load resistor is connected to limit the current and consume energy to avoid the inductor current running away, maintain system stability, and adjust the duty cycle of the DUT so that the source and drain currents of the power device DUT under test are kept at a stable non-zero value when it is turned on, thereby reducing the measurement delay of the on-resistance and improving the measurement accuracy of the dynamic on-resistance. Multi-pulse long-term observation of the dynamic on-resistance of the power device DUT under test is helpful to analyze and monitor the dynamic stability of the power device under test.

[0161] Obviously, the above embodiments of the present invention are merely examples for clearly illustrating the present invention, and are not intended to limit the embodiments of the present invention. For those skilled in the art, other different forms of changes or modifications can be made based on the above description. It is not necessary and impossible to list all the embodiments here. Any modifications, equivalent substitutions and improvements made within the spirit and principles of the present invention should be included in the protection scope of the claims of the present invention.

Claims

1. An intelligent measurement device for dynamic on-resistance of a power semiconductor switch tube, characterized in that: include: The power switch tube characteristic characterization sampling system measures and characterizes the influence of dynamic drain voltage stress on the dynamic on-resistance of the power device to be measured, and performs sampling, calculation and analysis on the parameters of the power device to be measured; Temperature monitoring precision control system to monitor the temperature during the measurement process and evaluate the reliability of test data; Data acquisition automatic processing system, automatically processing signal interference and measurement errors during measurement data acquisition; The test process intelligent analysis system can intelligently analyze the test process, adjust the test parameters and test conditions, and optimize the test process; The power switch tube characteristic characterization sampling system includes: a dynamic characteristic characterization circuit module and an electrical parameter acquisition calculation analysis processing module; the dynamic characteristic characterization circuit module includes: a drive signal output control circuit and a voltage stress time control circuit; The dynamic characteristic characterization circuit module generates multiple sets of drive signals by using a drive signal output control circuit; applies drain voltage stress to the power device under test DUT according to the received drive signal through a voltage stress time control circuit, and enters the drain voltage stress application stage; in the drain voltage stress application stage, controls whether the load resistor is connected to the power circuit to limit the current and consume energy by controlling the on and off of the switching transistor; and regulates the drain voltage stress application time; When the drain voltage stress application phase ends, the voltage stress time control circuit turns on the power device to be tested according to the received driving signal, and enters the on-resistance measurement phase; A voltage stress time control circuit applies voltage stress to the drain of the power device to be tested, clamps and obtains the on-state voltage drop of the power device to be tested; The electrical parameter acquisition, calculation, analysis and processing module is used to sample the on-state voltage drop and on-state current of the power device to be tested, and calculate the dynamic on-state resistance of the power device to be tested; The driving signal output control circuit includes an output pin 1 and an output pin 2; The voltage stress time control circuit includes a high voltage power supply Vin, an input capacitor Cin, a switching transistor Q1, a load resistor R1, a load inductor L1, a freewheeling diode D1, a power device to be tested DUT and a current detection resistor Rs; wherein: One end of the positive electrode of the input capacitor Cin is connected to the positive electrode of the high-voltage power supply Vin, and the other end of the input capacitor Cin is connected to the negative electrode of the high-voltage power supply Vin; A drain end of the switching transistor Q1 is connected to the positive electrode of the input capacitor Cin and the positive electrode of the high voltage power supply Vin, and a source end of the switching transistor Q1 is connected to one end of the load resistor R1 and one end of the load inductor L1; The other end of the load resistor R1 is connected to the drain of the switching transistor Q1 and the cathode of the freewheeling diode D1 respectively; One end of the load inductor L1 is connected to the source of the switching transistor Q1 and one end of the load resistor R1, and the other end of the load inductor L1 is connected to the anode of the freewheeling diode D1 and one end of the drain of the power device DUT to be tested; The drain of the power device DUT to be tested is connected to the anode of the freewheeling diode D1 and the other end of the load inductor L1, and the source of the power device DUT to be tested is connected to the ground; One end of the current detection resistor Rs is connected to the negative electrode of the high voltage power supply Vin, and the other end is grounded; The output pin 1 is connected to the gate of the switching transistor Q1 to control the on and off of the switching transistor Q1; The output pin 2 is connected to the gate of the power device under test DUT to control the on and off of the power device under test DUT.

2. The intelligent measuring device for dynamic on-resistance of a power semiconductor switch tube according to claim 1, characterized in that: The temperature monitoring precision control system includes: The temperature monitoring module of the power device to be tested is used to monitor the temperature of the power device to be tested in real time during the measurement process and obtain the process temperature of the power device to be tested; The measurement process environment temperature monitoring module is used to monitor the environment temperature of the measurement device and obtain the measurement process environment temperature; According to the process temperature of the power device to be tested and the ambient temperature of the measurement process, the reliability of the test data is evaluated; whether the process temperature of the power device to be tested has temperature anomalies, and the impact of the ambient temperature of the measurement process on the measurement status of the measuring element and the power device to be tested is evaluated.

3. The intelligent measuring device for dynamic on-resistance of a power semiconductor switch tube according to claim 1, characterized in that: The data acquisition automatic processing system includes: Signal interference shielding module, used for filtering and shielding signal interference during measurement data acquisition; The measurement error compensation module is used to perform statistical processing on the errors of the measurement data and obtain measurement error statistical data.

4. The intelligent measuring device for dynamic on-resistance of a power semiconductor switch tube according to claim 1, characterized in that: The test process intelligent analysis system includes: The test process tracking intelligent analysis module intelligently analyzes the test process parameters according to the test process parameters and the test environment status, analyzes whether the dynamic on-resistance of the power device to be tested meets the reference dynamic on-resistance, and obtains the dynamic on-resistance analysis results; The test parameter condition automatic adjustment module automatically corrects the process temperature offset of the power device to be tested according to the output dynamic on-resistance analysis results; it optimizes the error compensation of the measurement error statistics according to the measurement error statistics, and intelligently adjusts and optimizes the test process.

5. A method for intelligently measuring the dynamic on-resistance of a power semiconductor switch tube, characterized in that: include: S1, measuring and characterizing the influence of dynamic drain voltage stress on dynamic on-resistance of the power device to be measured, and performing sampling, calculation and analysis on parameters of the power device to be measured; S2, conduct temperature monitoring during the measurement process and reliability assessment of test data; S3, automatic processing of signal interference and measurement errors during measurement data acquisition; S4, intelligently analyzes the test process, adjusts test parameters and test conditions, and optimizes the test process; S1, including: generating multiple sets of drive signals by using a drive signal output control circuit through a dynamic characteristic characterization circuit module; applying drain voltage stress to the power device to be tested according to the received drive signal through a voltage stress time control circuit, and entering a drain voltage stress application stage; in the drain voltage stress application stage, controlling whether the load resistor is connected to the power circuit to limit the current and consume energy by controlling the on and off of the switching transistor; and regulating the drain voltage stress application time; When the drain voltage stress application phase ends, the voltage stress time control circuit turns on the power device to be tested according to the received driving signal, and enters the on-resistance measurement phase; A voltage stress time control circuit applies voltage stress to the drain of the power device to be tested, clamps and obtains the on-state voltage drop of the power device to be tested; The electrical parameter acquisition, calculation, analysis and processing module is used to sample the on-state voltage drop and on-state current of the power device to be tested, and calculate the dynamic on-state resistance of the power device to be tested; S1 also includes: S11, the driving signal output control circuit includes an output pin 1 and an output pin 2; The voltage stress time control circuit includes a high voltage power supply Vin, an input capacitor Cin, a switching transistor Q1, a load resistor R1, a load inductor L1, a freewheeling diode D1, a power device to be tested DUT and a current detection resistor Rs; wherein: One end of the positive electrode of the input capacitor Cin is connected to the positive electrode of the high-voltage power supply Vin, and the other end of the input capacitor Cin is connected to the negative electrode of the high-voltage power supply Vin; A drain end of the switching transistor Q1 is connected to the positive electrode of the input capacitor Cin and the positive electrode of the high voltage power supply Vin, and a source end of the switching transistor Q1 is connected to one end of the load resistor R1 and one end of the load inductor L1; The other end of the load resistor R1 is connected to the drain of the switching transistor Q1 and the cathode of the freewheeling diode D1 respectively; One end of the load inductor L1 is connected to the source of the switching transistor Q1 and one end of the load resistor R1, and the other end of the load inductor L1 is connected to the anode of the freewheeling diode D1 and one end of the drain of the power device DUT to be tested; The drain of the power device DUT to be tested is connected to the anode of the freewheeling diode D1 and the other end of the load inductor L1, and the source of the power device DUT to be tested is connected to the ground; One end of the current detection resistor Rs is connected to the negative electrode of the high voltage power supply Vin, and the other end is grounded; The output pin 1 is connected to the gate of the switching transistor Q1 to control the on and off of the switching transistor Q1; The output pin 2 is connected to the gate of the power device under test DUT to control the on and off of the power device under test DUT.

6. The method for intelligently measuring the dynamic on-resistance of a power semiconductor switch tube according to claim 5, characterized in that S2 include: S21, monitoring the temperature of the power device to be tested during the measurement process in real time, and obtaining the process temperature of the power device to be tested; S22, monitoring the ambient temperature of the measuring device to obtain the ambient temperature of the measuring process; According to the process temperature of the power device to be tested and the ambient temperature of the measurement process, the reliability of the test data is evaluated; whether the process temperature of the power device to be tested has temperature anomalies, and the impact of the ambient temperature of the measurement process on the measurement status of the measuring element and the power device to be tested is evaluated.

7. The intelligent measurement method for dynamic on-resistance of a power semiconductor switch tube according to claim 5, characterized in that S3 include: S31, filtering and shielding the signal interference during the measurement data acquisition process; S32, performing statistical processing on the errors of the measurement data to obtain measurement error statistical data.

8. The method for intelligently measuring the dynamic on-resistance of a power semiconductor switch tube according to claim 5, characterized in that S4 include: S41, intelligently analyzing the test process parameters according to the test process parameters and the test environment status, analyzing whether the dynamic on-resistance of the power device to be tested meets the reference dynamic on-resistance, and obtaining the dynamic on-resistance analysis result; S42, according to the output dynamic on-resistance analysis result, automatically correct the process temperature offset of the power device to be tested; according to the measurement error statistical data, optimize the error compensation of the measurement error statistical data, and intelligently adjust and optimize the test process.

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