Method for acquiring voltage and frequency relationship, chip testing device, equipment and medium

By adjusting the link length of the ring oscillator in the chip to change the frequency, the problem of voltage and frequency correlation not being able to be tested independently is solved, which simplifies testing, improves system stability, and shortens product launch time.

CN119001226BActive Publication Date: 2026-06-02FUZHOU ROCKCHIP SEMICON

Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
FUZHOU ROCKCHIP SEMICON
Filing Date
2024-07-04
Publication Date
2026-06-02

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Abstract

The application discloses a method for obtaining voltage and frequency relationship, a chip testing device, equipment and a storage medium. The method comprises the following steps: setting a ring oscillator in a device under test as having a first link length; obtaining a first frequency of the device under test according to the first link length and a first test voltage of the device under test; running a test case for the device under test based on the first frequency; and obtaining a frequency corresponding to the first test voltage according to a test result of the test case. The application can completely test the corresponding frequency under the same test voltage, reduce the sensitivity to power voltage fluctuation, obtain good system stability only by reserving a small amount of frequency margin, facilitate giving reasonable actual application conditions based on the test result, and shorten the online time of products.
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Description

Technical Field

[0001] This invention relates to the field of testing, and in particular to methods for obtaining voltage and frequency relationships, chip testing apparatus, electronic devices, and computer-readable storage media. Background Technology

[0002] Frequency-voltage is a key parameter for system stability. During the operation of a chip system, the target frequency is determined based on the target performance, and the power supply voltage is adjusted to ensure the system operates stably at the target frequency. Traditional frequency-voltage-based technologies need to consider many objective factors such as chip process, chip temperature, power supply voltage deviation, and power supply response. To accommodate chip differences, manually creating a frequency-voltage table requires a large margin to achieve good stability, and implementing closed-loop operation is time-consuming and labor-intensive.

[0003] To address this challenge, an adaptive frequency adjustment mechanism is introduced to implement adaptive frequency regulation within the module. Chip temperature, chip process, and power supply voltage are variables for the adaptive clock frequency. The adaptive clock frequency is compared with the precise clock frequency; if the adaptive clock frequency is higher than the target frequency, the power supply voltage is lowered, and vice versa, to achieve the target frequency. The adaptive adjustment mechanism automatically adjusts the frequency based on the current voltage. When the voltage fluctuates, the frequency can be automatically adjusted to achieve stability. With this mechanism, the instantaneous clock frequency fluctuates with the voltage, significantly increasing system stability. Summary of the Invention

[0004] This invention provides a method for obtaining the relationship between voltage and frequency, a chip testing apparatus, equipment, and storage medium, thereby expanding the applicable scenarios for chip voltage-frequency testing.

[0005] In one aspect of the present invention, a method for obtaining a voltage-frequency relationship is provided. The method includes: configuring a ring oscillator in a device under test (DUT) to have a first link length; obtaining a first frequency of the DUT based on the first link length and a first test voltage of the DUT; running test cases against the DUT based on the first frequency; and obtaining a frequency corresponding to the first test voltage based on the test results of the test cases.

[0006] In another aspect of the invention, a chip testing apparatus is provided. The apparatus includes: a setting module configured to set a ring oscillator in a device under test (DUT) to have a first link length; a testing module configured to obtain a first frequency of the DUT based on the first link length and a first test voltage of the DUT, and configured to run test cases against the DUT based on the first frequency; and a determining module configured to obtain a frequency corresponding to the first test voltage based on the test results of the test cases.

[0007] In another aspect of the invention, an electronic device is provided. The electronic device includes a memory configured to store a computer program; and a processor configured to execute the computer program to perform the above-described method for obtaining the voltage and frequency relationship.

[0008] In another aspect of the invention, a computer-readable medium is provided. This medium stores a computer program that is executed by a processor to implement the above-described method for obtaining the voltage-frequency relationship.

[0009] According to an embodiment of the present invention, by adjusting the link length of the ring oscillator to change the frequency while keeping the test voltage fixed, the voltage will not change when the frequency is changed during the test, thereby simplifying the test process. Furthermore, because the frequency corresponding to the same test voltage can be completely tested, the test method of the present invention is less sensitive to power supply voltage fluctuations. Only a small frequency margin is needed to obtain good system stability, which facilitates the provision of reasonable practical application conditions based on the test results and shortens the product launch time. Attached Figure Description

[0010] Figure 1 This is a schematic diagram of a method for implementing frequency adjustment according to an embodiment of the present invention;

[0011] Figure 2 This is a flowchart of a method for obtaining the relationship between voltage and frequency according to an embodiment of the present invention;

[0012] Figure 3 A flowchart illustrating a method for determining the voltage and frequency relationship of a device under test according to an embodiment of the present invention;

[0013] Figure 4 A table illustrating the parameters recorded in the method for obtaining the relationship between voltage and frequency according to an embodiment of the present invention;

[0014] Figure 5 This is a block diagram of a chip testing apparatus according to an embodiment of the present invention;

[0015] Figure 6 This is a block diagram of an electronic device according to an embodiment of the present invention. Detailed Implementation

[0016] To explain in detail the technical content, objectives, and effects of the present invention, the following description is provided in conjunction with the embodiments and accompanying drawings.

[0017] In existing technologies, confirming the frequency-voltage correspondence requires corresponding tests. Traditional dynamic voltage-frequency adjustment testing methods first determine the target frequency. Then, the minimum voltage at which the voltage detection system can operate stably is adjusted. Subsequent rounds of experiments are conducted based on variables such as different temperatures and wafer fabrication processes to determine the voltage margin and ensure system stability. With the introduction of an adaptive frequency adjustment mechanism, the correlation between voltage and frequency changes; adjusting the voltage also changes the frequency, making it impossible to maintain their independence and affecting the implementation of the testing plan. If a frequency-voltage meter is manually designed, a large margin is needed to ensure stability due to significant errors. However, with the adaptive frequency adjustment mechanism, the frequency changes along with the voltage during adjustment, making it impossible to confirm the correspondence between the two.

[0018] To address at least the aforementioned technical problems, this disclosure provides a method for obtaining the relationship between voltage and frequency. According to this disclosure, by setting up a ring oscillator and adjusting the link length within the ring oscillator, the frequency can be adjusted to test whether the system can operate normally at different frequencies corresponding to the same test voltage. In this way, according to embodiments of this disclosure, the frequency range corresponding to the test voltage can be tested, thereby establishing a frequency-voltage table. Furthermore, because the data is obtained from actual tests, system stability can be guaranteed without reserving a large allowance, thus adapting to different testing scenarios.

[0019] Figure 1 This is a schematic diagram illustrating a method for frequency regulation according to an embodiment of the present invention. A ring oscillator is used internally in the chip under test to establish the correspondence between process corners, temperature, voltage, and frequency. The frequency of the ring oscillator is modulated by the power supply voltage link, and frequency regulation is achieved by controlling the length of the ring oscillation link to change the drive strength, such as... Figure 1 As shown. The number of ring oscillators or the link length are configured via registers. The minimum scale for link length and voltage adjustment depends on the chip design. The technical solution of this invention changes the frequency by fixing the test voltage and adjusting the link length, thus allowing the highest operating frequency to be determined based on the current voltage, and consequently obtaining a table showing the relationship between all operating voltages and frequencies. In this way, the problem of not being able to obtain the voltage-frequency relationship through testing in such chips is solved.

[0020] In the following, the technical solutions according to this disclosure will be described with reference to specific embodiments and in conjunction with the accompanying drawings.

[0021] Figure 2 This is a flowchart illustrating a method 100 for obtaining a voltage-frequency relationship according to an embodiment of the present disclosure. (Refer to...) Figure 2 The method 100 includes the following steps 102 to 108.

[0022] In step 102, the ring oscillator in the device under test is configured to have a first link length.

[0023] In one optional implementation, the first link length is the maximum value within a preset length range. In this way, as the link length is gradually decreased starting from the first length, the link length range of the ring oscillator can be covered more completely, avoiding omissions and ensuring the accuracy of the test results.

[0024] In some embodiments, the number of ring oscillators or the link length can be configured via registers. The upper limit for the number of ring oscillators and the corresponding link length depends on the chip design.

[0025] In one optional implementation, after the device under test (DUT) is powered on, the initial voltage is set to the first test voltage of the DUT. This initial voltage is set according to the standard voltage and frequency characteristics of the DUT, and is a voltage that ensures stable and normal operation of the DUT. In this way, the initial voltage is adjusted immediately after the DUT is powered on, ensuring that the system can enter a normal operating state immediately after power-on, preventing the program from failing to run upon startup. Furthermore, the entire test process can be successfully completed during the initial test, facilitating subsequent adjustments to obtain the upper and lower limits that the DUT can withstand.

[0026] In step 104, the first frequency of the device under test is obtained based on the first link length and the first test voltage of the device under test.

[0027] In step 106, test cases are run for the device under test based on the first frequency.

[0028] In some embodiments, the test cases used can characterize the performance of the current test module. Generally, test cases with high load or high complexity are selected, and the test results can be intuitively judged. In some embodiments, if the test cases can be run correctly within a specified time or a specified number of cycles, it can be determined whether the current voltage / oscillator length can meet the requirements of the current frequency operation.

[0029] In step 108, the frequency corresponding to the first test voltage is obtained based on the test result of the test case. In some embodiments, if the test result of the test case indicates a pass, the execution is repeated. The link length of the ring oscillator is reduced by a preset value, and the current frequency of the device under test is obtained based on the reduced current link length and the first test voltage. Test cases are run on the device under test based on the current frequency until the test result of the test case indicates a fail. If the test result of the test case indicates a fail, the previously obtained current frequency is recorded as the maximum frequency corresponding to the first test voltage. In this way, when the test fails, it indicates that the chip cannot perform normal operation at the current frequency. The current frequency obtained in the previous test represents the maximum frequency under that test voltage, thus completing the test of the maximum frequency that can be corresponding to a test voltage.

[0030] In some embodiments, the correspondence between the first test voltage, the current link length, the current frequency, and the test results of the test case is recorded. In this way, the correspondence between the first test voltage, the current link length, the current frequency, and the test results is recorded during the test. That is, in addition to recording the frequency corresponding to the final first test voltage, important parameters during the test are also recorded. This allows testers to evaluate the test results based on the data, facilitating subsequent adjustments to the data used in the test and judging the accuracy of the test results. After the test passes, the test results are recorded. In addition to recording the final highest frequency, the intermediate test processes are also marked, facilitating the identification of data anomalies and providing more reference values ​​to reduce the error of the final measurement results.

[0031] In some embodiments, if the first test result corresponding to the first link length of the test case indicates a pass, the ring oscillator is configured to have a second link length, which is smaller than the first link length by a preset value. A second frequency of the device under test is obtained based on the second link length and the first test voltage. The test case is run on the device under test based on the second frequency. If the second test result corresponding to the second link length of the test case indicates a fail, the first frequency corresponding to the first link length is determined as the frequency corresponding to the first test voltage. In this way, if the link length corresponding to the current ring oscillator cannot complete the test normally, it indicates that the frequency corresponding to the previous link length is the range within which normal operation is possible corresponding to the first test voltage.

[0032] In some embodiments, if the second test result corresponding to the second link length of the test case indicates a pass, the ring oscillator is configured to have a third link length, which is smaller than the second link length by a preset value. A third frequency of the device under test is obtained based on the third link length and the first test voltage. The test case is run on the device under test based on the third frequency. If the third test result corresponding to the third link length of the test case indicates a fail, the second frequency corresponding to the second link length is determined as the frequency corresponding to the first test voltage. In this way, if the second test result corresponding to the second link length passes, it indicates that there may be frequencies larger than the second frequency corresponding to the second link length that can also complete the test. Therefore, the link length of the ring oscillator is further reduced to obtain a third frequency for testing, ensuring the accuracy of the frequency corresponding to the final obtained first test voltage.

[0033] In some embodiments, the method may further include: setting a second test voltage for the device under test; configuring the ring oscillator to have the first link length; obtaining a fourth frequency of the device under test based on the first link length and the second test voltage; running test cases for the device under test based on the fourth frequency; and obtaining a frequency corresponding to the second test voltage based on the test results of the test cases. In this manner, after determining the frequency corresponding to the first test voltage, the voltage is adjusted to the second test voltage, and the testing process for the second test voltage (i.e., steps 102 to 108 above) is continued. This allows for the determination of frequencies corresponding to other different voltages after testing the frequency corresponding to a single voltage, thereby improving the coverage of the test results.

[0034] In some embodiments, setting a second test voltage for the device under test includes: decreasing or increasing the first test voltage according to a preset voltage interval to obtain the second test voltage. In this way, by changing the value of the test voltage by increasing or decreasing the preset voltage interval each time, the accuracy of the final result is avoided by skipping voltage values ​​during the manual selection process, and the sequential increase or decrease of the test voltage improves the readability of the final test data.

[0035] In some embodiments, obtaining a new test voltage includes: obtaining a preset voltmeter, determining whether all voltages in the voltmeter have been tested; if the voltages in the voltmeter have not been tested, then obtaining the untested voltage in the voltmeter as the second test voltage. In this way, the voltmeter is preset, and during the test, it is only necessary to determine whether all voltage values ​​have been tested, simplifying the testing process and facilitating the determination of whether the test is sufficient.

[0036] In some embodiments, the method may further include: if all voltages in the voltmeter have been tested, then outputting a result representing the relationship between each voltage in the voltmeter and each frequency corresponding to each voltage. In this way, after testing all voltages in the voltmeter, the relationship between each frequency corresponding to each voltage in the voltmeter can be directly output, achieving automated display of test results.

[0037] Figure 3 This is a flowchart illustrating a method for determining the voltage and frequency relationship of a device under test according to an embodiment of the present invention. In some embodiments, the device under test is a chip. (Refer to...) Figure 3 The method includes steps 202 to 212.

[0038] In step 202, an initial voltage is set and used as the test voltage. Based on the chip's standard voltage and frequency characteristics, a sufficiently safe voltage is initially set. This initial voltage ensures the system can operate stably and normally. After powering on, the voltage to be tested is first set; in this step, the initial voltage is used to begin the test.

[0039] In step 204, the link length of the ring oscillator is set to the maximum length. When the link length of the CNC oscillator in the device under test is set to the maximum value, the system operating frequency of the device under test is at its lowest. When the highest operating frequency of this voltage is unknown, to ensure that the system does not exhibit abnormalities at the beginning of the test, the link length can be gradually reduced and the system frequency increased until the highest operating frequency is determined.

[0040] In step 206, the current frequency of the device under test (DUT) is obtained based on the test voltage and the oscillator link length. Once the power supply voltage and oscillator link length are determined, the operating frequency of the DUT can be obtained accordingly.

[0041] In step 208, the test case is run, and the test result is determined. If it passes (PASS), steps 210 and 212 are executed; otherwise (FAIL), step 214 is executed. The test case can include high-load or highly complex test cases that characterize the performance of the device under test and allow for intuitive judgment of the test results. If the test case runs correctly within the specified time or number of cycles, it is determined that the current voltage and the oscillator link length meet the requirements for running the current test case.

[0042] In step 210, record the current test voltage, current link length, and current frequency.

[0043] In step 212, the link length of the oscillator is reduced by a preset value, and the process returns to step 206.

[0044] In step 214, determine whether all voltages in the voltmeter have been tested. If yes, proceed to step 216; otherwise, proceed to step 218.

[0045] In step 216, the correspondence between the test voltage, the link length of the oscillator, and the maximum frequency is recorded to generate a table.

[0046] In step 218, record the maximum frequency corresponding to the current test voltage, obtain the new test voltage, and return to step 204. If the test result of the test case corresponding to the current link length fails, set the previous frequency corresponding to the previous link length to the maximum frequency.

[0047] Figure 4 This is a schematic table illustrating the recording of parameters in a method for obtaining the relationship between voltage and frequency according to an embodiment of the present invention. (Refer to...) Figure 4 The first test voltage is set to 750mV. The link length is set to the maximum length of 10, and the corresponding frequency value is obtained as 1750MHz. Testing is then performed based on the first test voltage of 750mV and the frequency of 1750MHz. If the test passes, the current test voltage, current link length, and current frequency are recorded. Then, the oscillator link length is reduced by a preset value of 1 to 9, and the corresponding frequency value is obtained as 1800MHz. The test continues. If the test also passes, the oscillator link length is further reduced by a preset value of 1 to 8, and the corresponding frequency value is obtained as 1850MHz. If the test also passes, the oscillator link length is further reduced by a preset value of 1 to 7, and the corresponding frequency value is obtained as 1900MHz. If the test fails at this point, it indicates that the frequency upper limit of the first test voltage of 750mV has been exceeded. The frequency value of 1850MHz obtained in the previous test is the upper limit of the frequency corresponding to the first test voltage of 750mV.

[0048] After completing the first test voltage test, obtain the second test voltage of 850mV according to the preset voltmeter, or the preset increase of 100mV, and increase the first test voltage according to the preset increase to obtain the second test voltage. Similarly, first set the link length to the maximum length of 10, and obtain the corresponding frequency value of 1850MHz. Perform the test based on the second test voltage of 850mV and the frequency of 1850MHz. If the test result is passed, decrease the oscillator link length by the preset value of 1 to 9, obtain the corresponding frequency value of 1900MHz, and continue the test. If the test result is also passed, continue decreasing the oscillator link length by the preset value of 1 to 8, obtain the corresponding frequency value of 1950MHz, and continue the test. If the test result is also passed, continue decreasing the oscillator link length by the preset value of 1 to 7, obtain the corresponding frequency value of 2000MHz, and continue the test. If the test result is unsuccessful at this time, it means that the frequency limit of the second test voltage of 850mV has been exceeded. The frequency value of 1950MHz obtained in the previous test is the frequency limit corresponding to the second test voltage of 850mV.

[0049] The test can continue to acquire a new third test voltage and repeat until the preset voltage range or the voltage value in the preset voltage meter has been tested.

[0050] According to another aspect of the invention, Figure 5 This is a block diagram illustrating a chip testing apparatus 300 according to an embodiment of the present invention. (Refer to...) Figure 5 The chip testing device 300 includes: a setting module 302, a testing module 304, and a determining module 306.

[0051] The setting module 302 is configured to set the ring oscillator in the device under test to have a first link length.

[0052] The test module 304 is configured to obtain the first frequency of the device under test based on the first link length and the first test voltage of the device under test, and is configured to run test cases for the device under test based on the first frequency.

[0053] The determining module 306 is configured to obtain the frequency corresponding to the first test voltage based on the test results of the test case.

[0054] In some embodiments, the determining module 306 is configured to, if the test result of the test case indicates a pass, repeatedly cause the setting module to reduce the link length of the ring oscillator by a preset value, and repeatedly cause the test module to obtain the current frequency of the device under test based on the reduced current link length and the first test voltage, and run test cases for the device under test based on the current frequency, until the test result of the test case indicates a fail. The determining module 306 is also configured to, if the test result of the test case indicates a fail, record the previously obtained current frequency as the maximum frequency corresponding to the first test voltage.

[0055] It should be understood that the setting module 302, the testing module 304 and the determining module 306 can be configured to execute the corresponding steps or actions in the methods described above, which will not be repeated here.

[0056] According to another aspect of the invention, Figure 6 This is a schematic diagram illustrating an electronic device 400 according to an embodiment of the present invention. (Refer to...) Figure 6 The electronic device 400 includes a memory 402, a processor 404, and a computer program stored in the memory and executable on the processor. When the processor executes the computer program, it implements the various steps of the method for obtaining the voltage and frequency relationship as described above.

[0057] According to another aspect of the present invention, a computer-readable medium is provided. The computer-readable medium stores a computer program that is executed by a processor to implement the method for obtaining the voltage-frequency relationship as described above.

[0058] In summary, the method, apparatus, device, and storage medium provided by this invention for obtaining the voltage-frequency relationship establish a correspondence between process corners, temperature, voltage, and frequency within the chip under test using a ring oscillator. The frequency of the ring oscillator is modulated by the power supply voltage link, and by controlling the length of the ring oscillator link to change the drive strength, the frequency can be individually adjusted without changing the voltage. The link length of the ring oscillator and the minimum scale for voltage adjustment are determined according to the chip design. During testing, the frequency is changed by adjusting the link length while maintaining a fixed test voltage. This allows the highest operating frequency to be determined based on the current voltage, thereby obtaining a table showing the relationship between all operating voltages and frequencies. This solves the problem that the voltage-frequency relationship in such chips cannot be obtained through testing, expanding the applicable scenarios for methods of obtaining voltage-frequency correlation.

[0059] The above description is merely an embodiment of the present invention and does not limit the patent scope of the present invention. Any equivalent modifications made based on the content of the present invention specification and drawings, or direct or indirect applications in related technical fields, are similarly included within the patent protection scope of the present invention.

Claims

1. A method for obtaining the relationship between voltage and frequency, characterized in that, include: The ring oscillator in the device under test is configured to have a first link length, and the link length in the ring oscillator is adjusted to adjust the frequency; The first frequency of the device under test is obtained based on the first link length and the first test voltage of the device under test. Test cases are run on the device under test based on the first frequency; as well as Based on the test results of the test cases, obtain the frequency corresponding to the first test voltage. The frequency corresponding to the first test voltage is obtained based on the test results of the test cases, including: If the test result of the test case indicates that it passes, then repeat the following steps: reduce the link length of the ring oscillator by a preset value, obtain the current frequency of the device under test based on the reduced current link length and the first test voltage, and run the test case for the device under test based on the current frequency until the test result of the test case indicates that it fails. as well as If the test result of the test case indicates that it has failed, then the previously obtained current frequency is recorded as the maximum frequency corresponding to the first test voltage.

2. The method according to claim 1, characterized in that, Obtaining the frequency corresponding to the first test voltage based on the test results of the test cases includes: If the first test result corresponding to the first link length of the test case indicates that it passes, then the ring oscillator is set to have a second link length, the second link length being a preset value smaller than the first link length; The second frequency of the device under test is obtained based on the second link length and the first test voltage; The test cases are run on the device under test based on the second frequency; and If the second test result corresponding to the second link length of the test case indicates that it has failed, then the first frequency corresponding to the first link length is determined to be the frequency corresponding to the first test voltage.

3. The method according to claim 2, characterized in that, Obtaining the frequency corresponding to the first test voltage based on the test results of the test cases includes: If the second test result corresponding to the second link length of the test case indicates that it passes, then the ring oscillator is set to have a third link length, which is smaller than the second link length by the preset value; The third frequency of the device under test is obtained based on the third link length and the first test voltage; The test cases are run on the device under test based on the third frequency; and If the third test result corresponding to the third link length of the test case indicates that it has failed, then the second frequency corresponding to the second link length is determined to be the frequency corresponding to the first test voltage.

4. The method according to claim 1, characterized in that, Setting the ring oscillator in the device under test to have a first link length includes: Set the link length of the ring oscillator to the maximum value within a preset length range.

5. The method according to claim 1, characterized in that, Also includes: After the device under test (DUT) is powered on, the initial voltage is set to the first test voltage of the DUT. The initial voltage is set according to the standard voltage and frequency characteristics of the device under test, and the initial voltage is a voltage that can ensure the stable and normal operation of the device under test.

6. The method according to claim 1, characterized in that, After obtaining the frequency corresponding to the first test voltage, the process further includes: Set a second test voltage for the device under test; Configure the ring oscillator to have the first link length; The fourth frequency of the device under test is obtained based on the first link length and the second test voltage; Based on the fourth frequency, test cases are run for the device under test; and The frequency corresponding to the second test voltage is obtained based on the test results of the test cases.

7. The method according to claim 6, characterized in that, Setting a second test voltage for the device under test includes: The second test voltage is obtained by decreasing or increasing the first test voltage according to a preset voltage interval.

8. The method according to claim 6, characterized in that, Setting a second test voltage for the device under test includes: Obtain a preset voltmeter and determine whether the voltages in the voltmeter have all been tested; and If the voltage in the voltmeter has not been tested, then the untested voltage in the voltmeter is taken as the second test voltage.

9. The method according to claim 8, characterized in that, Also includes: If all voltages in the voltmeter have been tested, the output will show the relationship between each voltage in the voltmeter and the corresponding frequency.

10. The method according to claim 1, characterized in that, Also includes: Record the correspondence between the first test voltage, the current link length, the current frequency, and the test results of the test case.

11. A chip testing device, characterized in that, include: The setting module is configured to set the ring oscillator in the device under test to have a first link length, wherein the link length in the ring oscillator is adjusted to adjust the frequency; The test module is configured to obtain the first frequency of the device under test based on the first link length and the first test voltage of the device under test, and is configured to run test cases for the device under test based on the first frequency; as well as The determination module is configured to obtain the frequency corresponding to the first test voltage based on the test results of the test cases. The determining module is configured as follows: If the test result of the test case indicates that it passes, the setting module is repeatedly made to reduce the link length of the ring oscillator by a preset value, and the test module is repeatedly made to obtain the current frequency of the device under test based on the reduced current link length and the first test voltage, and run the test case for the device under test based on the current frequency until the test result of the test case indicates that it fails. as well as If the test result of the test case indicates that it has failed, then the previously obtained current frequency is recorded as the maximum frequency corresponding to the first test voltage.

12. An electronic device, characterized in that, include: The memory is configured to store executable programs; as well as A processor is configured to execute the program to perform the method according to any one of claims 1 to 10.

13. A computer-readable storage medium having a computer program stored thereon, characterized in that, The computer program is executed to implement the method according to any one of claims 1 to 10.