A red Micro LED chip and its fabrication method

Abstract

The application discloses a red Micro LED chip and a preparation method thereof, and relates to the technical field of semiconductors. The red Micro LED chip comprises a substrate layer, a seed layer and a red light emitting element layer. A plurality of first openings are formed on the seed layer. The cross section of the first opening is configured as a multi-angle star shape. From top to bottom, the cross-sectional area of the first opening gradually decreases, and the first opening has a sharp bottom. A plurality of second openings corresponding to the first openings are formed on the red light emitting element layer. The plurality of first openings are arranged in multiple rows and multiple columns. The application has the advantages of controllable yield and high production efficiency.

Description

Technical Field

[0001] This invention relates to the field of semiconductor technology, specifically to a red Micro LED chip and its fabrication method. Background Technology

[0002] Epitaxial growth of red InGaN quantum wells is a challenge in the fabrication of red LEDs. The main reason is that indium atoms are large, making it difficult to dope them into the quantum well when there is significant stress in the material system. In related technologies, a maximum indium content of 30% can be achieved. However, red LEDs require an indium content of over 35% to be realized.

[0003] Therefore, how to increase the In content in InGaN quantum wells has become a technical problem that urgently needs to be solved in this field. Summary of the Invention

[0004] This invention aims to address one of the technical problems in related technologies to a certain extent. To this end, this invention provides a red Micro LED chip and its fabrication method, which has the advantages of controllable yield and high production efficiency.

[0005] To achieve the above objectives, as a first aspect of the present invention, a red Micro LED chip is provided, comprising a substrate layer, a seed layer, and a red light-emitting element layer. A plurality of first openings are formed on the seed layer. The cross-sectional structure of the first openings is a polygonal star shape, and the cross-sectional area of ​​the first openings gradually decreases from top to bottom, and the first openings have a pointed bottom. A plurality of second openings corresponding one-to-one with the positions of the first openings are formed on the red light-emitting element layer, and the plurality of first openings are arranged in multiple rows and columns.

[0006] Optionally, the cross-sectional structure of the first opening is hexagonal.

[0007] Optionally, the sidewall of the first opening is covered with a material for forming the red light-emitting element layer.

[0008] Optionally, the first opening is filled with a dielectric material.

[0009] Optionally, the depth of the first opening is 200–1000 nm.

[0010] Optionally, the red light-emitting element layer includes a superlattice layer, an n-type semiconductor layer, a barrier layer, a quantum well layer, and a p-type semiconductor layer stacked sequentially, wherein the superlattice layer is formed on the seed layer.

[0011] As a second aspect of the present invention, a method for fabricating a red Micro LED chip is provided, wherein the fabrication method includes:

[0012] Provide a substrate layer;

[0013] A seed layer is formed on the substrate layer;

[0014] A mask layer is formed on the seed layer;

[0015] The mask layer is patterned to obtain a mask pattern with multiple circular openings;

[0016] Using the mask pattern as a mask, the seed layer is etched to form a plurality of first openings on the seed layer. The cross-section of the first opening is a polygonal star shape, and the cross-sectional area of ​​the first opening gradually decreases from top to bottom. The first opening has a pointed bottom, and the plurality of first openings are arranged in multiple rows and columns.

[0017] Epitaxial growth is performed on the side of the seed layer away from the substrate layer to obtain a red light-emitting element layer.

[0018] Optionally, after the step of forming a plurality of first openings on the seed layer, the method further includes:

[0019] A dielectric material layer is formed on the side of the seed layer away from the substrate layer;

[0020] Remove the medium material outside the first opening.

[0021] Optionally, the material of the dielectric material layer is selected from SiO2 and SiN. X One or more of SiCN, SiOCN, and SiOC.

[0022] Optionally, the material of the mask layer is selected from one or more of SiO2, SiNX, SiCN, SiOCN, and SiOC.

[0023] Optionally, the etching of the seed layer using the mask pattern as a mask includes:

[0024] Using the mask pattern as a mask, the seed layer is etched using an etching solution; or

[0025] Using the mask pattern as a mask, the seed layer is subjected to plasma etching.

[0026] Optionally, the preparation method further includes:

[0027] The prepared red light-emitting element layer is cut to obtain a Micro LED array.

[0028] In this application, during the fabrication of Micro LED chips, a first opening for stress relief is formed on the seed layer through an etching process. The size and density of the first opening are controllable, making it suitable for mass production and ensuring a controllable yield of the resulting chips. Furthermore, the first opening employs a relatively regular array layout, resulting in a more uniform distribution of interfacial stress. This ensures the precision and repeatability of each process step during manufacturing, thereby improving production efficiency.

[0029] These features and advantages of the present invention will be disclosed in detail in the following specific embodiments and accompanying drawings. The preferred embodiments or means of the present invention will be shown in detail in conjunction with the accompanying drawings, but are not intended to limit the technical solutions of the present invention. In addition, each of these features, elements and components appearing in the following text and drawings is a plurality of, and different symbols or numbers are used for convenience of representation, but all represent parts with the same or similar construction or function. Attached Figure Description

[0030] The present invention will be further described below with reference to the accompanying drawings:

[0031] Figure 1 A schematic diagram of one embodiment of the red Micro LED chip provided by the present invention;

[0032] Figure 2 A schematic diagram illustrating the shape of the first opening;

[0033] Figure 3 A schematic diagram of another embodiment of the red Micro LED chip provided by the present invention;

[0034] Figure 4 A flowchart illustrating one embodiment of the preparation method provided by the present invention;

[0035] Figure 5 A schematic diagram to illustrate the mask pattern.

[0036] Among them, 1 is the substrate layer; 2 is the seed layer; 21 is the first opening; 3 is the red light-emitting element layer; 31 is the second opening; 4 is the dielectric material; and 5 is the mask layer. Detailed Implementation

[0037] Embodiments of the present invention are described in detail below, examples of which are illustrated in the accompanying drawings, wherein the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout. The embodiments described are intended to explain the present invention and should not be construed as limiting the invention.

[0038] The terms "an embodiment," "example," or "trademark" used in this specification refer to a particular feature, structure, or characteristic described in connection with the embodiment itself that may be included in at least one embodiment disclosed in this patent. The phrase "in an embodiment" appearing in various places throughout the specification does not necessarily refer to the same embodiment.

[0039] V-shaped defects are a common bulk defect in gallium nitride (GaN) materials, primarily formed by factors such as lattice mismatch. Especially during LED epitaxial structure fabrication, the low growth temperature disrupts interlayer growth, easily leading to the formation of V-shaped defects in the quantum well region. Once these V-shaped defects form, the subsequent formation of the light-emitting element layer allows for easier incorporation of In atoms into the quantum well, thereby generating red light.

[0040] However, the current technology uses a completely uncontrollable method to form V-shaped defects, resulting in uncontrollable size and density of the formed V-shaped defects. Therefore, it cannot be applied to large-scale mass production, and the yield of the produced Micro LED chips is uncontrollable.

[0041] In view of this, as a first aspect of the present invention, such as Figure 1 , Figure 2 and Figure 3 As shown, a red MicroLED chip is provided, including a substrate layer 1, a seed layer 2, and a red light-emitting element layer 3. Multiple first openings 21 are formed on the seed layer 2. The cross-sectional structure of each first opening 21 is a polygonal star shape, with the cross-sectional area gradually decreasing from top to bottom, and each first opening 21 having a pointed bottom. Multiple second openings 31 are formed on the red light-emitting element layer 3, each corresponding to one of the first openings 21. Furthermore, the multiple first openings 21 are arranged in multiple rows and columns.

[0042] In this embodiment of the invention, a red light-emitting element layer 3 is formed on the seed layer 2 by epitaxial growth.

[0043] Before the epitaxial growth step, multiple first openings 21 with a polygonal star-shaped cross-section are formed on the seed layer 2, each corner being a V-shaped defect, to release the stress accumulated in the material system. The stress in the areas of the seed layer 2 where the first openings 21 are not formed has been released, allowing for more In doping. Specifically, after releasing the stress at the interface through the first openings 21 and the second openings 31, In atoms are more easily doped into the quantum well, growing a high-In-content InGaN material, thereby enabling the red Micro LED chip to emit red light at the required wavelength and efficiency (wavelength 620-625nm).

[0044] Because the first opening 21 is a polygonal star, its formation process is easier to control. In other words, when preparing the red Micro LED chip provided in this embodiment of the invention, the number, position and density of V-shaped defects in the seed layer 2 can be controlled by forming the first opening 21 in a polygonal star shape. This allows for better control of the epitaxial growth process, reduces the stress caused by epitaxial growth, increases the doping rate of In, and ultimately improves the yield of manufacturing red Micro LED chips.

[0045] The cross-section of the first opening 21 is designed as a polygonal star. The polygonal star structure means that the edge of the first opening 21 has multiple vertices and edges. The second opening 31 formed by epitaxial growth is also constructed to have multiple vertices and edges. This structure helps to distribute stress to multiple points rather than concentrate it in a single location, further reducing stress concentration and thus improving the quality and luminous efficiency of the red Micro LED chip.

[0046] Multiple first openings 21 form a first opening 21 array, and multiple second openings 31 form a second opening 31 array, further enhancing the stress relief effect. The first openings 21 in this application also employ a more regular array layout, resulting in a more uniform stress distribution. This ensures the precision and repeatability of each process step during manufacturing, thereby improving manufacturing efficiency and making it easier to mass-produce red Micro LED chips.

[0047] In this embodiment of the invention, the specific shape of the first opening 21 is not specifically limited, as long as its cross-section has multiple acute angles and forms a V-shaped defect for stress relief.

[0048] In this embodiment of the invention, a first opening 21 can be formed on the seed layer 2 by an etching process. By controlling the process parameters during the etching process, different etching ratios can be achieved in different directions to form the first opening 21 on the seed layer 2.

[0049] Optionally, the seed layer 2 can be made of a metallic or semiconductor material, on which holes with a hexagonal cross-section are easily formed. Therefore, as an optional implementation, the first opening 21 has a hexagonal cross-section. It should be noted that the shape of the first opening 21 mainly depends on the material of the seed layer 2 and the determination of suitable etching process conditions, combined with a real-time monitoring and feedback adjustment mechanism, to prepare a regular opening shape on the seed layer 2.

[0050] In this embodiment of the invention, the type of material within the first opening 21 is not specifically limited. As an optional implementation, the sidewall of the first opening 21 is covered with a material for forming the red light-emitting element layer 3. That is, after the first opening 21 is formed, the red light-emitting element layer 3 is directly formed through an epitaxial growth process, thereby reducing the process difficulty and improving the efficiency of fabricating red Micro LEDs.

[0051] like Figure 3 As shown, red light-emitting element layers are grown on both the sidewall of the first aperture 21 and the top surface of the seed layer 2. However, during the epitaxial growth process, the growth rate of the sidewall of the first aperture 21 is much lower than that of the top surface of the seed layer 2. Therefore, the thickness of the red light-emitting element layer 3 grown on the sidewall of the first aperture 21 is much smaller than that grown on the top surface of the seed layer 2. The red light-emitting element layer 3 grown on the sidewall of the first aperture 21 can inject more holes into the quantum well, change the emission angle, and reduce the influence of the total internal reflection angle on the emitted light, thereby improving the luminous efficiency and luminous intensity.

[0052] Of course, the embodiments of the present invention are not limited to this, and the material for forming the red light-emitting element layer 3 may not be provided in the first opening. In such an embodiment, such as Figure 1 As shown, the medium material 4 can be filled into the first opening 21 first.

[0053] In this embodiment, the first opening 21 is filled with dielectric material 4, that is, the inside of the first opening 21 is occupied by dielectric material 4. Therefore, the red light-emitting element layer 3 cannot grow in the first opening 21, but grows on the plane (top surface) of the seed layer 2 which is not covered by dielectric material 4. Thus, the red Micro LED chip produced reduces leakage channels, improves electric field distribution, and improves device reliability.

[0054] The following section will describe how to fill the first opening 21 with the medium material 4, which will not be elaborated here.

[0055] In this embodiment of the invention, the depth of the first opening 21 is not specifically limited. Optionally, the depth of the first opening is between 200 nm and 10000 nm.

[0056] When the depth of the first aperture 21 is less than 200 nm, it restricts the hole injection path, making it difficult for holes to be effectively transported from the electrode to the light-emitting layer, thus affecting the chip's luminous efficiency and brightness. Furthermore, a shallow first aperture 21 does not facilitate the release of interface stress. When the depth of the first aperture 21 is greater than 1000 nm, it increases the leakage path inside the chip, making it easier for current to pass through unexpected paths, leading to leakage. Leakage directly affects the chip's luminous efficiency and energy consumption, and in severe cases, may even damage the chip.

[0057] In this embodiment of the invention, the specific structure and material of the red light-emitting element layer are not specifically limited. As an optional implementation, the red light-emitting element layer includes a superlattice layer, an n-type semiconductor layer, a barrier layer, a quantum well layer, and a p-type semiconductor layer stacked sequentially, wherein the superlattice layer is formed on the seed layer.

[0058] In embodiments of the present invention, the substrate may be a sapphire substrate, a silicon carbide substrate, or a silicon substrate, etc.

[0059] In this embodiment, the superlattice layer typically consists of alternating thin layers of two or more different materials, with layer thicknesses typically on the nanoscale. This structure can introduce periodic barriers and potential wells to improve carrier injection efficiency and transport characteristics. The n-type semiconductor layer is an electron-rich layer, primarily formed by donor impurity doping. In LEDs, the n-type semiconductor layer acts as an electron injection layer, responsible for injecting electrons from the external circuitry into the light-emitting region. This layer typically has high electron mobility and low resistivity to ensure efficient electron transport to the quantum well layer. The barrier layer is typically located between the n-type semiconductor layer and the quantum well layer, or between the quantum well layers (if multiple quantum wells exist). Its main function is to restrict the recombination of carriers (electrons and holes) within the quantum well layer, thereby improving radiative recombination efficiency and reducing non-radiative recombination losses. The barrier layer has a high bandgap energy, which can form a barrier to carriers, making them more likely to recombine and emit light in the quantum well layer. The quantum well layer is the core light-emitting region, formed by sandwiching thinner semiconductor layers (typically low-bandgap materials) between wider barrier layers. Due to quantum size effects, charge carriers (electrons and holes) in the quantum well layer are confined to a two-dimensional space, increasing the probability of them colliding and recombinating to emit light. By adjusting the thickness, material, and composition of the quantum well layer, the emission wavelength and spectral characteristics of the LED can be precisely controlled. The p-type semiconductor layer is a hole-rich layer, mainly formed by acceptor impurity doping. In LEDs, the p-type semiconductor layer acts as a hole injection layer, responsible for injecting holes from the external circuitry into the light-emitting region. Similar to the n-type semiconductor layer, the p-type semiconductor layer also needs to have high hole mobility and low resistivity to ensure that holes can be efficiently transported to the quantum well layer and recombine with electrons to emit light.

[0060] As an embodiment of the present invention, a method for preparing a red Micro LED chip is also provided, such as... Figure 4 As shown, the preparation method includes:

[0061] In step S1, a substrate layer is provided;

[0062] In step S2, a seed layer is formed on the substrate layer;

[0063] In step S3, a mask layer is formed on the seed layer;

[0064] In step S4, the mask layer is patterned to obtain a mask pattern with multiple circular openings. Using the mask pattern as a mask, the seed layer is etched to form multiple first openings on the seed layer. The cross-section of the first opening is a polygonal star shape.

[0065] In step S5, epitaxial growth is performed on the side of the seed layer away from the substrate layer to obtain a red light-emitting element layer.

[0066] The preparation method described above can prepare the Micro LED chip provided in the first aspect of this invention. As mentioned above, because the first opening is a polygonal star shape, its formation process is easier to control. That is, when preparing the red Micro LED chip provided in the embodiments of this invention, the number, position and density of V-shaped defects in the seed layer can be controlled by forming a polygonal star-shaped first opening, thereby better controlling the epitaxial growth process and increasing the In doping rate, ultimately improving the yield of manufacturing the red Micro LED chip.

[0067] In this embodiment of the invention, the substrate may be a sapphire substrate, a silicon substrate, or a silicon carbide substrate, etc.

[0068] In this embodiment of the invention, the material of the seed layer is not specifically limited. The seed layer can be a metallic material such as copper or titanium, or a semiconductor material such as zinc oxide. The seed layer is the basis for epitaxial growth and is usually a thin film prepared on the surface of a substrate layer by physical vapor deposition, chemical vapor deposition, or other methods. The seed layer provides the starting point and guidance for the subsequent growth of new crystal materials.

[0069] As an optional implementation, the mask layer is made of SiO2; in other embodiments, the mask layer material may also be selected from SiN. X One or more of SiCN, SiOCN, and SiOC are used. The function of the mask layer is to isolate and protect specific areas in the seed layer. The appropriate process is selected based on the type of mask layer chosen to form the mask layer on the seed layer.

[0070] In step S140, a photolithography patterning process can be used to pattern the mask layer to obtain a mask pattern with multiple circular openings. Specifically, an exposure machine can be used to project the desired pattern onto the mask layer, or a laser can be used to directly etch the desired pattern onto the mask layer, and then an etching process can be used to form multiple circular openings on the mask layer. It should be noted that after patterning, the circular openings should penetrate the mask layer along its thickness direction, but the etching depth should be controlled to avoid etching into the seed layer.

[0071] like Figure 5As shown, the seed layer 2 is etched using the mask pattern as a mask. By precisely controlling the etching process parameters, multiple first openings 21 are formed on the seed layer 2. Specifically, in this embodiment, the cross-section of the first opening 21 is hexagonal. In other embodiments, the cross-section of the first opening 21 can also be other polygonal star shapes. In this embodiment, KOH is used for wet etching of the seed layer 2. In other embodiments, one or more solutions selected from NaOH, NH3OH, DHF, BOE, HCl, and HNO3 can also be used for wet etching. The area of ​​the seed layer 2 covered by the mask layer 5 is not etched, but the area on the seed layer 2 corresponding to the circular opening of the mask layer 5 will still come into contact with the etching solution. Therefore, after wet etching, multiple regularly shaped first openings 21 corresponding to the positions of the circular openings of the mask layer 5 are formed on the seed layer 2.

[0072] Epitaxial growth is performed on the side of the seed layer 2 away from the substrate layer 1 to obtain the red light-emitting element layer 3. Epitaxial growth involves growing a single-crystal film on the seed layer 2 (single-crystal substrate), which is the red light-emitting element layer 3 in this embodiment. The red light-emitting element layer 3 grows along the crystal phase extension of the seed layer 2, and its crystal structure is an extension of the crystal structure of the seed layer 2. By selecting a substrate with specific crystal orientation and direction, the epitaxial layer can be guided to grow along a specific direction. The crystal quality, thickness, and uniformity of the seed layer 2 have a significant impact on epitaxial growth. A seed layer 2 with good crystal quality can guide the growth of new crystal material along a specific direction, resulting in a high-quality crystal. In addition, growth parameters such as temperature, pressure, and atmosphere need to be precisely controlled to ensure that the crystal growth rate and morphology meet the requirements. For example, excessively high temperatures may lead to an increase in crystal defects, while excessively low temperatures may lead to a slow growth rate. During crystal growth, measures also need to be taken to reduce the introduction of impurities and defects. These impurities and defects may adversely affect the electrical, optical, and magnetic properties of the crystal.

[0073] In this embodiment, the substrate is a silicon substrate. In other embodiments, the substrate may also be a sapphire substrate or a silicon carbide substrate, etc.

[0074] After the step of forming a plurality of first openings on the seed layer, the method may further include: covering the side of the seed layer 2 away from the substrate layer 1 with a dielectric material 4; and removing the dielectric material 4 from the first openings 21.

[0075] In this embodiment, a dielectric material 4 is covered on the side of the seed layer 2 away from the substrate layer 1, and the dielectric material 4 in the non-aperture area is removed by processes such as chemical mechanical polishing, so that only the first opening 21 is filled with dielectric material 4. Since the area covered with dielectric material 4 cannot be used for epitaxial growth, the red light-emitting element layer 3 will not grow in the first opening 21.

[0076] In other embodiments, the medium material 4 may not be covered on the seed layer 2, in which case the red light-emitting element layer 3 may also be grown inside the first opening 21.

[0077] Specifically, in this embodiment, the dielectric material 4 is SiO2. In other embodiments, the dielectric material 4 may also be selected from SiN. X One or more of SiCN, SiOCN, and SiOC.

[0078] The fabrication method further includes cutting the prepared light-emitting element layer to obtain a Micro LED array. Using laser cutting and mechanical cutting methods to separate the microdisplay chips can reduce production costs.

[0079] The above are merely specific embodiments of the present invention, but the scope of protection of the present invention is not limited thereto. Those skilled in the art should understand that the present invention includes, but is not limited to, the contents described in the accompanying drawings and the specific embodiments above. Any modifications that do not depart from the functional and structural principles of the present invention will be included within the scope of the claims.

Claims

1. A red Micro LED chip, comprising a substrate layer (1), a seed layer (2), and a red light-emitting element layer (3), characterized in that, Multiple first openings (21) are formed on the seed layer (2). The first openings (21) are obtained by etching using a patterned mask. The cross-sectional structure of the first openings (21) is a polygonal star shape. From top to bottom, the cross-sectional area of ​​the first openings (21) gradually decreases. The first openings (21) have a pointed bottom. Multiple second openings (32) are formed on the red light-emitting element layer (3) that correspond one-to-one with the positions of the first openings (21). The multiple first openings (21) are arranged in multiple rows and columns.

2. The chip according to claim 1, characterized in that, The cross-sectional structure of the first opening (21) is hexagonal.

3. The chip according to claim 1, characterized in that, The sidewall of the first opening (21) is covered with a material for forming the red light-emitting element layer (3).

4. The chip according to claim 1, characterized in that, The first opening (21) is filled with a medium material (4).

5. The chip according to any one of claims 1 to 4, characterized in that, The depth of the first opening (21) is 200~1000nm.

6. The chip according to any one of claims 1 to 4, characterized in that, The red light-emitting element layer includes a superlattice layer, an n-type semiconductor layer, a barrier layer, a quantum well layer, and a p-type semiconductor layer stacked sequentially, with the superlattice layer formed on the seed layer.

7. A method for fabricating a red Micro LED chip, characterized in that, The preparation method includes: Provide a substrate layer; A seed layer is formed on the substrate layer; A mask layer is formed on the seed layer; The mask layer is patterned to obtain a mask pattern with multiple circular openings; Using the mask pattern as a mask, the seed layer is etched to form a plurality of first openings on the seed layer. The cross-section of the first opening is a polygonal star shape, and the cross-sectional area of ​​the first opening gradually decreases from top to bottom. The first opening has a pointed bottom, and the plurality of first openings are arranged in multiple rows and columns. Epitaxial growth is performed on the side of the seed layer away from the substrate layer to obtain a red light-emitting element layer.

8. The preparation method according to claim 7, characterized in that, Following the step of forming a plurality of first openings on the seed layer, the method further includes: A dielectric material layer is formed on the side of the seed layer away from the substrate layer; Remove the medium material outside the first opening.

9. The preparation method according to claim 8, characterized in that, The dielectric material layer is selected from SiO2 and SiN. X One or more of SiCN, SiOCN, and SiOC.

10. The preparation method according to any one of claims 7 to 9, characterized in that, The material of the mask layer is selected from one or more of SiO2, SiNX, SiCN, SiOCN, and SiOC.

11. The preparation method according to any one of claims 7 to 9, characterized in that, The etching of the seed layer using the mask pattern as a mask includes: Using the mask pattern as a mask, the seed layer is etched using an etching solution; or Using the mask pattern as a mask, the seed layer is subjected to plasma etching.

12. The preparation method according to any one of claims 7 to 9, characterized in that, The preparation method further includes: The prepared red light-emitting element layer is cut to obtain a Micro LED array.

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