A method and apparatus for processing a combinatorial optimization problem

Abstract

The application discloses a processing method and device for a combination optimization problem. The method comprises the following steps: running a segmented quantum circuit obtained by splitting an original quantum circuit, and performing error suppression on the measurement result of each segmented quantum circuit to obtain a first measurement result corresponding to each segmented quantum circuit after error suppression; recombining the obtained first measurement result to generate a second measurement result; obtaining an average energy expectation of the original quantum circuit based on the generated second measurement result; and when the execution of the segmented quantum circuit satisfies a specified condition, generating a target combination corresponding to the target combination optimization problem based on the average energy expectation. By using the embodiment of the application, the operation of a combination optimization algorithm with a large number of bits on quantum hardware is realized through the operation and recombination of the split quantum circuit.

Description

Technical Field

[0001] This application belongs to the field of quantum computing technology, and in particular to a method and apparatus for processing combinatorial optimization problems. Background Technology

[0002] Combinatorial optimization is a hot research topic in applied mathematics and theoretical computer science, with significant theoretical and practical implications. Its goal is to find combinations that satisfy requirements within a finite set of objects. Combinatorial optimization problems are generally NP-hard (Non-deterministic Polynomial), posing a significant challenge to the computing power of classical computers, especially when time-sensitive issues are involved.

[0003] As a revolutionary information processing technology, quantum computing can potentially achieve exponential speedups compared to classical computing for specific problems, providing powerful computing power for solving large-scale analysis, computation, and simulation problems in fields such as finance, biomedicine, and transportation. Currently, we are in the era of NISQ (Noisy Medium-Sized Quantum) computers, which are characterized by a small number of qubits and low-depth operable circuits.

[0004] Due to imperfections in quantum state preparation, quantum logic gate manipulation, and measurement operations, most current quantum computers are noisy and only suitable for running small-scale quantum circuits. In combinatorial optimization, current research mainly relies on quantum simulators to simulate the performance of algorithms in the absence of hardware noise. Hardware verification is limited to relatively small numbers of qubits, and expansion to higher qubit numbers is constrained by hardware noise. All of these factors make it difficult to run large-qubit combinatorial optimization algorithms on quantum hardware. Summary of the Invention

[0005] The purpose of this application is to provide a method and apparatus for processing combinatorial optimization problems, which realizes the operation of combinatorial optimization algorithms with a large number of qubits on quantum hardware through operations such as running and recombining the split quantum circuits.

[0006] One embodiment of this application provides a method for processing combinatorial optimization problems, the method comprising:

[0007] Run the segmented quantum circuits obtained by splitting the original quantum circuit, and perform error suppression on the measurement results of each segmented quantum circuit to obtain the first measurement result corresponding to each segmented quantum circuit after error suppression. The original quantum circuit is generated for the target combinatorial optimization problem.

[0008] The first measurement result obtained by recombination is used to generate a second measurement result, wherein the second measurement result is the result obtained by measuring the original quantum circuit;

[0009] Based on the generated second measurement result, the average energy expectation of the original quantum circuit is obtained;

[0010] When the execution of the segmented quantum circuit meets the specified conditions, the target combination corresponding to the target combinatorial optimization problem is generated based on the average energy expectation.

[0011] Alternatively, the original quantum circuit is generated in the following manner:

[0012] Based on the initial state data and the selected design method, the timing of the quantum logic gates and the interaction relationship between the qubits and the quantum logic gates are determined. The initial state data is the state data characterizing the initial quantum state corresponding to the target combinatorial optimization problem.

[0013] Based on the described timing and interaction relationships, a primitive quantum circuit is generated.

[0014] Optionally, the error suppression of the measurement results for each segment of the quantum circuit includes:

[0015] A preset quantum error suppression algorithm is used to suppress the measurement error of each segment of the quantum circuit. The quantum error suppression algorithm includes one or a combination of readout error suppression algorithm, zero-noise extrapolation algorithm, probability error elimination algorithm and dynamic decoupling algorithm.

[0016] Optionally, the first measurement result is obtained by measuring an uncut qubit of a segmented quantum circuit;

[0017] The reorganization of all first measurement results to generate second measurement results includes:

[0018] Reassemble all the first measurement results according to the order of the qubits corresponding to each segment of the quantum circuit in the original quantum circuit to generate the second measurement result.

[0019] Optionally, obtaining the average energy expectation for the original quantum circuit based on all the second measurements includes:

[0020] Calculate the first energy expectation corresponding to each second measurement result;

[0021] Based on a pre-set confidence level, the second energy expectation is determined from the first energy expectation arranged in order of magnitude;

[0022] The average energy expectation of the original quantum circuit is obtained by averaging all the second energy expectations.

[0023] Optionally, the method further includes:

[0024] When the execution of the segmented quantum circuit does not meet the specified conditions, the gradient of the variational parameters in the original quantum circuit is calculated using CVaR.

[0025] Based on the gradient, the variational parameters of each segmented quantum circuit are updated accordingly.

[0026] Another embodiment of this application provides a processing apparatus for combinatorial optimization problems, the apparatus comprising:

[0027] The first acquisition module is used to run the segmented quantum circuits obtained by splitting the original quantum circuit, and to perform error suppression on the measurement results of each segmented quantum circuit to obtain the first measurement result corresponding to each segmented quantum circuit after error suppression. The original quantum circuit is generated for the target combinatorial optimization problem.

[0028] A recombination module is used to recombine the obtained first measurement result to generate a second measurement result, wherein the second measurement result is the result obtained by measuring the original quantum circuit;

[0029] The second acquisition module is used to obtain the average energy expectation of the original quantum circuit based on the generated second measurement result;

[0030] The generation module is used to generate the target combination corresponding to the target combination optimization problem based on the average energy expectation when the execution of the segmented quantum circuit meets the specified conditions.

[0031] Another embodiment of this application provides a quantitative super-cooperative operating system, which implements combinatorial optimization problem processing according to the method described in any of the preceding claims.

[0032] Another embodiment of this application provides a storage medium storing a computer program, wherein the computer program is configured to implement the method described in any of the above-described embodiments when running.

[0033] Another embodiment of this application provides an electronic device including a memory and a processor, wherein the memory stores a computer program and the processor is configured to run the computer program to implement the method described in any of the above embodiments.

[0034] Compared with existing technologies, this application first runs the segmented quantum circuits obtained by splitting the original quantum circuit, and performs error suppression on the measurement results of each segmented quantum circuit to obtain a first measurement result corresponding to each error-suppressed segmented quantum circuit; then, it reassembles the obtained first measurement results to generate a second measurement result; then, based on the generated second measurement result, it obtains the average energy expectation of the original quantum circuit; finally, when the execution of the segmented quantum circuits meets specified conditions, it generates the target combination corresponding to the target combinatorial optimization problem based on the average energy expectation. Through the operation and reassembly of the split quantum circuits, a combinatorial optimization algorithm with a large number of qubits can be implemented on quantum hardware. Attached Figure Description

[0035] Figure 1 This is a network block diagram of a combinatorial optimization problem processing system provided in an embodiment of this application;

[0036] Figure 2 A flowchart illustrating a method for handling combinatorial optimization problems provided in an embodiment of this application;

[0037] Figure 3 A schematic diagram of quantum circuit cutting provided in an embodiment of this application;

[0038] Figure 4 This is a schematic diagram of a processing device for combinatorial optimization problems provided in an embodiment of this application. Detailed Implementation

[0039] The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain this application, and should not be construed as limiting this application.

[0040] Figure 1 This is a network block diagram of a combinatorial optimization problem processing system provided in an embodiment of this application. The combinatorial optimization problem processing system may include a network 110, a server 120, a wireless device 130, a client 140, a storage unit 150, a classical processing system 160, a quantum processing system 170, and may also include additional memory, a classical processor, a quantum processor, and other devices not shown.

[0041] Network 110 is a medium used to provide communication links between various devices and computers connected together within a system for processing combinatorial optimization problems. This includes, but is not limited to, the Internet, corporate intranets, local area networks, mobile communication networks, and combinations thereof. The connection method can be wired, wireless communication links, or fiber optic cables.

[0042] Server 120 and client 140 are conventional data processing systems that may contain data and applications or software tools that perform conventional computational processes. Client 140 may be a personal computer or a network computer, so the data may also be provided by server 120. Wireless device 130 may be a smartphone, tablet, laptop, smart wearable device, etc. Storage unit 150 may include database 151, which can be configured to store data such as qubit parameters, quantum logic gate parameters, quantum circuits, and quantum programs.

[0043] The classical processing system 160 (quantum processing system 170) may include a classical processor 161 (quantum processor 171) for processing classical data (quantum data) and a memory 163 (memory 172) for storing classical data (quantum data). The classical data (quantum data) may be a boot file, an operating system image, and an application program 162 (application program 173). The application program 162 (application program 173) may be used to implement a quantum algorithm compiled according to the combinatorial optimization problem processing method provided in the embodiments of this application.

[0044] Any data or information stored or generated in the classical processing system 160 (quantum processing system 170) can also be configured to be stored or generated in another classical (quantum) processing system in a similar manner, and any application executed therein can also be configured to be executed in another classical (quantum) processing system in a similar manner.

[0045] It should be noted that a true quantum computer has a hybrid structure, which includes at least... Figure 1 The system consists of two main parts: the classical processing system 160, which is responsible for performing classical calculations and control; and the quantum processing system 170, which is responsible for running quantum programs and thus realizing quantum computing.

[0046] The aforementioned classical processing system 160 and quantum processing system 170 can be integrated into a single device or distributed across two different devices. For example, the first device, including the classical processing system 160, runs a classical computer operating system that provides quantum application development tools and services, as well as the storage and network services required for quantum applications. Users develop quantum applications using the quantum application development tools and services on the second device and send the quantum program to the second device, including the quantum processing system 170, via the network services. The second device runs a quantum computer operating system, which parses the code of the quantum program and compiles it into instructions that can be recognized and executed by the quantum computer control system. The quantum processor 170 then implements the quantum algorithm corresponding to the quantum program based on these instructions.

[0047] In the classic silicon-based processing system 160, the units of the classic processor 161 are CMOS transistors. These computing units are not limited by time or coherence; that is, they are available at any time without time constraints. Furthermore, the number of these computing units in a silicon chip is sufficient; currently, a classic processor contains tens of thousands of computing units. The sufficient number of computing units and the fixed selectable computing logic of the CMOS transistors, such as AND logic, allow for computational efficiency through a combination of numerous CMOS transistors and limited logic functions.

[0048] Unlike the logic units in the classical processing system 160, the basic computational unit of the quantum processor 171 in the quantum processing system 170 is the qubit. The input of a qubit is limited by coherence and coherence time; that is, a qubit is limited by its available usage time and is not always readily available. Making full use of qubits within their available usage time is a key challenge in quantum computing. Furthermore, the number of qubits in a quantum computer is one of the representative indicators of its performance. Each qubit performs computational functions through on-demand configured logic functions. Given the limited number of qubits and the diverse logic functions available in quantum computing, such as Hadamard gates (H gates), Pauli-X gates (X gates), Pauli-Y gates (Y gates), Pauli-Z gates (Z gates), X gates, RY gates, RZ gates, CNOT gates, CR gates, iSWAP gates, Tofoli gates, etc., quantum computing requires combining a limited number of qubits with diverse logic function combinations to achieve computational effects.

[0049] In quantum computing, the basic unit of information is the qubit. A qubit has two states, 0 and 1, denoted as |0> and |1>. However, it can exist in a superposition of these two states, which can be represented as |ψ> = a|0> + b|1>, where a and b are complex numbers representing the amplitudes (probability amplitudes) of the |0> and |1> states, respectively. This is not possible with classical bits. After measurement, the state of a qubit collapses to a definite state (eigenstate, here |0> or |1>), where the probability of collapsing to |0> is |a|. 2 The probability of collapsing to |1> is |b|. 2 , |a| 2 +|b| 2 =1, |> is the Dirac notation.

[0050] A quantum state is generally described using a set of orthogonal and complete eigenstates. Typically, eigenstates are represented in binary form in quantum algorithms (or quantum programs). For example, a set of qubits q0, q1, and q2, representing the 0th, 1st, and 2nd qubits respectively, ordered from most significant bit to least significant bit as q2q1q0, represents a quantum state that is a superposition of eight eigenstates: |000>, |001>, |010>, |011>, |100>, |101>, |110>, and |111>. Each eigenstate corresponds to a qubit bit. For example, in the |000> state, 000 corresponds to q2q1q0 from most significant bit to least significant bit. It should be noted that qubits can also be ordered from least significant bit to most significant bit; the specific order depends on the actual situation. In short, a quantum state is a superposition of eigenstates. When the probability of other eigenstates is 0, the state is in one of the eigenstates. Each eigenstate corresponds to a basis vector. For example, if the eigenstate is |000>, then the basis vector is 000. The basis vector is a binary string composed of 0s and 1s. The state data generally contains at least one basis vector.

[0051] Based on these differences, the design of logical functions applied to qubits (including the design of whether qubits are used and the design of the efficiency of each qubit) is crucial to improving the computational performance of quantum computers and requires special design. The aforementioned design considerations for qubits are technical problems that ordinary computing devices do not need to address. Therefore, this application proposes a method and related apparatus for handling combinatorial optimization problems in quantum computing. The aim is to realize the operation of large-qubit combinatorial optimization algorithms on quantum hardware through operations such as running and reassembling the split quantum circuits.

[0052] See Figure 2 , Figure 2 A flowchart illustrating a method for handling combinatorial optimization problems provided in this application embodiment may include the following steps:

[0053] S201: Run the segmented quantum circuits obtained by splitting the original quantum circuit, and perform error suppression on the measurement results of each segmented quantum circuit to obtain the first measurement result corresponding to each segmented quantum circuit after error suppression, wherein the original quantum circuit is generated for the target combinatorial optimization problem.

[0054] The original quantum circuit is split into segmented quantum circuits based on the cutting points. The cutting points can be selected according to the actual situation or determined according to the preset cutting rules, thereby determining the cutting positions in the original quantum circuit.

[0055] Hardware noise is prevalent in quantum computing. Errors can be caused by various factors, including qubit decoherence, quantum control errors, quantum logic gate errors, measurement errors, and inter-qubit crosstalk. When quantum hardware reaches a certain level, the output error of small qubits and shallow circuits is primarily due to measurement errors. Error suppression involves optimizing the operation and control of quantum circuits and performing classical post-processing of circuit output data to reduce noise or errors caused by imperfections in the quantum hardware, thereby improving the fidelity of the output data. Error suppression can reduce measurement errors, obtain higher precision output, and improve the accuracy of measuring the distribution of basis vectors.

[0056] S202: Reassemble the obtained first measurement result to generate a second measurement result, wherein the second measurement result is the result obtained by measuring the original quantum circuit.

[0057] To obtain the correct second measurement result and meet the completeness requirements of the quantum data stream, recombination rules need to be set according to the regular quantum state evolution rules, and recombination is performed using these rules. The recombination process of the measurement result is essentially a data processing process. Different recombination rules will produce different data processing methods, which may require different amounts of data and different data storage formats. Therefore, the recombination rules determine the operation mode of the segmented quantum circuit and the storage format of the first measurement result. Given this, different recombination rules can be selected based on the configuration and computing power of the system processing the combinatorial optimization problem. Different recombination rules can be selected for different original quantum circuits; even for a single original quantum circuit, different recombination rules can be selected based on the different measurement results required.

[0058] S203: Based on the generated second measurement result, obtain the average energy expectation of the original quantum circuit.

[0059] The energy expectation is obtained by linearly combining the energy expectations of the constituent Hamiltonians under this basis vector according to their coefficients, based on the duality property. The average energy expectation of the primitive quantum circuit is obtained by averaging the energy expectations under a set of basis vectors, which are measured under the Z measurement basis.

[0060] In this application, the Hamiltonian can be obtained in the following ways:

[0061] The constraints of the constrained combinatorial optimization problem Cbo based on the mean-variance model are transformed into a penalty term, resulting in the unconstrained optimization problem Qubo. This mathematical problem is then mapped to the representation of a two-state physical system, yielding the corresponding Hamiltonian H, which has at most two interactions.

[0062] S204: When the execution of the segmented quantum circuit meets the specified conditions, generate the target combination corresponding to the target combination optimization problem based on the average energy expectation.

[0063] The specified conditions are used to measure whether an optimal or sufficiently good solution has been determined. Sufficiently good means close to the optimal solution, satisfying the need for further research based on it. In some cases, it can be equivalent to the optimal solution. Stopping the segmented quantum circuit when a sufficiently good solution is obtained can save computational resources, reduce the time required to solve combinatorial optimization problems, and improve efficiency.

[0064] The number of iterations is the number of times the variational parameters in the segmented quantum circuit are updated. The original quantum circuit contains variational parameters, and the segmented quantum circuit contains corresponding variational parameters. When the variational parameters are updated, the quantum state prepared using the original quantum circuit will also be different, and the first measurement result obtained may also be different.

[0065] The specified conditions can be based on the computing power settings of the quantum computing system, or they can be set according to other conditions. Specifically, the specified conditions can be one or a combination of these conditions: the number of iterations reaches a preset threshold; the difference between the average energy expectation of the original quantum circuit obtained in the current iteration and the average energy expectation of the original quantum circuit obtained in the previous iteration is within a preset range; the difference between the average energy expectation of the original quantum circuit obtained in the current iteration and the preset ground state energy expectation is within a preset range. It should be noted that the specified conditions can also be other conditions used to determine the convergence of the iteration, which will not be listed here.

[0066] When the segmented quantum circuit meets the iterative convergence condition, the minimum energy expectation used in calculating the average energy expectation within the current iteration can be used. Based on the basis vector corresponding to this minimum energy expectation, the target portfolio corresponding to the target portfolio optimization problem is generated. For example, the target optimization problem is a portfolio optimization problem, specifically selecting 3 assets from 10 candidate assets for investment. The resulting basis vector is 0001010001, where each element represents an asset. If the left-to-right order of the basis vector corresponds to the ascending order of the assets and the ascending order of the qubit numbers, then the generated target portfolio is (asset 4, asset 6, asset 10).

[0067] As can be seen, the embodiments of this application first run the segmented quantum circuits obtained by splitting the original quantum circuit, and perform error suppression on the measurement results of each segmented quantum circuit to obtain the first measurement result corresponding to each segmented quantum circuit after error suppression; then, the obtained first measurement results are recombined to generate a second measurement result; then, based on the generated second measurement result, the average energy expectation of the original quantum circuit is obtained; finally, when the execution of the segmented quantum circuits meets the specified conditions, the target combination corresponding to the target combinatorial optimization problem is generated based on the average energy expectation. Through the operation and recombination of the split quantum circuits, the combinatorial optimization algorithm with a large number of qubits is realized on quantum hardware.

[0068] In some possible embodiments of this application, the original quantum circuit is generated in the following manner:

[0069] Based on the initial state data and the selected design method, the timing of the quantum logic gates and the interaction relationship between the qubits and the quantum logic gates are determined. The initial state data is the state data characterizing the initial quantum state corresponding to the target combinatorial optimization problem.

[0070] Based on the described timing and interaction relationships, a primitive quantum circuit is generated.

[0071] The initial state data can be obtained after preprocessing the target combinatorial optimization problem. It can be generated by analyzing the characteristics of the target combinatorial optimization problem. Different methods are used to generate initial state data for different combinatorial optimization problems. In this embodiment, the method for generating initial state data is not limited, as long as the initial state data is obtained. Based on the initial state data and the proposed method, the timing of quantum logic gate operation and the interaction relationship between quantum logic gates and qubits can be determined, generating a primitive quantum circuit. Using this primitive quantum circuit, the initial quantum state can be prepared.

[0072] In combinatorial optimization problems, the initial quantum state can be a W state, a Dicke state, a complete superposition state, etc. For the initial state data, the Hamming weights of its basis vectors are determined. Different methods are used to generate the primordial quantum circuit based on the parity of the Hamming weights k. Specifically, when k is odd (or even), the primordial quantum circuit is generated in the following way:

[0073] Using the first quantum logic gate combination, the first sub-quantum circuit module is constructed sequentially within the first k qubits, specifically the even-numbered (odd-numbered) qubits (qubit numbering is 0≤i≤n-1, where n is the number of qubits contained in the original quantum circuit, determined by the initial state data). The first sub-quantum circuit module can include... A first quantum logic gate combination;

[0074] Using a combination of second quantum logic gates, starting from the qubit numbered i=2 (i=1), a second sub-quantum circuit module is constructed within the second time sequence of the qubit. The second sub-quantum circuit module may include... A combination of second quantum logic gates;

[0075] Using combinations of second quantum logic gates, a third sub-quantum circuit module is constructed in the third time sequence of all qubits. The third sub-quantum circuit module includes (n-1) combinations of second quantum logic gates.

[0076] The first sub-quantum circuit module, the second sub-quantum circuit module, and the third sub-quantum circuit module are combined sequentially to generate the original quantum circuit.

[0077] In the above-described method for generating primitive quantum circuits, the first quantum logic gate combination includes Pauli-X gates, and the second quantum logic gate combination includes controlled NOT gates and controlled rotation gates. Primitive quantum circuits generated using this method can determine the cutting method relatively efficiently. Of course, other generation methods exist, and efficient cutting methods are even better, but as long as primitive quantum circuits can be generated, they are acceptable and will not be listed here.

[0078] In some possible embodiments of this application, the error suppression of the measurement results for each segment of the quantum circuit includes:

[0079] A preset quantum error suppression algorithm is used to suppress the measurement error of each segment of the quantum circuit. The quantum error suppression algorithm includes one or a combination of readout error suppression algorithm, zero-noise extrapolation algorithm, probability error elimination algorithm and dynamic decoupling algorithm.

[0080] The readout error suppression algorithm primarily targets measurement errors in shallow circuits, focusing on quantum state preparation errors and sufficiently small errors in two-qubit quantum logic gates. By measuring the quantum hardware, the statistical characteristics of the measurement errors are obtained and stored as a response matrix M. This matrix is ​​used to recover accurate outputs from noisy output quantum states, and its relationship can be expressed as ρ noise =Mρ ideal That is, in the measurement of the noisy quantum state ρ noise Then, by executing M -1 ρ noise The operation recovers a more accurate ρ. ideal Quantum state estimation.

[0081] Without considering nonlocal interactions such as inter-bit crosstalk, the response matrix M can be obtained by sampling a single bit. iFinally, the overall response matrix M is obtained through a direct product. When inter-bit crosstalk cannot be ignored, synchronous measurements of all bits are required to obtain the response matrix M. In reality, a basis vector will only migrate to basis vectors with smaller Hamming distances; therefore, the response matrix should be a matrix with the main diagonal as its main component and a wide distribution of zero values. Furthermore, traversing the exponential multi-basis vectors is both impractical and unnecessary; it can be accomplished by sampling basis vectors with specific Hamming weights.

[0082] Zero-noise extrapolation is a sequence acceleration method in numerical analysis, used to improve the convergence speed of the estimated sequence of the solution. Assuming the function A(h) is an expansion with parameter h, and given a small number of known values ​​of A(h) for h, the zero-noise extrapolation algorithm can be used to solve for the value A(h) as h approaches 0. * The zero-noise extrapolation algorithm can be described as follows:

[0083] Suppose that the expansion of function A(h) is as follows:

[0084] A(h)=A * +Ch n +O(h n+1 )

[0085] Introducing the scaling parameter t for the independent variable h, we obtain the expansion of h / t as the independent variable as follows:

[0086] A(h / t)=A * +Ch n / t n +O(h n+1 / t n+1 )

[0087] By using the above formula Ch n / t n t in n Transfer to the molecule and perform an estimation to obtain the target value, i.e.:

[0088]

[0089] The above method and principle, when applied to the zero-noise extrapolation algorithm, can be used to estimate the noise-free output value of a quantum circuit when the noise level h approaches 0.

[0090] The probabilistic error cancellation algorithm is a quasi-probabilistic decomposition method that estimates the noiseless energy expectation by linearly combining the energy expectations of multiple noisy quantum circuits. Similar to the quantum circuit decomposition method, which decomposes the channel into a linear combination of specific channels, the probabilistic error cancellation algorithm assumes the total channel is Y = Y N …Y2Y1, here the noiseless channel Y will be... i(Corresponding to a quantum logic gate) is decomposed into a noisy channel B that can be implemented in hardware. n,i Linear combinations:

[0091]

[0092] Where, coefficient β n,i Given a real number, the observable O in the quantum state Y i |ψ i The expected energy value under > can be expressed as:

[0093] The probabilistic error elimination algorithm requires each channel Y in the quantum circuit to be processed. i All channels are decomposed. Assuming each of the N channels yields b bases, the total number of noisy channels is bN. Therefore, the synthesis of noise-free channels cannot be achieved through complete tomography followed by linear combination; it still requires sampling. In this case, the total channel decomposition is expressed as Y = ∑ n β n B n Due to the coefficient β n Since we cannot guarantee that all numbers are positive, we need to introduce a normalization coefficient A = ∑ n |β n | and β n The symbol shrinks into the noisy channel, resulting in a probability of |β|. n Linear combinations of A:

[0094] A∑n(|β n | / A)sgn(β n )β n

[0095] Based on this, the expected target energy can be expressed as: Therefore, according to the probability distribution |β n A against B n Sampling yields the energy expectation Finally, a linear combination yields the expected target energy.

[0096] Dynamical decoupling (DD) is a quantum error control technique that uses specific pulse sequences to suppress decoherence in quantum computing. It is typically used to protect quantum states, approximate the averaging of unwanted coupling between the system and its environment, and extend its coherence time.

[0097] In some possible embodiments of this application, the first measurement result is obtained by measuring an uncut qubit of a segmented quantum circuit;

[0098] The reorganization of all first measurement results to generate second measurement results may include:

[0099] Reassemble all the first measurement results according to the order of the qubits corresponding to each segment of the quantum circuit in the original quantum circuit to generate the second measurement result.

[0100] It should be noted that the division of qubits into cut and uncut qubits is determined based on the existence of a cutting point on the corresponding timeline. This corresponding timeline is the timeline between the circuit to be reassembled that executes later, and the execution sequence is determined based on the original quantum circuit. The division of qubits into cut and uncut qubits is determined by executing two adjacent circuits to be reassembled, with the circuit to be reassembled earlier executing first. Figure 3 For example, in segmented quantum circuit A, the number of cut qubits is q4, and the number of uncut qubits is q3; in segmented quantum circuit B, the number of cut qubits is q5, and the number of uncut qubits is q4.

[0101] The first measurement result is a segment of the basis vector corresponding to the original quantum circuit, specifically a segment of the binary string. To obtain the complete basis vector, the segmented basis vectors corresponding to the segmented quantum circuits need to be reassembled in order. For example, the uncut qubits of segmented quantum circuit 1 are q0 and q1, and the corresponding first measurement result is 01; the uncut qubits of segmented quantum circuit 2 are q2, q3, and q4, and the corresponding first measurement result is 100; the uncut qubits of segmented quantum circuit 3 are q5 and q6, and the corresponding first measurement result is 00; the uncut qubits of segmented quantum circuit 4 are q7, q8, q9, and q10, and the corresponding first measurement result is 0101. Then the second measurement result is 01100000101.

[0102] In some embodiments of this application, each segmented quantum circuit performs measurement error suppression once when measuring a binary string segment. However, this suppression only applies the measurement error suppression matrix to a single unit basis vector, resulting in a measurement result superimposed from several possible unit basis vectors. To obtain a first measurement result, a binary string segment can be randomly selected from these superimposed basis vectors according to their probabilities or through other means as the final output of the segmented quantum circuit.

[0103] In some possible embodiments of this application, obtaining the average energy expectation for the original quantum circuit based on all second measurements includes:

[0104] Calculate the first energy expectation corresponding to each second measurement result;

[0105] Based on a pre-set confidence level, the second energy expectation is determined from the first energy expectation arranged in order of magnitude;

[0106] The average energy expectation of the original quantum circuit is obtained by averaging all the second energy expectations.

[0107] In this embodiment, to obtain a more accurate average energy expectation, the expectation interval composed of the first energy expectations is sampled again, and the sampling results are averaged. Specifically, based on a preset confidence level and the number of first energy expectations, the sampling number of the second energy expectations is determined. From the first energy expectations arranged in ascending order, the smallest first energy expectation is selected as the second energy expectation, until the number of second energy expectations is the sampling number. For example, if the number of first energy expectations is 30 and the preset confidence level is 0.3, then the sampling number is 20 * 0.3 = 6. Six of the smallest energy expectations are selected from the first energy expectations and used as the second energy expectations. The sampling interval is determined using the preset confidence level, and the corresponding expectations within the sampling interval are sampled to obtain the second energy expectation. This limits the sampling range to the left part of the first energy expectations arranged in ascending order, thus obtaining a more accurate average energy expectation of the original quantum circuit.

[0108] In some possible embodiments of this application, the method may further include:

[0109] When the execution of the segmented quantum circuit does not meet the specified conditions, the gradient of the variational parameters in the original quantum circuit is calculated using CVaR.

[0110] Based on the gradient, the variational parameters of each segmented quantum circuit are updated accordingly.

[0111] To accelerate the convergence speed of gradient optimization, this embodiment uses CVaR (Conditional Value at Risk) as the objective function for gradient optimization. Based on the objective function, the variational parameters θ of the original quantum circuit are optimized using the gradient optimization algorithm. Each optimization update updates the variational parameters. Different quantum states can be prepared using original quantum circuits with different variational parameters. This operation gradually reduces the energy expectation of the Hamiltonian H in the quantum state, which is equivalent to gradually increasing the overlap between the ground state and the quantum state, or making the basis vectors constituting the quantum state move more towards the ground state. When the iterative operation of the segmented quantum circuit meets the specified conditions, the optimal solution or approximate solution of the objective combinatorial optimization problem can be obtained. Based on the gradient and the current variational parameters, new variational parameters are calculated, which are then used to update the variational parameters of the segmented quantum circuit.

[0112] See Figure 4 , Figure 4 This is a schematic diagram of the structure of the processing device for combinatorial optimization problems provided in the embodiments of this application. Figure 2Corresponding to the process shown, the apparatus includes:

[0113] The first obtaining module 401 is used to run the segmented quantum circuits obtained by splitting the original quantum circuit, and to perform error suppression on the measurement results of each segmented quantum circuit to obtain the first measurement result corresponding to each segmented quantum circuit after error suppression. The original quantum circuit is generated for the target combinatorial optimization problem.

[0114] The recombination module 402 is used to recombine the obtained first measurement result to generate a second measurement result, wherein the second measurement result is the result obtained by measuring the original quantum circuit;

[0115] The second acquisition module 403 is used to obtain the average energy expectation of the original quantum circuit based on the generated second measurement result;

[0116] The generation module 404 is used to generate the target combination corresponding to the target combination optimization problem based on the average energy expectation when the execution of the segmented quantum circuit meets the specified conditions.

[0117] In some possible embodiments of this application, the original quantum circuit is generated in the following manner:

[0118] Based on the initial state data and the selected design method, the timing of the quantum logic gates and the interaction relationship between the qubits and the quantum logic gates are determined. The initial state data is the state data characterizing the initial quantum state corresponding to the target combinatorial optimization problem.

[0119] Based on the described timing and interaction relationships, a primitive quantum circuit is generated.

[0120] In some possible implementations of this application, the first obtaining module 401 may be specifically used for:

[0121] A preset quantum error suppression algorithm is used to suppress the measurement error of each segment of the quantum circuit. The quantum error suppression algorithm includes one or a combination of readout error suppression algorithm, zero-noise extrapolation algorithm, probability error elimination algorithm and dynamic decoupling algorithm.

[0122] In some possible embodiments of this application, the first measurement result is obtained by measuring an uncut qubit of a segmented quantum circuit;

[0123] The recombination module 402 can be specifically used for:

[0124] Reassemble all the first measurement results according to the order of the qubits corresponding to each segment of the quantum circuit in the original quantum circuit to generate the second measurement result.

[0125] In some possible embodiments of this application, the second obtaining module 403 is specifically used for:

[0126] Calculate the first energy expectation corresponding to each second measurement result;

[0127] Based on a pre-set confidence level, the second energy expectation is determined from the first energy expectation arranged in order of magnitude;

[0128] The average energy expectation of the original quantum circuit is obtained by averaging all the second energy expectations.

[0129] In some possible embodiments of this application, the apparatus may further include:

[0130] The computation module is used to calculate the gradient of the variational parameters in the original quantum circuit using CVaR when the execution of the segmented quantum circuit does not meet the specified conditions.

[0131] An update module is used to update the variational parameters of each segmented quantum circuit based on the gradient.

[0132] As can be seen, the embodiments of this application first run the segmented quantum circuits obtained by splitting the original quantum circuit, and perform error suppression on the measurement results of each segmented quantum circuit to obtain the first measurement result corresponding to each segmented quantum circuit after error suppression; then, the obtained first measurement results are recombined to generate a second measurement result; then, based on the generated second measurement result, the average energy expectation of the original quantum circuit is obtained; finally, when the execution of the segmented quantum circuits meets the specified conditions, the target combination corresponding to the target combinatorial optimization problem is generated based on the average energy expectation. Through the operation and recombination of the split quantum circuits, the combinatorial optimization algorithm with a large number of qubits is realized on quantum hardware.

[0133] This application also provides a quantum-supercomputer cooperative operating system, which runs on a quantum computer including a quantum processor and / or a supercomputer including a classical processor, for processing combinatorial optimization problems according to the method described in the method-side embodiment of this application.

[0134] This application also provides a storage medium storing a computer program, wherein the computer program is configured to implement the steps in any of the above method embodiments when running.

[0135] Specifically, in this embodiment, the storage medium can be configured to store a computer program for implementing the following steps:

[0136] S201: Run the segmented quantum circuits obtained by splitting the original quantum circuit, and perform error suppression on the measurement results of each segmented quantum circuit to obtain the first measurement result corresponding to each segmented quantum circuit after error suppression, wherein the original quantum circuit is generated for the target combinatorial optimization problem;

[0137] S202: Recombining the obtained first measurement result to generate a second measurement result, wherein the second measurement result is the result obtained by measuring the original quantum circuit;

[0138] S203: Based on the generated second measurement result, obtain the average energy expectation of the original quantum circuit;

[0139] S204: When the execution of the segmented quantum circuit meets the specified conditions, generate the target combination corresponding to the target combination optimization problem based on the average energy expectation.

[0140] This application also provides an electronic device, including a memory and a processor, wherein the memory stores a computer program, and the processor is configured to run the computer program to implement the steps in any of the above method embodiments.

[0141] Specifically, the aforementioned electronic device may further include a transmission device and an input / output device, wherein the transmission device is connected to the aforementioned processor, and the input / output device is connected to the aforementioned processor.

[0142] Specifically, in this embodiment, the processor described above can be configured to implement the following steps via a computer program:

[0143] S201: Run the segmented quantum circuits obtained by splitting the original quantum circuit, and perform error suppression on the measurement results of each segmented quantum circuit to obtain the first measurement result corresponding to each segmented quantum circuit after error suppression, wherein the original quantum circuit is generated for the target combinatorial optimization problem;

[0144] S202: Recombining the obtained first measurement result to generate a second measurement result, wherein the second measurement result is the result obtained by measuring the original quantum circuit;

[0145] S203: Based on the generated second measurement result, obtain the average energy expectation of the original quantum circuit;

[0146] S204: When the execution of the segmented quantum circuit meets the specified conditions, generate the target combination corresponding to the target combination optimization problem based on the average energy expectation.

[0147] This specification also provides a computer program product containing instructions that, when executed by a computer, cause the computer to perform processing of the combinatorial optimization problem in any of the above embodiments.

[0148] It is understood that the specific examples in this specification are only intended to help those skilled in the art better understand the implementation methods described herein, and are not intended to limit the scope of this application.

[0149] It is understood that in the various embodiments of this specification, the sequence number of each process does not imply the order of execution. The execution order of each process should be determined by its function and internal logic, and should not limit the implementation process of the embodiments of this specification in any way.

[0150] It is understood that the various implementation methods described in this specification can be implemented individually or in combination, and the implementation methods in this specification are not limited in this respect.

[0151] Unless otherwise stated, all technical and scientific terms used in the embodiments of this specification have the same meaning as commonly understood by one of ordinary skill in the art. The terminology used in this specification is for the purpose of describing particular embodiments only and is not intended to limit the scope of this specification. The term "and / or" as used in this specification includes any and all combinations of one or more of the associated listed items. The singular forms "a," "the," and "the" as used in the embodiments of this specification and the appended claims are also intended to include the plural forms unless the context clearly indicates otherwise.

[0152] It is understood that the processor in the embodiments of this specification can be an integrated circuit chip with signal processing capabilities. In implementation, each step of the above method embodiments can be completed by integrated logic circuits in the processor's hardware or by instructions in software form. The processor can be a general-purpose processor, a digital signal processor (DSP), an application-specific integrated circuit (ASIC), a field-programmable gate array (FPGA), or other programmable logic devices, discrete gate or transistor logic devices, or discrete hardware components. It can implement or execute the methods, steps, and logic block diagrams disclosed in the embodiments of this specification. The general-purpose processor can be a microprocessor or any conventional processor. The steps of the methods disclosed in the embodiments of this specification can be directly implemented by a hardware decoding processor, or by a combination of hardware and software modules in the decoding processor. The software modules can reside in random access memory, flash memory, read-only memory, programmable read-only memory, electrically erasable programmable memory, registers, or other mature storage media in the art. This storage medium is located in memory; the processor reads information from the memory and, in conjunction with its hardware, completes the steps of the above methods.

[0153] It is understood that the memory in the embodiments of this specification may be volatile memory or non-volatile memory, or may include both volatile and non-volatile memory. Non-volatile memory may be read-only memory (ROM), programmable read-only memory (PROM), erasable programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM), or flash memory. Volatile memory may be random access memory (RAM). It should be noted that the memory in the systems and methods described herein is intended to include, but is not limited to, these and any other suitable types of memory.

[0154] Those skilled in the art will recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this specification.

[0155] Those skilled in the art will clearly understand that, for the sake of convenience and brevity, the specific working processes of the systems, devices, and units described above can be referred to the corresponding processes in the aforementioned method implementations, and will not be repeated here.

[0156] In the several embodiments provided in this specification, it should be understood that the disclosed systems, apparatuses, and methods can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative; for instance, the division of units is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the coupling or direct coupling or communication connection shown or discussed may be through some interfaces; the indirect coupling or communication connection between devices or units may be electrical, mechanical, or other forms.

[0157] The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment, depending on actual needs.

[0158] In addition, the functional units in the various embodiments of this specification can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit.

[0159] If the aforementioned functions are implemented as software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solutions of this specification, in essence, or the parts that contribute to the prior art, or parts of the technical solutions, can be embodied in the form of software products. These computer software products are stored in a storage medium and include several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of this specification. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0160] The above description is merely a specific embodiment of this specification, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this specification should be included within the scope of protection of this specification. Therefore, the scope of protection of this application should be determined by the scope of the claims.

Claims

1. A method for handling combinatorial optimization problems, characterized in that, The method includes: Run the segmented quantum circuits obtained by splitting the original quantum circuit, and perform error suppression on the measurement results of each segmented quantum circuit to obtain the first measurement result corresponding to each segmented quantum circuit after error suppression. The original quantum circuit is generated for the target combinatorial optimization problem. According to the order of the qubits corresponding to each segment of the quantum circuit in the original quantum circuit, all the first measurement results are recombined to generate the second measurement result, wherein the second measurement result is the result obtained by measuring the original quantum circuit; Based on the generated second measurement result, the average energy expectation of the original quantum circuit is obtained; When the execution of the segmented quantum circuit satisfies the iterative convergence condition, the objective combination corresponding to the objective combinatorial optimization problem is generated based on the average energy expectation.

2. The method according to claim 1, characterized in that, The original quantum circuit was generated in the following way: Based on the initial state data and the selected design method, the timing of the quantum logic gates and the interaction relationship between the qubits and the quantum logic gates are determined. The initial state data is the state data characterizing the initial quantum state corresponding to the target combinatorial optimization problem. Based on the described timing and interaction relationships, a primitive quantum circuit is generated.

3. The method according to claim 2, characterized in that, The error suppression of the measurement results for each segment of the quantum circuit includes: A preset quantum error suppression algorithm is used to suppress the measurement error of each segment of the quantum circuit. The quantum error suppression algorithm includes one or a combination of readout error suppression algorithm, zero-noise extrapolation algorithm, probability error elimination algorithm and dynamic decoupling algorithm.

4. The method according to claim 3, characterized in that, The first measurement result was obtained by measuring an uncut qubit of a segmented quantum circuit.

5. The method according to any one of claims 1-4, characterized in that, The process of obtaining the average energy expectation for the original quantum circuit based on all the second measurements includes: Calculate the first energy expectation corresponding to each second measurement result; Based on a pre-set confidence level, the second energy expectation is determined from the first energy expectation arranged in order of magnitude; The average energy expectation of the original quantum circuit is obtained by averaging all the second energy expectations.

6. The method according to claim 5, characterized in that, The method further includes: When the execution of the segmented quantum circuit does not meet the specified conditions, the gradient of the variational parameters in the original quantum circuit is calculated using the conditional risk value CVaR. Based on the gradient, the variational parameters of each segmented quantum circuit are updated accordingly.

7. A processing apparatus for combinatorial optimization problems, characterized in that, The device includes: The first acquisition module is used to run the segmented quantum circuits obtained by splitting the original quantum circuit, and to perform error suppression on the measurement results of each segmented quantum circuit to obtain the first measurement result corresponding to each segmented quantum circuit after error suppression. The original quantum circuit is generated for the target combinatorial optimization problem. The recombination module is used to recombine all the first measurement results according to the order of the qubits corresponding to each segment of the quantum circuit in the original quantum circuit, and generate a second measurement result, wherein the second measurement result is the result obtained by measuring the original quantum circuit; The second acquisition module is used to obtain the average energy expectation of the original quantum circuit based on the generated second measurement result; The generation module is used to generate the target combination corresponding to the target combination optimization problem based on the average energy expectation when the execution of the segmented quantum circuit satisfies the iterative convergence condition.

8. A quantity-capable collaborative operating system, characterized in that, The quantitative super-cooperative operating system implements the processing of combinatorial optimization problems according to any one of claims 1 to 6.

9. A storage medium, characterized in that, The storage medium stores a computer program, wherein the computer program is configured to implement the method described in any one of claims 1 to 6 when it is run.

10. An electronic device comprising a memory and a processor, characterized in that, The memory stores a computer program, and the processor is configured to run the computer program to implement the method according to any one of claims 1 to 6.

Images