A method for scheduling quantum computing resources and related apparatus

Abstract

This invention discloses a method and related apparatus for scheduling quantum computing resources, belonging to the field of quantum computing. The method includes: acquiring multiple quantum circuits; characterizing each quantum circuit based on the number of logical bits it contains as a shape to be filled with corresponding structural areas; and characterizing each quantum computing resource based on the number of physical bits it contains as a large rectangle with corresponding rectangular structural areas; determining the rectangle corresponding to the filling shape under the constraint of scheduling quantum computing resources from quantum circuits; and filling the shape to be filled into the large rectangle in the form of a rectangle to minimize the remaining space of the large rectangle; determining the quantum computing resources to be scheduled for each quantum circuit based on the filling results. This application introduces a two-dimensional bin packing problem to simulate the rectangular filling of quantum circuits into quantum computing resources, aiming to maximize the utilization of quantum computing resources, improve the resource utilization rate of quantum computing resources, and improve the overall quantum computing efficiency through parallel processing.

Description

Technical Field

[0001] This invention belongs to the field of quantum computing technology, specifically a method and related apparatus for scheduling quantum computing resources. Background Technology

[0002] Quantum computing, as an emerging field of computing, uses quantum circuits as a representation, which describe the execution sequence of a series of quantum operations (such as quantum gates) on a series of qubits. Quantum computing resources refer to the hardware devices that actually execute these quantum circuits. Quantum computing resources can process operations on multiple qubits simultaneously, but since their computing resources are limited, the efficiency of quantum processors, as the core component of quantum computing systems, largely depends on how effectively quantum computing resources are utilized.

[0003] This leads to the proposal of a novel method for scheduling quantum computing resources, which aims to maximize the utilization of quantum computing resources, improve the resource utilization rate of quantum computing resources, and enhance the overall efficiency of quantum computing through parallel processing. Summary of the Invention

[0004] The purpose of this invention is to provide a method and related apparatus for scheduling quantum computing resources, aiming to maximize the utilization of quantum computing resources, improve the resource utilization rate of quantum computing resources, and improve the overall quantum computing efficiency through parallel processing.

[0005] One embodiment of the present invention provides a method for scheduling quantum computing resources, the method comprising:

[0006] Multiple quantum circuits are obtained, and the quantum circuits are characterized as fillable patterns with corresponding structural areas based on the number of logical bits they contain, and quantum computing resources are characterized as large rectangles with corresponding rectangular structural areas based on the number of physical bits they contain.

[0007] Under the constraint of scheduling the quantum computing resources by the quantum circuit, the rectangle corresponding to the filling shape is determined, and the shape to be filled is filled into the large rectangle in the form of a rectangle so that the remaining space of the large rectangle is minimized;

[0008] Based on the filling results, the quantum computing resources to be scheduled for each quantum circuit are determined.

[0009] Optionally, the constraints for scheduling the quantum computing resources by the quantum circuits include: the structural area corresponding to the shape to be filled is greater than 2; and the physical bits in the quantum computing resources scheduled by each quantum circuit are distributed in a rectangular shape.

[0010] Optionally, determining the rectangle corresponding to the filled shape under the constraint of scheduling the quantum computing resources by the quantum circuit includes:

[0011] The quantum circuit is based on the number of logical bits contained, which is a composite number N. The factors m1 and n1 obtained by decomposing the composite number N are determined as the side lengths of the rectangle of the corresponding filled pattern, where: N = m1 * n1.

[0012] Optionally, the quantum circuit schedules the physical bits in the quantum computing resources in a near-square rectangular distribution.

[0013] Optionally, determining the rectangle corresponding to the filled shape under the constraint of scheduling the quantum computing resources by the quantum circuit further includes:

[0014] The quantum circuit is based on the fact that the number of logic bits it contains is a prime number N. The floor value m2 and floor value n2 of the absolute square root of the prime number N are determined as the first side length and the second side length of the rectangle of the corresponding filled shape.

[0015] In response to m2*n2>N, the first side length of the rectangle corresponding to the filled shape is determined to be m2 and the second side length to be n2.

[0016] Optionally, determining the rectangle corresponding to the filled shape under the constraint of scheduling the quantum computing resources by the quantum circuit further includes:

[0017] In response to m2*n2<N, the first side length of the rectangle corresponding to the filled shape is determined to be m2+1 and the second side length is n2.

[0018] Optionally, filling the shape to be filled into the large rectangle in the form of a rectangle to minimize the remaining space of the large rectangle includes:

[0019] The two-dimensional bin packing problem solving algorithm is called to fill the rectangles corresponding to the shapes to be filled in the large rectangle, and the size and position of the target rectangles of each shape to be filled are obtained so as to minimize the remaining space of the large rectangle.

[0020] Optionally, the two-dimensional bin packing problem solving algorithm includes a heuristic algorithm.

[0021] Another embodiment of the present invention provides a scheduling device for quantum computing resources, the device comprising:

[0022] The characterization unit is used to acquire multiple quantum circuits, characterize the quantum circuits as a pattern to be filled with a corresponding structural area based on the number of logical bits they contain, and characterize quantum computing resources as a large rectangle with a corresponding rectangular structural area based on the number of physical bits they contain.

[0023] The filling unit is used to determine the rectangle of the corresponding filling pattern under the constraint of quantum circuit scheduling of quantum computing resources, and to fill the pattern to be filled into the large rectangle in the form of a rectangle so as to minimize the remaining space of the large rectangle.

[0024] A determining unit is used to determine the quantum computing resources to be scheduled for each of the quantum circuits based on the filling results.

[0025] Another embodiment of the present invention provides an electronic device, wherein the computer-readable storage medium stores a computer program, the computer program including program instructions, which, when executed by a processor, perform the methods described in any of the above embodiments.

[0026] Another embodiment of the present invention provides a computer-readable storage medium storing a computer program, the computer program including program instructions that, when executed by a processor, perform the methods described in any of the above embodiments.

[0027] Another embodiment of the present invention provides a quantum computer operating system, which implements the scheduling of quantum computing resources according to the method described in any of the above embodiments.

[0028] Compared with existing technologies, this invention first obtains multiple quantum circuits, characterizes each quantum circuit as a pattern to be filled based on the number of logical bits it contains, and characterizes quantum computing resources as large rectangles with corresponding rectangular structural areas based on the number of physical bits they contain. Then, under the constraint of scheduling the quantum computing resources by the quantum circuits, the rectangles corresponding to the filling patterns are determined, and the patterns to be filled are filled into the large rectangles in the form of rectangles to minimize the remaining space of the large rectangles. Finally, based on the filling results, the quantum computing resources to be scheduled for each quantum circuit are determined.

[0029] This invention first acquires multiple quantum circuits, representing each quantum circuit as a shape to be filled based on the number of logical bits it contains, and represents quantum computing resources as large rectangles with corresponding rectangular structural areas based on the number of physical bits it contains. By representing quantum circuits and quantum computing resources as geometric shapes, an intuitive and unified way to manage and schedule computing resources is provided. This standardized method helps simplify subsequent optimization steps. By converting the number of logical bits into structural areas, the resource requirements of each quantum circuit can be more accurately quantified, thus providing a basis for computing resource allocation. Then, under the constraint of scheduling the quantum computing resources by the quantum circuits, the rectangles corresponding to the filling shapes are determined, and the shapes to be filled are filled into the large rectangles in the form of rectangles to minimize the remaining space of the large rectangles. By determining the specific rectangles to be filled under constraints, the effective allocation and optimized utilization of quantum computing resources are achieved. Minimizing the remaining space of the large rectangles means maximizing the utilization of quantum computing resources and improving resource utilization. Finally, based on the filling results, the quantum computing resources to be scheduled for each quantum circuit are determined. The scheduling resources of the quantum circuits are determined according to the filling results, realizing dynamic management of quantum computing resources to adapt to the needs and changes of different quantum circuits. Attached Figure Description

[0030] Figure 1 This is a network block diagram of a quantum computing resource scheduling system provided in an embodiment of the present invention.

[0031] Figure 2 A flowchart illustrating a quantum computing resource scheduling method provided in an embodiment of the present invention.

[0032] Figure 3 This is a flowchart of a method for determining a graphic to be filled, provided in an embodiment of the present invention.

[0033] Figure 4 A flowchart of another method for determining the graphic to be filled, provided in an embodiment of the present invention.

[0034] Figure 5 A flowchart illustrating a method for minimizing the determination of remaining space for filling, as provided in an embodiment of the present invention.

[0035] Figure 6 This is a structural diagram of a quantum computing resource scheduling device provided in an embodiment of the present invention.

[0036] Figure 7 This is a schematic diagram of the structure of an electronic device provided in an embodiment of the present invention. Detailed Implementation

[0037] The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present invention, and should not be construed as limiting the present invention.

[0038] Figure 1 This is a network block diagram of a quantum computing resource scheduling system provided in an embodiment of the present invention. The quantum computing resource scheduling system may include a network 110, a server 120, a wireless device 130, a client 140, storage 150, a classical computing unit 160, a quantum computing unit 170, and may also include additional memory, a classical processor, a quantum processor, and other devices not shown.

[0039] Network 110 is a medium used to provide communication links between various devices and computers connected together within a quantum computing resource scheduling system, including but not limited to the Internet, corporate intranets, local area networks, mobile communication networks, and combinations thereof. The connection method can be wired, wireless communication links, or fiber optic cables.

[0040] Server 120, wireless device 130, and client 140 are conventional data processing systems that may contain data and application programs or software tools that perform conventional computational processes. Client 140 may be a personal computer or a network computer, so the data may also be provided by server 120. Wireless device 130 may be a smartphone, tablet, laptop, smart wearable device, etc. Storage unit 150 may include database 151, which can be configured to store data such as qubit parameters, quantum logic gate parameters, quantum circuits, and quantum programs.

[0041] The classical computing unit 160 (quantum computing unit 170) may include a classical processor 161 (quantum processor 171) for processing classical data (quantum data) and a memory 162 (memory 172) for storing classical data (quantum data). The classical data (quantum data) may be a boot file, an operating system image, and an application program 163 (application program 173). The application program 163 (application program 173) may be used to implement a quantum algorithm compiled by the quantum computing resource scheduling method provided in the embodiments of the present invention.

[0042] Any data or information stored or generated in the classical computing unit 160 (quantum computing unit 170) can also be configured to be stored or generated in another classical (quantum) processing system in a similar manner, and any application executed therein can also be configured to be executed in another classical (quantum) processing system in a similar manner.

[0043] It should be noted that a true quantum computer has a hybrid structure, which includes at least... Figure 1The system consists of two main parts: the classical computing unit 160, which is responsible for performing classical calculations and control; and the quantum computing unit 170, which is responsible for running quantum programs to achieve quantum computing.

[0044] The aforementioned classical computing unit 160 and quantum computing unit 170 can be integrated into a single device or distributed across two different devices. For example, a first device including the classical computing unit 160 runs a classical computer operating system, providing quantum application development tools and services, as well as the storage and network services required for quantum applications. Users develop quantum programs using the quantum application development tools and services on the second device, and send these quantum programs to a second device including the quantum computing unit 170 via the network services. The second device runs a quantum computer operating system, which parses and compiles the quantum program's code into instructions that the quantum processor 170 can recognize and execute. The quantum processor 170 then implements the quantum algorithm corresponding to the quantum program based on these instructions.

[0045] The computing units of the classic processor 161 within the classic computing unit 160 are based on CMOS transistors on a silicon chip. These computing units are not limited by time or coherence; that is, they are available at any time without time constraints. Furthermore, the number of such computing units in a silicon chip is sufficient; currently, a single classic processor 161 contains tens of thousands of computing units. Given this sufficient number and the fixed selectable computing logic of the CMOS transistors (e.g., AND logic), computational performance is achieved by combining a large number of CMOS transistors with a limited set of logic functions during operation.

[0046] In the quantum computing unit 170, the basic computing unit of the quantum processor 171 is the qubit. The input of a qubit is limited by coherence and coherence time; that is, a qubit is limited by its available usage time and is not always readily available. Making full use of qubits within their available usage time is a key challenge in quantum computing. Furthermore, the number of qubits in a quantum computer is one of the representative indicators of its performance. Each qubit performs computational functions through on-demand configured logical functions. Given the limited number of qubits and the diverse logical functions available in quantum computing, such as Hadamard gates (H gates), Pauli-X gates (X gates), Pauli-Y gates (Y gates), Pauli-Z gates (Z gates), X gates, RY gates, RZ gates, CNOT gates, CR gates, iSWAP gates, Tofoli gates, etc., quantum computing requires combining a limited number of qubits with diverse logical function combinations to achieve computational effects.

[0047] Based on these differences, the design of classical logic functions applied to CMOS transistors and the design of quantum logic functions applied to qubits are significantly and fundamentally different. The design of classical logic functions applied to CMOS transistors does not need to consider the individuality of CMOS transistors. For example, the representation of a CMOS transistor in a silicon chip is its individual identifier, location, and usable time of each CMOS transistor. Therefore, classical algorithms composed of classical logic functions only express the operational relationship of the algorithm, not the algorithm's dependence on individual CMOS transistors.

[0048] Quantum logic functions applied to qubits need to consider the individuality of each qubit, such as its position within the quantum chip, its relationship with surrounding qubits, and the duration of its usable time. Therefore, quantum algorithms composed of quantum logic functions not only express the computational relationships within the algorithm but also its dependence on the individual qubits.

[0049] A quantum chip can include qubits and channels for controlling them. Quantum logic gates are implemented using analog signals. Different combinations of analog signals are applied to the qubits through these channels, thereby creating quantum circuits with different functions to process data. Therefore, the design of quantum logic functions in the qubits (including the design of whether qubits are used and the design of the efficiency of each qubit) is crucial for improving the computational performance of quantum computers and requires special design. This is the unique characteristic of quantum algorithms based on quantum logic functions, and it is fundamentally and significantly different from classical algorithms based on classical logic functions. The aforementioned design considerations for qubits are technical problems that ordinary computing devices do not need to consider or address.

[0050] Quantum computing, as an emerging field of computing, uses quantum circuits as a representation, which describe the execution sequence of a series of quantum operations (such as quantum gates) on a series of qubits. Quantum computing resources refer to the hardware devices that actually execute these quantum circuits. Quantum computing resources can process operations on multiple qubits simultaneously, but since their computing resources are limited, the efficiency of quantum processors, as the core component of quantum computing systems, largely depends on how effectively quantum computing resources are utilized.

[0051] This leads to the proposal of a novel method for scheduling quantum computing resources, which aims to maximize the utilization of quantum computing resources, improve the resource utilization rate of quantum computing resources, and enhance the overall efficiency of quantum computing through parallel processing.

[0052] See Figure 2 , Figure 2 A method for scheduling quantum computing resources provided in this embodiment of the invention includes the following steps:

[0053] Step S201: Obtain multiple quantum circuits, characterize the quantum circuits as fillable patterns with corresponding structural areas based on the number of logical bits they contain, and characterize the quantum computing resources as large rectangles with corresponding rectangular structural areas based on the number of physical bits they contain.

[0054] The graphic to be filled is a closed two-dimensional geometric figure composed of points, lines, and surfaces; quantum computing resources refer to quantum hardware resources that execute quantum circuits.

[0055] Specifically, multiple quantum circuits are first obtained, and the quantum circuits are characterized as fillable patterns with corresponding structural areas based on the number of logical bits they contain, and the quantum computing resources are characterized as large rectangles with corresponding rectangular structural areas based on the number of physical bits they contain.

[0056] For example, suppose there are three quantum circuits Q1, Q2, and Q3 that need to execute different quantum algorithms. Based on the number of logical bits contained in each quantum circuit, they are represented as a shape to be filled with a corresponding structural area. For example, quantum circuit Q1 contains 5 logical bits and is represented as a closed two-dimensional geometric shape with an area of ​​5 units. Quantum circuit Q2 contains 8 logical bits and is represented as a closed two-dimensional geometric shape with an area of ​​8 units. Quantum circuit Q3 contains 12 logical bits and is represented as a closed two-dimensional geometric shape with an area of ​​12 units. Assuming that the quantum computer has a total of 30 physical bits, it is represented as a large rectangle with an area of ​​30 units.

[0057] Step S202: Under the constraint of scheduling the quantum computing resources by the quantum circuit, determine the rectangle corresponding to the filling shape, and fill the shape to be filled into the large rectangle in the form of a rectangle so that the remaining space of the large rectangle is minimized.

[0058] Specifically, under the constraint of quantum circuit scheduling of quantum computing resources, the rectangle corresponding to the filling shape is determined, and the shape to be filled is filled into the large rectangle in the form of a rectangle so as to minimize the remaining space of the large rectangle.

[0059] Step S203: Determine the quantum computing resources to be scheduled for each quantum circuit based on the filling results.

[0060] Specifically, based on the specific filling results in step S202 above, the quantum computing resources that can be scheduled for each quantum circuit are determined.

[0061] In summary, this invention first acquires multiple quantum circuits, representing each quantum circuit as a fillable shape with a corresponding structural area based on the number of logical bits it contains, and represents quantum computing resources as large rectangles with corresponding rectangular structural areas based on the number of physical bits they contain. By representing quantum circuits and quantum computing resources as geometric shapes, an intuitive and unified way to manage and schedule computing resources is provided. This standardized method helps simplify subsequent optimization steps. By converting the number of logical bits into structural areas, the resource requirements of each quantum circuit can be more accurately quantified, thus providing a basis for computing resource allocation. Then, under the constraint of scheduling the quantum computing resources by the quantum circuits, the rectangles corresponding to the fillable shapes are determined, and the fillable shapes are filled into the large rectangles in the form of rectangles to minimize the remaining space of the large rectangles. By determining the specific fillable rectangles under constraints, the effective allocation and optimized utilization of quantum computing resources are achieved. Minimizing the remaining space of the large rectangles means maximizing the utilization of quantum computing resources and improving resource utilization. Finally, based on the filling results, the quantum computing resources to be scheduled for each quantum circuit are determined. The scheduling resources of the quantum circuits are determined according to the filling results, realizing dynamic management of quantum computing resources to adapt to the needs and changes of different quantum circuits.

[0062] In one embodiment of this application, the constraints for scheduling the quantum computing resources by the quantum circuit include: the structural area corresponding to the pattern to be filled is greater than 2; and the physical bits in the quantum computing resources scheduled by each quantum circuit are distributed in a rectangular shape.

[0063] Specifically, the constraints for quantum circuit scheduling of quantum computing resources include: first, the structural area corresponding to the shape to be filled is greater than 2, that is, the number of qubits of the quantum circuit participating in the filling must be greater than 2; second, the regions of physical bits in the quantum computing resources scheduled by each quantum circuit must be rectangularly distributed.

[0064] In summary, on the one hand, by limiting the structural area corresponding to the shape to be filled to be greater than 2, the feasibility of the filling scheme of filling the shape to be filled into a large rectangle is ensured; on the other hand, by determining that the regions of physical bits in the quantum computing resources scheduled by each quantum circuit are rectangularly distributed, the rectangular distribution of physical bit regions can simplify the design of the scheduling algorithm, making the filling and optimization process more efficient.

[0065] See Figure 3 , Figure 3 A flowchart of a method for determining a shape to be filled, provided in an embodiment of the present invention, includes the following steps:

[0066] Step S301: Based on the number of logical bits contained in the quantum circuit being a composite number N, the factors m1 and n1 obtained by decomposing the composite number N are determined as the side lengths of the rectangle of the corresponding filling pattern, where: N = m1 * n1.

[0067] Specifically, if the number of logical bits contained in the quantum circuit is a composite number N, then the factors m1 and n1 obtained by decomposing the composite number N are used as the first side length and the second side length of the rectangle of the corresponding filling pattern. The area of ​​the rectangular structure represented by the number of logical bits contained in the quantum circuit is N = m1 * n1.

[0068] It should be noted that when the number of logical bits contained in a quantum circuit is a composite number N, the factors m1 and n1 obtained by decomposing the composite number N are not just one set, so the rectangle determined by the corresponding filling pattern is not just one.

[0069] For example, suppose we are designing a complex quantum algorithm consisting of multiple quantum circuits, each of which needs to be executed on the physical hardware of a quantum computer. The physical hardware of the quantum computer consists of a series of physical bits (or qubits) arranged in a two-dimensional grid. In this scenario, a particular quantum circuit contains 12 logical bits. First, note that the number of logical bits contained in the quantum circuit is 12, which is a composite number and can be factored into 3*4 or 2*6. The factor pairs (2, 6) and (3, 4) obtained from the factorization can be used as the side lengths of the rectangles of the corresponding filled shapes.

[0070] In summary, by decomposing the number of logical bits (composite N) of a quantum circuit into two factors m1 and n1, and using these factors to determine the side length of the rectangle, and since there may be more than one set of rectangles formed, it is possible to ensure that the layout of quantum circuits on quantum computing resources is more compact and efficient, avoiding performance degradation caused by uneven or wasteful resource allocation, thereby improving the overall utilization rate of quantum computing resources.

[0071] In one embodiment of this application, the physical bits in the quantum computing resources are distributed in a near-square rectangular pattern by the quantum circuit scheduling.

[0072] Specifically, when scheduling physical bits in quantum computing resources using quantum circuits, the region of physical bits mapped by the quantum circuits to the quantum computing resources is distributed as a rectangular region as close to a square as possible.

[0073] See Figure 4 , Figure 4 A flowchart of another method for determining a shape to be filled, provided in an embodiment of the present invention, includes the following steps:

[0074] In step S401, the quantum circuit is based on the fact that the number of logic bits it contains is a prime number N. Then, the floor value m2 and the floor value n2 of the absolute square root of the prime number N are determined as the first side length and the second side length of the rectangle of the corresponding filling pattern.

[0075] Specifically, if the number of logic bits in a quantum circuit is a prime number N, then the absolute value of the square root of the prime number N is rounded down to obtain the first side length value m2, and then rounded up to obtain the second side length value n2.

[0076] For example, suppose there is a quantum circuit containing a prime number N, where N is 17. Now, we need to determine the area of ​​a rectangle based on the number of logical bits in this quantum circuit. First, we calculate the floor value of the square root of the prime number N, which is 17. Since the square root of 17 is approximately 4.123 (greater than 4 and less than 5), we get the first side length m2 = 4 after flooring. Next, we calculate the floor value of the square root of the prime number N, which is 17. Since the square root of 17 is approximately 4.123, we get the second side length n2 = 5 after flooring.

[0077] In step S402, in response to m2*n2>N, the first side length of the rectangle corresponding to the filled shape is determined to be m2 and the second side length to be n2.

[0078] Specifically, if the first side length value m2 and the second side length value n2 obtained in step S401 above are based on m2*n2>N, then the first side length of the rectangle corresponding to the filled shape is determined to be m2 and the second side length to be n2.

[0079] For example, as obtained in step S401 above, the first side length value m2 = 4, the second side length value n2 = 5, N = m2 * n2 = 4 * 5 = 20 > N = 17, therefore the first side length of the rectangle corresponding to the filled shape is determined to be m2 = 4, and the second side length value n2 = 5.

[0080] In summary, by calculating the floor and floor values ​​of the square root of the prime number N as the side length of the rectangle, a premise and foundation are provided for subsequent mapping operations. Based on the fact that m2*n2>N, the size of the rectangle is matched with the number of logic bits of the quantum circuit, ensuring the compatibility and accuracy of the pattern filling.

[0081] In one embodiment of this application, determining the rectangle corresponding to the filled shape under the constraint of scheduling the quantum computing resources by the quantum circuit further includes:

[0082] In response to m2*n2<N, the first side length of the rectangle corresponding to the filled shape is determined to be m2+1 and the second side length is n2.

[0083] Specifically, if the first side length value m2 and the second side length value n2 obtained in step S401 above are based on m2*n2<N, then the first side length of the rectangle corresponding to the filled shape is determined to be m2+1 and the second side length to be n2.

[0084] For example, suppose there is a quantum circuit containing a prime number N = 15 logical bits. Now we need to determine the area of ​​a rectangle based on the number of logical bits of this quantum circuit. First, we calculate the floor value of the square root of the prime number N = 15. Since the square root of 15 is approximately 3.873 (greater than 3 and less than 4), we get the first side length m2 = 3 after floor value. Next, we calculate the floor value of the square root of the prime number N = 15. Since the square root of 15 is approximately 3.873, we get the second side length n2 = 4 after floor value. As in step S401 above, the first side length m2 = 3 and the second side length n2 = 4. N = m2 * n2 = 3 * 4 = 12 < N = 15. Therefore, we determine the first side length of the rectangle as m2 + 1 = 4 and the second side length as n2 = 4. N = m2 * n2 = 4 * 4 = 16 > N = 15.

[0085] In summary, in step S402, m2 and n2 are selected (under the condition that m2*n2>N) to fill the quantum computing resources as tightly as possible. However, when m2*n2<N, if these two values ​​are still used as the side lengths, the filled pattern will not be able to fully utilize the space allocated to it. This problem is solved in this embodiment by increasing the first side length to m2+1, ensuring that the filled pattern can make fuller and more flexible use of the filling space.

[0086] See Figure 5 , Figure 5 A flowchart of a method for minimizing the determination of remaining space for filling, provided by an embodiment of the present invention, includes:

[0087] Step S501: Call the two-dimensional bin packing problem solving algorithm to fill the rectangles corresponding to the shapes to be filled in the large rectangle, and obtain the size and position of the target rectangles of each shape to be filled that minimize the remaining space of the large rectangle as the filling result.

[0088] Specifically, the mapping process of quantum circuits in the quantum processor is transformed into a two-dimensional bin packing problem. By calling the two-dimensional bin packing problem solving algorithm to fill rectangles, the size and position of the target rectangle of each shape to be filled are obtained when the remaining space of the large rectangle is minimized, and these are used as the filling results.

[0089] In summary, by invoking a two-dimensional bin packing problem-solving algorithm, the mapping process of quantum circuits can be viewed as a problem of maximizing the filling of a large rectangle with small rectangles. Transforming it into a two-dimensional bin packing problem can fully utilize existing bin packing (rectangle filling) algorithms for two-dimensional bin packing problems, thereby improving the parallel processing capability and processing speed of quantum computing, significantly improving the scheduling efficiency and resource utilization of quantum computing resources, ensuring that the remaining space of the large rectangle is minimized, and thus optimizing the utilization of quantum computing resources.

[0090] In one embodiment of this application, the two-dimensional bin packing problem solving algorithm includes a heuristic algorithm.

[0091] Specifically, this application includes a skyline heuristic algorithm that uses a two-dimensional binning problem-solving algorithm to determine the size and position of the target rectangle for each shape to be filled.

[0092] See Figure 6 , Figure 6 A quantum computing resource scheduling device is provided in an embodiment of the present invention. The device includes a characterization unit 601, a filling unit 602, and a determination unit 603.

[0093] The characterization unit 601 is used to acquire multiple quantum circuits, characterize the quantum circuits as fillable patterns with corresponding structural areas based on the number of logical bits they contain, and characterize quantum computing resources as large rectangles with corresponding rectangular structural areas based on the number of physical bits they contain.

[0094] The graphic to be filled is a closed two-dimensional geometric figure composed of points, lines, and surfaces; quantum computing resources refer to quantum hardware resources that execute quantum circuits.

[0095] The filling unit 602 is used to determine the rectangle of the corresponding filling pattern under the constraint of quantum circuit scheduling of quantum computing resources, and to fill the pattern to be filled into the large rectangle in the form of a rectangle so as to minimize the remaining space of the large rectangle.

[0096] Specifically, the constraints for scheduling the quantum computing resources by the quantum circuits include: the structural area corresponding to the shape to be filled is greater than 2; and the physical bits in the quantum computing resources scheduled by each quantum circuit are distributed in a rectangular shape.

[0097] Specifically, determining the rectangle corresponding to the filled shape under the constraint of scheduling the quantum computing resources by the quantum circuit includes:

[0098] The quantum circuit is based on the number of logical bits contained, which is a composite number N. The factors m1 and n1 obtained by decomposing the composite number N are determined as the side lengths of the rectangle of the corresponding filled pattern, where: N = m1 * n1.

[0099] Specifically, the physical bits in the quantum computing resources are distributed in a near-square rectangular pattern by the quantum circuit scheduling.

[0100] Specifically, determining the rectangle corresponding to the filled shape under the constraint of scheduling the quantum computing resources by the quantum circuit further includes:

[0101] The quantum circuit is based on the fact that the number of logic bits it contains is a prime number N. The floor value m2 and floor value n2 of the absolute square root of the prime number N are determined as the first side length and the second side length of the rectangle of the corresponding filled shape.

[0102] In response to m2*n2>N, the first side length of the rectangle corresponding to the filled shape is determined to be m2 and the second side length to be n2.

[0103] Specifically, determining the rectangle corresponding to the filled shape under the constraint of scheduling the quantum computing resources by the quantum circuit further includes:

[0104] In response to m2*n2<N, the first side length of the rectangle corresponding to the filled shape is determined to be m2+1 and the second side length is n2.

[0105] Specifically, determining the rectangle corresponding to the filled shape under the constraint of scheduling the quantum computing resources by the quantum circuit further includes:

[0106] In response to m2*n2<N, the first side length of the rectangle corresponding to the filled shape is determined to be m2+1 and the second side length is n2.

[0107] Specifically, filling the large rectangle with the shape to be filled in a rectangular shape to minimize the remaining space of the large rectangle includes:

[0108] The two-dimensional bin packing problem solving algorithm is called to fill the rectangles corresponding to the shapes to be filled in the large rectangle, and the size and position of the target rectangles of each shape to be filled are obtained so as to minimize the remaining space of the large rectangle.

[0109] Specifically, the algorithm for solving the two-dimensional bin packing problem includes heuristic algorithms.

[0110] The determining unit 603 is used to determine the quantum computing resources to be scheduled for each of the quantum circuits based on the filling results.

[0111] The specific functions and effects of the aforementioned quantum computing resource scheduling device can be explained by referring to other embodiments in this specification, and will not be repeated here. Each module in the quantum computing resource scheduling device can be implemented entirely or partially through software, hardware, or a combination thereof. Each module can be embedded in or independent of the processor in the computer device in hardware form, or it can be stored in the memory of the computer device in software form, so that the processor can call and execute the operations corresponding to each module.

[0112] Please see Figure 7 This specification also provides an electronic device, including a memory and a processor. The memory stores a computer program, and the processor executes the computer program to implement the quantum computing resource scheduling method of any of the above embodiments. Please refer to [link to documentation]. Figure 7 The electronic device can be a classical computer or a quantum computer.

[0113] This specification also provides a computer-readable storage medium storing a computer program thereon, which, when executed by a computer, causes the computer to perform the quantum computing resource scheduling method of any of the above embodiments.

[0114] This invention also provides a quantum computer operating system, which implements a quantum computing resource scheduling method according to any of the above-described method embodiments provided in this invention.

[0115] It is understood that the specific examples in this specification are only intended to help those skilled in the art better understand the implementation methods described herein, and are not intended to limit the scope of the invention.

[0116] It is understood that in the various embodiments of this specification, the sequence number of each process does not imply the order of execution. The execution order of each process should be determined by its function and internal logic, and should not limit the implementation process of the embodiments of this specification in any way.

[0117] It is understood that the various implementation methods described in this specification can be implemented individually or in combination, and the implementation methods in this specification are not limited in this respect.

[0118] Unless otherwise stated, all technical and scientific terms used in the embodiments of this specification have the same meaning as commonly understood by one of ordinary skill in the art. The terminology used in this specification is for the purpose of describing particular embodiments only and is not intended to limit the scope of this specification. The term "and / or" as used in this specification includes any and all combinations of one or more of the associated listed items. The singular forms "a," "the," and "the" as used in the embodiments of this specification and the appended claims are also intended to include the plural forms unless the context clearly indicates otherwise.

[0119] It is understood that the processor in the embodiments of this specification can be an integrated circuit chip with signal processing capabilities. In implementation, each step of the above method embodiments can be completed by integrated logic circuits in the processor's hardware or by instructions in software form. The processor can be a general-purpose processor, a digital signal processor (DSP), an application-specific integrated circuit (ASIC), a field-programmable gate array (FPGA), or other programmable logic devices, discrete gate or transistor logic devices, or discrete hardware components. It can implement or execute the methods, steps, and logic block diagrams disclosed in the embodiments of this specification. The general-purpose processor can be a microprocessor or any conventional processor. The steps of the methods disclosed in the embodiments of this specification can be directly implemented by a hardware decoding processor, or by a combination of hardware and software modules in the decoding processor. The software modules can reside in random access memory, flash memory, read-only memory, programmable read-only memory, electrically erasable programmable memory, registers, or other mature storage media in the art. This storage medium is located in memory; the processor reads information from the memory and, in conjunction with its hardware, completes the steps of the above methods.

[0120] It is understood that the memory in the embodiments of this specification may be volatile memory or non-volatile memory, or may include both volatile and non-volatile memory. Non-volatile memory may be read-only memory (ROM), programmable read-only memory (PROM), erasable programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM), or flash memory. Volatile memory may be random access memory (RAM). It should be noted that the memory in the systems and methods described herein is intended to include, but is not limited to, these and any other suitable types of memory.

[0121] Those skilled in the art will recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this specification.

[0122] Those skilled in the art will clearly understand that, for the sake of convenience and brevity, the specific working processes of the systems, devices, and units described above can be referred to the corresponding processes in the aforementioned method implementations, and will not be repeated here.

[0123] In the several embodiments provided in this specification, it should be understood that the disclosed systems, apparatuses, and methods can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative; for instance, the division of units is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the coupling or direct coupling or communication connection shown or discussed may be through some interfaces; the indirect coupling or communication connection between devices or units may be electrical, mechanical, or other forms.

[0124] The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment, depending on actual needs.

[0125] In addition, the functional units in the various embodiments of this specification can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit.

[0126] If the aforementioned functions are implemented as software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solutions of this specification, in essence, or the parts that contribute to the prior art, or parts of the technical solutions, can be embodied in the form of software products. These computer software products are stored in a storage medium and include several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of this specification. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0127] The above description is merely a specific embodiment of this specification, but the scope of protection of this invention is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this specification should be included within the scope of protection of this specification. Therefore, the scope of protection of this invention should be determined by the scope of the claims.

Claims

1. A method for scheduling quantum computing resources, characterized in that, The method includes: Multiple quantum circuits are obtained, and the quantum circuits are characterized as fillable patterns with corresponding structural areas based on the number of logical bits they contain, and quantum computing resources are characterized as large rectangles with corresponding rectangular structural areas based on the number of physical bits they contain. Under the constraint of scheduling the quantum computing resources by the quantum circuit, the rectangle corresponding to the filling shape is determined, and the shape to be filled is filled into the large rectangle in the form of a rectangle so that the remaining space of the large rectangle is minimized; Based on the filling results, the quantum computing resources to be scheduled for each quantum circuit are determined.

2. The method according to claim 1, characterized in that, The constraints for scheduling the quantum computing resources by the quantum circuits include: the structural area corresponding to the shape to be filled is greater than 2; and the physical bits in the quantum computing resources scheduled by each quantum circuit are distributed in a rectangular shape.

3. The method according to claim 2, characterized in that, Determining the rectangle corresponding to the filled shape under the constraint of scheduling the quantum computing resources by the quantum circuit includes: The quantum circuit is based on the number of logical bits contained, which is a composite number N. The factors m1 and n1 obtained by decomposing the composite number N are determined as the side lengths of the rectangle of the corresponding filled pattern, where: N = m1 * n1.

4. The method according to claim 2, characterized in that, The quantum circuit schedules the physical bits in the quantum computing resources in a rectangular distribution that is close to a square.

5. The method according to claim 4, characterized in that, The step of determining the rectangle corresponding to the filled shape under the constraint of scheduling the quantum computing resources by the quantum circuit further includes: The quantum circuit is based on the fact that the number of logic bits it contains is a prime number N. The floor value m2 and floor value n2 of the absolute square root of the prime number N are determined as the first side length and the second side length of the rectangle of the corresponding filled shape. In response to m2*n2>N, the first side length of the rectangle corresponding to the filled shape is determined to be m2 and the second side length to be n2.

6. The method according to claim 5, characterized in that, The step of determining the rectangle corresponding to the filled shape under the constraint of scheduling the quantum computing resources by the quantum circuit further includes: In response to m2*n2<N, the first side length of the rectangle corresponding to the filled shape is determined to be m2+1 and the second side length is n2.

7. The method according to claim 1, characterized in that, The step of filling the shape to be filled into the large rectangle in the form of a rectangle to minimize the remaining space of the large rectangle includes: The two-dimensional bin packing problem solving algorithm is called to fill the rectangles corresponding to the shapes to be filled in the large rectangle, and the size and position of the target rectangles of each shape to be filled are obtained so as to minimize the remaining space of the large rectangle.

8. The method according to claim 7, characterized in that, The algorithm for solving the two-dimensional bin packing problem includes heuristic algorithms.

9. A scheduling device for quantum computing resources, characterized in that, The device includes: The characterization unit is used to acquire multiple quantum circuits, characterize the quantum circuits as a pattern to be filled with a corresponding structural area based on the number of logical bits they contain, and characterize quantum computing resources as a large rectangle with a corresponding rectangular structural area based on the number of physical bits they contain. The filling unit is used to determine the rectangle of the corresponding filling pattern under the constraint of quantum circuit scheduling of quantum computing resources, and to fill the pattern to be filled into the large rectangle in the form of a rectangle so as to minimize the remaining space of the large rectangle. A determining unit is used to determine the quantum computing resources to be scheduled for each of the quantum circuits based on the filling results.

10. An electronic device, characterized in that, include: Processor and memory; The processor is connected to a memory, wherein the memory is used to store a computer program, and the processor is used to invoke the computer program to execute the method as described in claims 1-8.

11. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores a computer program, the computer program including program instructions that, when executed by a processor, perform the method as described in claims 1-8.

12. A quantum computer operating system, characterized in that, The quantum computer operating system implements the scheduling of quantum computing resources according to any one of claims 1-8.

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