Image display method and electronic device

Abstract

The present application provides an image display method, which is applied to an electronic device including a display screen. The method includes: at a first moment, generating a first Vsync signal, and in response to the first Vsync signal, starting to display a first image. The first Vsync signal corresponds to a first Vsync signal period, and the first display duration of the first image is the same as the duration of the first Vsync signal period; at a second moment, generating a second Vsync signal, and in response to the second Vsync signal, starting to display a second image. The second Vsync signal corresponds to a second Vsync signal period, the second moment is after the first moment, and the second image is the next frame image of the first image; after starting to display the second image, detecting whether the display data of a third image is synthesized. The third image is the next frame image of the second image; if the display data of the third image is synthesized, sending a control instruction for controlling the frequency of generating the Vsync signal to the display screen. This solution can accelerate the speed of the electronic device to display images and improve the followability.

Description

[0001] This application claims the priority of the Chinese patent application filed with the State Intellectual Property Office on January 9, 2024, with application number 202410035569.5 and application name “Image Display Method and Electronic Device”, all contents of which are incorporated by reference in this application. Technical Field

[0002] The present application relates to the field of display technology, and in particular to an image display method and an electronic device. Background Art

[0003] The refresh rate of the display screen of the electronic device can be 60 Hz, 70 Hz, 75 Hz, 80 Hz, 90 Hz or 120 Hz, etc. When the display screen uses different refresh rates for image display, the time length that the image display driver of the electronic device waits for sending the image to the display screen to drive the display screen to display the screen change is also different. Take the display screen using refresh rates of 60 Hz and 120 Hz for image refresh display as an example. When the display screen uses a refresh rate of 60 Hz, the waiting time for the image display driver to write the display data of the image to the display screen can reach up to 1 / 60 seconds (s) = 0.01667 (s) = 16.667 milliseconds (ms). When the display screen uses a refresh rate of 120 Hz, the waiting time for the image display driver to write the display data of the image to the display screen also needs to reach up to 1 / 120 (s) = 0.00833 (s) = 8.33 (ms).

[0004] However, when users use electronic devices, it is common for them to touch the display screen to interact. If the image display driver waits for the display data of the image to be written to the display screen to drive the display screen to display the image, the longer the electronic device's overall response to the user's touch operation to display the screen changes will be worse. Even when the electronic device's display screen uses a 120Hz refresh rate to respond to the user's touch operation to display the screen changes, the user will still feel that the screen changes are poorly followed. Therefore, how to effectively shorten the response time of the electronic device to the user's touch operation, thereby improving the display screen's follow-up performance with the user's touch operation, is a technical problem that needs to be solved in the current field. Summary of the invention

[0005] The embodiments of the present application provide an image display method and an electronic device, which are used to shorten the response time of the electronic device in response to a user touch operation, speed up the image display speed, and thus improve the tracking performance of the display screen as the user touch operation changes.

[0006] To achieve the above objectives, the embodiments of the present application adopt the following technical solutions:

[0007] In a first aspect, an image display method is provided, which is applied to an electronic device. The electronic device includes a display screen. The method includes: at a first moment, the electronic device generates a first Vsync signal, and in response to the first Vsync signal, the display screen displays a first image; wherein, the first Vsync signal corresponds to a first Vsync signal period, the first Vsync signal period corresponds to a first display duration, and the first display duration is the display duration of the first image. At a second moment, the electronic device generates a second Vsync signal, and in response to the second Vsync signal, the display screen displays a second image; wherein, the second Vsync signal corresponds to a second Vsync signal period, the second Vsync signal period is equal to the first Vsync signal period, and the second moment is after the first moment. At a third moment, in response to the completion of the preparation of the display data of the third image, the electronic device generates a third Vsync signal; wherein, the third Vsync signal corresponds to a third Vsync signal period, the third moment is after the second moment, and the third Vsync signal period is less than the first Vsync signal period.

[0008] In the embodiments of the present application, after the preparation of the display data of the image is completed, the frequency of the vertical synchronization signal is increased through the image display driver of the electronic device, and then, in response to the vertical synchronization signal with the increased frequency through the image display driver, the display data of the target image obtained by the electronic device in response to the user's interaction operation is written into the display screen of the electronic device, so as to realize quickly driving the display screen to display the target image. In this way, this solution can effectively shorten the duration of waiting for display after the preparation of the display data of the image is completed, and speed up the image display speed. For the scenario where the user touches the display screen for interaction, this solution can shorten the response duration of the electronic device in response to the user's touch operation, thereby improving the followability of the display screen of the device changing with the user's interaction operation.

[0009] In the present application, since the frequency of the vertical synchronization signal is increased by the image display driver, thus, after receiving the display data of the image corresponding to the user's interaction operation, the image display driver can respond to the vertical synchronization signal with the increased frequency, and write the display data of the image into the display screen after only waiting for a very short time, so as to realize quickly driving the display screen to perform image refresh display.

[0010] In a possible implementation manner, the second Vsync signal period corresponds to a second display duration, the second display duration is less than the first display duration, and the second display duration is the display duration of the second image.

[0011] In a possible implementation manner, the first display duration is 16.6 ms, and the second display duration is 13.8 ms.

[0012] In a possible implementation, the second display duration is the difference between the first Vsync signal period and the third Vsync signal period.

[0013] In the present application, it is possible that the duration between the completion of the display data preparation and the moment when the next VSync signal is to be generated exceeds two 360 Hz cycles, that is, exceeds 5.6 ms. For this situation, the present application can increase the frequency of the output VSync signal to 360 Hz and output the next VSync signal 2.8 ms in advance. That is, the above-mentioned situation where the second display duration is the difference between the first Vsync signal period and the third Vsync signal period. In another example, the present application can also increase the frequency of the output VSync signal to 360 Hz and output the next VSync signal 5.6 ms in advance.

[0014] It can be understood that the moment values mentioned in the present application are all approximate values and can be adjusted within a small range. For example, 2.8 ms can also be 2.7 ms, and 5.5 ms can also be 5.4 ms. The present application does not limit this.

[0015] In a possible implementation, the second Vsync signal period corresponds to the second display duration, the second display duration is greater than the first display duration, and the second display duration is the display duration of the second image.

[0016] In a possible implementation, in response to the third Vsync signal, the display screen displays the third image, and the third image is the next frame image of the second image.

[0017] In a possible implementation, at the fourth moment, the electronic device generates a fourth Vsync signal. In response to the fourth Vsync signal, the display screen displays the fourth image; wherein, the fourth moment is after the third moment, the fourth Vsync signal corresponds to the fourth Vsync signal period, the fourth Vsync signal period corresponds to the fourth display duration, and the fourth display duration is the display duration of the fourth image; the fourth display duration is equal to the first display duration. Thus, after the third Vsync signal is output in advance in the present application, the electronic device will maintain the display duration of the fourth image.

[0018] In the present application, the frequency of the output VSync signal can be reduced after it is determined that the display of the third image on the display screen tends to be stable. This can avoid waste of device power consumption caused by the display screen outputting the VSync signal with an increased frequency for a long time, thereby achieving the purpose of saving device power consumption.

[0019] In a possible implementation, at the fifth moment, the electronic device generates a fifth Vsync signal; wherein, the fifth Vsync signal corresponds to a fifth Vsync signal period, and the fifth Vsync signal period is equal to the first Vsync signal period. In this application, after the electronic device maintains the display duration of the fourth image, during the display process of the fifth image, which is the frame after the fourth image, it can continue to detect the duration between the moment when the display data of the image after the fifth image is prepared and the moment when it waits for the next upcoming Vsync signal.

[0020] In a possible implementation, the first image is the previous frame image of the second image.

[0021] In a possible implementation, when the display screen displays the first image, the duration for the display data of the second image to wait for the second Vsync signal is greater than 2.8 ms. In this application, it is also possible to detect the duration for the display data of the previous frame image to wait for the next Vsync signal after it is prepared. If it is greater than the set duration (2.8 ms), then a Vsync signal with an increased frequency can be output in advance.

[0022] In a possible implementation, the first Vsync signal period is 16.6 ms, and the third Vsync signal period is 2.8 ms. It can be understood that the period corresponding to the highest refresh rate of 360 Hz of the electronic device is 2.8 ms. Thus, the frequency of the third Vsync signal is increased to 360 Hz at most.

[0023] In a possible implementation, the electronic device further includes an image display driver; the method further includes: in response to the display screen displaying the second image, the image display driver detects whether the display data of the third image is prepared; in response to the display data of the third image being prepared, the image display driver sends a control instruction to the display screen, and the display screen generates a third Vsync signal.

[0024] In a possible implementation, the electronic device adds a frame chasing detection module in the system kernel layer. By this frame chasing detection module, it detects whether the display data of the image is prepared. Thus, when the frame chasing detection module detects that the display data of the image is prepared, the frequency of the Vsync signal output by the display screen is increased to achieve the purpose of shortening the duration for the display data of the image to wait for display after it is prepared, thereby improving the followability.

[0025] In a second aspect, this application provides an electronic device, and this electronic device has the function of implementing the method described in the first aspect above. This function can be implemented by hardware or by hardware executing corresponding software. This hardware or software includes one or more modules corresponding to the above functions.

[0026] In a third aspect, the present application provides an electronic device, including: a processor and a memory; the memory is used to store computer program code, the computer program code includes computer execution instructions, and when the electronic device runs, the processor executes the computer execution instructions so that the electronic device executes the method described in the first aspect above.

[0027] In a fourth aspect, the present application provides an electronic device, including: a processor; the processor is used to be coupled with the memory, and after reading the instructions in the memory, execute the method described in the first aspect above according to the instructions.

[0028] In a fifth aspect, the present application provides a computer-readable storage medium, in which computer instructions are stored, and when it runs on an electronic device, it enables the electronic device to execute the method described in the first aspect above.

[0029] In a sixth aspect, the present application provides a computer program product containing instructions, and when it runs on a computer, it enables the computer to execute the method described in the first aspect above.

[0030] In a seventh aspect, a device is provided (for example, the device may be a display system), the device includes a processor, which is used to support the electronic device to implement the functions involved in the first aspect above. In a possible design, the device further includes a memory, and the memory is used to store the necessary program instructions and data of the electronic device.

[0031] Among them, for the technical effects brought by any one of the design manners in the second aspect to the seventh aspect, reference may be made to the technical effects brought by different implementation manners in the first aspect, which will not be elaborated here. BRIEF DESCRIPTION OF THE DRAWINGS

[0032] Figure 1 FIG. is a schematic diagram of the hardware structure of an electronic device provided by an embodiment of the present application;

[0033] Figure 2 FIG. is a schematic diagram of the system architecture of an electronic device in the conventional technology;

[0034] Figure 3 FIG. is a schematic diagram of the principle of layer drawing, rendering, composition, and image frame display of an electronic device in the conventional technology;

[0035] Figure 4 FIG. is a schematic diagram of the system architecture of an electronic device in an embodiment of the present application;

[0036] Figure 5 FIG. is a schematic diagram of the principle of layer drawing, rendering, composition, and image frame display of an electronic device in an embodiment of the present application;

[0037] Figure 6 It is a schematic diagram of the principle for another electronic device in the embodiments of the present application to perform layer drawing, rendering, composition, and image frame display;

[0038] Figure 7 It is a schematic diagram of the principle for another electronic device in the embodiments of the present application to perform layer drawing, rendering, composition, and image frame display;

[0039] Figure 8 It is a schematic flow chart of an image display method provided by the embodiments of the present application Figure 1 ;

[0040] Figure 9 It is a schematic diagram of the principle for another electronic device in the embodiments of the present application to perform layer drawing, rendering, composition, and image frame display;

[0041] Figure 10 It is a schematic diagram of the principle for another electronic device in the embodiments of the present application to perform layer drawing, rendering, composition, and image frame display;

[0042] Figure 11 It is a schematic diagram of the principle for another electronic device in the embodiments of the present application to perform layer drawing, rendering, composition, and image frame display;

[0043] Figure 12 It is a schematic diagram of the duration of the display screen showing an image in a case involved in the embodiments of the present application;

[0044] Figure 13 It is a schematic diagram of the principle for an electronic device involved in the embodiments of the present application to send and display an image in response to a Vsync signal with an increased response frequency;

[0045] Figure 14 It is a schematic diagram of the system architecture and data signal flow direction of the electronic device involved in the embodiments of the present application;

[0046] Figure 15 It is a schematic diagram of a control logic for the electronic device involved in the embodiments of the present application to perform image display;

[0047] Figure 16 It is a schematic flow chart of an image display method provided by the embodiments of the present application Figure 2 ;

[0048] Figure 17 It is a schematic diagram of another control logic for the electronic device involved in the embodiments of the present application to perform image display;

[0049] Figure 18 It is a schematic diagram of a control logic for obtaining the duration of the second image waiting for the next Vsync signal after the display data preparation is completed in the embodiments of the present application;

[0050] Figure 19 It is a schematic flowchart of a configuration frame interpolation scheme provided by an embodiment of the present application;

[0051] Figure 20 It is a schematic structural diagram of a chip system provided by an embodiment of the present application. Detailed implementation manners

[0052] Next, the technical solutions in the embodiments of the present application will be described with reference to the accompanying drawings in the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, rather than all the embodiments. The following terms "first", "second", etc. are only used for descriptive purposes, and cannot be understood as indicating or implying relative importance or implicitly specifying the quantity of the indicated technical features. Thus, features defined with "first", "second", etc. may explicitly or implicitly include one or more of such features.

[0053] An embodiment of the present application provides an image display method. This method can be applied to an electronic device including a display screen. In response to the completion of the preparation of the display data of the image, the frequency of the vertical synchronization signal output by the display screen is increased, so that the image display driver of the electronic device sends and displays the image in response to a higher-frequency vertical synchronization signal, realizing fast driving of the display screen to display the image.

[0054] It should be noted that the above-mentioned electronic device may be a mobile phone, a tablet computer, a desktop / laptop / handheld computer, a notebook computer, an ultra-mobile personal computer (UMPC), a netbook, and a personal digital assistant (PDA), an augmented reality (AR) / virtual reality (VR) device, etc. electronic devices with a display screen. The specific form of the electronic device in the embodiments of the present application is not particularly limited.

[0055] Next, the implementation manners of the embodiments of the present application will be described in detail with reference to the accompanying drawings.

[0056] Please refer to Figure 1 , Figure 1 It is a schematic structural diagram of an electronic device 100 provided by an embodiment of the present application. As Figure 1As shown, the electronic device 100 may include a processor 110, an external memory interface 120, an internal memory 121, a universal serial bus (USB) interface 130, a charging management module 111, a power management module 112, a battery 113, an antenna 1, an antenna 2, a mobile communication module 140, a wireless communication module 150, an audio module 170, a speaker 170A, a receiver 170B, a microphone 170C, a headphone jack 170D, a sensor module 180, a button 190, a motor 191, an indicator 192, a camera 193, a display screen 194, and a subscriber identification module (SIM) card interface 195, etc.

[0057] It can be understood that the structure illustrated in the embodiments of the present invention does not constitute a specific limitation on the electronic device 100. In some other embodiments of the present application, the electronic device 100 may include more or fewer components than shown, or combine certain components, or split certain components, or have different component arrangements. The illustrated components may be implemented in hardware, software, or a combination of software and hardware.

[0058] The processor 110 may include one or more processing units. For example, the processor 110 may include an application processor (AP), a modem processor, a graphics processing unit (GPU), an image signal processor (ISP), a controller, a memory, a video codec, a digital signal processor (DSP), a baseband processor, and / or a neural-network processing unit (NPU), etc. Among them, different processing units may be independent devices or integrated in one or more processors. Among them, the controller may be the nerve center and command center of the electronic device 100. The controller may generate operation control signals according to the instruction operation code and timing signals to complete the control of fetching instructions and executing instructions.

[0059] A memory may also be provided in the processor 110 for storing instructions and data. In some embodiments, the memory in the processor 110 is a cache memory. This memory may save the instructions or data that the processor 110 has just used or recycled. If the processor 110 needs to use the instruction or data again, it can directly call it from the memory. This avoids repeated accesses, reduces the waiting time of the processor 110, and thus improves the efficiency of the system.

[0060] In some embodiments, the processor 110 may include one or more interfaces. The interfaces may include an inter-integrated circuit (I2C) interface, an inter-integrated circuit sound (I2S) interface, a pulse code modulation (PCM) interface, a universal asynchronous receiver / transmitter (UART) interface, a mobile industry processor interface (MIPI), a general-purpose input / output (GPIO) interface, a subscriber identity module (SIM) interface, and / or a universal serial bus (USB) interface, etc.

[0061] It can be understood that the interface connection relationships between the modules illustrated in the embodiments of the present invention are only illustrative descriptions and do not constitute a structural limitation on the electronic device 100. In some other embodiments of the present application, the electronic device 100 may also adopt different interface connection manners in the above embodiments, or a combination of multiple interface connection manners.

[0062] The charging management module 111 is configured to receive a charging input from a charger. While charging the battery 113, the charging management module 111 can also supply power to the electronic device through the power management module 112. The wireless communication function of the electronic device 100 can be implemented by the antenna 1, the antenna 2, the mobile communication module 140, the wireless communication module 150, the modulation and demodulation processor, and the baseband processor, etc.

[0063] The antenna 1 and the antenna 2 are used for transmitting and receiving electromagnetic wave signals. Each antenna in the electronic device 100 can be used to cover a single or multiple communication frequency bands. Different antennas can also be multiplexed to improve the utilization rate of the antennas. For example: The antenna 1 can be multiplexed as the diversity antenna of the wireless local area network. In some other embodiments, the antenna can be used in combination with a tuning switch.

[0064] The mobile communication module 140 can provide solutions for wireless communications such as 2G / 3G / 4G / 5G / 6G applied to the electronic device 100. The modem processor can include a modulator and a demodulator. The wireless communication module 150 can provide solutions for wireless communications such as wireless local area networks (WLAN) (such as wireless fidelity (Wi-Fi) networks), Bluetooth (BT), global navigation satellite system (GNSS), frequency modulation (FM), near field communication (NFC), infrared (IR), etc. applied to the electronic device 100.

[0065] The electronic device 100 implements the display function through the GPU, the display screen 194, and the application processor, etc. The GPU is a microprocessor for image processing, connected to the display screen 194 and the application processor. The GPU is used to perform mathematical and geometric calculations for graphics rendering. The processor 110 may include one or more GPUs, which execute program instructions to generate or change the display information.

[0066] The display screen (or screen) 194 is used to display images, videos, etc. The display screen 194 includes a display panel. The display panel can include, but is not limited to, a liquid crystal display (LCD), an organic light-emitting diode (OLED), an active-matrix organic light-emitting diode (AMOLED), a flexible light-emitting diode (FLED), a mini organic light-emitting diode (MINILED), a micro organic light-emitting diode (MicroLed), a quantum dot light-emitting diode (QLED), etc. In some embodiments, the electronic device 100 may include 1 or N display screens 194, where N is a positive integer greater than 1.

[0067] The electronic device 100 can implement the shooting function through the ISP, camera 193, video codec, GPU, display screen 194, application processor, etc.

[0068] The external memory interface 120 can be used to connect an external memory card, such as a Micro SD card, to expand the storage capacity of the electronic device 200.

[0069] The internal memory 121 can be used to store computer-executable program code, and the executable program code includes instructions.

[0070] The processor 110 executes various functional applications and data processing of the electronic device 100 by running the instructions stored in the internal memory 121. The internal memory 121 can include a program storage area and a data storage area. Among them, the program storage area can store the operating system, application programs required for at least one function (such as the sound playback function, image playback function, etc.). The data storage area can store the data created during the use of the electronic device 100 (such as audio data, phone book, etc.). In addition, the internal memory 121 can include high-speed random access memory and can also include non-volatile memory, such as at least one disk storage device, flash memory device, universal flash storage (UFS), etc.

[0071] The electronic device 100 can implement the audio function through the audio module 170, speaker 170A, receiver 170B, microphone 170C, headphone jack 170D, and application processor, etc. Such as music playback, recording, etc.

[0072] The keys 190 include a power-on key, volume keys, etc. The indicator 192 can be an indicator light.

[0073] The sensor module 180 can include a folding angle detection sensor, pressure sensor, gyroscope sensor, barometric pressure sensor,

[0074] magnetic sensor, acceleration sensor, distance sensor, proximity light sensor, fingerprint sensor, temperature sensor, touch sensor, ambient light sensor, bone conduction sensor, etc.

[0075] It should be noted that, in the embodiments of the present application, the display screen of the electronic device applying the image display method provided in the embodiments of the present application belongs to the screen type that supports the refresh interruption of the source integrated circuit (Source IC). Among them, the Source IC refresh interruption means that when the Source IC of the display screen is in the non-refresh state, it can be interrupted by driving at any time (abbreviated as Source refresh interruption), and then re-enter the refresh state to start working. The work performed by the Source IC in the refresh state can be: refreshing the display data of the image to make the display screen start to display the image, or, in response to the frame switching instruction, switching the refresh rate of the display screen.

[0076] Exemplarily, the display screen of the electronic device can be a display screen that uses low temperature polysilicon oxide (LTPO) transistors, so as to support the Source refresh interruption based on the characteristic of low leakage power of LTPO. And the display screen of the electronic device generally cannot be a display screen that uses low temperature poly-silicon (LTPS) transistors. Because as the leakage power of the transistors increases, even if the Source refresh interruption can still be supported, the overall display effect of the display screen will be seriously affected. Thus, due to the characteristic of serious leakage of LTPS, the display screen using LTPS generally does not support the function of Source refresh interruption. Therefore, it can be understood that as long as the display screen of the electronic device uses transistors with the characteristic of low leakage power, the Source refresh interruption can be supported.

[0077] Based on different design requirements in practical applications, the transistor type that can be used for the display of the electronic device can of course be other types except LTPO. However, regardless of the specific type of transistor used in the display screen, and regardless of whether the transistor supports the Source refresh interruption due to the characteristic of low leakage power, as long as the display screen of the electronic device belongs to the screen type that supports the source refresh interruption, it should be included in the protection scope of the image display method provided in the embodiments of the present application.

[0078] In the embodiments of the present application, the base frequency supported by the display screen of the electronic device can be 60 hertz (Hz), 70Hz, 75Hz, 80Hz, 90Hz, 120Hz or 360Hz, etc. And the refresh rate of the display screen for image display (abbreviated as image refresh rate or display frame rate) is less than or equal to the base frequency supported by the display screen. And the image refresh rate supported by the display screen is usually less than or equal to 120Hz. For example, the image refresh rate of the display screen can usually be configured as 60 hertz (Hz), 70Hz, 75Hz, 80Hz, 90Hz or 120Hz.

[0079] When the display screen supports an image refresh rate of 120 Hz, the display screen can increase the image refresh rate from 60 Hz, 70 Hz, 75 Hz, 80 Hz, 90 Hz to 120 Hz, or decrease it from 120 Hz to 90 Hz, 80 Hz, 75 Hz, 70 Hz or 60 Hz. In the embodiments of the present application, the image refresh rate of the electronic device is the image refresh rate currently used by the display screen of the electronic device. Therefore, in some feasible embodiments of the present application, the image refresh rate of the electronic device or the image refresh rate of the display screen of the electronic device can also be referred to as the current refresh rate.

[0080] It should be noted that in the embodiments of the present application, the vertical synchronization (VSync) signal is a periodic discrete signal involved in the process of the electronic device applying the VSync technology. That is, there is a VSync signal triggered by hardware drive every other VSync period (which can also be called a refresh period or a refresh duration, etc.).

[0081] It should be noted that in the embodiments of the present application, the VSync signal is used to trigger the image frame for hardware refresh. The VSync signal can be generated and fed back to the APP, the modem processor, the GPU, the ISP, and the controller, etc. by the display screen. Therefore, the VSync signal can also be regarded as a kind of tearing effect (TE) signal fed back from the display screen 194 to the processor 110.

[0082] In the embodiments of the present application, when the display screen supports a base frequency of 360 Hz, the display screen can adaptively switch the frequency of the output VSync signal to 60 Hz, 90 Hz, 120 Hz or 360 Hz based on the control of the image display drive in the electronic device, so as to trigger and output VSync signals with different VSync periods at different times.

[0083] In different systems or architectures, the name of the VSync signal may be different. For example, in some systems or architectures, the VSync signal may specifically be VSYNC_APP, or it may be VSYNC_SF or VSYNC_HW. However, no matter what the name of the VSync signal is, as long as it is a synchronization signal with a similar function and conforms to the technical idea of the method provided in the embodiments of the present application, it should be covered within the protection scope of the present application. And, in different systems or architectures, the definition of the VSync signal may also be different, but no matter what definition is made for the VSync signal, as long as it is a synchronization signal with a similar function and conforms to the technical idea of the method provided in the embodiments of the present application, it should also be covered within the protection scope of the present application.

[0084] It should be noted that the software system of the above electronic device can adopt a layered architecture, an event-driven architecture, a microkernel architecture, a microservices architecture, or a cloud architecture. For the sake of easy understanding, in the embodiments of the present application, the Android system with a layered architecture is taken as an example to describe in detail the image display method provided by the embodiments of the present application applied to the electronic device.

[0085] The following will be combined with Figure 2 , taking the example that the electronic device responds to the VSync signal and sends (or writes) the image to the display screen for display, to introduce the software and hardware processing flow of the electronic device in the Android system during this process.

[0086] As Figure 2 shown, the software and hardware architecture of the electronic device adopts a layered design. Among them, the software layer includes the application layer (Application Layer, APP Layer), the application framework layer (Application Framework Layer, FWKLayer), the hardware abstraction layer (Hardware Abstraction Layer, HAL), and the kernel layer (Kernel Layer), and the hardware layer includes the display screen (panel). Among them, the application layer can include various application programs running on the electronic device, such as: gallery, browser, theme application, and wallpaper application, etc. The application framework layer is mainly involved in services for graphics processing, such as: the image rendering service (surface flinger, SF) for rendering the to-be-displayed image given by the application, and the image composition service (GPU) for compositing multiple layers of the to-be-displayed image. The kernel layer mainly includes the image display driver, which is mainly used to send the to-be-displayed image processed and sent down by the upper layer of the system (other system levels above the kernel layer where the image display driver is located, such as the application layer, the application framework layer, and the hardware abstraction layer) to the display screen. The hardware layer mainly includes the display screen (panel) that refreshes and displays the to-be-displayed image based on the call of the image display driver.

[0087] Among them, in the processing flow of the electronic device for image display, VSync alignment can be performed or not performed between the APP and the SF, and between the SF and the driver. If VSync alignment is not performed between the APP and the SF, and between the SF and the driver, then the responsiveness of the electronic device can be further improved. Subsequently, the case where VSync alignment is not performed between the APP and the SF, and between the SF and the driver will be taken as an example for description.

[0088] In as Figure 2In the system framework of the electronic device shown, application programs APP such as the gallery, browser, theme application, or wallpaper application in the application layer perform image drawing. Then, the APP sends the drawn image to the application framework layer, so that the SF and GPU in the application framework layer respectively perform image rendering and layer composition processing on the drawn image to obtain the display data of the image to be displayed, and the display data of the image to be displayed is transmitted to the image display driver in the kernel layer through the hardware abstraction layer. Furthermore, the image display driver responds to a new VSync signal to call the display serial interface (DSI) of the display module through the smart display engine (SDE), and writes the display data of the image to be displayed into the display driver integrated circuit (DDIC) of the display screen. The DDIC of the display screen can store the image data sent from the software side in the buffer, and then control the display panel to complete the refresh display of the image by scanning (or reading) the display data in the buffer.

[0089] For scenarios that pursue extreme smoothness, the APP, SF, and between the SF and the driver do not need to perform VSync alignment. At this time, the requirement is that after an APP draws a frame of image, it can be displayed on the display screen as quickly as possible.

[0090] In a game scenario with a frame rate of 60Hz, as Figure 3 shown, if the DDIC of the display screen of the electronic device supports a 60Hz image refresh rate, when the DDIC outputs a vertical synchronization signal at a frequency of 60Hz, the VSync period of the output vertical synchronization signal is approximately 16.6ms. Therefore, the display duration of the display screen for the image is also approximately 16.6ms.

[0091] At time t1, the display screen responds to VSync signal 1 and starts to display image -1 for 16.6ms. During the display of image -1, the APP in the application layer of the electronic device starts to draw image 0. After image 0 is drawn, the SF in the application framework layer of the electronic device renders image 0 drawn by the APP through the render server (which can also be called the render thread), and after the SF completes the rendering of image 0, it further sends image 0 downward to the GPU. Then, after receiving image 0, the GPU immediately starts to perform layer composition processing on image 0. Then, after image 0 is synthesized, it is sent to the image display driver. Wait until time t2, the image display driver responds to VSync signal 2 output by the display screen and writes the display data of image 0 into the display screen, so that the display screen refreshes and displays image 0 from time t2 until time t3.

[0092] After time t2, the APP in the application layer of the electronic device starts to draw Image 1. After Image 1 is drawn, the SF renders the Image 1 sent by the APP, and after the SF finishes rendering Image 1, it further sends Image 1 downward to the GPU. Thus, after receiving Image 1, the GPU starts to perform the processing of layer composition on Image 1. At this time, since the GPU will synchronously send the display data of Image 1 to the image display driver in the system kernel layer of the electronic device after completing the composition of Image 1 (that is, the moment when the GPU completes the composition of the image also means that the image display driver receives the display data of the composed Image 1). Thus, after the GPU completes the composition of Image 1 and sends Image 1 to the image display driver before time t3, the image display driver writes the display data of Image 1 into the display screen in response to the VSync signal 3 at time t3, so that the display screen refreshes and displays Image 1 at time t3.

[0093] After time t3, during the process of the display screen displaying Image 1, the APP starts to draw Image 2. After Image 2 is drawn, the SF renders the Image 2 sent by the APP, and after the SF finishes rendering Image 2, it further sends Image 2 downward to the GPU. Thus, after receiving Image 2, the GPU starts to perform the processing of layer composition on Image 2. Figure 3 As can be seen, Image 2 has been synthesized at time t0, and the GPU synchronously sends the display data of Image 1 to the image display driver in the system kernel layer of the electronic device. At this time, the image display driver waits from time t0 until time t4. The display screen generates the VSync signal 4, and the image display driver writes the display data of Image 2 into the display screen in response to the VSync signal 4 at time t4, so that the display screen refreshes and displays Image 2 at time t4.

[0094] At time t5, since the APP has completed the original image display requirements of the electronic device before time t5 and thus has not drawn new images, and the electronic device has not generated new image display requirements from time t4 until time t5, the display screen stops refreshing and displaying images after finishing displaying Image 2 at time t5. At this time, the display screen enters the sleep or screen-off state.

[0095] Combined with the above, after the display data of Image 2 is prepared, that is, after Image 2 completes the drawing by the APP, the rendering by the SF, and the composition processing by the GPU, the waiting time for the next VSync signal (VSync signal 4) to arrive in the image display driver is relatively long, and Image 2 cannot be displayed on the display screen more quickly.

[0096] Therefore, in the game scenario of pursuing high followability, if an image needs to wait for a long time to be displayed on the screen after the display data preparation is completed, it will cause the inability to respond to the user's interaction operations on the interface in a timely manner, resulting in poor followability and affecting the user's game experience.

[0097] To improve the followability of the electronic device, this application proposes an image display method, which improves the followability of the electronic device by reducing the waiting time for the next VSync signal after the display data preparation of the image is completed.

[0098] It should be noted that the method proposed in the embodiments of this application can be considered as an independent improvement relative to the solution of adjusting the software control logic of the upper layer (such as the application layer, application framework layer, or hardware abstraction layer) of the electronic device system, or can also be considered as a further optimization and supplement to the solution of adjusting the software control logic. That is, the image display method proposed in the embodiments of this application has been independently improved at the software control level of the electronic device system. Moreover, the method proposed in the embodiments of this application has also creatively been improved at the system hardware level. Thus, by combining the improvements at the two levels of the system software and hardware, it is possible to further reduce the waiting time for the image to be displayed after the display data preparation is completed, and to greatly improve the followability.

[0099] In a feasible implementation manner of the embodiments of this application, as Figure 4 shown, the method proposed in the embodiments of this application can add a frame chasing detection module in the kernel layer of the electronic device system to detect whether the display data of the image is prepared. Based on this, when the frame chasing detection module detects that the display data of the image is prepared, the image display driver of the electronic device immediately increases the frequency of the VSync signal output by the display screen, advances the moment of generating the VSync signal, and thus responds to the VSync signal with the increased frequency at the advanced moment to drive the display screen to display this frame of image. That is, the method proposed in the embodiments of this application can enable the display screen to quickly display the next frame of image when the display data of the image is prepared, rather than, like the traditional solution, the display screen needs to display the previous frame of image for the image display duration corresponding to the VSync period and then display the next frame of image. In this way, it can effectively shorten the time for the image display driver to send the image to the display screen, speed up the response speed of the electronic device to the user's interaction operations performed on the display screen, and thus improve the followability of the electronic device. Here, the frame chasing can be understood as advancing the moment of generating the VSync signal by a set duration by the image display driver of the electronic device.

[0100] The method proposed in the embodiments of the present application improves the comprehensiveness of detecting whether the display data of an image is ready by configuring the frame chasing detection module in the image display driver of the kernel layer of the electronic device system, and improves the accuracy of immediately sending and displaying the next frame of image by the image display driver by increasing the frequency of the output VSync signal and advancing the time of outputting the next VSync signal.

[0101] Next, in combination with Figure 5 , a feasible specific implementation manner of the image display method provided in the embodiments of the present application will be described.

[0102] As Figure 5 shown, in a game scenario with a frame rate of 60 Hz, during the process of refreshing and displaying an image on the display screen (supporting a base frequency of 360 Hz) of the electronic device at the current refresh rate of 120 Hz, if it occurs that after the display data of image 2 is ready (synthesized), it still needs to wait for a period of time to reach the moment of generating the next VSync signal. The image display method provided in the embodiments of the present application detects and identifies that the display data of image 2 is ready (synthesized) through a newly added hardware module in the kernel layer of the electronic device system - the frame chasing detection module. In response to the completion of the display data preparation of image 2, the image display driver of the electronic device increases the frequency of the VSync signal output by the display screen to 360 Hz at time t4, and outputs VSync signal 4 at time t4.

[0103] It can be understood that since the highest frequency of the VSync signal output by the display screen of the electronic device is 360 Hz, the corresponding Vsync period is 2.8 ms. Figure 5 In , the time (t4) corresponding to the completion of the display data preparation of image 2 and the moment when the display screen was originally going to output the next VSync signal differ by 2.8 ms. Thus, the image display driver of the electronic device can advance the time of outputting the next VSync signal by 2.8 ms, that is, the display screen outputs the frequency-increased VSync signal 4 (corresponding Vsync period is 2.8 ms) at time t4. And the image display driver in the kernel layer of the system for driving the display screen can, in response to VSync signal 4, write the received display data of image 2 into the display screen at time t4. In this way, the display screen can start displaying image 2 immediately after the display data of image 2 is ready, reducing the waiting time of image 2 for the next VSync signal after the display data is ready.

[0104] In some feasible embodiments, the moment corresponding to the completion of the display data preparation of Image 2 can be even earlier, that is, the duration between this moment and the moment when the display screen was originally going to output the next VSync signal is greater than 2.8 ms.

[0105] As Figure 6 shown, in a game scenario with a frame rate of 60 Hz, during the process of the display screen of the electronic device (supporting a base frequency of 360 Hz) refreshing and displaying images at the current refresh rate of 120 Hz, if the phenomenon occurs that the duration of Image 2 waiting for the next VSync signal after the display data preparation is completed (synthesis is completed) exceeds 2.8 ms. The image display method provided by the embodiments of the present application, through the frame chasing detection module, a newly added hardware module in the system kernel layer of the electronic device, when it detects that the duration of Image 2 waiting for the next VSync signal after the display data preparation is completed (synthesis is completed) exceeds 2.8 ms, the image display driver of the electronic device will increase the frequency of the VSync signal output by the display screen to 360 Hz and advance the moment of the display screen outputting the next VSync signal by 2.8 ms. Thus, the display screen outputs the VSync signal 4 with an increased frequency at the moment t4 (the corresponding Vsync period is 2.8 ms), and the image display driver in the system kernel layer for driving the display screen can, after receiving the VSync signal 4, in response to the VSync signal 4, write the display data of Image 2 received at the moment t4 into the display screen. In this way, the display screen can start displaying Image 2 at the moment t4, shortening the duration of Image 2 waiting for the next VSync signal after the display data preparation is completed.

[0106] As Figure 7As shown, in a game scenario with a frame rate of 60Hz, during the process of image refresh display on the display screen of an electronic device (supporting a base frequency of 360Hz) at the current refresh rate of 120Hz, if the GPU in the system application framework layer takes more than 16.6ms to synthesize and process Image 2, that is, beyond time t7, and the time when the GPU finishes synthesizing and processing Image 2 is t8. Then, the GPU will send the display data of Image 2 to the image display driver in the kernel layer only after time t8, which causes the image display driver to miss the VSync signal generated at time t7 and be unable to send the image to the display screen at time t7, resulting in the phenomenon of the display screen timing out in displaying Image 1. In response to this phenomenon, in the image display method provided by the embodiments of the present application, when the frame chasing detection module of the electronic device detects that the duration for Image 2 to wait for the next VSync signal after the display data is prepared exceeds 2.8ms, the frequency of the VSync signal output by the display screen is increased to 360Hz, and the time for the display screen to output the next VSync signal is advanced by 2.8ms. Thus, the display screen can output the VSync signal 4 with an increased frequency (corresponding to a Vsync period of 2.8ms) at time t4. And the image display driver responds to the VSync signal 4 at time t4 and writes the display data of Image 2, which has been synthesized and sent to the image display driver by the GPU before time t4, to the display screen, so that the display screen can start displaying Image 2 at time t4, shortening the duration for Image 2 to wait for the next VSync signal after the display data is prepared. Moreover, the duration of the display timeout of Image 1 is shortened.

[0107] Compared with the traditional solution, in the image display method provided by the embodiments of the present application, through the newly added frame chasing detection module, when it is found that the image of the electronic device is ready for display data, the display screen increases the frequency of the VSync signal output by the display screen and advances the output time of the VSync signal by a set duration, so that the image display driver instantaneously sends and displays the image based on the VSync signal with increased frequency at the advanced time. In this way, unlike the traditional solution, when the frame rate of 120hz (corresponding to 1 VSync cycle of 8.3ms) is used in the driver layer, the duration for a frame of image to wait for the next VSync signal after the display data is ready exceeds the set duration (such as 2.8ms), and the image display driver then writes the image to the display screen for display, resulting in the problem that the image cannot be displayed quickly and the followability is low. The embodiments of the present application can increase the frequency of the VSync signal output by the display screen and advance the output time of the VSync signal by the display screen, so as to write the image to the display screen in advance based on the VSync signal with increased frequency, realize the fast display of the next frame of image by the display screen, and improve the followability. Thus, the present application can advance the time to generate the next VSync signal after the display data of the image is ready, and display the frame of image in time, improving the followability of the electronic device.

[0108] Based on the overall overview of the image display method provided by the embodiments of the present application above, the following will sequentially elaborate on the specific embodiments of the image display method provided by the embodiments of the present application.

[0109] Please refer to Figure 8 , Figure 8 which is a schematic flowchart of the image display method provided by the embodiments of the present application in a specific implementation. It should be understood that although Figure 8 shows the execution order of some method steps, the image display method provided by the embodiments of the present application can of course adopt an execution order different from that shown in the figure based on different design requirements of actual applications. That is, Figure 8 the order of the method steps shown does not constitute a limitation on the execution logic order of the image display method provided by the embodiments of the present application, and any reasonable changes based on Figure 8 the order of the method steps shown should be included in the protection scope of the image display method provided by the embodiments of the present application.

[0110] In a feasible embodiment of the image display method provided in the embodiments of the present application, when the image display method is executed by an electronic device, at a first moment, the electronic device generates a first Vsync signal. In response to the first Vsync signal, the display screen of the electronic device starts to display a first image. At a second moment after the first moment, the electronic device generates a second Vsync signal. In response to the second Vsync signal, the display screen starts to display a second image. At a third moment after the second moment, in response to the completion of the preparation of the display data of the second image, the electronic device generates a third Vsync signal.

[0111] It should be noted that in the embodiments of the present application, the first Vsync signal generated by the electronic device at the first moment corresponds to a first Vsync period, and the first Vsync period corresponds to a first display duration of the first image, that is, the first VSync period is equal to the first display duration. The second Vsync signal generated by the electronic device at the second moment corresponds to a second Vsync period, and the second Vsync period is equal to the first Vsync period. The third Vsync signal generated by the electronic device at the third moment corresponds to a third Vsync period, and the third Vsync period is less than the first Vsync period.

[0112] In the embodiments of the present application, the smaller the Vsync period, the higher the frequency of the output Vsync signal. When the electronic device generates a third Vsync signal at the third moment in response to the completion of the preparation of the display data of the third image, it may be: the electronic device controls the display screen to increase the frequency of triggering the Vsync signal through its own image display driver when the display data of the third image is prepared, so that the display screen outputs a third Vsync signal with an increased frequency at the third moment according to the increased frequency.

[0113] In the embodiments of the present application, by generating a third Vsync signal at the third moment, it can be made that after the preparation of the display data of the third image is completed and the waiting time of the third image for the Vsync signal is extremely short, the display of the third image starts.

[0114] In a feasible embodiment, the specific process of the electronic device controlling the display screen to advance the moment of generating the Vsync signal and increase the frequency of triggering the Vsync signal through the image display driver, and the electronic device generating a third Vsync signal at the third moment, can refer to Figure 8 S1 to S3 shown.

[0115] S1: Detect whether the display data of the third image is prepared.

[0116] In the embodiment of the present application, for the image display driving of the electronic device, after the display screen displays the second image in response to the second Vsync signal at the second moment, it is detected in real time whether the display data of the third image is ready.

[0117] It should be noted that in the embodiment of the present application, the second image displayed on the display screen is the next frame image of the first image displayed on the display screen.

[0118] Exemplarily, when the display screen refreshes and displays images at a current refresh rate of 60 Hz and uses this 60 Hz frequency as the frequency for triggering the Vsync signal, when the first Vsync signal is triggered at the first moment, the first Vsync period corresponding to the first Vsync signal is approximately 1 / 60 ≈ 16.6 ms. That is, the display screen triggers a first Vsync signal every 16.6 ms. At this time, the first display duration corresponding to the first Vsync period is also approximately 16.6 ms. That is, the display screen refreshes and displays one frame of image every approximately 16.6 ms. The display screen displays the second image in response to the second Vsync signal at the second moment, and during the process of the display screen displaying the second image, it is detected whether the display data of the third image is ready.

[0119] Among them, since the second Vsync period is equal to the first Vsync period, after the display screen displays the second image in response to the second Vsync signal at the second moment, normally, the second display duration during which the display screen continuously displays the second image is also approximately 16.6 ms. The moment when the display of the second image ends can be recorded as moment 1, that is, the moment when the next Vsync signal is generated. Then, before moment 1, the image display driving of the electronic device detects whether the display data of the third image is ready.

[0120] S2: When the display data of the third image is ready, increase the frequency of outputting the third Vsync signal.

[0121] In the embodiment of the present application, during the process of the display screen of the electronic device displaying the second image, when it is detected that the display data of the third image is ready, the display screen is controlled to increase the frequency of outputting the Vsync signal and generate the third Vsync signal.

[0122] Exemplarily, during the process of the image display driver of the electronic device displaying the second image with the current refresh rate of 60 Hz as the frequency of the output Vsync signal, the image display driver detects that the display data of the third image is ready, and records the moment when the display data of the third image is ready as moment 2. Among them, moment 2 is before moment 1. If the duration between moment 2 and moment 1 is greater than or equal to the set duration, the set duration can be approximately the period corresponding to the highest refresh rate of 360 Hz of the electronic device, which is about 1 / 360 ≈ 2.8 ms. That is to say, if the duration between moment 2 and moment 1 is greater than or equal to 2.8 ms, the image display driver of the electronic device issues a control instruction to the display screen to increase the frequency of the currently used output Vsync signal of 60 Hz, so that it can control the display screen to generate the third Vsync signal at a moment 2.8 ms before moment 1.

[0123] If the duration between moment 2 and moment 1 is less than 2.8 ms, then the image display driver of the electronic device issues a control instruction to the display screen to control the display screen to generate the third Vsync signal at moment 1. Also, the image display driver can also control the display screen to increase the frequency of the currently used output Vsync signal of 60 Hz.

[0124] In some other examples, if the duration between moment 2 and moment 1 is less than 2.8 ms, the image display driver of the electronic device may also not issue a control instruction to the display screen, and wait until moment 1 for the display screen to generate the third Vsync signal.

[0125] S3: Generate the third Vsync signal.

[0126] In the embodiments of the present application, if the duration between moment 2 and moment 1 is greater than or equal to 2.8 ms, then the third moment is the moment 2.8 ms before moment 1. If the duration between moment 2 and moment 1 is less than 2.8 ms, then the third moment is moment 1. The image display driver of the electronic device outputs the third Vsync signal with an increased frequency to the image display driver and other software and hardware modules at the third moment.

[0127] It should be noted that in the embodiments of the present application, since the higher the frequency of the output Vsync signal, the smaller the Vsync period. Therefore, after the display screen increases the frequency of the output Vsync signal, the third Vsync period corresponding to the third Vsync signal triggered at the third moment is smaller than the above-mentioned first Vsync period and also smaller than the above-mentioned second Vsync period (when the display screen outputs the first Vsync signal at the first moment and the second Vsync signal at the second moment, the frequency of the output Vsync signal has not been increased).

[0128] Exemplarily, after the electronic device controls the display screen to increase the frequency of the currently adopted output Vsync signal from 60 Hz to 360 Hz, the display screen outputs the first Vsync signal with the increased output frequency after about 2.8 ms, which is the Vsync period corresponding to the increased frequency of 360 Hz, i.e., 1 / 360 ≈ 2.8 ms. At this time, the third Vsync period corresponding to the third Vsync signal is about 2.8 ms, which is less than the first Vsync period of about 16.6 ms mentioned above.

[0129] In a feasible embodiment, for the specific process of the display screen displaying the next frame of the second image in response to the third Vsync signal, reference can be further made to Figure 8 S4 shown below.

[0130] S4: Write the display data of the third image.

[0131] It should be noted that in the embodiments of the present application, the third image is the next frame of the second image mentioned above.

[0132] In the embodiments of the present application, in response to the electronic device generating a third Vsync signal at the third moment, the display screen displays the third image. That is, after the image display driver of the electronic device has received the display data of the third image sent by the upper layer of the system, in response to the third Vsync signal with the increased frequency output by the display screen at the third moment, it writes the display data of the third image to the display screen, so that the display screen displays the third image at the third moment.

[0133] Exemplarily, assume that the display screen of the electronic device supports a base frequency of 360Hz. Then, when the display screen uses the image display duration of 16.6ms corresponding to the current refresh rate of 60Hz to display an image, the display screen uses this 60Hz frequency as the frequency of the output Vsync signal. After the display screen responds to the second Vsync signal at the second moment and starts to display the second image, the image display driver of the electronic device detects whether the display data of the third image has been prepared. Thus, when the image display driver detects that the display data of the third image has been prepared, it controls the display screen to enable a pre-set 360Hz-TE high-frequency synchronization scheme to control the display screen to increase the frequency of the output Vsync signal to 360Hz. In this way, at the third moment, the display screen outputs the third Vsync signal with an increased frequency according to the Vsync period of 1 / 360≈2.8ms corresponding to the 360Hz frequency. After receiving the third Vsync signal, the image display driver responds to the third Vsync signal and writes the display data of the third image sent by the upper layer of the system before the third moment into the display screen. In this way, the display screen starts to refresh and display the third image at the third moment. At this time, after the display data of the third image is prepared, the waiting time for the next Vsync signal is extremely short and will not exceed 2.8ms.

[0134] In some other feasible embodiments, if the duration between the moment when the display data of the third image is prepared and moment 1 is exactly equal to 2.8ms, then the moment when the display data of the third image is prepared is the third moment. At this time, the display screen starts to refresh and display the third image at the moment when the display data of the third image is prepared, and there is no process of the third image waiting to be displayed.

[0135] It should be noted that in the embodiments of the present application, the 360Hz-TE high-frequency synchronization scheme can be a Vsync signal output control scheme pre-added to the display screen for the display screen to switch the frequency of the output Vsync signal as needed. It should be understood that based on different design requirements of actual applications, other Vsync signal output control schemes of the same type but with different frequency magnitudes can of course also be pre-added to the display screen, for example, the 60Hz-TE low-frequency synchronization scheme and the 120Hz-TE standard-frequency synchronization scheme, etc.

[0136] When the display screen responds to the synchronization scheme of a certain frequency, it outputs the Vsync signal according to the Vsync period corresponding to that frequency. For example, when the display screen responds to the 360Hz-TE high-frequency synchronization scheme, with the Vsync period of 2.8ms corresponding to the 360Hz frequency, a Vsync signal is output every 2.8ms. When the display screen responds to the 120Hz-TE standard-frequency synchronization scheme, with the Vsync period of 8.3ms corresponding to the 120Hz frequency, a Vsync signal is output every 8.3ms. When the display screen responds to the 60Hz-TE low-frequency synchronization scheme, with the Vsync period of 16.6ms corresponding to the 60Hz frequency, a Vsync signal is output every 16.6ms.

[0137] In the embodiment of the present application, when the display screen of the electronic device uses 60Hz as the current refresh rate for image refresh display, it can default to using the 60Hz-TE low-frequency synchronization scheme to output the Vsync signal with 60Hz as the original frequency.

[0138] Compared with the traditional scheme where the image refresh rate is always 120Hz, in the embodiment of the present application, when the 360Hz-TE high-frequency synchronization scheme is not enabled, the image refresh rate of 60Hz is used. The actual number of times of enabling 360Hz-TE is approximately one-third less than the number of times of always enabling 120Hz-TE in the traditional scheme. Thus, this scheme can shorten the waiting time of the image for the Vsync signal after the display data preparation is completed to the greatest extent, meeting the high followability performance requirements while reducing power consumption waste.

[0139] In some other feasible embodiments, the electronic device can also detect the waiting time of the previous frame of image for the next Vsync signal after the display data preparation is completed through the image display driver. If this waiting time exceeds the first set duration, and the waiting time of the current frame of image for the next Vsync signal after the display data is completed also exceeds the second set duration, then the image display driver can control the display screen to increase the frequency of outputting the Vsync signal, and in response to the Vsync signal with the increased frequency output by the display screen at this moment, write the display data of the current frame of image to the display screen, so that the display screen starts to display the current frame of image at this moment.

[0140] In some examples, the first set duration and the second set duration can be equal, both being 2.8ms. In some other examples, the first set duration and the second set duration can also be unequal, with the first set duration being 5.5ms and the second set duration being 2.8ms. In the present application, the first set duration and the second set duration can be adjusted according to the actual situation, and there is no limitation on this.

[0141] Such as Figure 9As shown, during the display of Image-1 on the display screen, the image display driver detects that the display data of Image 0 is ready, and the waiting time for the Vsync signal 2 exceeds 2.8 ms. Then, when the display screen responds to the Vsync signal 2 and starts to refresh and display Image 0 at time t2, if the image display driver detects that the waiting time for Image 1 for the next Vsync signal after the display data is ready also exceeds 2.8 ms, at this time, the image display driver increases the frequency of the next Vsync signal and controls the display screen to output the Vsync signal 3 2.8 ms in advance. After receiving the Vsync signal 3, the image display driver responds to the Vsync signal 3 and writes the display data of Image 1 sent by the upper layer of the system before time t3 to the display screen. In this way, the display screen starts to refresh and display Image 1 at time t3.

[0142] Thus, the electronic device shortens the waiting time for an image for the next Vsync signal after the display data is ready, and speeds up the display speed of the image.

[0143] In some other feasible embodiments, as Figure 10 shown, after the electronic device reduces the display duration of Image 0, it will ensure that the display duration of Image 1 is normal, that is, keep the display duration at 16.6 ms. At this time, at time t4, the electronic device can turn off the 360 Hz high-frequency synchronization signal. Then, during the subsequent display process, continue to detect the waiting time for the next Vsync signal after the display data of Image 3 is ready.

[0144] In some other feasible embodiments, if the duration between the time when the display data of Image 2 is ready and the time when the next VSync signal is to be generated exceeds two cycles of 360 Hz, that is, exceeds 5.6 ms. This application can increase the frequency of the output VSync signal to 360 Hz and output the next VSync signal 2.8 ms in advance. As Figure 10 shown, if the time when the display data of Image 2 is ready is before time t41, then the image display driver can control the display screen to output the frequency-increased VSync signal 4 at time t42. Then, the image display driver responds to the VSync signal 4 output at time t42 and writes the received display data of Image 2 to the display screen. In this way, the display screen can start to display Image 2 at time t42, saving the waiting time for Image 2 for the next VSync signal after the display data is ready.

[0145] In some other feasible embodiments, if the duration between the completion of the display data preparation of Image 2 and the moment when the next VSync signal is to be generated exceeds two 360 Hz cycles, that is, exceeds 5.6 ms. The present application can increase the frequency of the output VSync signal to 360 Hz and output the next VSync signal 5.6 ms in advance. As Figure 11 shown, the moment when the display data preparation of Image 2 is completed is before time t41. Then, the image display driver can control the display screen to output the VSync signal 4 with the increased frequency at time t41. Then, in response to the VSync signal 4 output at time t41, the image display driver writes the received display data of Image 2 into the display screen. In this way, the display screen can start to display Image 2 at time t41, saving the duration of Image 2 waiting for the next VSync signal after the display data preparation is completed.

[0146] It can be understood that the advance moment corresponding to the generation of the next VSync signal by the display screen may be related to the number of 360 Hz cycles exceeded by the duration between the completion of the display data preparation of the image and the moment when the next VSync signal is to be generated. For example, if the duration between the completion of the display data preparation of Image 2 and the moment when the next VSync signal is to be generated exceeds two 360 Hz cycles, then the image display driver can control the display screen to output the VSync signal 4 with the increased frequency 5.6 ms in advance. If the duration between the completion of the display data preparation of Image 2 and the moment when the next VSync signal is to be generated exceeds one 360 Hz cycle, then the image display driver can control the display screen to output the VSync signal 4 with the increased frequency 2.8 ms in advance. Among them, in order to ensure that the fluctuation of the refresh rate of the electronic device is small, generally speaking, even if the number of 360 Hz cycles exceeded by the duration between the completion of the display data preparation of the image and the moment when the next VSync signal is to be generated is two or more, the image display driver can also control the display screen to only output the VSync signal 4 with the increased frequency 2.8 ms in advance.

[0147] In the embodiments of the present application, for the case where the electronic device determines whether to increase the frequency of the next VSync signal after the display data of the current frame is prepared by detecting the duration of the previous frame image waiting for the next VSync signal after the display data is prepared. The duration of the previous frame image waiting for the next VSync signal after the display data is prepared is related to the advance time corresponding to the generation of the next VSync signal by the display screen. The shorter the duration of the previous frame image waiting for the next VSync signal after the display data is prepared, the greater the jitter degree of the displayed image; the longer the duration of the previous frame image waiting for the next VSync signal after the display data is prepared, the smaller the jitter degree of the displayed image. For example, when the duration of the previous frame image waiting for the next VSync signal after the display data is prepared is about 2.7 ms, the frame chasing trigger frequency is 100 / 600, and the jitter degree of the displayed image is greater, where the average duration of the image waiting for the next VSync signal after the display data is prepared is 4 ms. When the duration of the previous frame image waiting for the next VSync signal after the display data is prepared is about 5.4 ms, the frame chasing trigger frequency is 90 / 600, where the average duration of the image waiting for the next VSync signal after the display data is prepared is 6 ms. When the duration of the previous frame image waiting for the next VSync signal after the display data is prepared is about 8.1 ms, the frame chasing trigger frequency is 80 / 600, where the average duration of the image waiting for the next VSync signal after the display data is prepared is 9 ms.

[0148] In the traditional solution, the frame rate used in the driver layer is 120 Hz. However, in a game scenario with a frame rate of 60 Hz, when looking at the actual frame rate of the game engine over a longer period of time, it is above 60 Hz, but the time intervals between two adjacent frames or several frames are uncontrollable. As a result, there will be a situation such as Figure 12 as Figure 12 shown. If the DDIC of the display screen of the electronic device supports a 120 Hz image refresh rate, then when the DDIC outputs a vertical synchronization signal at a frequency of 120 Hz, the VSync period of the output vertical synchronization signal is about 8.3 ms. In this way, in a 60 Hz game scenario, usually each image needs to be displayed for two VSync periods, which is about 16.6 ms.

[0149] The display screen starts to display Image - 1 for 16.6 ms at time t1. During the display of Image - 1, if the APP in the application layer of the electronic device starts to draw Image 0, and the SF in the application framework layer of the electronic device renders the Image 0 sent by the APP before through the rendering service renderserver (which can also be called the render thread), and after the SF finishes rendering Image 0, it will further send Image 0 down to the GPU. Thus, after receiving Image 0, the GPU immediately starts to process the layer composition of Image 0. Since the completion time of the composition of Image 0 exceeds t2, then, Image 0 waits until time t3 after composition, and in response to the VSync signal output by the display screen, writes the display data of Image 0 into the display screen. Thus, the display screen refreshes and displays Image 0 from time t3 until time t5.

[0150] The APP in the application layer of the electronic device starts to draw Image 1, the SF renders Image 1 sent by the APP, and after the SF finishes rendering Image 1, it further sends Image 1 down to the GPU. Thus, after receiving Image 1, the GPU starts to process the layer composition of Image 1. At this time, since after the GPU finishes composing Image 1, it will synchronously send the display data of Image 1 to the image display driver in the system kernel layer of the electronic device (that is, the completion time of the composition of Image 1 by the GPU also means that the image display driver has received the display data of the composed Image 1). Thus, after the GPU finishes composing Image 1 and sends Image 1 to the image display driver before time t5, the image display driver writes the display data of Image 1 into the display screen in response to the VSync signal at time t5. Thus, the display screen refreshes and displays Image 1 at time t5.

[0151] After Image 1 is displayed for 16.6 ms, that is, when it reaches time t7, since the completion time of the composition of Image 2 is later than time t7, at this time, the image display driver fails to receive the display data of Image 2 at time t7 and will not perform any image processing actions until the next VSync signal arrives. At this time, the display screen continues to display Image 1 until a new VSync signal is generated at time t8. Then, the display duration of Image 1 is 25 ms. At this time, Image 2 has been composed, so the display screen refreshes and displays Image 2 at time t8.

[0152] At time t9, a new VSync signal output by the display screen arrives. At this time, since the GPU finishes composing Image 3 and sends the display data of Image 3 to the image display driver before time t9, the image display driver writes the display data of Image 3 into the display screen in response to this VSync signal at time t9. The display screen starts to refresh and display Image 3 from time t9 until time t11. Then, the display duration of Image 2 is 8.3 ms, and the display duration of Image 3 is 16.6 ms.

[0153] At time t11, since the APP has completed the original image display demand of the electronic device before time t11 and does not draw a new image, and the electronic device has not generated a new image display demand from time t9 to time t11, the display screen will no longer continue to refresh the image after it finishes displaying image 3 at time t11. At this time, the display screen enters a dormant or off-screen state.

[0154] In combination with the above, the electronic device may have an application layer APP drawing image timeout (not shown in the attached figure), which leads to the SF rendering image of the application framework layer and the GPU synthesis image of the application framework layer timeout, the SF rendering image of the application framework layer timeout leads to the GPU synthesis image of the application framework layer timeout, or the GPU synthesis image of the application framework layer timeout, thereby causing the image display driver of the kernel layer to miss the VSync signal to send the image to the display screen. Therefore, even if the electronic device uses a refresh rate of 120Hz at the driver layer, the display screen needs to timeout the image being displayed for a period (8.3ms) corresponding to the refresh rate of 120Hz.

[0155] Therefore, in the above game scenario, the electronic device may encounter a situation where the display data of a certain frame of image is generated slowly and the display data of the next frame of image is generated quickly, resulting in the display time of the previous frame of image exceeding the time limit, and the display time of the current frame of image is too short, and the display time of the next frame of image of the current frame of image returns to normal. Figure 12 In the case where the display data of image 1 is generated slowly and the display data of image 2 is generated quickly, the display time of image 1 is 25ms, the display time of image 2 is 8.3ms, and the display time of image 3 is 16.6ms. That is, at this time, the display screen shows that the current refresh rate increases from 40Hz to 120Hz, and then drops directly from 120Hz to 60Hz. For users, because the human eye is more sensitive to the fluctuation of refresh rate, the current refresh rate of the display screen increases from 40Hz to 120Hz, and then drops directly from 120Hz to 60Hz, which will be visually felt to be jittery.

[0156] In order to improve the hand tracking performance of electronic devices and reduce the actual jitter caused by frame rate fluctuations when actual freezes occur, the present application proposes an image display method, which reduces the time to wait for the next VSync signal after the image display data is prepared, and turns off the high-frequency TE signal for the duration of the next frame to ensure the continuation of the current refresh rate. This improves the hand tracking performance of electronic devices while making it difficult for users to notice jitter in the device display screen.

[0157] like Figure 13As shown, during the process of the display screen of the electronic device (supporting a base frequency of 360Hz) refreshing and displaying images at the current refresh rate of 60Hz, if the GPU in the system application framework layer takes longer than the moment (t7) when the VSync signal 4 is generated to synthesize and process Image 2, then, when the electronic device detects that the waiting duration of Image 2 for the next VSync signal after the display data is prepared exceeds 2.8ms, the frequency of the VSync signal output by the display screen is increased to 360Hz, and the moment of the next VSync signal output by the display screen is advanced by 2.8ms. As Figure 13 shown, thus, the display screen can output the VSync signal 5 with an increased frequency at time t8 (the corresponding Vsync period is 2.8ms), and the image display driver responds to the VSync signal 5 at time t8 and writes the display data of Image 2 that has been synthesized and sent to the image display driver by the GPU before time t8 into the display screen, so that the display screen can start displaying Image 2 at time t8, greatly shortening the waiting duration of Image 2 for the next VSync signal after the display data is prepared. Also, the display timeout duration of Image 1 is shortened, and the display duration of Image 2 can be restored to the normal duration.

[0158] Then, during the process of the display screen starting to display Image 2 at time t8, the display duration of Image 2 will be maintained at 16.6ms, that is, it will continue to be displayed until time t10. That is to say, if before time t10, the display data of Image 3 is prepared, even if the duration between the moment when the display data of Image 3 is prepared and time t10 exceeds 2.8ms, the image display driver will not advance the moment of the next VSync signal output by the display screen. Instead, at time t10, the image display driver responds to the VSync signal 6 and writes the display data of Image 3 into the display screen, so that the display screen can start displaying Image 3 at time t10. Also, the electronic device will maintain the display duration of Image 3 at 16.6ms, that is, it will continue to be displayed until time t12.

[0159] Thus, this solution can reduce the timeout display duration of the image by shortening the waiting duration of the image for display after the display data is prepared, while stabilizing the display duration of subsequent images, making the display durations of adjacent images differ less, and making it difficult for the user to perceive jitter in the device's display screen.

[0160] In some other feasible embodiments, there may be a situation where frame chasing occurs for each frame of the image. Since the duration of each frame being displayed in advance is relatively short, generally only 2.8ms in advance, although there may be a situation where the display durations of several consecutive frames are different, because the difference in display durations is short, the user's eyes cannot perceive the fluctuation of the frame rate.

[0161] In the embodiment of the present application, the electronic device can determine whether to increase the frequency of the output Vsync signal by combining improvements at the software level and the hardware level. That is, the electronic device newly adds a hardware module at the system kernel layer, and uses this hardware module to detect whether the display data of the image is ready. Thus, when the hardware module detects that the display data of the image is ready, the electronic device increases the frequency of the Vsync signal output by the display screen to shorten the waiting time for display after the display data of the image is ready, so as to achieve the purpose of improving the followability. Among them, as Figure 14 shown, the electronic device newly configures a frame chasing detection module in the image display driver at the kernel layer. Based on this, in response to the display screen starting to display the second image, the electronic device continuously detects whether the display data of the third image is ready through the frame chasing detection module, and detects whether the waiting time of the third image for the next Vsync signal is greater than or equal to the set time (2.8 ms). Then, when the frame chasing detection module detects that the display data of the third image is ready and the waiting time for the next Vsync signal is greater than or equal to 2.8 ms, the image display driver issues a control instruction to the display screen to control the display screen to increase the frequency of the output Vsync signal.

[0162] In the embodiment of the present application, when the image display driver of the electronic device detects whether the waiting time of the third image for the next Vsync signal is greater than or equal to the set time, it can use the newly added frame chasing detection module by itself to detect whether the waiting time of the third image for the next Vsync signal is greater than or equal to the set time during the display process of the second image by the display screen. When the frame chasing detection module detects that the waiting time of the third image for the next Vsync signal is greater than or equal to the set time, the image display driver determines that the third image meets the condition for advancing the output of the next Vsync signal.

[0163] When the image display driver determines that the waiting time of the third image for the next Vsync signal is greater than or equal to the set time and thus advances the output of the Vsync signal and increases the frequency of the Vsync signal output by the display screen, it can issue a control instruction to the display screen through the display module serial interface that establishes a communication connection between itself and the display screen. The display screen immediately responds after receiving the control instruction, and thus increases the frequency of the output Vsync signal from the original frequency to the frequency pointed to by the control instruction.

[0164] In an embodiment of the present application, when the frame chasing detection module detects that the duration for the third image to wait for the next Vsync signal after the display data preparation is completed is greater than or equal to a set duration, the image display driver of the electronic device immediately increases the frequency of the Vsync signal output by the display screen, outputs the Vsync signal with the increased frequency in advance for the set duration, and in response to the Vsync signal with the increased frequency, writes the display data of the third image into the display screen to drive the display screen to display the third image. In this way, it can effectively reduce the duration for the third image to wait for the next Vsync signal after the display data preparation is completed, thereby accelerating the display speed of the third image. Moreover, it can also improve the comprehensiveness of detecting whether the duration for the third image to wait for the next Vsync signal after the display data preparation is completed is greater than or equal to the set duration, and improve the accuracy of outputting the Vsync signal with an increased frequency to enable the image display driver to immediately send and display the third image.

[0165] In some other feasible embodiments, the above frame chasing detection module can also be used to detect whether the duration for the second image to wait for the next Vsync signal after the display data preparation is completed is greater than or equal to the set duration. When the electronic device detects through the frame chasing detection module that the duration for the second image to wait for the next Vsync signal after the display data preparation is completed is greater than or equal to the set duration, and the display data preparation of the third image is completed and the duration for waiting for the next Vsync signal is greater than or equal to 2.8 ms, the image display driver sends a control instruction to the display screen to control the display screen to increase the frequency of the Vsync signal output.

[0166] Exemplarily, in combination with Figure 14 the system framework of the shown electronic device and Figure 15 the control logic for image display using the method provided in the embodiment of the present application by the shown electronic device, assuming that the display screen of the electronic device supports a base frequency of 360 Hz, when the display screen performs image display according to the first Vsync period of 16.6 ms corresponding to a refresh rate of 60 Hz, during the display of the second image on the display screen, the browser application APP in the application layer of the electronic device system also draws the third image of the next frame of the second image, and sends the display data that is drawn but needs to be rendered for the third image to the image rendering service (SF) in the application framework layer. After the SF finishes rendering the display data, if the display data needs to be further synthesized, it further sends the rendered display data to the image synthesis service (GPU), and after the GPU synthesizes the display data, it sends it as the display data of the third image to be displayed to the hardware abstraction layer, and then the hardware abstraction layer performs hardware matching to send the display data of the third image to the image display driver in the kernel layer, and the image display driver performs pre - sending preparation after receiving the display data of the third image.

[0167] Then, the image display driver determines whether to enable the frame chasing scheme. If the frame chasing scheme is not enabled, the image display driver directly waits for the next Vsync signal to perform image transmission. If the frame chasing scheme is enabled, at this time, the image display driver obtains the result detected by the frame chasing detection module. When the result is that the duration for the third image to wait for the next Vsync signal after the display data preparation is completed is greater than 2.8 ms (the period of 360 Hz). That is, the third image meets the condition for enabling high-frequency TE 2.8 ms in advance. At this time, the image display driver can immediately send an instruction 1 for controlling the enabling of high-frequency TE to the display screen through the display module serial interface (DSI) that establishes a communication connection with the display screen by itself, so as to control the display screen to enable the preset 360 Hz-TE high-frequency synchronization scheme at the moment 2.8 ms in advance, thereby increasing the frequency of the Vsync signal output by the display screen to 360 Hz.

[0168] Among them, as Figure 15 shown, after the image display driver determines that the third image meets the condition for enabling high-frequency TE 2.8 ms in advance according to the result detected by the frame chasing detection module, it is determined again through the result detected by the frame chasing detection module whether the current enabling of high-frequency TE will only be 2.8 ms in advance. That is to say, if the duration for the third image to wait for the next Vsync signal after the display data preparation is completed is greater than 2 times or more of 2.8 ms, then the image display driver sends an instruction 1 for controlling the enabling of high-frequency TE to the display screen through the display module serial interface (DSI) that establishes a communication connection with the display screen by itself. The instruction 1 includes that the moment of enabling high-frequency TE is only 2.8 ms in advance compared with the moment of generating the next original Vsync signal. Thus, it is controlled that the display screen enables the preset 360 Hz-TE high-frequency synchronization scheme at the moment 2.8 ms in advance to increase the frequency of the Vsync signal output by the display screen to 360 Hz. Therefore, when the duration for the third image to wait for the next Vsync signal after the display data preparation is completed is greater than 2 times or more of 2.8 ms, the image display driver does not control the display screen to generate a Vsync signal with an increased frequency 2 or more 360 hz cycle durations in advance, but delays it to control the display screen to generate a Vsync signal with an increased frequency only at the moment 2.8 ms in advance.

[0169] Among them, if the result detected by the frame chasing detection module determines that the current enabling of high-frequency TE is only 2.8 ms in advance, then the image display driver immediately sends an instruction 1 for controlling the enabling of high-frequency TE to the display screen through the display module serial interface (DSI) that establishes a communication connection with the display screen by itself, so as to control the display screen to enable the preset 360 Hz-TE high-frequency synchronization scheme at the moment 2.8 ms in advance, thereby increasing the frequency of the Vsync signal output by the display screen to 360 Hz.

[0170] In some feasible embodiments, after the image display driver of the electronic device increases the frequency of the output Vsync signal and then drives the display screen to display an image in response to the Vsync signal with the increased frequency, to prevent the image display driver from sending the next frame of the image prematurely, resulting in the phenomenon that the display screen only briefly displays the image and then quickly displays the next frame, the electronic device can, within the display duration of the image on the display screen by the image display driver, not respond to the Vsync signal with the increased frequency output by the display screen, thereby forcibly extending the display duration of the image on the display screen.

[0171] In the embodiments of the present application, the electronic device can Figure 16 Forcibly extend the display duration of the third image on the display screen through steps S5 and S10 shown below. After the display screen displays the third image, step S5 is executed: feedback the Vsync signal with the increased frequency. When the image display driver receives the Vsync signal with the increased frequency feedback by the display screen, if the third display duration of the display screen displaying the third image is not yet equal to the first display duration, step S6 is executed: stop responding to the Vsync signal with the increased frequency. Then, the display screen continues to execute step S7: feedback the Vsync signal with the increased frequency. After the image display driver receives the Vsync signal with the increased frequency feedback by the display screen, if the third display duration is equal to the first display duration at this time, the image display driver executes S8: resume responding to the Vsync signal with the increased frequency. Then, when the display screen executes step S9: feedback the Vsync signal with the increased frequency. After the image display driver receives this Vsync signal, step S10 is executed: respond to the Vsync signal with the increased frequency and write the display data of the next frame of the image to the display screen. In this way, the display screen starts to display the next frame of the image.

[0172] In the embodiments of the present application, after the image display driver of the electronic device writes the display data of the third image to the display screen to drive the display screen to display the third image, within the third display duration of the display screen displaying the third image, the image display driver stops responding to the Vsync signal with the increased frequency output by the display screen within the third display duration, so as to refuse to write the display data of the next frame of the third image to the display screen within the third display duration.

[0173] After that, when the third display duration is equal to the first display duration, the image display driver resumes responding to the Vsync signal with the increased frequency output by the display screen, so as to realize writing the display data of the next frame of the third image to the display screen after the third display duration reaches the first display duration.

[0174] In the embodiment of the present application, during the third display duration when the third image is displayed on the display screen by the image display driver, the Vsync signal with an increased frequency triggered by the display screen is not responded to, which can avoid the phenomenon that the image display driver sends the next frame image of the third image for display in advance during the display process of the third image on the display screen, resulting in the display screen briefly displaying the third image. In this way, the stability of the electronic device for displaying the third image and subsequent images is further improved.

[0175] Please refer to Figure 17 , Figure 17 which shows another control logic for image display when the electronic device applies the method provided in the embodiment of the present application. Assuming that the display screen of the electronic device supports a base frequency of 360Hz, when the display screen displays images according to the first Vsync period of 16.6ms corresponding to a refresh rate of 60Hz, during the display process of the second image on the display screen, the browser application APP in the application layer of the electronic device system also draws the third image, which is the next frame of the second image, and sends the display data that has been drawn but needs to be rendered to the image rendering service (SF) in the application framework layer. After the SF finishes rendering the display data, if the display data needs to be further synthesized, it further sends the rendered display data to the image synthesis service (GPU). After the GPU synthesizes the display data, it sends the synthesized display data as the display data of the third image to be displayed to the hardware abstraction layer, and then the hardware abstraction layer performs hardware matching to send the display data of the third image to the image display driver in the kernel layer, and the image display driver performs preparation before sending the image after receiving the display data of the third image.

[0176] Then, the image display driver determines whether to enable the frame chasing scheme. If the frame chasing scheme is not enabled, the image display driver directly waits for the next Vsync signal to execute the image sending. If the frame chasing scheme is enabled, at this time, the image display driver obtains the result detected by the frame chasing detection module. When the result is that the waiting duration of the second image for the next Vsync signal after the display data is prepared exceeds the set duration, and the set duration is 2.8ms (the period of 360Hz).

[0177] At this time, the image display driver determines whether the waiting duration of the third image for the next Vsync signal after the display data is prepared is greater than or equal to 2.8ms. If so, then the third image meets the condition for enabling the high-frequency TE 2.8ms in advance. At this time, the image display driver can immediately send an instruction 1 to control the opening of the high-frequency TE to the display screen through the display module serial interface (DSI) that establishes a communication connection with the display screen, so as to control the display screen to enable the pre-set 360Hz-TE high-frequency synchronization scheme at the moment 2.8ms in advance, thereby increasing the frequency of the Vsync signal output by the display screen to 360Hz.

[0178] If the result detected by the frame chasing detection module obtained by the image display driver is that the duration for which the second image waits for the next Vsync signal after the display data preparation is completed does not exceed 2.8 ms, then the image display driver directly waits until the next Vsync signal to execute image transmission.

[0179] Among them, as Figure 17 shown, after the image display driver determines that the third image meets the condition for enabling high-frequency TE 2.8 ms in advance according to the result detected by the frame chasing detection module, it is determined again through the result detected by the frame chasing detection module whether the current enabling of high-frequency TE will only be 2.8 ms in advance. That is to say, if the duration for which the third image waits for the next Vsync signal after the display data preparation is completed is greater than 2 times of 2.8 ms or more, then the image display driver sends an instruction 1 for controlling the enabling of high-frequency TE to the display screen through the display module serial interface (DSI) that establishes a communication connection with the display screen by itself. The instruction 1 includes that the moment of enabling high-frequency TE is only 2.8 ms in advance compared with the original moment of generating the next Vsync signal. Thus, it is controlled that the display screen enables the preset 360Hz-TE high-frequency synchronization scheme at the moment 2.8 ms in advance in response to the instruction 1, so as to increase the frequency of the Vsync signal output by the display screen to 360Hz. Therefore, when the duration for which the third image waits for the next Vsync signal after the display data preparation is completed is greater than 2 times of 2.8 ms or more, the image display driver does not control the display screen to generate a Vsync signal with an increased frequency 2 or more 360hz cycle durations in advance, but delays until the moment 2.8 ms in advance to control the display screen to generate a Vsync signal with an increased frequency.

[0180] Among them, if the result detected by the frame chasing detection module determines that the current enabling of high-frequency TE is only 2.8 ms in advance, then the image display driver immediately sends an instruction 1 for controlling the enabling of high-frequency TE to the display screen through the display module serial interface (DSI) that establishes a communication connection with the display screen by itself, so as to control the display screen to enable the preset 360Hz-TE high-frequency synchronization scheme at the moment 2.8 ms in advance, thereby increasing the frequency of the Vsync signal output by the display screen to 360Hz.

[0181] In the embodiment of the present application, the duration for which the second image waits for the next Vsync signal after the display data preparation is completed can be calculated by recording the timestamp when the second image starts to wait for the next Vsync signal after the display data preparation is completed, and recording the timestamp when the next Vsync signal arrives and the image display driver writes the display data of the second image to the display screen.

[0182] Please refer to Figure 18 ,Figure 18 It shows the control logic for obtaining the duration of waiting for the next Vsync signal after the display data of the second image is prepared in the embodiment of the present application. Assuming that the display screen of the electronic device supports a base frequency of 360Hz, when the display screen displays images according to the first Vsync period of 16.6ms corresponding to a refresh rate of 60Hz, during the process of the display screen displaying the first image, the browser application APP in the application layer of the electronic device system also draws the second image of the next frame of the first image, and sends the display data that has been drawn but needs to be rendered of the second image to the image rendering service (SF) in the application framework layer. After SF finishes rendering the display data, if the display data needs to be further synthesized, it further sends the rendered display data to the image synthesis service (GPU), and after the GPU synthesizes the display data, it sends it as the display data of the second image to be displayed to the hardware abstraction layer, so that the hardware abstraction layer performs hardware matching to send the display data of the second image to the image display driver in the kernel layer, and the image display driver performs pre-sending preparation after receiving the display data of the second image.

[0183] Then, the image display driver determines whether to enable the frame chasing scheme. If the frame chasing scheme is not enabled, the image display driver directly waits for the next Vsync signal to perform image sending. If the frame chasing scheme is enabled, at this time, the image display driver starts to record the timestamp when the second image starts to wait for the next Vsync signal after the display data is prepared. Then, after the image display driver waits for the next Vsync signal, it performs the image sending operation, that is, writes the display data of the second image into the display screen. At this time, the image display driver also determines whether to enable the frame chasing scheme. If the frame chasing scheme is not enabled, the process ends. If the frame chasing scheme is enabled, at this time, the image display driver starts to record the timestamp when the next Vsync signal arrives and the image display driver performs image sending. Thus, through the two recorded timestamps, the duration of the second image waiting for the next Vsync signal after the display data is prepared can be calculated.

[0184] Please refer to Figure 19 , Figure 19 It shows the schematic flow diagram of configuring the frame chasing scheme. The SF module can open the frame chasing scheme by writing nodes through the Android Interface Definition Language (AIDL) interface and send the frame chasing start time value. The frame chasing start time value represents the duration of the display screen outputting the VSync signal in advance. For example, the frame chasing start time value can be 2.8ms, or the frame chasing start time value is indicated by a flag bit. For example, if the flag bit is 1, it can indicate that the frame chasing start time value is 2.8ms, and if the flag bit is 2, it can indicate that the frame chasing start time value is 5.5ms.

[0185] In some embodiments, the embodiments of the present application provide an electronic device, which has the function of implementing the image display method described in each of the above embodiments. This function can be implemented by hardware or by hardware executing corresponding software. The hardware or software includes one or more modules corresponding to the above functions.

[0186] In some embodiments, the embodiments of the present application provide an electronic device, including: a processor and a memory; the memory is used to store computer program code, and the computer program code includes computer execution instructions. When the electronic device runs, the processor executes the computer execution instructions to enable the electronic device to execute the image display method described in each of the above embodiments.

[0187] In some embodiments, the embodiments of the present application provide an electronic device, including: a processor; the processor is used to be coupled with the memory, and after reading the instructions in the memory, execute the image display method described in each of the above embodiments according to the instructions.

[0188] In some embodiments, the embodiments of the present application provide a computer-readable storage medium, including computer instructions, which when running on an electronic device, cause the electronic device to execute the wallpaper display method described above.

[0189] In some embodiments, the embodiments of the present application provide a computer program product, which when running on an electronic device, causes the electronic device to execute the image display method described in each of the above embodiments.

[0190] In some embodiments, the embodiments of the present application provide a computer program product containing instructions, which when running on a computer, enables the computer to execute the image display method described in each of the above embodiments.

[0191] In some embodiments, the embodiments of the present application provide a device (for example, the device can be a display system), which includes a processor for supporting the electronic device to implement the function of the image display method described in each of the above embodiments. In a possible design, the device further includes a memory for storing necessary program instructions and data of the electronic device.

[0192] The embodiments of the present application also provide a chip system, such as Figure 20As shown, the chip system 90 includes at least one processor 901 and at least one interface circuit 902. The processor 901 and the interface circuit 902 can be interconnected by a line. For example, the interface circuit 902 can be used to receive signals from other devices (such as the memory of an electronic device). For another example, the interface circuit 902 can be used to send signals to other devices (such as the processor 901). Exemplarily, the interface circuit 902 can read the instructions stored in the memory and send the instructions to the processor 901. When the instructions are executed by the processor 901, the electronic device can be caused to execute each step in the above embodiments. Of course, the chip system can also include other discrete devices, and the embodiments of the present application do not make specific limitations thereto.

[0193] Through the description of the above embodiments, those skilled in the art can clearly understand that for the convenience and conciseness of description, only the above division of each functional module is used as an example. In actual applications, the above functions can be allocated to different functional modules according to needs, that is, the internal structure of the device is divided into different functional modules to complete all or part of the functions described above.

[0194] In several embodiments provided in the present application, it should be understood that the disclosed device and method can be implemented in other ways. For example, the device embodiments described above are merely illustrative. For example, the division of the modules or units is only a logical function division. In actual implementation, there can be other division methods. For example, multiple units or components can be combined or integrated into another device, or some features can be ignored or not executed. Another point is that the displayed or discussed mutual coupling or direct coupling or communication connection can be through some interfaces. The indirect coupling or communication connection of the device or unit can be in an electrical, mechanical or other form. The units described as separate components may or may not be physically separated. The components displayed as units can be a physical unit or multiple physical units, that is, they can be located in one place or distributed to multiple different places. Part or all of the units can be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0195] In addition, in each embodiment of the present application, each functional unit may be integrated into one processing unit, or each unit may exist physically alone, or two or more units may be integrated into one unit. The above-mentioned integrated unit may be implemented in the form of hardware or in the form of a software functional unit. If the integrated unit is implemented in the form of a software functional unit and sold or used as an independent product, it may be stored in a readable storage medium. Based on such an understanding, the technical solution of the embodiments of the present application, in essence, or the part that contributes to the prior art, or all or part of the technical solution, may be embodied in the form of a software product. The software product is stored in a storage medium and includes several instructions for causing a device (which may be a single-chip microcomputer, a chip, etc.) or a processor to execute all or part of the steps of the methods described in the embodiments of the present application. The aforementioned storage medium includes: various media such as USB flash drives, mobile hard disks, read-only memories (ROMs), random access memories (RAMs), magnetic disks, or optical discs that can store program codes.

[0196] The above content is only the specific implementation manner of the present application, but the protection scope of the present application is not limited thereto. Any changes or substitutions within the technical scope disclosed in the present application should be covered by the protection scope of the present application. Therefore, the protection scope of the present application should be subject to the protection scope of the claims.

Claims

1. An image display method, characterized in that: Applied to an electronic device, the electronic device includes a display screen, and the method includes: At a first moment, the electronic device generates a first Vsync signal, and in response to the first Vsync signal, starts to display a first image on the display screen, wherein the first Vsync signal corresponds to a first Vsync signal cycle, and a first display duration of displaying the first image is the same as a duration of the first Vsync signal cycle; At a second moment, the electronic device generates a second Vsync signal, and in response to the second Vsync signal, starts to display a second image on the display screen, wherein the second Vsync signal corresponds to a second Vsync signal cycle, the second moment is after the first moment, and the second image is a next frame image of the first image; After starting to display the second image on the display screen, detecting whether display data of a third image has been synthesized, wherein the third image is a next frame image of the second image; if the display data of the third image has been synthesized, sending a control instruction to the display screen, wherein the control instruction is used to control the frequency of generating a Vsync signal, so that the frequency of generating the Vsync signal by the display screen is higher than the frequency of generating the Vsync signal by the current display screen.

2. The method according to claim 1, characterized in that If the display data of the third image is synthesized, sending a control instruction to the display screen includes: If the duration between the moment when the display data of the third image is synthesized and the moment when the electronic device generates the third Vsync signal is greater than or equal to the preset interval duration, a control instruction is sent to the display screen.

3. The method according to claim 2, characterized in that The electronic device further includes an image display driver, which sends a control instruction to the display screen if the time between the moment when the display data of the third image is synthesized and the moment when the electronic device generates the third Vsync signal is greater than or equal to the preset interval time, specifically: If the duration between the moment when the display data of the third image is synthesized and the moment when the electronic device is preset to generate the third Vsync signal is greater than or equal to a preset interval duration, the image display driver sends a control instruction to the display screen, and the control instruction is used to control the frequency of generating the Vsync signal so that the frequency of the Vsync signal generated by the display screen is higher than the frequency of the Vsync signal currently generated by the display screen.

4. The method according to claim 2, characterized in that: The preset interval duration is 2.8 ms.

5. The method according to any one of claims 1 to 4, characterized in that After sending the control instruction to the display screen, the method further includes: At a third moment, the electronic device generates a third Vsync signal; wherein the third Vsync signal corresponds to a third Vsync signal period, the third moment is after the second moment, and the third Vsync signal period is shorter than the first Vsync signal period.

6. The method according to claim 5, characterized in that The second Vsync signal period is shorter than the first Vsync signal period, and a second display time length for displaying the second image is shorter than the first display time length.

7. The method according to claim 6, characterized in that The first Vsync signal period is 16.6 ms, and the third Vsync signal period is 2.8 ms.

8. The method according to claim 7, characterized in that The second Vsync signal period is 13.8 ms, and the second display duration is 13.8 ms.

9. The method according to claim 5, characterized in that The method further comprises: At a fourth moment, the electronic device generates a fourth Vsync signal, and in response to the fourth Vsync signal, starts to display a fourth image on the display screen, wherein the fourth moment is after the third moment, the fourth Vsync signal corresponds to the fourth Vsync signal cycle, the fourth Vsync signal cycle is the same as the first Vsync signal cycle, and a fourth display time for displaying the fourth image is the same as the first display time.

10. The method according to claim 9, characterized in that The method further includes: before the fourth moment, sending a control instruction to the display screen, wherein the control instruction is used to control the frequency of generating a Vsync signal.

11. The method according to claim 10, characterized in that Before the fourth moment, a control instruction is sent to the display screen, wherein the control instruction is used to control the frequency of generating the Vsync signal, specifically: The image display driver sends a control instruction to the display screen, wherein the control instruction is used to control the frequency of generating the Vsync signal so that the frequency of the Vsync signal generated by the display screen is lower than the current frequency of the Vsync signal generated by the display screen.

12. An electronic device, characterized in that: The electronic device comprises: a communication module, a display screen, a memory and one or more processors; the communication module, the display screen, the memory and the processor are coupled; the memory is used to store computer program code, and the computer program code comprises computer instructions, and when the computer instructions are executed by the electronic device, the electronic device executes the method as described in any one of claims 1-11.

13. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores instructions, and when the instructions are executed in an electronic device, the electronic device executes the method according to any one of claims 1 to 11.

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