Display driving device, driving method and display panel

Abstract

The invention provides a display driving device, a driving method and a display panel, and belongs to the technical field of display driving. The display driving device comprises a driving module used for driving a pixel circuit and used for controlling the connected pixel circuit to work in a first mode or a second mode. The driving module comprises a gate driving circuit and a mode switching circuit. The gate drive circuit is configured to output a scan signal in a first mode and stop outputting the scan signal in a second mode. The mode switching circuit is configured to transmit a scanning signal to the pixel circuit in a first mode and continuously output an active signal or an inactive signal to the pixel circuit in a frame period in a second mode. Therefore, the display driving circuit not only can realize line-by-line scanning driving to normally display a picture, but also can realize regional display, so that each line region of the display panel can be driven more flexibly, respectively and independently, and reasons for inconsistent display of the display panel can be analyzed quickly.

Description

Technical Field

[0001] The present application relates to the field of display driving technology, and in particular to a display driving device, a driving method and a display panel. Background Art

[0002] Micro-LED (Micro Light Emitting Diode) is a thin-film, miniaturized, arrayed ordinary LED structure, and its pixel unit has the characteristics of small size and high brightness. The packaging of the circuit substrate is achieved by transferring Micro-LED and related chips to the circuit substrate in batches and performing physical deposition processes. The chip on the circuit substrate has multiple functions such as drive control, data processing and power management to drive the pixel unit to emit light, control the display effect, and ensure clear images and accurate colors.

[0003] After the circuit substrate is assembled, it is usually necessary to test the display panel to test the uniformity of the display panel's light emission. When the display panel has poor display uniformity, it is usually necessary to functionally disassemble the display panel to analyze the reasons for the poor display uniformity, such as differences in chips in some positions, process differences, or insufficient driving, so as to make targeted adjustments.

[0004] However, for a display panel driven in a row-by-row manner, it is difficult to quickly find a display partition where a display uniformity problem occurs. Summary of the invention

[0005] In view of the deficiencies in the prior art, the present application provides a display driving device, a driving method and a display panel.

[0006] In a first aspect, the present application provides a display driving device, comprising: a driving module for driving a pixel circuit, wherein the driving module is used to control the connected pixel circuit to operate in a first mode or a second mode; the driving module comprises:

[0007] a gate driving circuit configured to output a scan signal in the first mode and stop outputting the scan signal in the second mode;

[0008] A mode switching circuit is connected to the gate drive circuit and the pixel circuit, and is configured to transmit the scanning signal to the pixel circuit in the first mode, and continuously output an activation signal or a non-activation signal to the pixel circuit during a frame period in the second mode, so as to control the pixel circuit to write a data signal based on the activation signal or to shut down based on the non-activation signal during the frame period.

[0009] Optionally, the gate driving circuit includes an output unit, and the output unit is connected to the mode switching circuit;

[0010] In the first mode, the output unit outputs the scanning signal under the control of the clock signal; in the second mode, the output unit stops outputting the scanning signal under the control of the clock signal.

[0011] Optionally, the mode switching circuit includes a first sub-circuit and a second sub-circuit;

[0012] The first sub-circuit is used to receive a first control signal, and control the activation signal to output or stop outputting to the pixel circuit according to the first control signal;

[0013] The second sub-circuit is used to receive a second control signal, and control the inactive signal to be output or stop being output to the pixel circuit according to the second control signal;

[0014] The activation signal and the deactivation signal are output to the pixel circuit in different frame periods respectively.

[0015] Optionally, the first sub-circuit includes a first switch tube, which includes a control electrode connected to the first control signal, a first electrode connected to the activation signal, and a second electrode connected to the gate drive circuit and the pixel circuit.

[0016] Optionally, the second sub-circuit includes a second switch tube, which includes a control electrode connected to the second control signal, a first electrode connected to the non-activation signal, and a second electrode connected to the gate drive circuit and the pixel circuit.

[0017] Optionally, the pixel circuit includes a light emitting device and at least one modulation unit connected to the light emitting device;

[0018] The modulation unit is connected to the gate driving circuit, and is used to receive the data signal, and control the writing of the data signal according to the scanning signal, the activation signal and the deactivation signal;

[0019] Wherein, in the first mode, the modulation unit receives the scanning signal to write the data signal in a row-by-row writing sequence; in the second mode, the modulation unit receives the activation signal to continuously write the data signal within the frame period, or receives the inactivation signal to stop writing the data signal within the frame period;

[0020] The light emitting device is connected to the modulation unit and is used for emitting light according to the data signal.

[0021] Optionally, the pixel circuit further includes a reset unit, which is connected to the modulation unit and is used to receive a reset control signal to control the modulation unit to reset within a starting period of the frame cycle.

[0022] Optionally, the potential of the activation signal is lower than the first signal level of the gate driving circuit, and the potential of the non-activation signal is higher than the second signal level of the gate driving circuit;

[0023] Or, the potential of the activation signal is higher than the second signal level of the gate driving circuit, and the potential of the non-activation signal is lower than the first signal level of the gate driving circuit;

[0024] The first signal level is lower than the second signal level.

[0025] In a second aspect, in one embodiment, the present application provides a display driving method for controlling the above-mentioned display driving device, the method comprising:

[0026] receiving a first mode control signal to control the gate driving circuit to output the scanning signal in the first mode, and controlling the mode switching circuit to transmit the scanning signal to the pixel circuit in the first mode;

[0027] A second mode control signal is received to control the gate drive circuit not to operate in the second mode, and the mode switching circuit is controlled to continuously output the activation signal or the non-activation signal to the pixel circuit during a frame period in the second mode, so as to control the pixel circuit to write a data signal based on the activation signal or to shut down based on the non-activation signal.

[0028] Optionally, a display area of ​​a display panel where the display driving device is located is divided into a plurality of partitions according to the second mode control signal;

[0029] The controlling the mode switching circuit to continuously output the activation signal or the inactivation signal to the pixel circuit during a frame period in the second mode, so as to control the pixel circuit to write a data signal based on the activation signal or to be turned off based on the inactivation signal, comprises:

[0030] For each of the partitions, the mode switching circuit controlling each row of pixel circuits in the partition continuously outputs the activation signal to the pixel circuit during the frame period in the second mode, so that the pixel circuits in the partition are simultaneously turned on during the frame period; and / or,

[0031] For each of the partitions, the mode switching circuit that controls each row of pixel circuits in the partition continuously outputs the non-activation signal to the pixel circuit during the frame period in the second mode, so that the pixel circuits in each row in the partition are turned off simultaneously during the frame period.

[0032] In a third aspect, in one embodiment, the present application provides a display panel, comprising the above-mentioned display drive control device.

[0033] Through the above technical scheme, the present application at least includes the following beneficial technical effects: in the first mode, the gate drive circuit outputs the scanning signal row by row, and the mode switching circuit does not work, and only plays the role of transmitting the scanning signal, so that the pixel circuit writes the data signal row by row under the timing of the scanning signal and then emits light, thereby realizing the normal display function of the display panel. In the second mode, the gate drive circuit does not work, and each mode switching circuit continuously outputs an activation signal or an inactivation signal to the pixel circuit within the frame period, and the pixel circuit of the required lighting area is controlled to write the data signal based on the activation signal to start emitting light, and the pixel circuit of the non-lit area is controlled to be closed based on the inactivation signal, so that the display panel can be controlled to light up any row according to the actual test requirements. And the pixel circuits of all lit areas are in the data signal writing state within the frame period, avoiding the difference caused by inconsistent writing timing. In this way, the display drive circuit can not only realize the row-by-row scanning drive to display the picture normally, but also realize the regional display, which is convenient for more flexible independent drive of each area of ​​the display panel, and helps to quickly analyze the reasons for the inconsistent display of the display panel. BRIEF DESCRIPTION OF THE DRAWINGS

[0034] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For those skilled in the art, other drawings can be obtained based on these drawings without creative work.

[0035] Figure 1 It is a structural schematic diagram of a display panel in the related art;

[0036] Figure 2 This is a schematic diagram of the structure of a display panel in one embodiment of the present application;

[0037] Figure 3 This is a circuit connection diagram of a driving module in one embodiment of the present application;

[0038] Figure 4 (a) and (b) are waveform diagrams of the driving module in the first mode and the second mode, respectively, in one embodiment of the present application;

[0039] Figure 5 This is a circuit connection diagram of a pixel circuit in one embodiment of the present application;

[0040] Figure 6 This is a schematic diagram of waveforms of each driving signal in the first mode in an embodiment of the present application;

[0041] Figure 7 This is a schematic diagram of waveforms of each driving signal in the second mode in an embodiment of the present application;

[0042] Figure 8 This is a schematic diagram of waveforms of each driving signal in the second mode in another embodiment of the present application;

[0043] Fig. 9 The figure is a flow chart of a display driving method in one embodiment of the present application.

[0044] Explanation of the reference numerals: 10, driving module; 1, gate driving circuit; 11, output unit; 2, mode switching circuit; 21, first sub-circuit; 22, second sub-circuit; 3, pixel circuit; 31, modulation unit; 32, reset unit. DETAILED DESCRIPTION

[0045] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative work are within the scope of protection of this application.

[0046] In the description of the present application, it should be understood that the terms "first" and "second" are used only for descriptive purposes and cannot be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, the features defined as "first" and "second" may explicitly or implicitly include one or more of the features. In the description of the present application, the meaning of "multiple" is two or more, unless otherwise clearly and specifically defined. In the present application, the word "exemplary" is used to mean "used as an example, illustration or description". Any embodiment described as "exemplary" in the present application is not necessarily interpreted as being more preferred or more advantageous than other embodiments. In order to enable any technician in the field to implement and use the present application, the following description is given. In the following description, details are listed for the purpose of explanation. It should be understood that a person of ordinary skill in the art can recognize that the present application can also be implemented without using these specific details. In other examples, well-known structures and processes will not be elaborated in detail to avoid unnecessary details that make the description of the present application obscure. Therefore, the present application is not intended to be limited to the embodiments shown, but is consistent with the widest range of principles and features disclosed in the present application.

[0047] First, if Figure 1 , which is a schematic diagram of a display panel provided by an embodiment of the present application. The display panel provided by the present application includes a plurality of pixel units 100 arranged in an array.

[0048] As an example, a plurality of pixel units 100 are arranged in an array to form a pixel array 101. As a further embodiment of the display panel, the display panel further includes a gate driving unit 200, a data driving unit 300, and a light emitting control unit 400 respectively connected to each pixel unit 100. The gate driving unit 200, the data driving unit 300, and the light emitting control unit 400 are respectively used to send a scan signal, a data signal, and a light emitting control signal to the pixel unit 100 to drive each pixel unit 100 to emit light for display.

[0049] The gate driving unit 200 is connected to each pixel unit 100 through the scanning line Gn, and is used to send a scanning signal to each pixel unit 100 through the scanning line Gn. The data driving unit 300 is connected to each pixel unit 100 through the data line Data, and is used to send a data signal to each pixel unit 100 through the data line Data. The light emitting control unit 400 provides each pixel unit with a driving voltage required for light emission to drive the light emitting device in each pixel unit to emit light, thereby realizing the light emitting display function of each pixel unit.

[0050] In the process where the gate driving unit 200, the data driving unit 300 and the light emitting control unit 400 jointly drive each pixel unit 100 to perform light emitting display, a row-by-row scanning driving method is usually adopted. First, the gate driving unit 200 sends a scanning signal to the first row of pixel units 100 through the scanning line Gn to select the pixel units 100 in the first row. The data driving unit 300 sends a data voltage to the pixel units 100 in the first row through the data signal line Data. Then, the gate driving unit 200 continues to select the pixel units 100 in the next row, and the data driving unit 300 sends the corresponding data signal to the pixel units 100 in the next row. And so on, until all rows are selected and receive the data voltage. Under the control of the light emitting control signal, the light emitting control unit 400 outputs the voltage signal required by the light emitting device to each pixel unit to control the light emitting device in the pixel unit 100 to emit light and complete the display of a frame of the picture. Repeating the above process can make the display panel display continuous pictures.

[0051] Secondly, based on the contents of the aforementioned background technology of this application and combined with the above-mentioned display panel structure, the background of the present application is further elaborated.

[0052] At present, the display panel is usually driven by a row-by-row scanning driving method, that is, the data writing period of each frame is divided into several periods by row, and each row of pixel units 100 is allowed to write data signals only in its corresponding period. In this way, the timing of writing data signals for each row of pixel units 100 is different, and there may be errors in the driving force and the duration of writing data signals for each row of pixel units 100, and the driving of the gate driving unit 200 and the pixel unit 100 of this row will be affected by the gate driving unit 200 and the pixel unit 100 of the previous row, so that the uniformity of the final display panel is affected by multiple factors, making it impossible to find the cause when the display panel has poor uniformity.

[0053] Based on this, the present application provides a display driving device. In the first aspect, as Figure 2 As shown, in one embodiment, the display driving device includes a driving module 10 for driving a pixel circuit 3, and the driving module 10 is used to control the connected pixel circuit 3 to work in a first mode or a second mode; the driving module 10 includes a gate driving circuit 1 and a mode switching circuit 2. Among them, the gate driving circuit 1 is configured to output a scanning signal in the first mode and stop outputting the scanning signal in the second mode. The mode switching circuit 2 is connected to the gate driving circuit 1 and the pixel circuit 3, and is configured to transmit a scanning signal to the pixel circuit 3 in the first mode, and continuously output an activation signal or a non-activation signal to the pixel circuit 3 during a frame period in the second mode, so as to control the pixel circuit 3 to write a data signal based on the activation signal or to shut down based on the non-activation signal during the frame period.

[0054] As an example, the first mode is a display mode in which the display panel is in a row-by-row driving mode, and the second mode is a mode for testing the display panel. The activation signal is a signal for controlling the pixel circuit 3 to work, and the inactivation signal is a signal for controlling the pixel circuit 3 not to work. For example, when the pixel circuit 3 adopts a high-level effective drive, the activation signal is a high-level signal, and the inactivation signal is a low-level signal; when the pixel circuit 3 adopts a low-level effective drive, the activation signal is a low-level signal, and the inactivation signal is a high-level signal.

[0055] As an example, the frame period refers to a data writing period for writing a data signal within a driving duration of a frame, and does not include a light-emitting period.

[0056] In the above-mentioned implementation mode, in the first mode, the gate drive circuit 1 outputs the scanning signal row by row, and the mode switching circuit 2 does not work, and only plays the role of transmitting the scanning signal, so that the pixel circuit 3 writes the data signal row by row under the timing of the scanning signal and then emits light, thereby realizing the normal display function of the display panel. In the second mode, the gate drive circuit 1 does not work, and each mode switching circuit 2 continuously outputs an activation signal or an inactivation signal to the pixel circuit 3 within the frame period, and the pixel circuit 3 in the required lighting area is controlled to write the data signal based on the activation signal to start emitting light, and the pixel circuit 3 in the area that does not need to be lit is controlled to be closed based on the inactivation signal, so that the display panel can be controlled to light up any row according to the actual test requirements. And the pixel circuits 3 in all lit areas are in the data signal writing state within the frame period, avoiding the difference caused by inconsistent writing timing. In this way, the display drive circuit can not only realize the row-by-row scanning drive to display the picture normally, but also realize the regional display, so as to facilitate the independent driving of each row area of ​​the display panel more flexibly, which helps to quickly analyze the reasons for the inconsistent display of the display panel.

[0057] In some embodiments, when the pixel circuit 3 is driven at a low level effectively, the potential of the activation signal is lower than the first signal level of the gate driving circuit 1, and the potential of the non-activation signal is higher than the second signal level of the gate driving circuit 1; or, when the pixel circuit 3 is driven at a high level effectively, the potential of the activation signal is higher than the second signal level of the gate driving circuit 1, and the potential of the non-activation signal is lower than the first signal level of the gate driving circuit 1; wherein the first signal level is lower than the second signal level.

[0058] Combination Figure 3 , Figure 3 Take the pixel circuit 3 as an example of low level active driving. Figure 3 Among them, VGL is the first signal level of the gate driving circuit 1, VGH is the second signal level of the gate driving circuit 1; VGL2 is the activation signal, and VGH2 is the deactivation signal.

[0059] In the above-mentioned embodiment, when the pixel circuit 3 is driven at a low level effectively, the potential of the activation signal is lower than the first signal level of the gate drive circuit 1, so as to control the pixel circuit 3 to be stably turned on under the action of the activation signal, and the potential of the inactivation signal is higher than the second signal level of the gate drive circuit 1, so as to control the pixel circuit 3 to be stably turned off under the action of the inactivation signal. When the pixel circuit 3 is driven at a high level effectively, the potential of the activation signal is higher than the second signal level of the gate drive circuit 1, so as to control the pixel circuit 3 to be stably turned on under the action of the activation signal, and the potential of the inactivation signal is lower than the first signal level of the gate drive circuit 1, so as to control the pixel circuit 3 to be stably turned off under the action of the inactivation circuit, so that each mode switching circuit 2 in the display panel can select the same DC source to provide the activation signal and the same DC source to provide the inactivation signal.

[0060] In some embodiments, the potential of the activation signal may also be equal to the first signal level of the gate driving circuit 1, and the potential of the non-activation signal may be equal to the second signal level of the gate driving circuit 1; or the activation signal is equal to the second signal level of the gate driving circuit 1, and the potential of the non-activation signal is equal to the first signal level of the gate driving circuit 1.

[0061] Reference Figure 3 As an implementation of the gate driving circuit 1, the gate driving circuit 1 includes an output unit 11, which is connected to the mode switching circuit 2 and is used to output a scanning signal under the control of an input clock signal. In the first mode, the output unit 11 outputs the scanning signal under the control of the clock signal; in the second mode, the output unit 11 stops outputting the scanning signal under the control of the clock signal.

[0062] As an example, taking the gate drive circuit 1 as being effective at a low level, the gate drive circuit 1 may further include a level transmission unit, a pull-up unit, a feedback unit, and a pull-up control unit. The level transmission unit is used to generate a scan control signal; the output unit 11 outputs a scan signal based on the scan control signal and the clock line; the pull-up unit is connected to the level transmission unit and the output unit 11, and is used to pull up the scan control signal to quickly turn off the scan signal output by the output unit 11. In this embodiment, the specific structure of the gate drive circuit 1 is not limited, as long as the gate drive circuit 1 can output a scan signal.

[0063] As an implementation of the mode switching circuit 2, the mode switching circuit 2 includes a first subcircuit 21 and a second subcircuit 22. The first subcircuit 21 is used to access a first control signal, and control the activation signal to be output or stop outputting to the pixel circuit 3 according to the first control signal. The second subcircuit 22 is used to access a second control signal, and control the inactivation signal to be output or stop outputting to the pixel circuit 3 according to the second control signal. The activation signal and the inactivation signal are output to the pixel circuit 3 in different frame periods, respectively.

[0064] As an example, take the mode switching circuit 2 using a P-type tube as an example, referring to Figure 4 , Figure 4 (a) illustrates a waveform diagram of each driving signal in the first mode, wherein the first control signal gas1 and the second control signal gas2 are control signals input to the first sub-circuit 21 and the second sub-circuit 22 respectively, and both are high level at the same time, so that the first sub-circuit 21 and the second sub-circuit 22 do not work, the clock signal CK / XCK is a pulse signal, Gn-1, Gn and Gn+1 illustrate the scanning signals connected to the pixel circuits 3 of the n-1th row, nth row and n+1th row, and at this time, the scanning signals are only transmitted to the pixel circuits 3 through the mode switching circuit 2.

[0065] As an example, take the mode switching circuit 2 using a P-type tube as an example, referring to Figure 4 , Figure 4 (b) illustrates the waveform diagram of the second mode and the data signal written to the pixel circuit 3. The first control signal gas1 outputs a low level in the frame period, and the second control signal gas2 outputs a high level in the frame period, so that the first control signal gas1 controls the activation signal to be output to the pixel circuits 3 in the nth row and the 2nth row, and Gn and G2n illustrate the activation signals connected to the pixel circuits 3 in the nth row and the 2nth row. At this time, the clock signal CK / XCK is a continuous high level signal, that is, the gate drive circuit 1 does not work and stops outputting the scanning signal.

[0066] As an implementation of the first sub-circuit 21, the first sub-circuit 21 includes a first switch tube T1, which includes a control electrode connected to the first control signal gas1, a first electrode connected to the activation signal, and a second electrode connected to the gate drive circuit 1 and the pixel circuit 3.

[0067] As an implementation manner of the second sub-circuit 22, the second sub-circuit 22 includes a second switch tube T2, the second switch tube T2 includes a control electrode connected to the second control signal gas2, a first electrode connected to the non-activation signal, and a second electrode connected to the gate drive circuit 1 and the pixel circuit 3.

[0068] In the above embodiment, by controlling the on-off state of the first switch tube T1 and the second switch tube T2, the first switch tube T1 and the second switch tube T2 are placed in different state combinations, that is, when the first switch tube T1 and the second switch tube T2 are both turned off, the mode switching circuit 2 only performs the transmission function of the scanning signal; when the first switch tube T1 is turned on and the second switch tube T2 is turned off, the mode switching circuit 2 outputs an activation signal; when the second switch tube T2 is turned on and the first switch tube T1 is turned off, the mode switching circuit 2 outputs a non-activation signal (or when the first switch tube T1 is turned on and the second switch tube T2 is turned off, the mode switching circuit 2 outputs an activation signal; when the second switch tube T1 is turned on and the first switch tube T1 is turned off, the mode switching circuit 2 outputs a non-activation signal).

[0069] Reference Figure 5 As an implementation of the pixel circuit 3, the pixel circuit 3 includes a light-emitting device D and at least one modulation unit 31 connected to the light-emitting device D; the modulation unit 31 is connected to the gate driving circuit 1, and is used to access the data signal, and control the writing of the data signal according to the scanning signal, the activation signal and the non-activation signal. In the first mode, the modulation unit 31 receives the scanning signal to write the data signal in a row-by-row writing sequence; in the second mode, the modulation unit 31 receives the activation signal to continuously write the data signal within the frame period, or receives the non-activation signal to stop writing the data signal within the frame period; the light-emitting device D is connected to the modulation unit 31, and is used to emit light according to the data signal.

[0070] The modulation unit 31 may include a pulse width modulation subunit 311 and / or a pulse amplitude modulation subunit 312. Figure 5 , taking the modulation unit 31 as an example, the modulation unit 31 may include a pulse width modulation subunit 311 and a pulse amplitude modulation subunit 312, the pulse amplitude modulation subunit 312 is electrically connected to the light emitting device D, and the pulse amplitude modulation subunit 312 is configured to receive the pulse amplitude modulation voltage signal D_PAM to control the pulse amplitude of the driving current that drives the light emitting device D to emit light. The pulse width modulation subunit 311 is electrically connected to the pulse amplitude modulation subunit 312, and the pulse width modulation subunit 311 is configured to receive the pulse width modulation voltage signal D_PWM and the sweep signal Sweep to control the pulse width of the driving current through the pulse width modulation subunit 311. It should be noted that any pixel circuit structure can be used in this embodiment, and no specific limitation is made here.

[0071] As an example, when the modulation unit 31 includes a pulse width modulation subunit 311 and a pulse amplitude modulation subunit 312 , the pulse width modulation subunit 311 and the pulse amplitude modulation subunit 312 can be connected to different driving modules 10 respectively or to the same driving module 10 .

[0072] As an example, in the related art, pixel circuits often use a row-by-row reset method. When a row of pixel circuits completes display, the scan signal of the next row is activated as a trigger signal to reset the pixel circuit of that row. The reset signal is usually synchronized with the scan signal so that the reset operation is performed after the data signal has been successfully written and displayed. The reset operation clears the accumulated charge inside the pixel circuit and prepares for the next data signal reading and writing.

[0073] In the second mode of the present application, there is no scanning signal output row by row. Based on this, in order to adapt the pixel circuit 3 to work in the second mode, combined with Figure 5 The pixel circuit 3 further includes a reset unit 32 connected to the modulation unit 31 and used to receive a reset control signal to control the modulation unit 31 to reset within the start period of the frame period.

[0074] As an example, see Figure 5 , the reset unit 32 in the pixel circuit 3 can be set to match the modulation unit 31. For example, when the modulation unit 31 includes the pulse width modulation subunit 311 and the pulse amplitude modulation subunit 312, the reset unit 32 can include a first reset tube T3 and a second reset tube T4, wherein the first reset tube T3 is used to reset the pulse width modulation subunit 311, and the second reset tube T4 is used to reset the pulse amplitude modulation subunit 312, and the reset control signal RST connected to the first reset tube T3 and the second reset tube T4 can be the same or different. Similarly, if the modulation unit 31 only includes the pulse width modulation subunit 311 or only includes the pulse amplitude modulation subunit 312, the reset unit 32 can include only one reset tube.

[0075] In the above embodiment, the reset control signal connected to the reset unit 32 controls the modulation unit 31 to reset within the starting period of the frame cycle, so that the execution of the reset unit 32 is independent of the scanning signal, thereby enabling the reset operation to be performed when the pixel circuit 3 operates in the second mode.

[0076] In a second aspect, in one embodiment, referring to Fig. 9 The present application provides a display driving method for controlling the above-mentioned display driving device. The method includes steps S101 and S102, which are described in detail below.

[0077] Step S101 : receiving a first mode control signal to control the gate driving circuit 1 to output a scan signal in a first mode, and controlling the mode switching circuit 2 to transmit the scan signal to the pixel circuit 3 in the first mode.

[0078] Step S102: Receive a second mode control signal to control the gate drive circuit 1 not to work in the second mode, and control the mode switching circuit 2 to continuously output an activation signal or a non-activation signal to the pixel circuit 3 during the frame period in the second mode, so as to control the pixel circuit 3 to write a data signal based on the activation signal or to shut down based on the non-activation signal.

[0079] As a further implementation of the display driving method, the display area of ​​the display panel where the display driving device is located is divided into a plurality of partitions according to the second mode control signal. Based on this, the control mode switching circuit 2 continuously outputs an activation signal or a non-activation signal to the pixel circuit 3 during the frame period in the second mode to control the pixel circuit 3 to write a data signal based on the activation signal or to shut down based on the non-activation signal, including:

[0080] For each partition, the mode switching circuit 2 controlling each row of pixel circuits 3 in the partition continuously outputs an activation signal to the pixel circuit 3 during a frame period in the second mode, so that the pixel circuits 3 in the partition are simultaneously turned on during the frame period; and / or,

[0081] For each partition, the mode switching circuit 2 controlling each row of pixel circuits 3 in the partition continuously outputs a non-activation signal to the pixel circuit 3 during the frame period in the second mode, so that each row of pixel circuits 3 in the partition is turned off simultaneously during the frame period.

[0082] The present application describes the working process of the display driving method in combination with the display driving device by way of example. Taking the display area of ​​the display panel as being divided into three partitions, the first partition is from row 1 to row n, the second partition is from row n+1 to row 2n, and the third partition is from row 2n+1 to row 3n.

[0083] Reference Figure 6 , illustrates that the pixel circuit 3 is driven row by row from the 1st row to the 3nth row in the first mode. As an example, the pulse width modulation subunit 311 and the pulse amplitude modulation subunit 312 are driven row by row respectively, wherein: Figure 6 PWM1~PWM3n are waveform diagrams of scanning signals output by the mode switching circuit 2 to the pulse width modulation subunit 311 in the first mode, and PAM1~PAM3n are waveform diagrams of scanning signals output by the switching circuit to the pulse amplitude modulation subunit 312 in the first mode, so that data signals are written into the pixel circuit 3 of each row respectively.

[0084] Reference Figure 7 , Figure 7The example illustrates the way in which the pixel circuits 3 of the first partition, the second partition and the third partition emit light simultaneously in the second mode. At this time, the first control signal gas1 connected to all the mode switching circuits 2 of the first partition, the second partition and the third partition is a low-level signal in the frame period, and the second control signal gas2 is a high-level signal in the frame period to output an activation signal to the pixel circuit 3. Figure 7 PWM1-PWM3n in the figure are waveform diagrams of activation signals output by the mode switching circuit 2 to the pulse width modulation subunit 311 in the second mode, and PAM1-PAM3n are waveform diagrams of activation signals output by the switching circuit to the pulse amplitude modulation subunit 312 in the second mode. At this time, all pixel circuits 3 in the first sub-area, the second sub-area and the third sub-area simultaneously write data signals within the frame period, and then start to emit light at the same time under the control of the light emission control signal EM, so as to test the difference of the chip by the light emission of the display panel.

[0085] Reference Figure 8 , Figure 8 The example shows that in the second mode, the pixel circuits 3 of the first partition and the third partition do not work, and only the pixel circuits 3 of the second partition emit light. At this time, the first control signal gas11 connected to the mode switching circuit 2 of the first partition and the first control signal gas13 connected to the mode switching circuit 2 of the third partition are high-level signals, and the second control signal gas12 connected to the mode switching circuit 2 of the first partition and the second control signal gas23 connected to the mode switching circuit 2 of the third partition are low-level signals, thereby outputting a non-activation signal to the pixel circuits 3 of the first partition and the third partition. The first control signal gas12 connected to the mode switching circuit 2 of the second partition is a low-level signal, and the second control signal gas22 is a high-level signal during the frame period, thereby outputting an activation signal to the pixel circuit 3 of the second partition. Figure 8PWMn+1~PWM2n in the figure are waveform diagrams of activation signals output by the mode switching circuit 2 of the second partition to the pulse width modulation subunit 311 in the second mode, and PAMn+1~PAM2n are waveform diagrams of activation signals output by the mode switching circuit 2 of the second partition to the pulse width modulation subunit 311 in the second mode. PWM1~PWMn and PWM2n+1~PWM3n are waveform diagrams of inactivation signals output by the mode switching circuit 2 of the first partition and the third partition to the pulse width modulation subunit 311 in the second mode, and PAM1~PAMn and PAM2n+1~PAM3n are waveform diagrams of activation signals output by the mode switching circuit 2 of the second partition to the pulse width modulation subunit 311 in the second mode. In this way, the pixel circuits 3 in the first partition and the third partition cannot write data signals and therefore cannot emit light. The pixel circuits 3 in the second partition write data signals within the frame period and start to emit light under the action of the light-emitting control signal EM in the light-emitting stage. By reducing the synchronous light-emitting area, the differences in chips in different partitions can be further collected through the light-emitting conditions of the display panel, and the impact of driving differences such as IRdrop is reduced, which helps to analyze the reasons for the poor uniformity of the display panel.

[0086] In a third aspect, in one embodiment, the present application provides a display panel, comprising the above-mentioned display drive control device.

[0087] The technical features of the above embodiments may be combined arbitrarily. To make the description concise, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

Claims

1. A display driving device, characterized in that: A driving module for driving a pixel circuit is included, wherein the driving module is used to control the connected pixel circuit to operate in a first mode or a second mode; the driving module includes: a gate driving circuit configured to output a scan signal in the first mode and stop outputting the scan signal in the second mode; A mode switching circuit is connected to the gate drive circuit and the pixel circuit, and is configured to transmit the scanning signal to the pixel circuit in the first mode, and continuously output an activation signal or a non-activation signal to the pixel circuit during a frame period in the second mode, so as to control the pixel circuit to write a data signal based on the activation signal or to shut down based on the non-activation signal during the frame period.

2. The display driving device according to claim 1, characterized in that: The gate driving circuit includes an output unit, and the output unit is connected to the mode switching circuit; In the first mode, the output unit outputs the scanning signal under the control of a clock signal; In the second mode, the output unit stops outputting the scanning signal under the control of the clock signal.

3. The display driving device according to claim 2, characterized in that: The mode switching circuit includes a first sub-circuit and a second sub-circuit; The first sub-circuit is used to receive a first control signal, and control the activation signal to output or stop outputting to the pixel circuit according to the first control signal; The second sub-circuit is used to receive a second control signal, and control the inactive signal to be output or stop being output to the pixel circuit according to the second control signal; The activation signal and the deactivation signal are output to the pixel circuit in different frame periods respectively.

4. The display driving device according to claim 3, characterized in that: The first subcircuit includes a first switch tube, which includes a control electrode connected to the first control signal, a first electrode connected to the activation signal, and a second electrode connected to the gate drive circuit and the pixel circuit.

5. The display driving device according to claim 3, characterized in that: The second sub-circuit includes a second switch tube, and the second switch tube includes a control electrode connected to the second control signal, a first electrode connected to the non-activation signal, and a second electrode connected to the gate drive circuit and the pixel circuit.

6. The display driving device according to claim 1, characterized in that: The pixel circuit includes a light emitting device and at least one modulation unit connected to the light emitting device; The modulation unit is connected to the gate driving circuit, and is used to receive the data signal, and control the writing of the data signal according to the scanning signal, the activation signal and the deactivation signal; Wherein, in the first mode, the modulation unit receives the scanning signal to write the data signal in a row-by-row writing sequence; in the second mode, the modulation unit receives the activation signal to continuously write the data signal within the frame period, or receives the inactivation signal to stop writing the data signal within the frame period; The light emitting device is connected to the modulation unit and is used for emitting light according to the data signal.

7. The display driving device according to claim 6, characterized in that: The pixel circuit further includes a reset unit, which is connected to the modulation unit and is used to receive a reset control signal to control the modulation unit to reset within a starting period of the frame period.

8. The display driving device according to claim 1, characterized in that: The potential of the activation signal is lower than the first signal level of the gate driving circuit, and the potential of the non-activation signal is higher than the second signal level of the gate driving circuit; Or, the potential of the activation signal is higher than the second signal level of the gate driving circuit, and the potential of the non-activation signal is lower than the first signal level of the gate driving circuit; The first signal level is lower than the second signal level.

9. A display driving method, used for controlling the display driving device according to any one of claims 1 to 8, characterized in that: The method comprises: receiving a first mode control signal to control the gate driving circuit to output the scanning signal in the first mode, and controlling the mode switching circuit to transmit the scanning signal to the pixel circuit in the first mode; A second mode control signal is received to control the gate drive circuit not to operate in the second mode, and the mode switching circuit is controlled to continuously output the activation signal or the non-activation signal to the pixel circuit during a frame period in the second mode, so as to control the pixel circuit to write a data signal based on the activation signal or to shut down based on the non-activation signal.

10. The display driving method according to claim 1, characterized in that: The display area of ​​the display panel where the display driving device is located is divided into a plurality of partitions according to the second mode control signal; The controlling the mode switching circuit to continuously output the activation signal or the inactivation signal to the pixel circuit during a frame period in the second mode, so as to control the pixel circuit to write a data signal based on the activation signal or to be turned off based on the inactivation signal, comprises: For each of the partitions, the mode switching circuit controlling each row of pixel circuits in the partition continuously outputs the activation signal to the pixel circuit during the frame period in the second mode, so that the pixel circuits in the partition are simultaneously turned on during the frame period; and / or, For each of the partitions, the mode switching circuit that controls each row of pixel circuits in the partition continuously outputs the non-activation signal to the pixel circuit during the frame period in the second mode, so that the pixel circuits in each row in the partition are turned off simultaneously during the frame period.

11. A display panel, characterized in that: The device comprises a display driving device as claimed in any one of claims 1 to 8.

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