Digital channelization rapid signal processing method and system based on Nyquist folding

Abstract

The invention discloses a digital channelization rapid signal processing method and system based on Nyquist folding, and the method comprises the steps: firstly carrying out the undersampling of a signal received by an antenna through an NYFR structure through an analog period non-uniform sampling pulse string generated by a local oscillator, and folding a frequency band of a signal spectrum to be below a Nyquist frequency; secondly, discrete digitization is carried out on the modulation signal which is folded below the Nyquist frequency by using an ADC (Analog to Digital Converter) integrated by the RFSoC; and finally, performing digital channelization processing on the discrete and digitized data based on an IDFT (Inverse Discrete Fourier Transform) multiphase filtering structure to divide the data into a plurality of sub-channels, demodulating the plurality of sub-channels which arrive at the same time in parallel by a receiver, and reconstructing a signal received by an antenna, thereby completing rapid signal receiving and processing of the NYFR structure. According to the invention, the instant ultra-wide frequency band real-time monitoring and processing capability is obviously improved, the instant ultra-wide frequency band signals can be received and processed, and the cost and the complexity are reduced.

Description

Technical Field

[0001] The present invention belongs to the technical field of ultra-wideband receivers, and in particular relates to a digital channelized fast signal processing method and system based on Nyquist folded reception (NYFR) and radio frequency system on chip (RFSoC). Background Art

[0002] With the advancement of modern electronic technology, the frequency bands used by signals have expanded to the Ku band and higher, posing greater challenges to real-time monitoring and processing of ultra-wideband signals. Traditional receivers use high-speed analog-to-digital converters (ADCs) to sample and process analog signals. However, due to the sampling frequency limitations of ADC devices, it is difficult to achieve instantaneous reception and real-time processing of ultra-wideband signals using a single low-speed ADC, limiting its effective application in scenarios such as spectrum sensing.

[0003] To overcome these issues, NYFR technology emerged. NYFR is a novel sub-Nyquist sampling technique that mixes the input signal with a local oscillator modulated signal, folding high-frequency signals into a lower frequency band. This allows high-frequency signals to be sampled at a lower sampling rate. NYFR technology not only reduces reliance on high-frequency ADCs but also reduces system complexity and cost.

[0004] Although NYFR technology can fold high-frequency signals into lower frequency bands, multiple NYFR output signals will exist in the frequency range output after the multi-component signals are folded, which increases the difficulty of processing the NYFR output signals. In addition, the NYFR folding process will also cause the signal-to-noise ratio to deteriorate. Therefore, digital channelization technology is introduced. Digital channelization can divide a frequency band into multiple narrowband channels, each of which can be processed independently and in parallel. This not only enhances the system's multi-signal reception and processing capabilities, but also reduces the data rate, while compensating for the deterioration of the signal-to-noise ratio caused by NYFR, effectively improving the processing performance and real-time nature of the signal receiving system. By combining digital channelization and NYFR, the system can complete real-time reception and processing of signals within an ultra-wide frequency band under low-speed ADC conditions, solving the problem of signal separation and rapid processing of multi-component NYFR output signals.

[0005] The emergence of RFSoCs has brought new breakthroughs in the design of digital channelized receivers. RFSoCs integrate ADCs (analog-to-digital converters) and DACs (digital-to-analog converters) with programmable logic resources (FPGAs), providing a highly integrated, high-performance solution. A digital channelized fast signal reception and processing technology based on New York Radio Frequency (NYFR) and RFSoCs combines the NYFR system architecture with digital channelization to achieve reception and processing of instantaneous, ultra-wideband signals using only one low-speed ADC.

[0006] This digital channelized fast signal reception and processing technology based on NYFR and RFSoC offers several advantages over traditional methods. First, it significantly reduces the need for high-speed ADCs, reducing system costs. The introduction of digital channelization separates the multi-component NYFR output signals, enabling rapid processing of multiple NYFR output signals in parallel while improving the SNR and ensuring fast processing performance of the NYFR output signals. Furthermore, the FPGA built into RFSoC allows the system to have greater flexibility and scalability when processing complex NYFR output signals. These advantages give the digital channelized real-time signal reception and processing technology based on NYFR and RFSoC broad application prospects and important practical significance in fields such as electronic warfare and spectrum sensing. Summary of the Invention

[0007] This invention proposes a digital channelized fast signal processing method and system based on Nyquist folding. This method aims to overcome the problem of conventional receivers where the instantaneous receiving bandwidth is limited by the ADC sampling rate. Furthermore, by digitally channelizing the multi-component NYFR output signals, the frequency band folded below the Nyquist frequency is divided into multiple narrowband channels, enabling signal separation. This method has the advantages of utilizing minimal resources to receive instantaneous ultra-wideband signals and process multiple NYFR output signals in real time. Ultimately, this technology is applied to the RFSoC platform, enabling real-time monitoring of signals within ultra-wideband frequency bands using only the RFSoC's integrated ADC and built-in FPGA. Compared with traditional digital channelized receivers, which are limited by the upper limit of ADC sampling frequency and find it difficult to obtain a larger instantaneous monitoring bandwidth, the present invention adopts digital channelized fast signal reception and processing technology based on NYFR and RFSoC. Through digital channelization, the frequency band below the Nyquist frequency after folding the NYFR is divided into multiple narrowband channels. Each channel can be processed in parallel, and the multi-component NYFR output signal can be effectively extracted and separated, realizing real-time reception and rapid processing of multi-component signals in an ultra-wide frequency band. At the same time, digital channelization reduces the data rate, improves the signal-to-noise ratio (SNR), and effectively improves the NYFR output signal processing performance. This technology can complete the real-time reception and processing of instantaneous ultra-wide frequency band multi-component signals using only a single-chip low-speed ADC.

[0008] A digital channelized fast signal processing method based on Nyquist folding adopts the following technical solutions:

[0009] The NYFR structure is used to undersample the high-frequency signal in the ultra-wide frequency band received by the antenna using the analog periodic non-uniform sampling pulse train generated by the local oscillator (LO), and fold the frequency band of the signal spectrum from the high frequency band to below the Nyquist frequency.

[0010] The NYFR structure output is folded to a complex modulated signal below the Nyquist frequency, and the sampling rate integrated by RFSoC is The ADC is used for discrete digitization, and the data after discrete digitization is real number data.

[0011] The data discretely digitized by the ADC is processed through digital channelization based on the inverse discrete Fourier transform (IDFT) multi-phase filtering structure to reduce the data rate and improve the signal-to-noise ratio. Digital channelization divides the frequency band below the Nyquist frequency after folding the NYFR into multiple narrowband sub-channels, and separates the multi-component NYFR output signals. The receiver demodulates multiple sub-channels arriving simultaneously in parallel to reconstruct the original signal, completing the NYFR structure's rapid reception and processing of ultra-wideband signals.

[0012] Preferably, the input noisy signal of the NYFR structure is , using the zero-crossing rising edge to control the sampling clock of the RF front end to generate the local oscillator (LO) non-uniform sampling pulse train .

[0013] (1)

[0014] in, impulse function, is a positive integer, LO adopts sinusoidal FM modulation, , is the LO carrier frequency, is the modulation frequency, This is the initial phase of LO.

[0015] Input noisy signal:

[0016] is the signal amplitude, is the input signal carrier frequency, For noise, and Mixing to get , and then Through a passband cutoff frequency of The NYFR output signal is obtained by low-pass filtering .

[0017] (2)

[0018] is the NYFR output signal amplitude, , Is rounded to the nearest integer. is a symbolic function, is the output noise, and the carrier frequency of the complex modulated signal output by the NYFR structure is .

[0019] Preferably, the sampling rate built into the RFSoC chip is The ADC performs discrete digitization on the NYFR output signal. The frequency range of the discrete digitized signal is 0~ , discrete digitized intervals , the data after ADC discrete digitization is real data, and the expression after ADC discrete digitization can be written as:

[0020] (3)

[0021] The local oscillator carrier frequency is , then the signal frequency band received by the antenna is It is divided into a frequency band, and the signal of each frequency band is folded to 0~ through undersampling. The frequency band has different Nyquist zone NZ label information. The NZ label is , which facilitates subsequent signal reconstruction.

[0022] Preferably, based on the FIR low-pass filter, the real data of the ADC is discretely digitized Perform digital channelization processing based on polyphase filtering and IDFT efficient structure to convert ADC discrete digital data into Digital channelization processing of channels, is an integer multiple of 2, and the channels are divided into even arrangements with 50% overlap between channels. The frequency range is divided into The other half of the channels are negative frequency images, which are useless for subsequent processing and are discarded. The bandwidth of each sub-channel is , the processing bandwidth is .

[0023] Preferably, the parameters of the FIR low-pass filter are based on the passband cutoff frequency = , stopband start frequency = , the order is Design. According to the prototype FIR low-pass filter After decimation, 2-fold interpolation is performed to determine the polyphase component filter of each channel , .

[0024] Preferably, the data after ADC discrete digitization conduct The data is extracted multiple times as the data input for each channel. Road Data , Through the polyphase component filter , The result after that is (* is convolution), ; then The result of polyphase filtering of the channels , conduct The IDFT transform of the point moves the spectrum to the baseband.

[0025] Preferably, the output of the efficient digital channelization structure based on polyphase filtering and IDFT is:

[0026] , (4)

[0027] right The polyphase filtering results of the channels are IDFT transform of the point, then multiply by the coefficient , and obtain digital channelized output , .

[0028] Preferably, the sampling data of ADC is processed by digital channelization to reduce the data rate, which is more real-time and convenient for subsequent data processing. The ADC with the sampling rate is sampled, and there is 50% overlap between channels. The digital channelization of channels is performed with a data decimation factor of times, 0~ The frequency range is divided into channels, and the bandwidth of each channel is , the processing bandwidth is ADC sampled data is converted into The clock, each clock input The ADC sampling data is sent to the digital channelization module, and the digital channelization processes the ADC sampling data in parallel. After digital channelization, the data output by each sub-channel is converted from the input data rate to The real number data is converted into a data rate of The two-way IQ data reduces the data rate times. At the same time, compared to ADC data with high sampling rate, ideally the data after channelization can be improved dB SNR.

[0029] Finally, a low-speed ADC is used to monitor the reception of signals within an ultra-wide frequency band.

[0030] On the other hand, the present invention provides a digital channelized fast signal processing system based on Nyquist folding, comprising a NYFR receiving module, an ADC discretization module and a digital channelization module.

[0031] The NYFR receiving module is used to perform undersampling on the signal received by the antenna using the analog periodic non-uniform sampling pulse train generated by the local oscillator (LO), and fold the frequency band of the signal spectrum below the Nyquist frequency.

[0032] The ADC discretization module performs ADC discrete digitization on the modulated signal folded below the Nyquist frequency.

[0033] The digital channelization module divides the data discretely digitized by the ADC into multiple sub-channels through digital channelization processing based on the IDFT polyphase filtering structure. The receiver demodulates multiple sub-channels arriving at the same time in parallel to reconstruct the signal received by the antenna.

[0034] The present invention provides a digital channelized fast signal processing method and system based on Nyquist folding. By applying digital channelization to NYFR reception, the frequency band below the Nyquist frequency after NYFR folding is divided into multiple narrowband channels, thereby achieving effective extraction and separation of multi-component NYFR output signals. The system can simultaneously receive and quickly process multiple NYFR output signals in parallel, significantly improving the system's instantaneous ultra-wideband real-time monitoring and processing capabilities. Only one ADC is needed to achieve the reception and processing of instantaneous ultra-wideband frequency band signals, reducing system cost and complexity. The built-in FPGA of RFSoC realizes digital channelized processing with high integration and improved signal-to-noise ratio, providing an efficient and reliable solution for the real-time reception and processing of signals within the ultra-wideband frequency band. BRIEF DESCRIPTION OF THE DRAWINGS

[0035] Figure 1 It is a flowchart of the present invention;

[0036] Figure 2 It is the NYFR structure diagram;

[0037] Figure 3 This is the NZ zone numbering diagram of different frequency bands after folding the NYFR;

[0038] Figure 4 This is the signal spectrum diagram of the 12.7GHz single-carrier signal sampled and output by the ADC of the NYFR receiving structure;

[0039] Figure 5 This is a digital channelized frequency domain partition diagram of 32 channels with 50% overlap;

[0040] Figure 6 This is the signal spectrum diagram of the 12.7GHz single-carrier signal after digital channelization by the NYFR receiving structure;

[0041] Figure 7 This is a diagram of the digital channelization structure based on IDFT polyphase filtering;

[0042] Figure 8 This is the block diagram of the polyphase filter FPGA implementation;

[0043] Figure 9 This is the digital channelized FPGA simulation result diagram;

[0044] Figure 10 This is the signal spectrum diagram of the ADC sampling output of two single-carrier signals at 5.25GHz and 16.8GHz;

[0045] Figure 11 This is the output spectrum of the fifth subchannel when two single-carrier signals at 5.25 GHz and 16.8 GHz are input;

[0046] Figure 12 This is the output spectrum diagram of the 8th subchannel when two single-carrier signals at 5.25 GHz and 16.8 GHz are input. DETAILED DESCRIPTION

[0047] The embodiments of the present invention are described in detail below with reference to the accompanying drawings.

[0048] A digital channelized fast signal processing system based on Nyquist folding primarily comprises a NYFR receiver module, an ADC sampling module, and a digital channelization module. The NYFR receiver module receives signals from the antenna and, leveraging the periodic non-uniform sampling characteristics of the LO modulated signal, folds the high-frequency signal across an ultra-wide frequency band into the 0-2 GHz band (the LO carrier frequency is 4 GHz), where the ADC can sample without distortion. The 5 GHz sampling rate ADC integrated in the RFSoC discretely digitizes the NYFR output signal and samples the folded 0-2 GHz signal. The sampled data is real data. Digital channelization uses the RFSoC's built-in FPGA to digitally process the ADC-sampled data into 32 channels using an IDFT polyphase filtering structure. The 0-2.5 GHz frequency range, which the ADC can sample without distortion, is evenly divided into 16 channels. Each sub-channel outputs both I / O and Q data for subsequent signal processing. Channelization employs a 50% overlap between channels, reducing the data rate, improving the signal-to-noise ratio, and eliminating blind spots within the coverage bandwidth.

[0049] like Figure 1 and Figure 2 As shown, a digital channelized fast signal processing method based on Nyquist folding includes the following steps:

[0050] Step 1: Using the NYFR structure, the analog periodic non-uniform sampling pulse train generated by the local oscillator (LO) is used to undersample the signal received by the antenna, folding the frequency band of the signal spectrum below the Nyquist frequency.

[0051] Step 2: Fold the modulated signal below the Nyquist frequency using the RFSoC integrated sampling rate. The ADC performs discrete digitization.

[0052] Step 3: The data discretely digitized by the ADC is divided into multiple sub-channels through digital channelization processing based on the IDFT polyphase filtering structure. The receiver demodulates multiple sub-channels arriving simultaneously in parallel and reconstructs the signal received by the antenna, completing the NYFR structure's rapid reception and processing of signals.

[0053] In this embodiment, the input noisy signal of the NYFR structure is , using the zero-crossing rising edge to control the sampling clock of the RF front end to generate the local oscillator (LO) non-uniform sampling pulse train , is the rising edge moment of zero crossing.

[0054] (1)

[0055] in, impulse function, is a positive integer, LO adopts sinusoidal frequency modulation, , For the LO carrier frequency, select 4 GHz. For the modulation frequency, select 10MHz. This is the initial phase of LO. It can be written as:

[0056] .

[0057] Input signal: , is the signal amplitude, is the input signal carrier frequency, For noise. Mixed with the non-uniform sampling pulse train with modulation generated by LO, we get , the mixed signal Through a passband cutoff frequency of The NYFR output signal is obtained after the low-pass filter In this embodiment, Using 4GHz, the passband cutoff frequency of the low-pass filter is 2GHz, and the NYFR output signal It can be expressed as:

[0058] (2)

[0059] is the NYFR output signal amplitude, , Is rounded to the nearest integer. is a symbolic function, is the output noise. The signal is folded into the complex modulated signal in the 0~2GHz frequency band through the NYFR structure. The carrier frequency is .

[0060] In this embodiment, the 5 GHz sampling rate ADC integrated in the RFSoC chip is used to output the NYFR signal. Discrete digitization is performed. The frequency range of discrete digitized signals is 0~2.5GHz. The discrete digitized interval is =0.2ns, the data after ADC discrete digitization is real data, and the expression after ADC discrete digitization can be written as:

[0061] (3)

[0062] When the LO carrier frequency The modulation frequency is 4GHz. If the ultra-wide frequency band is 10MHz, each 2GHz band is divided into a frequency band. The signals of each frequency band are folded into the frequency band of 0~2G through undersampling and have different NZ label information. The NZ label is , which is convenient for subsequent signal demodulation and reconstruction. Figure 3 The NZ zone number shown is the number of the monitored ultra-wide frequency band. Divided into an NZ interval, each interval frequency range , . The upper limit of the frequency of the ultra-wide frequency band to be monitored, when When it is an even number, the NZ zone is labeled ,when When it is an odd number, the NZ zone is labeled .

[0063] In this embodiment, when NYFR receives a single carrier frequency signal with a frequency of 12.7 GHz, is 3, then theoretically the signal carrier frequency =12.7GHz signal after passing through NYFR structure outputs complex modulated signal with carrier frequency of =0.7GHz, the spectrum after discrete digitization by ADC is as follows Figure 4As shown, the signal carrier frequency is 0.7 GHz. For conventional sampling structures, to acquire signals at or below 12.7 GHz, the required ADC sampling rate is at least 25.4 GHz. However, in this embodiment, NYFR only requires an ADC sampling rate greater than 2 GHz to effectively acquire signals at or below 12.7 GHz, and can even process signals at higher frequencies, demonstrating NYFR's advantage in reducing sampling rate requirements.

[0064] In this embodiment, the data sampled by the ADC Implement digital channelization based on IDFT polyphase filtering with high efficiency structure, such as Figure 5 As shown in the channel division diagram, 32 channels are arranged in an even pattern, with 50% overlap between channels. The frequency range of 0~2.5GHz is divided into 16 sub-channels, and the channel numbers are 0, 1, 2, , 15, and the other half of the channels are mirror images of negative frequencies. Each subchannel has a bandwidth of 156.25 MHz, and a processing bandwidth of 312.5 MHz. The center frequency of each subchannel is the channel number multiplied by 156.25 MHz. Since the frequency band output after NYFR folding in this embodiment ranges from 0 to 2 GHz, only channels in the 0-2 GHz range are used for subsequent processing and calculations. Figure 6 This is the fourth channel output after the ADC sampling data is digitally channelized. The sub-channel center frequency is 4 times 156.25 MHz, and the center frequency is 625 MHz. This is the output signal spectrum diagram of the 12.7 GHz signal after the NYFR structure is sampled by the ADC and then channelized.

[0065] In this embodiment, 32 channels of digital channelization are used, and the parameters of the FIR low-pass filter are based on the passband cutoff frequency. =78.125MHz, stopband start frequency =156.25MHz design, according to the above, the order of the prototype FIR low-pass filter in this embodiment is 256 orders, 32 times decimation is performed on it and then 2 times interpolation is performed to determine the polyphase component filter of each channel , .

[0066] In this embodiment, the Figure 7 The digital channelization is performed based on the IDFT polyphase filtering efficient structure, which reduces the amount of calculation and saves FPGA resources. It uses 32 channels of digital channelization, so the signal after ADC discrete digitization is Perform 16-fold data extraction. In the FPGA, the 5GHz sampling rate ADC discrete digital data is converted into 312.5MHz clock rate, and 16 ADC discrete digital data are input in parallel per clock as the data input of each channel. The multi-phase filtering process of each channel is implemented in the FPGA as follows. Figure 8 As shown in the figure, the FPGA filtering implementation of the polyphase filter with an order of 8 can use 8 multipliers for pipeline processing for each channel polyphase filtering, which can process ADC discrete digital data in real time and in parallel. Road Data , Through the polyphase component filter , The result after that is (* is convolution), , and then the result of polyphase filtering of 32 channels , A 32-point IDFT transform is performed to move the spectrum to the baseband. IDFT uses a fast butterfly operation algorithm in the FPGA to process data in parallel in a pipeline, realizing real-time processing of discrete digitized data from the ADC. During the entire implementation process, data does not need to be stored and flows directly to the next level, and no data accumulation is generated during the calculation process.

[0067] In this embodiment, the output of digital channelization based on the IDFT polyphase filtering efficient structure is:

[0068] , (4)

[0069] Perform a 32-point IDFT transform on the polyphase filtering results of the 32 channels and then multiply the coefficients , and obtain digital channelized output , .

[0070] In this embodiment, the built-in FPGA of RFSoC is used to implement digital channelization, which has a fast real-time processing speed, a low data rate, and saves subsequent calculations. An ADC with a sampling rate of 5GHz is used for discrete digitization, and digital channelization of 32 channels with 50% overlap between channels is performed. The frequency range of 0~2.5GHz is divided into 16 channels, and the ADC discrete digitized data is converted into a 312.5MHz clock. Each clock inputs 16 ADC discrete digitized data into the digital channelization module, and the digital channelization module processes the data in parallel. After digital channelization, the data of each sub-channel is converted from real number data with an ADC data rate of 5GHz to IQ two-way data with a data rate of 312.5MHz, and the data rate is reduced by 8 times. Ideally, the data after digital channelization can improve the SNR of about 12dB, so that the signal has higher accuracy and stability, which greatly improves the ability to subsequently process the NYFR output signal. The FPGA simulation of digital channelization is as follows Figure 9 As shown in the figure, the FPGA performs digital channelization processing on the ADC sampling data in parallel. The entire process is carried out in the form of a pipeline, and data flows directly from the previous level to the next level. No data is stored during the entire operation. From ADC sampling data input to digital channelization data output, it takes only about 122ns, with strong real-time performance, realizing the receiver's real-time processing capability for multi-component NYFR output signals.

[0071] In the present invention, a digital channelized fast signal processing method based on Nyquist folding uses RFSoC integrated ADC and built-in FPGA, which reduces external connections and wiring and improves the reliability and stability of the system. The signal output by the NYFR structure is digitally channelized, and the frequency band below the Nyquist frequency after NYFR folding is divided into multiple narrowband channels. The multi-component NYFR output signal is effectively extracted and separated, so that the receiver can process multiple NYFR output signals in real time and in parallel quickly, so that the NYFR technology can be applied to real-time signal reception. For the input of two signals, such as the simultaneous input of single-carrier signals of 5.25GHz and 16.8GHz, theoretically, the carrier frequency of the 5.25GHz signal after folding is 1.25GHz, and the carrier frequency of the 16.8GHz signal after folding is 0.8GHz. The actual output signal spectrum after discrete digitization of the ADC is shown in the figure below. Figure 10 As shown, it is consistent with the theoretical value. Figure 11 In order to actually collect the spectrum of the 5th channel output signal after digital channelization, the channel center frequency is 781.25MHz, corresponding to the signal after 16.8GHz single carrier folding. Figure 12In order to actually collect the spectrum of the 8th channel output signal after digital channelization, the channel center frequency is 1.25GHz, which corresponds to the signal after folding the 5.25GHz single carrier, which is consistent with the theoretical value. In this embodiment, digital channelization is introduced to convert the 5GHz rate real number data of the ADC discrete digitized NYFR output signal into IQ two-way data output at a rate of 312.5MHz for each subchannel, thereby reducing the data rate by 8 times. Ideally, the signal-to-noise ratio can be improved by about 12dB, thereby improving the efficiency of subsequent signal processing. By combining NYFR and digital channelization and applying them to the RFSoC platform, it is possible to use one ADC to receive and monitor signals in an instantaneous ultra-wide bandwidth frequency band.

[0072] Note that the above are only preferred embodiments of the present invention and the technical principles employed. Those skilled in the art will understand that the present invention is not limited to the specific embodiments described herein, and that various obvious changes, readjustments, and substitutions can be made by those skilled in the art without departing from the scope of protection of the present invention. Therefore, although the present invention has been described in detail through the above embodiments, the present invention is not limited to the above embodiments and may include many other equivalent embodiments without departing from the concept of the present invention. The scope of the present invention is determined by the scope of the appended claims.

Claims

1. A digital channelized fast signal processing method based on Nyquist folding, characterized in that: The following steps are involved: Step 1: Through the NYFR structure, the analog periodic non-uniform sampling pulse train generated by the local oscillator LO is used to undersample the signal received by the antenna, and the frequency band of the signal spectrum is folded below the Nyquist frequency; Step 2: Fold the modulated signal below the Nyquist frequency using the RFSoC integrated sampling rate ADC for discrete digitization; Step 3: The data discretely digitized by the ADC is divided into multiple sub-channels through digital channelization processing based on the IDFT multi-phase filtering structure. The receiver demodulates multiple sub-channels arriving at the same time in parallel and reconstructs the signal received by the antenna, completing the NYFR structure to quickly receive and process the signal.

2. The digital channelized fast signal processing method based on Nyquist folding according to claim 1, characterized in that: The input noisy signal of the NYFR structure is , using the zero-crossing rising edge to control the sampling clock of the RF front end to generate the LO non-uniform sampling pulse train : ； in, Impulse function, is a positive integer, LO uses sinusoidal frequency modulation, , is the LO carrier frequency, is the modulation frequency, It is the initial phase of LO; Input noisy signal: ; in, is the signal amplitude, is the input signal carrier frequency, For noise, and Mixing to get , and then Through a passband cutoff frequency of The NYFR output signal is obtained by low-pass filtering : ； is the NYFR output signal amplitude, , is rounded to the nearest integer. is the symbolic function, is the output noise, and the carrier frequency of the modulated signal output by the NYFR structure is .

3. The digital channelization fast signal processing method based on Nyquist folding according to claim 2, characterized in that: The sampling rate of the RFSoC integrated The ADC is used for discrete digitization. The specific implementation process is as follows: The sampling rate built into the RFSoC chip will be The ADC performs discrete digitization on the NYFR output signal. The frequency range of the discrete digitized signal is 0~ , discrete digitization interval , the data after ADC discrete digitization is real data, and the expression after ADC discrete digitization is written as: ； Among them, the local oscillator carrier frequency is , then the signal frequency band received by the antenna is It is divided into a frequency band, and the signal of each frequency band is folded to 0~ through undersampling. The frequency band has different label information, which is .

4. The digital channelized fast signal processing method based on Nyquist folding according to claim 3, characterized in that: The specific implementation process of step 3 is as follows: Discrete the real data into ADC Perform multi-phase filtering based on FIR low-pass filter and digital channelization processing based on IDFT to convert ADC sampling data into Digital channelization processing of channels, is an integer multiple of 2, and the channels are divided into even-type arrangements, with 50% overlap between channels, 0~ The frequency range is divided into channels, and the other half of the channels are negative frequency images and are discarded; the bandwidth of each sub-channel is , the processing bandwidth is .

5. The digital channelized fast signal processing method based on Nyquist folding according to claim 4, characterized in that: The polyphase filtering based on the FIR low-pass filter is specifically implemented as follows: The parameters of the FIR low-pass filter are based on the passband cutoff frequency. = , stopband start frequency = , the order is Design; perform it according to the FIR low-pass filter After decimation, 2x interpolation is performed to determine the multiphase component filter of each channel. , .

6. The digital channelized fast signal processing method based on Nyquist folding according to claim 5, characterized in that: The specific process of the digital channelization processing based on FIR low-pass filter polyphase filtering and IDFT is as follows: The data after ADC discrete digitization conduct times the data extraction as the data input for each channel; Road Data , Through the polyphase component filter , The result after that is ; where * is convolution, ; then The result of polyphase filtering of the channels , conduct The IDFT transform of the point moves the spectrum to the baseband.

7. The digital channelized fast signal processing method based on Nyquist folding according to claim 6, characterized in that: The output of the digital channelization processing based on FIR low-pass filter polyphase filtering and IDFT is: ， ； right The multi-phase filtering result of each channel is IDFT transformation of the point, then multiply the coefficient , and obtain digital channelized output , .

8. A digital channelized fast signal processing system based on Nyquist folding, used to implement the digital channelized fast signal processing method according to any one of claims 1 to 7, characterized in that: It includes NYFR receiving module, ADC discretization module and digital channelization module; The NYFR receiving module is used to undersample the signal received by the antenna using the analog periodic non-uniform sampling pulse train generated by the local oscillator LO, and fold the frequency band of the signal spectrum below the Nyquist frequency; The ADC discretization module performs ADC discrete digitization on the modulated signal folded below the Nyquist frequency; The digital channelization module divides the data discretely digitized by the ADC into multiple sub-channels through digital channelization processing based on the IDFT multi-phase filtering structure. The receiver demodulates multiple sub-channels arriving at the same time in parallel to reconstruct the signal received by the antenna.

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