Bit mark auxiliary decoding method and device suitable for RS code and medium
Through the bit mark assisted decoding method, combined with the BPSK hard judgment and soft judgment demodulator, the bit marking module and flip strategy are used to solve the efficiency and performance problems of RS code in a high error rate environment, and achieve higher error correction capabilities and lower bit error rate improve the overall performance and adaptability of the communication system.
Patent Information
- Application Number
- CN202411428013.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-10-14
- Publication Date
- 2024-12-27
- Estimated Expiration
- 2044-10-14
AI Technical Summary
The existing RS code hard decision decoding algorithms are limited in efficiency and performance when dealing with high error rates and large data blocks, and existing error correction technologies are difficult to meet the needs of higher encoding gain and lower power consumption, especially in complex communications. It is difficult to ensure communication quality and reliability in the environment.
Using the bit mark assisted decoding method, the BPSK hard decision demacher and soft decision demacher are combined, and the received signal is marked with multiple levels of reliability level by using the bit marking module, and designed in the RS code hybrid decoder. Bit flip strategy, optimized decoding error detection and correction process.
It significantly improves the decoding performance and error correction capabilities of RS codes, reduces the bit error rate, achieves a balance between complexity and performance, and improves the overall performance and adaptability of the communication system at high data rates.
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Abstract
Description
Technical Field
[0001] The present invention belongs to the field of communication technology, and in particular to a bit mark auxiliary decoding method, device and medium suitable for RS code. Background Art
[0002] With the rapid development of communication technology, the types and number of communication services are increasing, and the requirements for communication quality and real-time performance are also increasing. However, actual systems still face noise interference and non-ideal channel transmission characteristics, which makes information prone to errors during transmission. Although forward error correction technology (FEC) plays an important role in improving the reliability of communication systems, existing error correction schemes still have shortcomings. As the target data rate increases, FEC schemes must strike a balance between complexity and performance to achieve higher coding gain, lower latency, and lower power consumption. In application scenarios that require short codewords, low latency, and simple codecs, RS codes are still a preferred solution.
[0003] RS codes are widely used in flash storage, optical communication, and wireless communication, and have become a representative of efficient error correction. However, in the face of increasingly complex communication environments, the efficiency and performance of traditional RS code hard decision decoding algorithms are limited when dealing with higher error rates and larger data blocks. Although soft decision decoding algorithms can improve decoding performance, their high power consumption and complex computing resource requirements limit their practical applications. In addition, although RS codes can be used in combination with other coding schemes (such as convolutional codes and polar codes), existing decoding technologies and algorithms are still difficult to meet the requirements of higher coding gain and lower power consumption. In addition, due to cost constraints, existing systems are often difficult to upgrade comprehensively, which makes them unable to cope with future communication challenges. Therefore, in-depth research on RS codes and their decoding technologies is particularly important. Summary of the invention
[0004] The present invention aims to solve the deficiencies of the above-mentioned prior art and proposes a bit mark assisted decoding method, device and medium suitable for RS code, so as to improve the performance gain of hard decision decoding and achieve higher error correction capability and lower bit error rate, so that RS decoding can achieve an effective balance between complexity and performance, while ensuring communication quality, reliability and efficiency, and improving the overall performance and adaptability of the communication system in a complex communication environment, so as to meet the growing demand for high data rate communication and promote the further development of communication technology.
[0005] In order to achieve the above-mentioned purpose, the present invention adopts the following technical scheme:
[0006] The bit mark assisted decoding method applicable to RS code of the present invention is characterized in that it is applied to a transmission scenario consisting of a transmitter, a channel, and a receiver, wherein the transmitter includes: an RS code encoder and a BPSK modulator; the channel includes additive white Gaussian noise; the receiver includes: a BPSK hard decision demodulator, a BPSK soft decision demodulator, and an RS code hybrid decoder; the bit mark assisted decoding method is performed according to the following steps:
[0007] Step 1: Define n as the codeword length, k as the information length, m as a positive integer, and satisfy the relationship m = log2n, and k <n;
[0008] After the RS code encoder encodes k×m transmitted information bits I, an RS code word c containing n×m bits is obtained. Let c ij is the bit in the i-th row and j-th column of the RS codeword c, i = 1, 2, …, n, j = 1, 2, …, m;
[0009] Step 2: After the RS codeword c is modulated by the BPSK modulator, a transmission symbol sequence s containing n×m elements is obtained. Let s ij is the i-th row and j-th column element of the transmitted symbol sequence s, s ij The value of is -1 or 1, i = 1, 2,…, n, j = 1, 2, …, m;
[0010] Step 3: After the sending symbol sequence s is transmitted to the receiving end through a channel containing additive white Gaussian noise, a receiving symbol sequence y is obtained;
[0011] Step 4: After the received symbol sequence y is demodulated by the BPSK hard decision demodulator, a received binary matrix r containing n×m bits is obtained;
[0012] At the same time, after the received symbol sequence y is demodulated by the BPSK soft decision demodulator, a log-likelihood ratio absolute value matrix λ containing n×m elements is obtained;
[0013] Step 5: The received binary matrix r and the log-likelihood ratio absolute value matrix λ are simultaneously transmitted to the RS code hybrid decoder for bit mark auxiliary decoding, thereby obtaining a message sequence I′ containing k×m bits.
[0014] The bit mark assisted decoding method for RS code described in the present invention is also characterized in that the RS hybrid decoder in step 5 includes an RS standard decoder, a bit mark module, a decoding error detection module, and a bit flip module; and the bit mark assisted decoding is performed according to the following steps:
[0015] Step 5.0: Define rij To receive the bit of the i-th row and j-th column of the binary matrix r; define λ ij is the element in the i-th row and j-th column of the log-likelihood ratio absolute value matrix λ, i = 1, 2, …, n, j = 1, 2, …, m;
[0016] From r ij The number of PE bits counted in the marking result is N PE ; The number of HUB bits is N HUB ;
[0017] Define l as the current decoding times, L as the maximum decoding times; initialize l = 1;
[0018] Define μ l is the number of bit flips during the lth decoding, and μ l The value of is a positive integer;
[0019] The received binary matrix r is used as the bit flip result r of the l-1th decoding. l-1 ′;
[0020] Step 5.1: The bit marking module is based on λ ij The value of r ij Mark the bits and get r ij The marking result includes: HRB bit, RB bit, UB bit and HUB bit; wherein the HUB bit and UB bit are collectively referred to as PE bit;
[0021] Step 5.2: RS standard decoder l-1 'Decode and get the decoding result c for the lth decoding l ′ and the decoding state at the lth decoding;
[0022] Step 5.3: If the decoding status at the first decoding indicates that the decoding is correct, execute step 5.4; otherwise, execute step 5.5;
[0023] Step 5.4: The decoding error detection module detects the ij The marking result of the decoding result c l 'Perform decoding error detection to obtain the error bit detection result of the lth decoding;
[0024] If the detection result of the first decoding does not contain the HRB bit, the RS code hybrid decoder considers the decoding result c l ′ is credible, and step 5.6 is executed; otherwise, the RS code hybrid decoder considers the decoding result c l 'Untrusted, go to step 5.5;
[0025] Step 5.5: Bit flip module performs l-1 ′ Perform the lth bit flip and update the marking result to obtain the bit flip result r of the lth decoding l ′ and the updated labeling result, and execute step 5.2;
[0026] Step 5.6: If l ≤ L, it means the decoding is successful, and the decoding result c of the lth decoding is l The first k × m bits of ′ are assigned to the message sequence I′; if l > L, it means that the decoding fails, and the received binary matrix r is assigned to the message sequence I′.
[0027] Furthermore, the bit marking in step 5.1 is performed according to the following steps:
[0028] Define three bit marking thresholds δ1, δ2, δ3;
[0029] When |λ ij | ≥ δ1, then r ij Marked as HRB bit;
[0030] When δ2≤ | λ ij | < δ1, then r ij Marked as RB bit;
[0031] When δ3≤ | λ ij | < δ2, then r ij Marked as UB bit;
[0032] When |λ ij |< δ3, bit r ij Marked as HUB bit.
[0033] Furthermore, the bit flipping and bit mark updating in step 5.5 are performed according to the following steps:
[0034] Step 5.5.0: Define μ l The value range is [N min , N max ], where N min Indicates the lower limit, N max Indicates the upper limit;
[0035] Step 5.5.1: If l ≥ L, assign L+1 to l and execute step 5.6; otherwise, execute step 5.5.2;
[0036] Step 5.5.2: If the number of HUB bits is N HUB Greater than the number of bit flips μ l , randomly select μ in the HUB bit lbits and record their positions as the position to be flipped E, and then execute step 5.5.3;
[0037] If the number of bit flips μ l Greater than the number of HUB bits N HUB and is less than the number of PE bits N PE When μ is randomly selected in PEs l bits and record their positions as the position to be flipped E, and then execute step 5.5.3;
[0038] If the number of bit flips μ l Greater than the number of PE bits N PE , assign L+1 to l, and then execute step 5.6;
[0039] Step 5.5.3: Determine the number of bit flips μ l Whether the upper limit N is reached max ;
[0040] If μ l Reaching the upper limit N max , then for r ij In the marked results, N min HUB bit flags are cleared to achieve N HUB , and μ l Set as lower limit N min ;
[0041] If μ l The upper limit N is not reached max , μ l +1 is assigned to μ l ;
[0042] Step 5.5.4: Flip all bits recorded in the position to be flipped E to obtain the bit flip result r at the Lth decoding. l ′, and assign l+1 to l, then return to step 5.2.
[0043] Furthermore, μ in step 5.5.0 l The value range is [N min , N max ] is determined by the following process:
[0044] Step a, define the probability density function of the received symbol sequence y as f(y);
[0045] Step b: Calculate the probability that the PE bit is an error bit ;
[0046] Step c: Calculate the probability that the error bit is marked as a PE bit ;
[0047] Step d: Calculate the average number of error bits in the hard decision demodulation received codeword r ;
[0048] Step e, counting the actual value of the average number of error bits in r, and calculating the difference σ with the estimated value η;
[0049] Step f: Calculate N min =η-σ; N max =η+σ.
[0050] Furthermore, the marking threshold selected in step 5.1 is determined according to the following process:
[0051] Calculate the probability that an HRB bit is an error bit , and determine β HRB = 0, and then obtain the optimal value of δ1 through numerical simulation optimization algorithm near the initial value of δ1;
[0052] Calculate the probability that an error bit is marked as a HUB bit , and β HUB and α HUB The intersection of the two curves about δ3 is taken as the initial value of δ3, and then the optimal value corresponding to δ3 is obtained by numerical simulation optimization algorithm near the initial value of δ3;
[0053] Determine α PE When δ2 is large enough, the initial value corresponding to δ2 is obtained, and then between the initial value of δ3 and the initial value of δ2, the optimal value corresponding to δ2 is obtained through the numerical simulation optimization algorithm.
[0054] An electronic device of the present invention includes a memory and a processor, wherein the memory is used to store a program that supports the processor to execute the bit mark auxiliary decoding method, and the processor is configured to execute the program stored in the memory.
[0055] The present invention provides a computer-readable storage medium, wherein a computer program is stored on the computer-readable storage medium, and the computer program executes the steps of the bit mark assisted decoding method when the computer program is executed by a processor.
[0056] Compared with the prior art, the present invention has the following beneficial effects:
[0057] 1. The present invention uses a marking threshold to mark bits into multiple reliability levels based on the soft information of the channel. This method provides an important reference for bit flipping decisions through the bit marking results, thereby significantly improving the accuracy of decoding decisions. Compared with the traditional hard decision method, the present invention enables the decoder to more effectively identify and process high-risk bits by refining the bit reliability evaluation, while not increasing the computational complexity in the decoding process.
[0058] 2. The present invention uses the bit marking results to design an optimized bit flipping strategy for common decoding errors and decoding failures. Through this strategy, some channel error bits can be corrected, allowing the traditional RS code hard decision decoder to more effectively process the remaining error bits, thereby improving the overall decoding performance. DETAILED DESCRIPTION
[0059] In this embodiment, a bit mark assisted decoding method for RS code is designed to balance complexity and performance, thereby ensuring the reliability of high-speed transmission at a low cost. Specifically, the bit mark assisted decoding method is applied to a transmission scenario consisting of a transmitter, a channel, and a receiver, wherein the transmitter includes: an RS code encoder and a BPSK modulator; the channel includes additive white Gaussian noise; the receiver includes: a BPSK hard decision demodulator, a BPSK soft decision demodulator, and an RS code hybrid decoder. The method is performed according to the following steps:
[0060] Step 1: In this embodiment, the RS code is encoded according to the KP4 coding standard recommended in the optical transport network standard. It can be obtained that the codeword length n is 544, the information length k is 514, the number of bits m contained in each codeword is 10, and the relationship m = log2n is satisfied, and k < n;
[0061] After the RS code encoder encodes 514×10 transmitted information bits I, it obtains an RS codeword c containing 544×10 bits. Let c ij is the bit in the i-th row and j-th column of the RS codeword c, i = 1, 2, …, 544, j = 1, 2, …, 10;
[0062] Step 2: After the RS codeword c is modulated by the BPSK modulator, a transmission symbol sequence s containing 544×10 elements is obtained. Let s ij is the i-th row and j-th column element of the transmitted symbol sequence s, s ij The value of is -1 or 1;
[0063] Step 3: After the sending symbol sequence s is transmitted to the receiving end through a channel containing additive white Gaussian noise, a receiving symbol sequence y is obtained;
[0064] Step 4: After the received symbol sequence y is demodulated by the BPSK hard decision demodulator, a received binary matrix r containing 544×10 bits is obtained;
[0065] At the same time, after the received symbol sequence y is demodulated by the BPSK soft decision demodulator, a log-likelihood ratio absolute value matrix λ containing 544×10 elements is obtained;
[0066] Step 5: The received binary matrix r and the log-likelihood ratio absolute value matrix λ are simultaneously transmitted to the RS code hybrid decoder for bit mark auxiliary decoding, thereby obtaining a message sequence I′ containing 514×10 bits;
[0067] Step 5.0: Define r ij To receive the bit of the i-th row and j-th column of the binary matrix r; define λ ij is the element in the i-th row and j-th column of the log-likelihood ratio absolute value matrix λ, i = 1, 2, …,544, j = 1, 2, …,10;
[0068] From r ij The number of PE bits counted in the marking result is N PE ; The number of HUB bits is N HUB ;
[0069] Define l as the current number of decoding times, L as the maximum number of decoding times; initialize l = 1, L = 10;
[0070] Define μ l is the number of bit flips during the lth decoding, and μ l The value of is a positive integer;
[0071] The received binary matrix r is used as the bit flip result r of the l-1th decoding. l-1 ′;
[0072] Step 5.1: The bit marking module is based on λ ij The value of r ij Mark the bits and get r ij The marking result includes: HRB bit, RB bit, UB bit and HUB bit; wherein, HUB bit and UB bit are collectively referred to as PE bit;
[0073] Step 5.1.1, define three bit marking thresholds δ1, δ2, δ3; through probability β HRB , β HUB , α HUB and α PEAfter determining the optimization range of the bit marking threshold, numerical simulation is performed within the optimization range to optimize the bit marking threshold. In this embodiment, δ1=17, δ2=1.3, δ3=0.85 are finally obtained;
[0074] Calculate the probability that an HRB bit is an error bit , and determine β HRB = 0, the initial value of δ1 is 9, and the range of δ1>9 is determined as the optimization range. In the numerical simulation process, δ2=2.5 and δ3=0.87 are defaulted, and the optimal value δ1=17 is finally obtained;
[0075] Calculate the probability that an error bit is marked as a HUB bit , and determine β HUB and α HUB The initial value of the intersection of the two curves of δ3 is 0.87, and the optimization range is selected around δ3=0.87. During the numerical simulation, δ1=17 and δ2=2.5, and finally the best value δ3=0.85 is obtained;
[0076] Calculate the probability α that the error bit is marked as a PE bit PE , determine α PE When the initial value of δ2 is large enough, it is 2.5. Then the optimization range of δ2 is selected as [0.85, 2.5]. In the numerical simulation process, δ1=17 and δ3=0.85, and finally the optimal value is δ2=1.3.
[0077] Step 5.1.2, when |λ ij | ≥ δ1, then r ij Marked as HRB bit;
[0078] When δ2≤ | λ ij | < δ1, then r ij Marked as RB bit;
[0079] When δ3≤ | λ ij | < δ2, then r ij Marked as UB bit;
[0080] When |λ ij |< δ3, bit r ij It is marked as HUB bit;
[0081] Step 5.2: RS standard decoder l-1 'Decode and get the decoding result c for the lth decoding l ′ and the decoding state at the lth decoding;
[0082] Step 5.3: If the decoding status at the first decoding indicates that the decoding is correct, execute step 5.4; otherwise, execute step 5.5;
[0083] Step 5.4: The decoding error detection module detects the ij The marking result of RS standard decoder is c l 'Perform decoding error detection to obtain the error bit detection result of the lth decoding;
[0084] If the detection result of the first decoding does not contain the HRB bit, the RS code hybrid decoder considers the decoding result c l ′ is credible, and step 5.6 is executed; otherwise, the RS code hybrid decoder considers the decoding result c l 'Untrusted, go to step 5.5;
[0085] Step 5.5: Bit flip module performs l-1 ′ Perform the lth bit flip and update the marking result to obtain the bit flip result r of the lth decoding l ′ and the updated labeling result;
[0086] Step 5.5.0: Define μ l The value range is [N min , N max ], where N min Indicates the lower limit, N max Indicates the upper limit; specifically includes:
[0087] Step a, define the probability density function of the received symbol sequence y as f(y);
[0088] Step b: Calculate the probability that the PE bit is an error bit ;
[0089] Step c: Calculate the probability that the error bit is marked as a PE bit ;
[0090] Step d: Calculate the average number of error bits in the hard decision demodulation received codeword r ;
[0091] Step e, counting the actual value of the average number of error bits in r, and calculating the difference σ between the actual value and the estimated value η, where σ=1 in this embodiment;
[0092] Step f: Calculate N min =η-1; N max =η+1;
[0093] Step 5.5.1: If l ≥ L, assign L+1 to l and execute step 5.6; otherwise, execute step 5.5.2;
[0094] Step 5.5.2: If the number of HUB bits is N HUB Greater than the number of bit flips μ l , randomly select μ in the HUB bit l bits and record their positions as the position to be flipped E, and then execute step 5.5.3;
[0095] If the number of bit flips μ l Greater than the number of HUB bits N HUB and is less than the number of PE bits N PE When μ is randomly selected in PE l bits and record their positions as the position to be flipped E, and then execute step 5.5.3;
[0096] If the number of bit flips μ l Greater than the number of PE bits N PE , assign L+1 to l, and then execute step 5.6;
[0097] Step 5.5.3: Determine the number of bit flips μ l Whether the upper limit N is reached max ;
[0098] If μ l Reaching the upper limit N max , μ l Set as lower limit N min , in r ij Randomly select N from the labeled results min HUB bits and record their positions as the position to be updated G. After clearing the original marking results of all bits recorded in G, update N HUB The result of taking the value of and assigning a new label to all bits recorded in G is UB;
[0099] If μ l The upper limit N is not reached max , μ l +1 is assigned to μ l ;
[0100] Step 5.5.4: Flip all bits recorded in the position to be flipped E to obtain the bit flip result r at the Lth decoding. l ′, and assign l+1 to l, then return to step 5.2;
[0101] Step 5.6: If l ≤ L, it means the decoding is successful, and the decoding result c of the lth decoding is l The first 514×10 bits of ′ are assigned to the message sequence I′; if l > L, it means that the decoding fails, and the received binary matrix r is assigned to the message sequence I′.
[0102] Step 6: Compare the decoded message sequence I′ with the transmitted information bit I, count the number of error bits and calculate the bit error rate, and then calculate the signal-to-noise ratio gain of the bit mark assisted decoding method compared with the traditional RS code hard decision decoder. In this embodiment, KP4 is used when the bit error rate reaches 10 -5 When using the bit mark assisted decoding method, a 0.2dB signal-to-noise ratio gain can be achieved compared to the traditional RS code hard decision decoder.
[0103] In this embodiment, an electronic device includes a memory and a processor, wherein the memory is used to store a program that supports the processor to execute the above method, and the processor is configured to execute the program stored in the memory.
[0104] In this embodiment, a computer-readable storage medium stores a computer program on the computer-readable storage medium, and the computer program executes the steps of the above method when executed by a processor.
Claims
1. A bit mark assisted decoding method applicable to RS code, characterized in that: The invention is applied to a transmission scenario consisting of a transmitter, a channel and a receiver, wherein the transmitter includes an RS code encoder and a BPSK modulator; the channel includes additive white Gaussian noise; the receiver includes a BPSK hard decision demodulator, a BPSK soft decision demodulator and an RS code hybrid decoder; the bit mark auxiliary decoding method is performed in the following steps: Step 1: define n as the codeword length, k as the information length, m as a positive integer, and satisfy the relationship m = log2n, and k < n; After the RS code encoder encodes k×m transmitted information bits I, an RS code word c containing n×m bits is obtained. Let c ij is the bit in the i-th row and j-th column of the RS codeword c, i = 1, 2, …, n, j = 1, 2, …, m; Step 2: After the RS codeword c is modulated by the BPSK modulator, a transmission symbol sequence s containing n×m elements is obtained. Let s ij is the i-th row and j-th column element of the transmitted symbol sequence s, s ij The value of is -1 or 1, i = 1, 2, …, n, j = 1, 2, …, m; Step 3: After the sending symbol sequence s is transmitted to the receiving end through a channel containing additive white Gaussian noise, a receiving symbol sequence y is obtained; Step 4: After the received symbol sequence y is demodulated by the BPSK hard decision demodulator, a received binary matrix r containing n×m bits is obtained; At the same time, after the received symbol sequence y is demodulated by the BPSK soft decision demodulator, a log-likelihood ratio absolute value matrix λ containing n×m elements is obtained; Step 5: The received binary matrix r and the log-likelihood ratio absolute value matrix λ are simultaneously transmitted to the RS code hybrid decoder for bit mark auxiliary decoding, thereby obtaining a message sequence I′ containing k×m bits.
2. The bit mark assisted decoding method for RS code according to claim 1, characterized in that: The RS hybrid decoder in step 5 includes an RS standard decoder, a bit marking module, a decoding error detection module, and a bit flipping module; and performs bit marking auxiliary decoding according to the following steps: Step 5.0: Define r ij To receive the bit of the i-th row and j-th column of the binary matrix r; define λ ij is the element in the i-th row and j-th column of the log-likelihood ratio absolute value matrix λ, i = 1, 2, …, n, j = 1, 2, …, m; From r ij The number of PE bits counted in the marking result is N PE ; The number of HUB bits is N HUB ; Define l as the current decoding times, L as the maximum decoding times; initialize l = 1; Define μ l is the number of bit flips during the lth decoding, and μ l The value of is a positive integer; The received binary matrix r is used as the bit flip result r of the l-1th decoding. l-1 ′; Step 5.1: The bit marking module is based on λ ij The value of r ij Mark the bits and get r ij The marking result includes: HRB bit, RB bit, UB bit and HUB bit; wherein the HUB bit and UB bit are collectively referred to as PE bit; Step 5.2: RS standard decoder l-1 'Decode and get the decoding result c for the lth decoding l ′ and the decoding state at the lth decoding; Step 5.3: If the decoding status at the first decoding indicates that the decoding is correct, execute step 5.4; otherwise, execute step 5.5; Step 5.4: The decoding error detection module detects the ij The marking result of the decoding result c l 'Perform decoding error detection to obtain the error bit detection result of the lth decoding; If the detection result of the first decoding does not contain the HRB bit, the RS code hybrid decoder considers the decoding result c l ′ is credible, and step 5.6 is executed; otherwise, the RS code hybrid decoder considers the decoding result c l 'Untrusted, go to step 5.5; Step 5.5: Bit flip module performs l-1 ′ Perform the lth bit flip and update the marking result to obtain the bit flip result r of the lth decoding l ′ and the updated labeling result, and execute step 5.2; Step 5.6: If l ≤ L, it means the decoding is successful, and the decoding result c of the lth decoding is l The first k × m bits of ′ are assigned to the message sequence I′; if l > L, it means that the decoding fails, and the received binary matrix r is assigned to the message sequence I′.
3. The bit mark assisted decoding method applicable to RS code according to claim 2, characterized in that: The bit marking in step 5.1 is performed as follows: Define three bit marking thresholds δ1, δ2, δ3; When |λ ij | ≥ δ1, then r ij Marked as HRB bit; When δ2≤ |λ ij | < δ1, then r ij Marked as RB bit; When δ3≤ | λ ij | < δ2, then r ij Marked as UB bit; When |λ ij |< δ3, bit r ij Marked as HUB bit.
4. The bit mark assisted decoding method for RS code according to claim 2, characterized in that: The bit flipping and bit flag updating in step 5.5 are performed as follows: Step 5.5.0: Define μ l The value range is [N min , N max ], where N min Indicates the lower limit, N max Indicates the upper limit; Step 5.5.1: If l ≥ L, assign L+1 to l and execute step 5.6; otherwise, execute step 5.5.2; Step 5.5.2: If the number of HUB bits is N HUB Greater than the number of bit flips μ l , randomly select μ in the HUB bit l bits and record their positions as the position to be flipped E, and then execute step 5.5.3; If the number of bit flips μ l Greater than the number of HUB bits N HUB and is less than the number of PE bits N PE When μ is randomly selected in PEs l bits and record their positions as the position to be flipped E, and then execute step 5.5.3; If the number of bit flips μ l Greater than the number of PE bits N PE , assign L+1 to l, and then execute step 5.6; Step 5.5.3: Determine the number of bit flips μ l Whether the upper limit N is reached max ; If μ l Reaching the upper limit N max , then for r ij In the marked results, N min HUB bit flags are cleared to achieve N HUB , and μ l Set as lower limit N min ; If μ l The upper limit N is not reached max , μ l +1 is assigned to μ l ; Step 5.5.4: Flip all bits recorded in the position to be flipped E to obtain the bit flip result r at the Lth decoding. l ′, and assign l+1 to l, then return to step 5.
2.
5. The bit mark assisted bit flipping RS code decoding method according to claim 4, characterized in that: The μ in step 5.5.0 l The value range is [N min , N max ] is determined by the following process: Step a, define the probability density function of the received symbol sequence y as f(y); Step b: Calculate the probability that the PE bit is an error bit ; Step c: Calculate the probability that the error bit is marked as a PE bit ; Step d: Calculate the average number of error bits in the hard decision demodulation received codeword r ; Step e, counting the actual value of the average number of error bits in r, and calculating the difference σ with the estimated value η; Step f: Calculate N min =η-σ; N max =η+σ.
6. The bit mark assisted bit flipping RS code decoding method according to claim 3, characterized in that: The marking threshold selected in step 5.1 is determined according to the following process: Calculate the probability that an HRB bit is an error bit , and determine β HRB = 0, and then obtain the optimal value of δ1 through numerical simulation optimization algorithm near the initial value of δ1; Calculate the probability that an error bit is marked as a HUB bit , and β HUB and α HUB The intersection of the two curves about δ3 is taken as the initial value of δ3, and then the optimal value corresponding to δ3 is obtained by numerical simulation optimization algorithm near the initial value of δ3; Determine α PE When δ2 is large enough, the initial value corresponding to δ2 is obtained, and then between the initial value of δ3 and the initial value of δ2, the optimal value corresponding to δ2 is obtained through the numerical simulation optimization algorithm.
7. An electronic device, comprising a memory and a processor, characterized in that: The memory is used to store a program that supports the processor to execute the bit marking assisted decoding method described in any one of claims 1 to 6, and the processor is configured to execute the program stored in the memory.
8. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the steps of the bit mark assisted decoding method according to any one of claims 1 to 6 are executed.
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