Display panel, preparation method thereof and display device

Abstract

The invention relates to a display panel, a preparation method thereof and a display device. The display panel includes: a substrate; the array film layer is arranged on one side of the substrate, and the array film layer comprises a signal line; the insulating layer is arranged on the side, away from the substrate, of the array film layer, and a plurality of via holes are formed in the insulating layer; the first electrode layer is arranged on the side, away from the substrate, of the insulating layer and comprises a plurality of first electrodes connected with the signal lines through the via holes. The light-emitting layer is arranged on the side, away from the substrate, of the first electrode layer; the barrier layer comprises metal elements, the barrier layer is arranged on the side, away from the substrate, of the first electrode layer and comprises a plurality of barrier parts, and the orthographic projection of each barrier part on the substrate covers at least part of orthographic projection of the corresponding via hole on the substrate. By adopting the scheme, the yield of display panel finished products can be improved.

Description

Technical Field

[0001] The present application relates to the field of display technology, and in particular to a display panel and a method for preparing the same, and a display device. Background Art

[0002] OLED (Organic Light Emitting Diode) display panel is one of the hot topics in the current display panel research field. Compared with liquid crystal display panels, OLED display panels have the advantages of low energy consumption, low cost, self-luminescence, wide viewing angle and fast response speed. The sub-pixels of OLED display panels are usually made by FMM (Fine Metal Mask) evaporation.

[0003] Currently, an evaporation process that eliminates FMM has become the focus of attention in the industry. However, the yield rate of OLED display panels made by this preparation process is currently low. Summary of the invention

[0004] Based on this, it is necessary to provide a display panel and a preparation method thereof, and a display device that can improve the yield rate of the finished display panel in order to address the above technical problems.

[0005] In a first aspect, the present application provides a display panel, the display panel comprising:

[0006] substrate;

[0007] An array film layer is disposed on one side of the substrate, and the array film layer includes a signal line;

[0008] An insulating layer, disposed on a side of the array film layer away from the substrate, and having a plurality of via holes;

[0009] A first electrode layer, disposed on a side of the insulating layer away from the substrate, and comprising a plurality of first electrodes connected to the signal lines through the plurality of via holes;

[0010] A light-emitting layer is disposed on a side of the first electrode layer away from the substrate;

[0011] The barrier layer containing metal elements is arranged on the side of the first electrode layer away from the substrate and includes a plurality of barrier parts, wherein the orthographic projection of each barrier part on the substrate covers at least part of the orthographic projection of the corresponding via hole on the substrate.

[0012] In one embodiment, the display panel further comprises an isolation structure, the isolation structure is disposed on a side of the insulating layer away from the substrate and defines a plurality of isolation openings; a portion of the first electrode is exposed from the isolation openings;

[0013] Optionally, the orthographic projection of the isolation structure on the substrate is in a grid shape;

[0014] Optionally, the isolation structure comprises a first isolation portion and a second isolation portion stacked in a direction away from the substrate, and an orthographic projection of the second isolation portion on the substrate covers an orthographic projection of the first isolation portion on the substrate;

[0015] Optionally, the first isolation portion comprises a conductive material;

[0016] Optionally, the first isolation portion includes at least one metal layer;

[0017] Optionally, the first isolation portion includes a first metal layer and a second metal layer stacked in a direction away from the substrate, and an orthographic projection outer contour of the first metal layer on the substrate is located outside an orthographic projection outer contour of the second metal layer on the substrate;

[0018] Optionally, the material of the second isolation portion includes titanium or molybdenum; the material of the first metal layer includes molybdenum or titanium; and the material of the second metal layer includes aluminum or copper or silver.

[0019] In one of the embodiments, the orthographic projection of the isolation structure on the substrate covers the orthographic projection of the plurality of vias on the substrate.

[0020] In one embodiment, the orthographic projection outer contour of each isolation opening on the substrate is located outside the orthographic projection outer contour of the corresponding via hole on the substrate.

[0021] In one embodiment, the display panel includes a first display area and a second display area, the first display area and the second display area are adjacently arranged, and the light transmittance of the first display area is less than the light transmittance of the second display area; the isolation structure further includes a plurality of light-transmitting openings; the isolation openings are located in the first display area and the second display area, and the light-transmitting openings are located in the second display area;

[0022] Optionally, the light-transmitting opening located in the second display area and the isolation opening located in the second display area are arranged at intervals;

[0023] Optionally, the orthographic projection of the light-transmitting opening on the substrate covers a portion of the orthographic projection of the first electrode on the substrate corresponding to at least one of the isolation openings adjacent to the light-transmitting opening;

[0024] Optionally, the orthographic projection of the light-transmitting opening on the substrate covers the orthographic projection of the via hole corresponding to at least one of the isolation openings adjacent to the light-transmitting opening on the substrate.

[0025] In one embodiment, the display panel further includes a first pixel definition layer; the first pixel definition layer is disposed on a side of the plurality of first electrodes away from the substrate, and defines a plurality of first pixel openings, the plurality of first pixel openings are disposed corresponding to the plurality of first electrodes, and each of the first pixel openings exposes the corresponding first electrode;

[0026] Optionally, the orthographic projection of the first pixel definition layer on the substrate covers the orthographic projection of the plurality of vias on the substrate.

[0027] In one embodiment, each of the blocking portions is disposed on a side of the first pixel definition layer away from the substrate.

[0028] In one embodiment, each of the blocking portions is disposed on a side of the first pixel definition layer close to the substrate;

[0029] Optionally, each of the blocking portions is in contact with the corresponding first electrode.

[0030] In one embodiment, the display panel further includes a second pixel definition layer; the second pixel definition layer is disposed on a side of the first pixel definition layer away from the substrate, and defines a plurality of second pixel openings, the plurality of second pixel openings are disposed corresponding to the plurality of first electrodes, and each second pixel opening exposes the corresponding first electrode;

[0031] Optionally, the orthographic projection of the second pixel definition layer on the substrate covers the orthographic projections of the plurality of blocking portions on the substrate;

[0032] Optionally, the second pixel definition layer and the first pixel definition layer are made of the same material;

[0033] Optionally, the orthographic projection of the second pixel definition layer on the substrate is located within the orthographic projection of the first pixel definition layer on the substrate;

[0034] Optionally, an orthographic projection of a surface of the first pixel definition layer on a side facing away from the substrate on the substrate coincides with an orthographic projection of the second pixel definition layer on the substrate;

[0035] Optionally, an orthographic projection of a surface of the second pixel definition layer on a side facing away from the substrate on the substrate is located within an orthographic projection of a surface of the second pixel definition layer on a side close to the substrate on the substrate;

[0036] Optionally, an orthographic projection of a surface of the first pixel definition layer on a side facing away from the substrate on the substrate is located within an orthographic projection of a surface of the first pixel definition layer on a side close to the substrate on the substrate;

[0037] Optionally, the multiple second pixel openings are connected to the multiple first pixel openings in a one-to-one correspondence to form multiple pixel openings, and the inner walls of the second pixel openings are connected to the inner walls of the corresponding first pixel openings, and the inner walls of the pixel openings are flat or curved.

[0038] In one embodiment, the light-emitting layer includes a plurality of light-emitting functional materials, and the plurality of light-emitting functional materials are arranged one by one on a side of the plurality of first electrodes away from the substrate;

[0039] Optionally, the display panel further includes a second electrode layer, and the second electrode layer is arranged on a side of the light-emitting layer away from the substrate;

[0040] Optionally, the second electrode layer includes a plurality of second electrodes; the plurality of second electrodes are arranged one by one correspondingly on a side of the plurality of light-emitting functional materials away from the substrate;

[0041] Optionally, each of the second electrodes is electrically connected to the first isolation portion.

[0042] In one embodiment, the display panel further includes a plurality of packaging parts, and the plurality of packaging parts are disposed one by one in correspondence on a side of the second electrode away from the substrate.

[0043] In one embodiment, the light transmittance of the blocking portion is greater than or equal to 50%;

[0044] Optionally, the material of the blocking portion includes a transparent conductive material;

[0045] Optionally, the material of the barrier portion includes metal oxide.

[0046] In a second aspect, the present application provides a method for preparing a display panel, the method for preparing a display panel comprising:

[0047] providing a substrate;

[0048] forming an array film layer on one side of the substrate, wherein the array film layer includes a signal line;

[0049] forming an insulating layer on a side of the array film layer facing away from the substrate, wherein the insulating layer is provided with a plurality of via holes;

[0050] forming a first electrode layer on a side of the insulating layer away from the substrate, wherein the first electrode layer includes a plurality of first electrodes connected to the signal line through the plurality of via holes;

[0051] forming a light-emitting layer on a side of the first electrode layer away from the substrate;

[0052] A barrier layer containing metal elements is formed on a side of the first electrode layer facing away from the substrate, wherein the barrier layer includes a plurality of barrier portions, and an orthographic projection of each barrier portion on the substrate covers at least a portion of an orthographic projection of a corresponding via hole on the substrate.

[0053] In one embodiment, the method further includes: forming an isolation structure on a side of the insulating layer facing away from the substrate; wherein the isolation structure defines a plurality of isolation openings; and a portion of the first electrode is exposed from the isolation openings.

[0054] In a third aspect, the present application provides a display device, comprising the display panel according to any one of the above-mentioned first aspects.

[0055] In the above-mentioned display panel and its preparation method and display device, multiple first electrodes in the first electrode layer in the display panel are connected to the signal lines through multiple vias, and a blocking layer containing metal elements is provided on the side of the first electrode layer away from the substrate, and the orthographic projection of each blocking portion in the blocking layer on the substrate covers at least part of the orthographic projection of the corresponding via on the substrate. In this way, after the first sub-pixel is prepared, when opening holes in the second sub-pixel area and the third sub-pixel area, the problem of pixel dark spots caused by over-engraving of the via can be avoided due to the blocking effect of the blocking portion on the via, thereby improving the finished product yield of the display panel. BRIEF DESCRIPTION OF THE DRAWINGS

[0056] In order to more clearly illustrate the technical solutions in the embodiments of the present application or related technologies, the drawings required for use in the embodiments of the present application or related technical descriptions will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other related drawings can be obtained based on these drawings without paying creative work.

[0057] FIG1 is a schematic top view of a display panel in the related art;

[0058] FIG2 is a cross-sectional schematic diagram of a display panel in the related art;

[0059] FIG3 is a schematic cross-sectional view of a display panel in an embodiment;

[0060] FIG4A is a schematic diagram of a setting position of a blocking portion in one embodiment;

[0061] FIG4B is a schematic diagram of another arrangement position of a blocking portion in one embodiment;

[0062] FIG4C is a schematic diagram of another arrangement position of a blocking portion in an embodiment;

[0063] FIG5 is a schematic cross-sectional view of another display panel in one embodiment;

[0064] FIG6 is a schematic structural diagram of an isolation structure in one embodiment;

[0065] FIG7 is a schematic cross-sectional view of a sub-pixel in one embodiment;

[0066] FIG8 is a schematic cross-sectional view of a packaging portion in one embodiment;

[0067] FIG9 is a schematic diagram of the structure of a display panel in one embodiment;

[0068] FIG10 is a schematic top view of a second display area in one embodiment;

[0069] FIG11 is a cross-sectional schematic diagram of a second display area in one embodiment;

[0070] FIG12 is a cross-sectional schematic diagram of a first display area in one embodiment;

[0071] FIG13 is a cross-sectional schematic diagram of another second display area in one embodiment;

[0072] FIG14 is a cross-sectional schematic diagram of yet another second display area in one embodiment;

[0073] FIG. 15 is a schematic flow chart of a method for preparing a display panel in an embodiment.

[0074] Description of reference numerals:

[0075] 1. Anode; 2. Anode via; 3. Pixel light-emitting area; 4. Isolation column;

[0076] 301, substrate; 302, array film layer; 302a, signal line; 303, insulating layer; 304a, first electrode; 304b, light-emitting functional material; 304c, second electrode; 305, blocking part; P, via hole;

[0077] 401, first pixel definition layer; 401a, first pixel opening; 402, second pixel definition layer; 402a, second pixel opening;

[0078] 501, isolation structure; 501a, isolation opening; 5011, first isolation portion; 5011a, first metal layer; 5011b, second metal layer; 5012, second isolation portion;

[0079] 801, packaging part; 90A, first display area; 90B, second display area; 901a, light-transmitting opening. DETAILED DESCRIPTION

[0080] In order to make the purpose, technical solution and advantages of the present application more clearly understood, the present application is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.

[0081] It should be understood that although the terms "first", "second", etc. may be used herein to describe various elements, they do not represent any order, quantity or importance, but are only used to distinguish different components. These terms are only used to distinguish one element from another. For example, without departing from the scope of the present application, the first element may be referred to as the second element, and similarly, the second element may be referred to as the first element. "Include" or "comprising" and similar words mean that the elements or objects appearing before the word cover the elements or objects listed after the word and their equivalents, without excluding other elements or objects.

[0082] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art to which this application belongs. The terms used herein in the specification of this application are only for the purpose of describing specific embodiments and are not intended to limit this application. The term "and / or" used herein includes any and all combinations of one or more of the related listed items.

[0083] As shown in FIG. 1 and FIG. 2 , in the related art, the display panel uses a photolithography process to achieve pixel-level packaging, and does not require an FMM evaporation process, thereby improving the pixel aperture ratio of the display panel. In order to further achieve a design that maximizes the pixel aperture ratio, the anode vias 2 (also called anode switching holes) corresponding to the anodes 1 of the first sub-pixel (red R), the second sub-pixel (green G), and the third sub-pixel (blue B) are usually designed between the isolation columns 4 of the pixel light-emitting area 3.

[0084] However, the applicant found that after preparing the first sub-pixel, when opening holes in the second and third sub-pixel regions, the anode vias 2 of the second and third sub-pixels are easily over-engraved, resulting in dark spots in the pixels, which in turn leads to a low yield of the finished display panel.

[0085] Furthermore, the applicant sets a blocking portion so that the orthographic projection of the blocking portion on the substrate covers at least part of the orthographic projection of the corresponding via on the substrate. In this way, after the first sub-pixel is prepared, when opening holes in the second sub-pixel area and the third sub-pixel area, the blocking effect of the blocking portion on the via can avoid the problem of dark pixels caused by over-engraving of the via, thereby improving the yield of the finished product of the display panel.

[0086] The contents of relevant patents CN118251982A, 202410864269.8, PCT / CN2024 / 098407, PCT / CN2024 / 102783, PCT / CN2024 / 098217, PCT / CN2024 / 099419, and PCT / CN2024 / 099072 are for reference only.

[0087] Specifically, as shown in FIG. 3 , an embodiment of the present application provides a display panel, which may be an OLED display panel or a QLED (Quantum Dot Light Emitting Diodes) display panel.

[0088] The display panel includes a substrate 301, an array film layer 302, an insulating layer 303, a first electrode layer, a light-emitting layer, and a barrier layer containing metal elements. The first electrode layer includes a plurality of first electrodes 304a, the light-emitting layer includes a plurality of light-emitting functional materials 304b, and the barrier layer includes a plurality of barrier portions 305.

[0089] The array film layer 302 is disposed on one side of the substrate 301 , and the array film layer 302 includes a signal line 302 a ; the insulating layer 303 is disposed on a side of the array film layer 302 away from the substrate 301 , and is provided with a plurality of vias P.

[0090] The first electrode layer is disposed on the side of the insulating layer 303 away from the substrate 301, and the plurality of first electrodes 304a in the first electrode layer are connected to the signal line 302a through the plurality of via holes P. In other words, the plurality of first electrodes 304a are disposed corresponding to the plurality of via holes P, and a portion of each first electrode 304a is filled in the via hole P so that the first electrode 304a is connected to the signal line 302a through the corresponding via hole P.

[0091] The light-emitting layer is disposed on the side of the first electrode layer away from the substrate 301 ; specifically, the plurality of light-emitting functional materials 304 b in the light-emitting layer are disposed one by one correspondingly on the side of the plurality of first electrodes 304 a away from the substrate 301 .

[0092] The blocking layer is disposed on the side of the first electrode layer facing away from the substrate 301, and the orthographic projection of each blocking portion 305 in the blocking layer on the substrate 301 covers at least part of the orthographic projection of the corresponding via P on the substrate 301. In other words, the plurality of blocking portions 305 are disposed corresponding to the plurality of first electrodes 304a, and each blocking portion 305 is disposed on the side of the corresponding first electrode 304a facing away from the substrate 301, and the orthographic projection of each blocking portion 305 on the substrate 301 covers at least part of the orthographic projection of the corresponding via P on the substrate 301.

[0093] Among them, the plurality of first electrodes 304a are arranged correspondingly to the plurality of via holes P, which means that the plurality of first electrodes 304a correspond to the plurality of via holes P one by one; the plurality of blocking portions 305 are arranged correspondingly to the plurality of first electrodes 304a, which means that the plurality of blocking portions 305 correspond to the plurality of first electrodes 304a one by one. Since the plurality of first electrodes 304a correspond to the plurality of via holes P one by one, and the plurality of blocking portions 305 correspond to the plurality of first electrodes 304a one by one, the plurality of via holes P correspond to the plurality of blocking portions 305 one by one. It should be noted that "the plurality of A corresponds to the plurality of B one by one" means that each A corresponds to one B.

[0094] The array film layer 302 includes a driving circuit composed of multiple metal layers and multiple insulating layers. The array film layer 302 also includes a signal line 302a, which is used to be electrically connected to the first electrode 304a to transmit an electrical signal to the first electrode 304a.

[0095] The insulating layer 303 may be a planarization layer to achieve planarization. The material of the insulating layer 303 may be an insulating material such as silicon nitride, silicon oxide, silicon oxynitride or a combination thereof, or a resin material such as photoresist. The stacked substrate 301, the array film layer 302 and the insulating layer 303 constitute an array substrate.

[0096] The plurality of first electrodes 304a may be electrically connected to the same signal line 302a or to different signal lines 302a through corresponding via holes P. FIG. 3 shows an example of electrically connecting different signal lines 302a.

[0097] The material of the barrier 305 includes metal oxides, which may be tin oxide, zinc oxide, cadmium oxide, indium oxide, indium tin oxide, zinc indium oxide, zinc gallium oxide, zinc aluminum oxide, titanium tantalum oxide, etc. Preferably, indium tin oxide is selected as the material of the barrier 305. The barrier 305 has a certain blocking effect on photolithography and is not easily etched.

[0098] Each blocking portion 305 is disposed on a side of the corresponding first electrode 304a away from the substrate 301. Specifically, each blocking portion 305 may be in direct contact with or integrally formed with the corresponding first electrode 304a, or a pixel definition layer may be disposed between each blocking portion 305 and the corresponding first electrode 304a.

[0099] The positional relationship between each blocking portion 305 and the corresponding via P is preferably such that the orthographic projection of each blocking portion 305 on the substrate 301 completely covers the orthographic projection of the corresponding via P on the substrate 301, so that the via P can be completely protected.

[0100] In the present embodiment, a plurality of first electrodes 304a in the first electrode layer of the display panel are arranged corresponding to the signal line 302a through a plurality of via holes P, and a blocking layer containing metal elements is arranged on the side of the first electrode layer away from the substrate 301, and the orthographic projection of each blocking portion 305 in the blocking layer on the substrate 301 covers at least part of the orthographic projection of the corresponding via hole P on the substrate 301. In this way, after the first sub-pixel is prepared, when opening holes in the second sub-pixel area and the third sub-pixel area, the problem of dark spots in pixels caused by over-engraving of metal at the position of the via hole P can be avoided due to the blocking effect of the blocking portion 305 on the via hole P, thereby improving the yield rate of the finished product of the display panel.

[0101] In one embodiment, referring to FIGS. 4A , 4B and 4C , the display panel further includes a first pixel definition layer 401; the first pixel definition layer 401 is disposed on a side of the plurality of first electrodes 304a away from the substrate 301, and defines a plurality of first pixel openings 401a, the plurality of first pixel openings 401a are disposed corresponding to the plurality of first electrodes 304a, and each first pixel opening 401a exposes the corresponding first electrode 304a.

[0102] The material of the first pixel definition layer 401 may be an inorganic material. The first pixel definition layer 401 defines the light emitting area of ​​each sub-pixel, thereby avoiding diffusion of light emitting functional materials and color mixing between sub-pixels.

[0103] The plurality of first pixel openings 401 a and the plurality of first electrodes 304 a are disposed correspondingly to each other, which means that the plurality of first pixel openings 401 a and the plurality of first electrodes 304 a correspond one to one.

[0104] Each first pixel opening 401 a exposes the corresponding first electrode 304 a means that, for each first pixel opening 401 a , the orthographic projection of the first pixel opening 401 a on the substrate 301 covers at least a portion of the orthographic projection of the corresponding first electrode 304 a on the substrate 301 .

[0105] By providing pixel openings on the first pixel definition layer 401 , it is convenient to provide pixels on the array substrate.

[0106] In one embodiment, the orthographic projection of the first pixel definition layer 401 on the substrate 301 covers the orthographic projections of the plurality of via holes P on the substrate 301 , so that the pixel aperture ratio can be improved.

[0107] In one embodiment, as shown in FIG. 4A , each barrier 305 is disposed on the side of the first pixel definition layer 401 away from the substrate 301. In other words, each barrier 305 is not in contact with the corresponding first electrode 304a, and the first pixel definition layer 401 is disposed between each barrier 305 and the corresponding first electrode 304a. In this way, the problem of high power consumption of the display panel caused by electrical conduction between each barrier 304 and the corresponding first electrode 304a can be avoided.

[0108] In one embodiment, as shown in FIG. 4B , each barrier 305 is disposed on the side of the first pixel definition layer 401 close to the substrate 401. In other words, each barrier 305 may or may not be in direct contact with the corresponding first electrode 304a. In the case of not being in direct contact, another film layer different from the material of the barrier 305 is disposed between each barrier 305 and the corresponding first electrode 304a.

[0109] Preferably, each barrier portion 305 is in contact with the corresponding first electrode 304 a , thereby reducing the manufacturing complexity of the display panel.

[0110] In one embodiment, continuing to refer to Figure 4C, the display panel also includes a second pixel definition layer 402; the second pixel definition layer 402 is arranged on the side of the first pixel definition layer 401 away from the substrate 301, and defines a plurality of second pixel openings 402a, the plurality of second pixel openings 402a are arranged corresponding to the plurality of first electrodes 304a, and each second pixel opening 402a exposes the corresponding first electrode 304a.

[0111] The material of the second pixel definition layer 402 may also be an inorganic material. Specifically, the material of the second pixel definition layer 402 and the first pixel definition layer 401 may be the same.

[0112] The plurality of second pixel openings 402a are connected to the plurality of first pixel openings 401a in a one-to-one correspondence. It should be noted that “connected to the one-to-one correspondence” means that each second pixel opening 402a corresponds to one first pixel opening 401a.

[0113] Each second pixel opening 402 a exposes the corresponding first electrode 304 a means that, for each second pixel opening 402 a , the orthographic projection of the second pixel opening 402 a on the substrate 301 covers at least a portion of the orthographic projection of the corresponding first electrode 304 a on the substrate 301 .

[0114] In the presence of a second pixel definition layer 402, preferably, the orthographic projection of the second pixel definition layer 402 on the substrate 301 covers the orthographic projections of multiple blocking parts 305 on the substrate 301, and each blocking part 305 is arranged between the second pixel definition layer 402 and the first pixel definition layer 401, so as to avoid the problem of high power consumption of the display panel caused by electrical conduction between each blocking part 305 and the isolation structure 501.

[0115] In addition, the projection relationship between the first pixel definition layer 401 and the second pixel definition layer 402 is as follows: the orthographic projection of the second pixel definition layer 402 on the substrate 301 is located within the orthographic projection of the first pixel definition layer 401 on the substrate 301; the orthographic projection of the surface of the first pixel definition layer 401 facing away from the substrate 301 on the substrate 301 coincides with the orthographic projection of the second pixel definition layer 402 on the substrate 301.

[0116] Among them, the orthographic projection of the surface of the second pixel definition layer 402 facing away from the substrate 301 on the substrate 301 is located within the orthographic projection of the surface of the second pixel definition layer 202 facing closer to the substrate 301 on the substrate 301; the orthographic projection of the surface of the first pixel definition layer 401 facing away from the substrate 301 on the substrate 301 is located within the orthographic projection of the surface of the first pixel definition layer 401 facing closer to the substrate 301 on the substrate 301.

[0117] It should be noted that the plurality of second pixel openings 402a are connected to the plurality of first pixel openings 401a in a one-to-one correspondence to form a plurality of pixel openings, wherein the inner wall of the second pixel opening 402a may be connected to the inner wall of the corresponding first pixel opening 401a or may not be connected. Preferably, the inner wall of the second pixel opening 402a is connected to the inner wall of the corresponding first pixel opening 401a, that is, the inner wall of the pixel opening is composed of the inner wall of the second pixel opening 402a and the inner wall of the corresponding first pixel opening 401a, and the inner wall of the pixel opening is a plane or a curved surface (such as an arc surface), that is, in the inner wall on the same side of the pixel opening, the inner wall of the second pixel opening 402a and the inner wall of the corresponding first pixel opening 401a are located in the same plane, such a pixel opening process is short, thereby shortening the process of the display panel. The inner wall of the second pixel opening 402a refers to the side wall used to define the second pixel opening 402a in the second pixel definition layer 402, and the inner wall of the first pixel opening 401a refers to the side wall used to define the first pixel opening 401a in the first pixel definition layer 401. The inner wall of the first pixel opening 401a and the inner wall of the second pixel opening 402a can be a plane or a curved surface (such as a curved surface). Correspondingly, in the cross-sectional schematic diagram, the inner walls of the first pixel opening 401a and the second pixel opening 402a are represented as straight lines or curves (such as arcs).

[0118] In one embodiment, as shown in FIG. 5 , the display panel further includes an isolation structure 501, which is disposed on a side of the insulating layer 303 away from the substrate 301 and defines a plurality of isolation openings 501a; a portion of the first electrode 304a is exposed from the isolation openings 501a. The plurality of first electrodes 304a correspond to the plurality of isolation openings 501a one by one.

[0119] The isolation structure 501 can be disposed on the insulating layer 303 shown in FIG3 , or on the first pixel definition layer 401 shown in FIG4A or FIG4B , or on the second pixel definition layer 402 shown in FIG4C . FIG5 shows an example in which the isolation structure 501 is disposed on the second pixel definition layer 402 shown in FIG4C .

[0120] In the absence of the first pixel definition layer 401 and the second pixel definition layer 402, each isolation opening 501a exposes the corresponding first electrode 304a. Each isolation opening 501a exposing the corresponding first electrode 304a means that for each isolation opening 501a, the orthographic projection of the isolation opening 501a on the substrate 301 covers at least part of the orthographic projection of the corresponding first electrode 304a on the substrate 301.

[0121] In the case of only the first pixel definition layer 401 , the plurality of isolation openings 501 a correspond to the plurality of first pixel openings 401 a one-to-one and are interconnected.

[0122] In the case where both the first pixel definition layer 401 and the second pixel definition layer 402 are present, the plurality of isolation openings 501 a correspond to the plurality of second pixel definition layers 402 one by one and are interconnected.

[0123] In this embodiment, the isolation structure 501 refers to a structure that can isolate the light-emitting layers of adjacent sub-pixels when the light-emitting layers of the sub-pixels are evaporated. In the embodiment of the present application, by setting the isolation structure 501, the light-emitting layers of adjacent sub-pixels can be isolated when the light-emitting layers of the sub-pixels are evaporated, which is conducive to making sub-pixels through pixel patterning technology and getting rid of the constraints of FMM. In one example, the isolation structure 501 can be a single-layer structure, and in another example, the isolation structure 501 can also be a stacked structure.

[0124] In one embodiment, the orthographic projection of the isolation structure 501 on the substrate 301 is in a grid shape, so that the light-emitting layers of adjacent sub-pixels are isolated when the light-emitting layers of the sub-pixels are evaporated.

[0125] In one embodiment, as shown in FIG. 5 , the isolation structure 501 includes a first isolation portion 5011 and a second isolation portion 5012 stacked in a direction away from the substrate 301 , and the orthographic projection of the second isolation portion 5012 on the substrate 301 covers the orthographic projection of the first isolation portion 5011 on the substrate 301 .

[0126] The material of the second isolation portion 5012 includes metal, for example, the material of the second isolation portion is titanium or molybdenum.

[0127] The first isolation portion 5011 includes a conductive material. In one example, the materials constituting the first isolation portion 5011 are all conductive materials. In another example, the materials constituting the first isolation portion 5011 include an insulating material and a conductive material.

[0128] Specifically, the first isolation portion 5011 includes at least one metal layer. As shown in Figure 6, the first isolation portion 5011 includes a first metal layer 5011a and a second metal layer 5011b stacked in a direction away from the substrate 301, and the orthographic outer contour of the first metal layer 5011a on the substrate 301 is located outside the orthographic outer contour of the second metal layer 5011b on the substrate 301, wherein the material of the first metal layer 5011a includes molybdenum or titanium; the material of the second metal layer 5011b includes aluminum, copper or silver.

[0129] It can be understood that the first metal layer 5011a and the second metal layer 5011b in the second isolation part 5012 and the first isolation part 5011 form an I-shaped structure. By setting up three stacked metal layers, the resistance of the isolation structure 501 can be reduced, thereby reducing the power consumption of the display panel.

[0130] In one embodiment, as shown in FIG. 7 , a plurality of light-emitting functional materials 304b in the light-emitting layer are arranged one by one on a side of the plurality of first electrodes 304a away from the substrate 301; the display panel also includes a second electrode layer, which is arranged on a side of the light-emitting layer away from the substrate 301, and the second electrode layer includes a plurality of second electrodes 304c; the plurality of second electrodes 304c are arranged one by one on a side of the plurality of light-emitting functional materials 304b away from the substrate 301.

[0131] Each pair of stacked first electrode 304a, light-emitting functional material 304b and second electrode 304c constitutes a sub-pixel. Each sub-pixel is disposed in the isolation opening 501a, and the area to which the isolation opening 501a belongs is also referred to as a light-emitting area.

[0132] It is understood that the first electrode 304a can be an anode, and the second electrode 304c can be a cathode. The light-emitting layer includes at least a light-emitting functional material 304b, and may also include one or more of a hole injection layer (HIL), a hole transport layer (HTL), an electron injection layer (EIL), an electron transport layer (ETL), a hole blocking layer (HBL) and an electron blocking layer (EBL). Alternatively, the light-emitting layer may also be a stacked light-emitting layer, that is, including at least two light-emitting layers and a charge generation layer (CGL) located between each adjacent light-emitting layer.

[0133] In one example, each second electrode 304c is electrically connected to the first isolation portion 5011. Continuing to refer to FIG5 , the second electrode 304c includes a lap portion (not marked in the figure), which covers at least a portion of the side wall of the first isolation portion 5011. It can be understood that the second electrode 304c also includes a main body portion (not marked in the figure), which at least covers the light-emitting functional material 304b.

[0134] By making the overlapping portion cover the side wall of the first isolation portion 5011, the electrical connection resistance between the overlapping portion and the first isolation portion 5011 can be reduced, and the electrical connection resistance between the overlapping portion and the isolation structure 501 can be reduced, which is beneficial to improving display uniformity.

[0135] In one embodiment, as shown in FIG. 8 , the display panel further includes a plurality of packaging parts 801 , and the plurality of packaging parts 801 are disposed one by one correspondingly on a side of the second electrode 304 c away from the substrate 301 .

[0136] Optionally, the encapsulation part 801 may be a single-layer inorganic film layer or a multi-layer inorganic film layer, and the inorganic film layer may be a silicon oxide layer, a silicon nitride layer, etc. The encapsulation part 801 may also be a mixture of an organic film layer and an inorganic film layer. The encapsulation part 801 may prevent the sub-pixel from being corroded by water vapor.

[0137] In one embodiment, referring to FIGS. 9, 10 and 11, the display panel includes a first display area 90A and a second display area 90B, the first display area 90A and the second display area 90B are adjacent to each other, and the transmittance of the first display area 90A is less than the transmittance of the second display area 90B; the isolation structure 501 also includes a plurality of light-transmitting openings 901a; the isolation openings 501a are located in the first display area 90A and the second display area 90B, and the light-transmitting openings 901a are located in the second display area 90B.

[0138] FIG11 shows a cross-sectional schematic diagram of the second display area 90B, and the cross-sectional schematic diagram of the first display area 90A can be referred to as FIG5. The difference between the second display area 90B and the first display area 90A includes: a plurality of light-transmitting openings 901a are provided in the second display area 90B, wherein the light-transmitting openings 901a located in the second display area 90B are arranged alternately with the isolation openings 501a located in the second display area 90B.

[0139] By setting a light-transmitting opening 901a in the isolation structure 501, the area on the display panel where the light-transmitting opening 901a is set can be light-transmitting, so that the area on the display panel where the light-transmitting opening 901a is set can realize transparent display or under-screen recognition functions, such as fingerprint recognition, under-screen camera, etc.

[0140] In the above display panel embodiment, the positional relationship between the first pixel definition layer 401 and the plurality of via holes P is described, that is, the orthographic projection of the first pixel definition layer 401 on the substrate 301 covers the orthographic projection of the plurality of via holes P on the substrate. The following describes the positional relationship between the isolation structure 501, the isolation opening 501a, the light-transmitting opening 901a, and the plurality of via holes P, respectively, for a display panel having an isolation structure 501.

[0141] In one example, regardless of whether it is the isolation structure 501 in the first display area 90A or the isolation structure 501 in the second display area 90B, the orthographic projection of the isolation structure 501 on the substrate 301 covers the orthographic projections of multiple vias P on the substrate, taking the first display area 90A as an example, as shown in FIG12. In other words, each via P is located below the isolation structure 501.

[0142] In another example, regardless of whether it is the isolation opening 501a in the first display area 90A or the isolation opening 501a in the second display area 90B, the orthographic projection outer contour of each isolation opening 501a on the substrate 301 is located outside the orthographic projection outer contour of the corresponding via P on the substrate 301, as shown in Figures 5 and 11. In other words, each via P is located in the corresponding isolation opening area, that is, the light-emitting area.

[0143] In another example, for the light-transmitting opening 901a in the second display area 90B, the orthographic projection of the light-transmitting opening 901a on the substrate 301 covers the orthographic projection of the via P corresponding to at least one isolation opening 501a adjacent to the light-transmitting opening 901a on the substrate 301, as shown in FIGS. 13 and 14. In other words, each via P is located in the light-transmitting area. In FIG. 13, a via P corresponding to an isolation opening 501a adjacent to the light-transmitting opening 901a is shown, which is located in the light-transmitting area corresponding to the light-transmitting opening 901a. In FIG. 14, vias P corresponding to two isolation openings 501a adjacent to the light-transmitting opening 901a are shown, both of which are located in the light-transmitting area corresponding to the light-transmitting opening 901a.

[0144] When the via P is located in the light-transmitting area, the portion of the first electrode 304a corresponding to the via P will also be located in the light-transmitting area, that is, the orthographic projection of the light-transmitting opening 901a on the substrate 301, covering the partial orthographic projection of the first electrode 304a corresponding to at least one isolation opening 501a adjacent to the light-transmitting opening 901a on the substrate 301, as shown in Figures 13 and 14.

[0145] It should be noted that, for the via holes P at different positions as described above, a blocking portion 305 is provided on the side of the corresponding first electrode P away from the substrate 301, so as to avoid over-engraving of the via hole P when opening the sub-pixel hole and the light-transmitting hole.

[0146] In one embodiment, the light transmittance of the blocking portion 305 is greater than or equal to 50%. Specifically, the light transmittance of the blocking portion 305 can be 50%, 60%, 70%, 80%, 90%, 99%, and other specific values, as well as a range with any two of the above specific values ​​as endpoints. In this way, the light transmittance of the display panel can be guaranteed.

[0147] In one embodiment, the material of the blocking portion 305 includes a transparent conductive material, and the transparent conductive material includes a metal. In this way, while ensuring the light transmittance of the display panel, the etching resistance of the blocking portion can be improved, thereby protecting the via hole.

[0148] In one embodiment, as shown in FIG. 15 , the present application further provides a method for preparing a display panel, which can be used to prepare the display panel in the above display panel embodiment.

[0149] The method for preparing the display panel includes:

[0150] Step S1501, providing a substrate 301.

[0151] In step S1502 , an array film layer 302 is formed on one side of the substrate 301 , wherein the array film layer includes a signal line 302 a .

[0152] In step S1503 , an insulating layer 303 is formed on a side of the array film layer 302 facing away from the substrate 301 , wherein a plurality of via holes P are formed on the insulating layer 303 .

[0153] Step S1504, forming a first electrode layer on a side of the insulating layer 303 away from the substrate 301, wherein the first electrode layer includes a plurality of first electrodes connected to the signal line 302a through a plurality of vias P;

[0154] Step S1505, forming a light-emitting layer on a side of the first electrode layer away from the substrate 301;

[0155] Step S1506, forming a barrier layer containing metal elements on the side of the first electrode layer away from the substrate 301, wherein the barrier layer includes a plurality of barrier portions 305, and the orthographic projection of each barrier portion 305 on the substrate 301 covers at least part of the orthographic projection of the corresponding via P on the substrate 301.

[0156] In the present embodiment, a plurality of first electrodes 304a in the first electrode layer of the display panel are arranged corresponding to the signal line 302a through a plurality of via holes P, and a blocking layer containing metal elements is arranged on the side of the first electrode layer away from the substrate 301, and the orthographic projection of each blocking portion 305 in the blocking layer on the substrate 301 covers at least a portion of the orthographic projection of the corresponding via hole P on the substrate 301. In this way, after the first sub-pixel is prepared, when opening holes in the second sub-pixel area and the third sub-pixel area, the problem of dark pixel spots caused by over-engraving of the via hole P can be avoided due to the blocking effect of the blocking portion 305 on the via hole P, thereby improving the yield rate of the finished product of the display panel.

[0157] In one embodiment, the method further includes: forming an isolation structure 501 on a side of the insulating layer 303 away from the substrate 301; wherein the isolation structure 501 defines a plurality of isolation openings 501 a; and a portion of the first electrode 304 a is exposed from the isolation openings 501 a.

[0158] In one embodiment, the method further comprises:

[0159] A first pixel definition layer 401 is formed on the side of the first electrodes 304a away from the substrate 301. The first pixel definition layer 401 defines a plurality of first pixel openings 401a. The first pixel openings 401a are arranged corresponding to the first electrodes 304a, and each first pixel opening 401a exposes the corresponding first electrode 304a.

[0160] In this embodiment, by providing pixel openings on the first pixel definition layer 401 , it is convenient to provide pixels on the array substrate.

[0161] In one embodiment, a plurality of blocking portions 305 are formed on a side of the plurality of first electrodes 304a away from the substrate 301, including:

[0162] A first pixel definition layer 401 is formed on a side of the plurality of first electrodes 304 a away from the substrate 301 ;

[0163] A plurality of blocking portions 305 are formed on a side of the first pixel definition layer 401 away from the substrate 301;

[0164] A second pixel definition layer 402 is formed on the side of the plurality of blocking portions 305 away from the substrate 301 ; wherein the second pixel definition layer 402 defines a plurality of second pixel openings 402a , which are arranged corresponding to the plurality of first electrodes 304a , and each second pixel opening 402a exposes the corresponding first electrode 304a .

[0165] In one embodiment, the method further comprises:

[0166] An isolation structure 501 is formed on a side of the second pixel definition layer 402 facing away from the substrate 301 , wherein the isolation structure 501 defines a plurality of isolation openings 501 a ; and a plurality of first electrodes 304 a are disposed corresponding to the plurality of isolation openings 501 a .

[0167] In one embodiment, the present application provides a display device, which includes the display panel described in any of the above display panel embodiments.

[0168] The display device can be a laptop computer, a mobile phone, a wireless device, a personal digital assistant (PDA), a handheld or portable computer, a GPS receiver / navigator, a camera, an MP4 video player, a camcorder, a game console, a watch, a clock, a calculator, a television monitor, a flat-panel display, a computer monitor, a car display (e.g., an odometer display, etc.), a navigator, a cockpit controller and / or display, a display of a camera view (e.g., a display of a rearview camera in a vehicle), an electronic photo, an electronic billboard or sign, a projector, etc.

[0169] In the case of using “including”, “having”, and “comprising” described herein, another component may be added unless a clear limiting term such as “only”, “consisting of”, etc. is used. Unless mentioned otherwise, a term in the singular form may include a plural form and should not be understood as being one in number.

[0170] The technical features of the above embodiments may be combined arbitrarily. To make the description concise, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this application.

[0171] The above-described embodiments only express several implementation methods of the present application, and the descriptions thereof are relatively specific and detailed, but they cannot be understood as limiting the scope of the present application. It should be pointed out that, for a person of ordinary skill in the art, several variations and improvements can be made without departing from the concept of the present application, and these all belong to the protection scope of the present application. Therefore, the protection scope of the present application shall be subject to the attached claims.

Claims

1. A display panel, characterized in that: include: substrate; An array film layer is disposed on one side of the substrate, and the array film layer includes a signal line; An insulating layer, disposed on a side of the array film layer away from the substrate, and having a plurality of via holes; A first electrode layer, disposed on a side of the insulating layer away from the substrate, and comprising a plurality of first electrodes connected to the signal lines through the plurality of via holes; A light-emitting layer is disposed on a side of the first electrode layer away from the substrate; The barrier layer containing metal elements is arranged on the side of the first electrode layer away from the substrate and includes a plurality of barrier parts, wherein the orthographic projection of each barrier part on the substrate covers at least part of the orthographic projection of the corresponding via hole on the substrate.

2. The display panel according to claim 1, characterized in that: The display panel further includes an isolation structure, which is disposed on a side of the insulating layer away from the substrate and defines a plurality of isolation openings; a portion of the first electrode is exposed from the isolation openings; Optionally, the orthographic projection of the isolation structure on the substrate is in a grid shape; Optionally, the isolation structure comprises a first isolation portion and a second isolation portion stacked in a direction away from the substrate, and an orthographic projection of the second isolation portion on the substrate covers an orthographic projection of the first isolation portion on the substrate; Optionally, the first isolation portion comprises a conductive material; Optionally, the first isolation portion includes at least one metal layer; Optionally, the first isolation portion includes a first metal layer and a second metal layer stacked in a direction away from the substrate, and an orthographic projection outer contour of the first metal layer on the substrate is located outside an orthographic projection outer contour of the second metal layer on the substrate; Optionally, the material of the second isolation portion includes titanium or molybdenum; the material of the first metal layer includes molybdenum or titanium; and the material of the second metal layer includes aluminum or copper or silver.

3. The display panel according to claim 2, characterized in that: The orthographic projection of the isolation structure on the substrate covers the orthographic projections of the plurality of vias on the substrate.

4. The display panel according to claim 2, characterized in that: The orthographic projection outer contour of each isolation opening on the substrate is located at the periphery of the orthographic projection outer contour of the corresponding via hole on the substrate.

5. The display panel according to claim 2, characterized in that: The display panel includes a first display area and a second display area, the first display area and the second display area are adjacently arranged, and the light transmittance of the first display area is less than the light transmittance of the second display area; the isolation structure further includes a plurality of light-transmitting openings; the isolation openings are located in the first display area and the second display area, and the light-transmitting openings are located in the second display area; Optionally, the light-transmitting opening located in the second display area and the isolation opening located in the second display area are arranged at intervals; Optionally, the orthographic projection of the light-transmitting opening on the substrate covers a portion of the orthographic projection of the first electrode on the substrate corresponding to at least one of the isolation openings adjacent to the light-transmitting opening; Optionally, the orthographic projection of the light-transmitting opening on the substrate covers the orthographic projection of the via hole corresponding to at least one of the isolation openings adjacent to the light-transmitting opening on the substrate.

6. The display panel according to claim 1, characterized in that: The display panel further includes a first pixel definition layer; the first pixel definition layer is disposed on a side of the plurality of first electrodes away from the substrate, and defines a plurality of first pixel openings, the plurality of first pixel openings are disposed corresponding to the plurality of first electrodes, and each of the first pixel openings exposes the corresponding first electrode; Optionally, the orthographic projection of the first pixel definition layer on the substrate covers the orthographic projection of the plurality of vias on the substrate.

7. The display panel according to claim 6, characterized in that: Each of the blocking portions is disposed on a side of the first pixel definition layer away from the substrate.

8. The display panel according to claim 6, characterized in that: Each of the blocking parts is disposed on a side of the first pixel definition layer close to the substrate; Optionally, each of the blocking portions is in contact with the corresponding first electrode.

9. The display panel according to claim 6, characterized in that: The display panel further includes a second pixel definition layer; the second pixel definition layer is disposed on a side of the first pixel definition layer away from the substrate and defines a plurality of second pixel openings, the plurality of second pixel openings are disposed corresponding to the plurality of first electrodes, and each second pixel opening exposes the corresponding first electrode; Optionally, the orthographic projection of the second pixel definition layer on the substrate covers the orthographic projections of the plurality of blocking portions on the substrate; Optionally, the second pixel definition layer and the first pixel definition layer are made of the same material; Optionally, the orthographic projection of the second pixel definition layer on the substrate is located within the orthographic projection of the first pixel definition layer on the substrate; Optionally, an orthographic projection of a surface of the first pixel definition layer on a side facing away from the substrate on the substrate coincides with an orthographic projection of the second pixel definition layer on the substrate; Optionally, an orthographic projection of a surface of the second pixel definition layer on a side facing away from the substrate on the substrate is located within an orthographic projection of a surface of the second pixel definition layer on a side close to the substrate on the substrate; Optionally, an orthographic projection of a surface of the first pixel definition layer on a side facing away from the substrate on the substrate is located within an orthographic projection of a surface of the first pixel definition layer on a side close to the substrate on the substrate; Optionally, the multiple second pixel openings are connected to the multiple first pixel openings in a one-to-one correspondence to form multiple pixel openings, and the inner walls of the second pixel openings are connected to the inner walls of the corresponding first pixel openings, and the inner walls of the pixel openings are flat or curved.

10. The display panel according to claim 2, characterized in that: The light-emitting layer comprises a plurality of light-emitting functional materials, and the plurality of light-emitting functional materials are arranged one by one on a side of the plurality of first electrodes away from the substrate; Optionally, the display panel further includes a second electrode layer, and the second electrode layer is arranged on a side of the light-emitting layer away from the substrate; Optionally, the second electrode layer includes a plurality of second electrodes; the plurality of second electrodes are arranged one by one correspondingly on a side of the plurality of light-emitting functional materials away from the substrate; Optionally, each of the second electrodes is electrically connected to the first isolation portion.

11. The display panel according to claim 10, characterized in that: The display panel further includes a plurality of packaging parts, and the plurality of packaging parts are arranged one by one correspondingly on a side of the second electrode away from the substrate.

12. The display panel according to claim 1, characterized in that: The light transmittance of the blocking portion is greater than or equal to 50%; Optionally, the material of the blocking portion includes a transparent conductive material; Optionally, the material of the barrier portion includes metal oxide.

13. A method for preparing a display panel, characterized in that: include: providing a substrate; forming an array film layer on one side of the substrate, wherein the array film layer includes a signal line; forming an insulating layer on a side of the array film layer facing away from the substrate, wherein the insulating layer is provided with a plurality of via holes; forming a first electrode layer on a side of the insulating layer away from the substrate, wherein the first electrode layer includes a plurality of first electrodes connected to the signal line through the plurality of via holes; forming a light-emitting layer on a side of the first electrode layer away from the substrate; A barrier layer containing metal elements is formed on a side of the first electrode layer facing away from the substrate, wherein the barrier layer includes a plurality of barrier portions, and an orthographic projection of each barrier portion on the substrate covers at least a portion of an orthographic projection of a corresponding via hole on the substrate.

14. The preparation method according to claim 13, characterized in that: The method further comprises: An isolation structure is formed on a side of the insulating layer away from the substrate; wherein the isolation structure defines a plurality of isolation openings; and a portion of the first electrode is exposed from the isolation openings.

15. A display device, characterized in that: Comprising the display panel as claimed in any one of claims 1 to 12.

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