Display device and manufacturing method thereof

Abstract

The invention relates to a display device and a manufacturing method thereof. A display device according to the present invention includes: a substrate including a plurality of sub-pixels and a contact unit; at least one transistor disposed in each of the sub-pixels; a light emitting device disposed in each of the sub-pixels, the light emitting device including a first electrode, an organic layer, and a second electrode; an auxiliary electrode provided in the contact unit to supply a voltage to the light emitting device; and a barrier layer over the auxiliary electrode to block moisture from the outside; wherein the barrier layer includes a first pattern made of an orthogonal material and a second pattern on the first pattern, and wherein a width of the barrier layer is smaller than a width of the auxiliary electrode such that the auxiliary electrode extends to an outside of at least one side of the barrier layer, and the auxiliary electrode is exposed to the outside, and wherein the second electrode extends from the sub-pixel to the barrier layer, the second electrode is formed on both sides of the barrier layer and the exposed region of the auxiliary electrode.

Description

Technical Field

[0001] The present invention relates to a display device and a method for manufacturing the same, and more particularly, for example but not limited to, to a display device and a method for manufacturing the same for reducing or preventing lateral leakage current and moisture penetration. Background Art

[0002] With the development of information technology, various types of small and thin display devices have been proposed, such as liquid crystal display devices, organic light emitting display devices, plasma display devices, micro LED display devices, etc. These display devices are applied to various electronic devices, such as smart phones, tablet PCs, laptops, navigation devices, cameras, multimedia players, game consoles, etc.

[0003] A display element including an organic light emitting layer and various electrodes is formed inside the display device.

[0004] The descriptions provided in the background section should not be considered as prior art merely because they are mentioned in or related to the background section.The background section may include information describing one or more aspects of the subject technology. Summary of the invention

[0005] In the display device, there is a limitation in that when moisture from the outside penetrates into the display device, the electrode is corroded and the organic light emitting layer is degraded.

[0006] In addition, recently, high-resolution display devices are manufactured by reducing or minimizing the distance between sub-pixels. However, in this case, as the distance between adjacent sub-pixels decreases, lateral leakage current flows between adjacent sub-pixels, and the lateral leakage current causes undesirable light emission from the sub-pixels.

[0007] An object of the present invention is to provide a display device and a manufacturing method thereof capable of preventing lateral leakage current and moisture penetration.

[0008] Another object of the present invention is to provide a display device and a manufacturing method capable of simplifying the manufacturing process.

[0009] A display device according to the present invention includes: a substrate, which includes a plurality of sub-pixels and a contact unit; at least one transistor, which is arranged in each sub-pixel; a light-emitting device, which is arranged in each sub-pixel, and the light-emitting device includes a first electrode, an organic layer, and a second electrode; an auxiliary electrode, which is arranged in the contact unit to provide a voltage to the light-emitting device; and a blocking layer, which is located on the auxiliary electrode to block moisture from the outside; wherein the blocking layer includes a first pattern made of an orthogonal material and a second pattern located on the first pattern, wherein the width of the blocking layer is smaller than the width of the auxiliary electrode, so that the auxiliary electrode extends to the outside of at least one side of the blocking layer, and the auxiliary electrode is exposed to the outside, and wherein the second electrode extends from the sub-pixel to the blocking layer, so that the second electrode is formed on both sides of the blocking layer and on the exposed area of ​​the auxiliary electrode.

[0010] The first pattern is formed of a fluorine-containing polymer material containing a large amount of fluorine (F) in the functional group while carbon-carbon bonds are continuously formed in a chain structure. In addition, the first pattern has hydrophobicity and oleophobicity. The second pattern is formed of a photoresist.

[0011] The first insulating layer covers the transistor, and the bank layer is disposed between the plurality of sub-pixels over the first insulating layer. The transistor includes: a semiconductor layer located over the substrate; a second insulating layer covering the semiconductor layer; a gate located on the second insulating layer; a third insulating layer covering the gate; and a source and a drain located on the third insulating layer.

[0012] An opening from which the bank layer and the third insulating layer are removed is formed in the contact unit, and an auxiliary electrode is disposed in the opening. The auxiliary electrode is formed of the same material as the source and drain electrodes.

[0013] The disconnection unit is located above the bank layer on one side of the sub-pixel to disconnect the second electrode between adjacent sub-pixels. The disconnection unit includes: a first disconnection layer, which is arranged on the bank layer; and a second disconnection layer, which is located on the first disconnection layer, wherein the width of the first disconnection layer is smaller than the width of the second disconnection layer, so that the disconnection unit is formed in an undercut shape. The first disconnection layer is formed of a fluorine-containing polymer material containing a large amount of fluorine (F) in the functionality while the carbon-carbon bonds are continuously formed in a chain structure, and the second disconnection layer is formed of a photoresist. The disconnection unit arranged on one side of the sub-pixel includes a plurality of disconnection units.

[0014] According to the present invention, a method for manufacturing a display device includes: providing a substrate including a plurality of sub-pixels and a contact unit; forming a transistor in each sub-pixel; forming an auxiliary electrode in the contact unit; forming a first electrode and an organic layer in each sub-pixel; depositing an orthogonal material and a photoresist over the entire area of ​​the substrate; developing the photoresist to form a photoresist pattern on the auxiliary electrode in the contact unit; over-etching the orthogonal material through the photoresist pattern to form a barrier layer in an undercut shape; heat-treating the barrier layer; and forming a second electrode over the entire area of ​​the substrate; wherein the second electrode is formed on both the side surface and the upper surface of the barrier layer, and is electrically connected to the auxiliary electrodes extending from the two side surfaces of the barrier layer.

[0015] An insulating layer is formed to cover the transistor, and a bank layer is formed between the sub-pixels over the insulating layer. An opening is formed to etch the insulating layer and the bank layer in the contact unit. An auxiliary electrode is formed in the opening.

[0016] A disconnection unit is formed above the bank layer. The disconnection unit includes a first disconnection layer formed of an orthogonal material and a second disconnection layer formed of a photoresist on the first disconnection layer. The disconnection unit and the barrier layer are formed simultaneously.

[0017] Forming an organic layer includes continuously depositing an orthogonal material and a photoresist over an entire area of ​​a substrate; removing the photoresist above a first electrode to form a photoresist pattern; etching the orthogonal material using the photoresist pattern as a mask; depositing an organic material over an entire area of ​​the substrate; and forming an organic layer in a plurality of sub-pixels by removing the orthogonal material to remove the photoresist pattern and the organic material above the orthogonal material.

[0018] It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory and are intended to provide further explanation of the inventive concepts as claimed. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] The accompanying drawings are included to provide a further understanding of the present disclosure and are incorporated into and constitute a part of this application. The accompanying drawings illustrate embodiments of the present disclosure and together with the description serve to explain the principles of the present disclosure. In the drawings:

[0020] Figure 1 is a schematic block diagram of an organic light emitting display device according to the present invention.

[0021] Figure 2 is a schematic block diagram of a sub-pixel of an organic light emitting display device according to the present invention.

[0022] Figure 3 is a circuit diagram conceptually illustrating a sub-pixel of an organic light emitting display device according to the present invention.

[0023] Figure 4 is a plan view showing a pixel of a display device according to a first exemplary embodiment of the present invention.

[0024] FIG. 5A to FIG. 5C is a plan view showing another structure of a pixel of the display device according to the first exemplary embodiment of the present invention.

[0025] Figure 6 is a cross-sectional view showing a structure of a sub-pixel of a display device according to a first exemplary embodiment of the present invention.

[0026] Figure 7 is a cross-sectional view showing a structure of a sub-pixel of a display device according to a second exemplary embodiment of the present invention.

[0027] Fig. 8A and Figure 8B is a plan view of a display device according to a third exemplary embodiment of the present invention.

[0028] Fig. 9 is a cross-sectional view of a display device according to a third exemplary embodiment of the present invention.

[0029] FIG. 10A to FIG. 10M is a view showing a method of manufacturing a display device according to the present invention.

[0030] Throughout the drawings and detailed description, unless otherwise described, the same drawing reference numerals should be understood to refer to the same elements, features, and structures. The relative sizes and descriptions of these elements may be exaggerated for clarity, illustration, and convenience. DETAILED DESCRIPTION

[0031] Reference will now be made in detail to embodiments of the present disclosure, examples of which may be illustrated in the accompanying drawings. The described progression of processing steps and / or operations is by way of example only; however, the order of steps and / or operations is not limited to that set forth herein and may be varied as is known in the art, except for steps and / or operations that must occur in a particular order. The names of the various elements used in the following description may have been selected solely for ease of writing the specification and may therefore differ from the names used in the actual product.

[0032] According to the embodiments described in detail below with reference to the accompanying drawings, the advantages and features of the present disclosure and the methods for achieving the advantages and features will become clear. However, the present disclosure can be implemented in many different forms and should not be interpreted as being limited to the embodiments set forth herein, and these embodiments are provided to make the present disclosure thorough and complete, and to fully convey the scope of the present disclosure to those skilled in the art to which the present disclosure belongs, and the present disclosure is limited only by the scope of the appended claims.

[0033] The shapes, sizes, dimensions (e.g., length, width, height, thickness, radius, diameter, area, etc.), ratios, angles, the number of elements, etc. disclosed in the drawings for describing the embodiments of the present disclosure are illustrative, and therefore the present disclosure is not limited to the contents shown. Throughout the present disclosure, the same reference numerals represent the same components. In addition, in the following description of the present disclosure, when the detailed description of the known related art is determined to be unnecessary to obscure the main points of the present disclosure, its detailed description will be omitted herein. When using terms such as "including", "having", "comprising", etc. mentioned in the present disclosure, other components may be added unless the term "only" is used in this article. When a component is represented as a singular, unless otherwise specified, the case where the component is plural is also included.

[0034] When analyzing components, margins of error are interpreted as included even when not explicitly described.

[0035] When describing a positional relationship, for example, when the positional relationship of two components is described as "on," "above," "below," "close to," etc., unless "immediately" or "directly" is used, one or more other components may be located between the two components.

[0036] When describing a temporal relationship, for example, when the temporal sequence is described as "after", "subsequently", "next", "before", etc., non-continuous situations may also be included unless "immediately" or "directly" is used.

[0037] Spatially relative terms such as "below," "below," "lower," "above," "upper," etc., may be used to describe the relationships between various elements (e.g., layers, films, regions, components, parts, etc.) as shown in the accompanying drawings. Spatially relative terms should be understood to include terms for different orientations of elements in use or operation in addition to the orientations depicted in the accompanying drawings. For example, if the elements shown in the accompanying drawings are flipped, the elements described as being "below" or "below" other elements should be oriented "above" the other elements. Therefore, the term "below" as an exemplary term can include all directions of "above" and "below." Similarly, the exemplary terms "above" or "up" can include both the directions of "above" and "below."

[0038] The term "or" means an inclusive or rather than an exclusive or. That is, unless otherwise specified or clear from the context, the statement "x uses a or b" means any of the natural inclusive arrangements. For example, "a or b" can mean "a", "b", or "a and b". For example, "a, b or c" can mean "a", "b", "c", "a and b", "b and c", "a and c", or "a, b, and c".

[0039] Although the terms first, second, etc. are used to describe various components, these components are not substantially limited by these terms. These terms are only used to distinguish one component from another component. Therefore, within the technical spirit of the present disclosure, the first component described below can be substantially the second component.

[0040] When describing the components of the present invention, terms such as first, second, A, B, (a), (b), etc. may be used. These terms are used only to distinguish an element from other elements, and the nature, order or number of the elements are not limited by these terms. When describing that a component is "coupled" or "connected" to another component, the one component may be directly coupled or connected to the other component, but may also be indirectly coupled or connected when not specifically stated. It should be understood that other components may be "interposed" between the components that are connected or capable of being connected.

[0041] Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as those generally understood by those of ordinary skill in the art to which the exemplary embodiments belong. It should also be understood that terms (e.g., terms defined in commonly used dictionaries) should be interpreted as having, for example, a meaning consistent with their meaning in the context of the relevant art, and should not be interpreted in an idealized or overly formal sense unless explicitly defined as such herein. As should be understood by those of ordinary skill in the art, for example, the term "component" or "unit" may be applied to, for example, a separate circuit or structure, an integrated circuit, a computing block of a circuit device, or any structure configured to perform the described function.

[0042] As those skilled in the art can fully understand, the features of the various embodiments of the present disclosure can be partially or entirely connected or combined with each other, and can interoperate with each other in various ways and be technically driven. The embodiments of the present disclosure can be implemented independently of each other, or can be implemented together in a mutually dependent relationship.

[0043] As used herein, the term "device" may include display devices including a display panel and a driving unit for driving the display panel, such as a liquid crystal module (LCM) and an organic light emitting display module (OLED module). In addition, the term "device" may also include a notebook computer, a television, a computer monitor, a vehicle electronic device including a device for a vehicle or other types of vehicles, and a complete set of electronic devices or complete sets of mobile electronic devices such as a smart phone or an electronic tablet, which are finished products (complete products or final products) including LCMs and OLED modules, etc.

[0044] Therefore, the device in the present invention may include: a display device itself such as an LCM, an OLED module, etc., an application product including an LCM, an OLED module, etc., or a complete set of devices as a device for an end user.

[0045] Hereinafter, the present disclosure will be described in detail with reference to the accompanying drawings.

[0046] The present invention can be applied to various display devices. For example, the display device of the present invention can be applied to various display devices such as organic light-emitting display devices, liquid crystal display devices, electrophoretic display devices, quantum dot display devices, micro-LED (light-emitting device) display devices, and mini LED display devices. However, in the following description, for the sake of convenience, the organic light-emitting display device is used as an example for description.

[0047] Hereinafter, the present invention will be described in detail with reference to the accompanying drawings.

[0048] Figure 1 is a schematic block diagram of an organic light emitting display device according to an exemplary embodiment of the present invention, and Figure 2 is a schematic block diagram of a sub-pixel of an organic light emitting display device according to an exemplary embodiment of the present invention.

[0049] like Figure 1 As shown, the organic light-emitting display device 100 includes an image processing unit 102, a timing control unit 104, a gate driving unit 106, a data driving unit 107, a power supply unit 108 and a display panel 109. The embodiment is not limited thereto. As an example, at least one of the above components may be omitted and / or one or more additional components may be further included.

[0050] The image processing unit 102 outputs image data provided from the outside and driving signals for driving various devices. For example, the driving signals from the image processing unit 102 may include a data enable signal, a vertical synchronization signal, a horizontal synchronization signal, a clock signal, and the like.

[0051] The image data and the driving signal are provided from the image processing unit 102 to the timing control unit 104. The timing control unit 104 writes and outputs a gate timing control signal GDC for controlling the driving timing of the gate driving unit 106 and a data timing control signal DDC for controlling the driving timing of the data driving unit 107 based on the driving signal from the image processing unit 102.

[0052] The gate drive unit 106 outputs a scan signal to the display panel 109 in response to the gate timing control signal GDC provided from the timing control unit 104. The gate drive unit 106 outputs the scan signal through a plurality of gate lines GL1 to GLm. In this case, the gate drive unit 106 may be formed in the form of an integrated circuit (IC), but is not limited thereto. The gate drive unit 106 includes various gate drive circuits, and the gate drive circuits may be directly formed on a substrate. In this case, the gate drive unit 106 may be a panel internal gate (GIP). The embodiment is not limited thereto. As an example, the gate drive unit 106 may be provided separately (e.g., provided on a separate panel), and then connected to the display panel 109 by a tape automated bonding (TAB) method, a chip on glass (COG) method, a chip on panel (COP) method, or a chip on film (COF) method, but is not limited thereto.

[0053] The data driving unit 107 outputs a data voltage to the display panel 109 in response to a data timing control signal DDC input from the timing control unit 104. The data driving unit 107 samples and latches the digital data signal DATA provided from the timing control unit 104 to convert it into an analog data voltage based on the gamma voltage. The data driving unit 107 outputs the data voltage through a plurality of data lines DL1 to DLn. In this case, the data driving unit 107 may be mounted on the upper surface of the display panel 109 in the form of an integrated circuit (IC), but is not limited thereto. As an example, the data driving unit 107 may be provided separately (e.g., provided on a separate panel), and then connected to the display panel 109 by a tape automated bonding (TAB) method, a chip on glass (COG) method, a chip on panel (COP) method, or a chip on film (COF) method, but is not limited thereto.

[0054] The power supply unit 108 outputs a high potential voltage VDD, a low potential voltage VSS, etc. to provide them to the display panel 109. The high potential voltage VDD is provided to the display panel 109 through the first power line EVDD, and the low potential voltage VSS is provided to the display panel 109 through the second power line EVSS. At this time, the voltage from the power supply unit 108 is applied to the data driving unit 107 or the gate driving unit 106 to drive them.

[0055] The display panel 109 displays an image based on the data voltage from the data driving unit 108 , the scan signal from the gate driving unit 106 , and the power from the power supply unit 108 .

[0056] The display panel 109 includes a plurality of sub-pixels SP to display an image. The sub-pixels SP may include red sub-pixels, green sub-pixels, and blue sub-pixels. In addition, the sub-pixels SP may include white sub-pixels, red sub-pixels, green sub-pixels, and blue sub-pixels. The white sub-pixels, red sub-pixels, green sub-pixels, and blue sub-pixels may be formed with the same area or may be formed with different areas. Embodiments are not limited thereto. As an example, sub-pixels of other colors such as cyan, magenta, yellow, etc. may be included alternatively or additionally.

[0057] like Figure 2 As shown, one sub-pixel SP can be connected to the gate line GL1, the data line DL1, the first power line EVDD and the second power line EVSS. According to the configuration of the pixel circuit, the sub-pixel SP may include a plurality of thin film transistors and a storage capacitor. For example, the sub-pixel SP may include two transistors and a capacitor (referred to as 2T1C), but is not limited thereto. The sub-pixel SP may be composed of 3T1C, 4T1C, 5T1C, 6T1C, 7T1C, 3T2C, 4T2C, 5T2C, 6T2C, 7T2, 8T2C, etc.

[0058] Figure 3 is a circuit diagram illustrating a sub-pixel SP of the organic light emitting display device 100 according to an exemplary embodiment of the present invention.

[0059] like Figure 3 As shown, the organic light emitting display device 100 according to the exemplary embodiment of the present invention includes gate lines GL, data lines DL and power lines PL that cross each other to define sub-pixels SP. A switching thin film transistor Ts, a driving thin film transistor Td, a storage capacitor Cst and a light emitting device D are provided in the sub-pixel SP.

[0060] The switching thin film transistor Ts is connected to the gate line GL and the data line DL, and the driving thin film transistor Td and the storage capacitor Cst are connected between the switching thin film transistor Ts and the power line PL. The light emitting device D is connected to the driving thin film transistor Td.

[0061] In the organic light emitting display device having such a structure, when the switching thin film transistor Ts is turned on according to the gate signal applied to the gate line GL, the data signal applied to the data line DL is applied to the gate of the driving thin film transistor Td and one electrode of the storage capacitor Cst through the switching thin film transistor Ts.

[0062] The driving thin film transistor Td is turned on according to the data signal applied to the gate. As a result, a current proportional to the data signal is supplied from the power line PL through the driving thin film transistor Td to the light emitting device D, and then the light emitting device D emits light at a brightness proportional to the current flowing through the driving thin film transistor Td.

[0063] At this time, the storage capacitor Cst is charged with a voltage proportional to the data signal to keep the voltage of the gate electrode of the driving thin film transistor Td constant for a certain period (eg, one frame).

[0064] In the drawings, only two thin film transistors Td and Ts and one capacitor Cst are provided, but the present invention is not limited thereto. Three or more thin film transistors and two or more capacitors may be provided in the present invention.

[0065] Figure 4 is a plan view schematically showing a pixel PIX of the display device 100 according to the first exemplary embodiment of the present invention.

[0066] The display device 100 according to the first exemplary embodiment of the present invention includes a plurality of pixels PIX. Figure 4 As shown, each pixel PIX may include a plurality of sub-pixels SP1, SP2, and SP3. For example, the first sub-pixel SP1 may be a green sub-pixel that emits green light, the second sub-pixel SP2 may be a red sub-pixel that emits red light, and the third sub-pixel SP3 may be a blue sub-pixel that emits blue light. However, it is not limited thereto, and the first sub-pixel SP1 may be a red sub-pixel or a blue sub-pixel, and the second sub-pixel SP2 may be a green sub-pixel or a blue sub-pixel. In addition, although it is shown that there are three sub-pixels in each pixel PIX, the embodiment is not limited thereto. As an example, there may be four or more sub-pixels in each pixel PIX. As an example, a white sub-pixel may also be included. As an example, at least two of the sub-pixels included in a pixel PIX may emit light of the same color. As an example, sub-pixels of other colors such as cyan, magenta, yellow, etc. may be included alternatively or additionally in a pixel PIX.

[0067] In the accompanying drawings, sub-pixels SP1, SP2 and SP3 may be configured in an S-striped manner, wherein the third sub-pixel SP3 is arranged vertically, and the first sub-pixel SP1 and the second sub-pixel SP2 are arranged in the horizontal direction. However, it is not limited thereto, and the sub-pixels SP1, SP2 and SP3 may be configured in various methods such as a stripe method, a delta method or a diamond method. As an example, the expression "vertically arranged" means that the length in the vertical direction is greater than the length in the horizontal direction. Similarly, the expression "arranged in the horizontal direction" means that the length in the horizontal direction is greater than the length in the vertical direction. Although each of the sub-pixels SP1, SP2 and SP3 is shown to have a rectangular shape, the embodiment is not limited thereto. As an example, at least one or each of the sub-pixels SP1, SP2 and SP3 may have various shapes such as a rectangle, a square, a diamond, an oval, an ellipse, a circle, a polygon, etc.

[0068] In the drawings, as an example, the area of ​​the first sub-pixel SP1 is centered, the area of ​​the second sub-pixel SP2 is the smallest, and the area of ​​the third sub-pixel SP3 is the largest. However, the areas of the first to third sub-pixels SP1, SP2, and SP3 may all be the same. Alternatively, as an example, the area of ​​the first sub-pixel SP1 may be the largest and the area of ​​the third sub-pixel SP3 may be the smallest. In the present invention, the first to third sub-pixels SP1, SP2, and SP3 may be formed to have various areas as needed.

[0069] A bank layer BNK is formed between the sub-pixels SP1, SP2, and SP3. The bank layer BNK is provided to partially or completely surround each of the sub-pixels SP1, SP2, and SP3 to separate the sub-pixels SP1, SP2, and SP3. As an example, a plurality of openings exposed to the outside are formed in the bank layer BNK, and the sub-pixels SP1, SP2, and SP3 are defined by each opening.

[0070] The bank layer BNK may be formed of a single layer, but may also be formed of a plurality of layers. For example, the bank layer BKN may be formed of a double-layer structure of a hydrophilic lower bank layer and a hydrophobic upper bank layer disposed on the hydrophilic lower bank layer. In this case, the width of the lower bank layer is wider than that of the upper bank layer, so that the lower bank layer and the upper bank layer have a step structure, but is not limited thereto.

[0071] The light emitting devices D1, D2, and D3 may be provided in each of the sub-pixels SP1, SP2, and SP3. For example, the first light emitting device D1 may be a green light emitting device emitting green light, the second light emitting device D2 may be a red light emitting device emitting red light, and the third light emitting device D3 may be a blue light emitting device emitting blue light. However, it is not limited thereto, and the first light emitting device D1 may be a red or blue light emitting device, the second light emitting device D2 may be a green or blue light emitting device, and the third light emitting device D3 may be a green or red light emitting device.

[0072] Although not shown in the figure, each of the light emitting devices D1, D2 and D3 may include a first electrode, a second electrode and an organic layer therebetween. The first electrode may be an anode. The first electrode is formed in each sub-pixel SP1, SP2 and SP3 and is electrically disconnected from the first electrode of the adjacent sub-pixel, but is not limited thereto. A data voltage may be applied to the first electrode from an external data driving unit.

[0073] The organic layer is formed in the sub-pixels SP1, SP2, and SP3 and may be separated from the organic layer of the adjacent sub-pixel, but is not limited thereto. In this case, for example, a green organic layer may be formed in the first sub-pixel SP1, a red organic layer may be formed in the second sub-pixel SP2, and a blue organic layer may be formed in the third sub-pixel SP3, but is not limited thereto.

[0074] Alternatively, the organic layer may be integrally formed in all the sub-pixels SP1, SP2, and SP3. In this case, the organic layer may be a white organic layer that emits white light.

[0075] The second electrode may be a cathode. The second electrode may be integrally formed in the entire display device 100, but is not limited thereto. A low potential voltage VSS may be provided to the second electrode from an external power source. As an example, the cathode may also be separately formed in each of the sub-pixels SP1, SP2, and SP3.

[0076] As an example, the auxiliary electrode AL may be disposed on one side of each sub-pixel SP1, SP2 and SP3, but is not limited thereto. As an example, the auxiliary electrode AL may be disposed on one side of at least some of the sub-pixels SP1, SP2 and SP3. As an example, the auxiliary electrode AL may be disposed on one side of at least one of the sub-pixels SP1, SP2 and SP3 in each pixel PIX. Although not shown in the figure, as an example, the auxiliary electrode AL may be electrically connected to the second power line and the second electrode of the sub-pixels SP1, SP2 and SP3. As an example, the low potential voltage VSS (i.e., the common voltage) is applied to the second electrode from the outside through the second power line and the auxiliary electrode AL. Embodiments are not limited thereto. As an example, the low potential voltage VSS (i.e., the common voltage) may be applied to the second electrode from the outside through the second power line without passing through the auxiliary electrode AL.

[0077] The auxiliary electrode AL is formed in each of the sub-pixels SP1 , SP2 , and SP3 for the following reason.

[0078] The second electrode is integrally formed in the entire area of ​​the display device 100. A low potential voltage is supplied to a set area of ​​the second electrode, and then a signal is transmitted to the entire area of ​​the second electrode. Therefore, depending on the position of the display device 100, the signal is delayed due to the resistance of the second electrode. In particular, in the case of a large-area display device, the signal is more severely delayed, making the brightness uneven depending on the position, and this uneven brightness is an important cause of poor image quality.

[0079] Since the auxiliary electrode AL is made of a metal having good conductivity to apply a uniform voltage to the second electrode disposed on the entire area of ​​the display device 100 , an image having uniform brightness is displayed on the entire area of ​​the display device 100 .

[0080] In the present invention, the auxiliary electrode AL is disposed corresponding to each of the subpixels SP1, SP2 and SP3, and a low potential voltage is applied to the second electrode disposed in the corresponding subpixels SP1, SP2 and SP3, so that defects caused by signal delay can be reduced or minimized.

[0081] As an example, the auxiliary electrode AL may be disposed under the bank layer BNK between adjacent sub-pixels SP1, SP2, and SP3, but is not limited thereto. As an example, as shown in the figure, the auxiliary electrode AL may be disposed under the bank layer BNK located on the right side of the sub-pixels SP1, SP2, and SP3. Embodiments are not limited thereto. As an example, the auxiliary electrode AL may be disposed on one side or more sides of each of the sub-pixels SP1, SP2, and SP3. As an example, the auxiliary electrode AL may be disposed on the same side or different sides of the sub-pixels SP1, SP2, and SP3.

[0082] The auxiliary electrode AL is used to reduce or prevent defects caused by signal delay by applying a low potential voltage to the second electrode without signal delay. Therefore, in the present invention, as long as the low potential voltage can be applied to the second electrode provided in each sub-pixel SP1, SP2 and SP3 through the auxiliary electrode AL, the auxiliary electrode AL can be provided at any position.

[0083] For example, Figure 5A As shown in the figure, the auxiliary electrode AL may be disposed under the bank layer BNK located on the left side of the first sub-pixel SP1 and the second sub-pixel SP2, and the auxiliary electrode AL may be disposed under the bank layer BNK located on the right side of the third sub-pixel SP3. Although not shown in the figure, the auxiliary electrode AL may be disposed under the bank layer BNK at the upper region and / or the lower region of the sub-pixels SP1, SP2, and SP3. As an example, the auxiliary electrode AL may be disposed at any layer below the bank layer BNK. For example, the auxiliary electrodes AL in the sub-pixels SP1, SP2, and SP3 may be disposed on the same layer or on different layers.

[0084] like Figure 5B As shown, for example, the auxiliary electrode AL may be disposed under the bank layer BNK to partially or completely surround the first sub-pixel SP1 and the second sub-pixel SP2, and the auxiliary electrode AL may be disposed under the bank layer BNK located on the right side of the third sub-pixel SP3. In addition, as an example, the auxiliary electrode AL may be disposed under the bank layer BNK to partially or completely surround each of the sub-pixels SP1, SP2, and SP3, or the auxiliary electrode AL may be disposed under the bank layer BNK surrounding the two sub-pixels and the bank layer BNK located on the right side of another sub-pixel SP.

[0085] like Figure 5C As shown, for example, the auxiliary electrode AL can be disposed under the bank layer BNK located at the left and upper regions of the first subpixel SP1, the auxiliary electrode AL can be disposed under the bank layer BNK located at the left and lower regions of the second subpixel SP2, and the auxiliary electrode AL can be disposed under the bank layer BNK located at the right side of the third subpixel SP3.

[0086] As described above, the auxiliary electrodes AL are formed at various locations to apply a low potential voltage to the second electrodes of the corresponding sub-pixels SP1 , SP2 , and SP3 , so that a uniform voltage can be provided to the entire area of ​​the display device 100 .

[0087] In the present invention, by reducing or minimizing the interval d between adjacent sub-pixels SP1, SP2, and SP3, high resolution can be achieved, and the aperture ratio of the sub-pixels SP1, SP2, and SP3 can be improved. To achieve this, in the present invention, the interval d between the sub-pixels SP1, SP2, and SP3 is reduced, but the current flow path between the adjacent sub-pixels SP1, SP2, and SP3 is blocked to reduce or minimize the lateral leakage current between the adjacent sub-pixels SP1, SP2, and SP3. In addition, in the present invention, by blocking moisture from penetrating between the adjacent sub-pixels SP1, SP2, and SP3, the degradation of the organic layer due to moisture can be reduced or minimized.

[0088] In the following, this will be explained in more detail.

[0089] Figure 6 is a cross-sectional view showing a sub-pixel structure of a display device 100 according to a first exemplary embodiment of the present invention, which is taken along Figure 4 At this time, although Figure 6 The structure of the third sub-pixel SP3 is shown in FIG. 1 , but the structures of the first sub-pixel SP1 and the second sub-pixel SP2 may be the same or similar.

[0090] like Figure 6 As shown, the buffer layer 142 is formed on the substrate 140. The substrate 140 may be made of a hard material such as glass, a plastic material, or any other inorganic material or organic material, but is not limited thereto. For example, the plastic material may include polyimide, polymethyl methacrylate, polyethylene terephthalate, polyether sulfone, and polycarbonate, but is not limited thereto. As an example, the substrate 140 may also be made of a flexible material.

[0091] When the substrate 140 is made of polyimide, the substrate 140 may be made of a single polyimide layer or a plurality of polyimide layers. As an example, an inorganic layer may be further provided between the plurality of polyimide layers, but is not limited thereto.

[0092] The buffer layer 142 may be formed in the entire region of the substrate 140 to enhance adhesion between the substrate 140 and the layers thereon. In addition, the buffer layer 142 may block various types of defects such as alkaline components flowing out of the substrate 140. In addition, the buffer layer 142 may delay diffusion of moisture or oxygen penetrating into the substrate 140.

[0093] The buffer layer 142 may be a single layer or a multilayer thereof made of silicon oxide (SiOx) or silicon nitride (SiNx), but is not limited thereto. When the buffer layer 142 is composed of multiple layers, SiOx and SiNx may be alternately formed, but is not limited thereto. The buffer layer 142 may be omitted based on the type and material of the substrate 140, the structure and type of the thin film transistor, etc.

[0094] The thin film transistor is formed on the buffer layer 142 in the display area AA. For ease of description, only the driving thin film transistor is shown among various thin film transistors that can be provided in the display area AA, but other thin film transistors such as a switching thin film transistor may also be included. In the drawings, a thin film transistor of a top gate structure is shown, but the thin film transistor is not limited to this structure and may be formed in other structures such as a thin film transistor of a bottom gate structure.

[0095] The thin film transistor includes a semiconductor layer 112 disposed on a buffer layer 142 , a gate insulating layer 144 covering the semiconductor layer 112 , a gate 114 located on the gate insulating layer 144 , an interlayer insulating layer 146 covering the gate 114 , and a source 115 and a drain 116 located on the interlayer insulating layer 146 .

[0096] The semiconductor layer 112 may be made of a semiconductor such as a polycrystalline semiconductor, an oxide semiconductor, an amorphous semiconductor, a compound semiconductor, and an organic semiconductor. As an example, the semiconductor layer 112 may be made of a polycrystalline semiconductor. For example, the polycrystalline semiconductor may be made of low temperature polycrystalline silicon (LTPS) having high mobility, but is not limited thereto.

[0097] As an example, the semiconductor layer 112 may be made of an oxide semiconductor. For example, the semiconductor layer 112 may be made of one of indium gallium zinc oxide (IGZO), indium zinc oxide (IZO), indium gallium tin oxide (IGTO), and indium gallium oxide (IGO), but is not limited thereto. The semiconductor layer 112 includes a channel region 112a located in the middle region and a source region 112b and a drain region 112c as doping layers located on both sides of the channel region 112a.

[0098] The gate insulating layer 144 may be formed in the display area AA and the non-display area NA, or may be formed only in the display area AA, or may be patterned for the semiconductor layer 112 of each thin film transistor, but is not limited thereto. The gate insulating layer 144 may be composed of a single layer or multiple layers made of an inorganic material such as SiOx or SiNx, but is not limited thereto.

[0099] The gate 114 is made of metal. For example, the gate 114 may be made of a single layer or multiple layers made of one or an alloy of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu), but is not limited thereto.

[0100] The interlayer insulating layer 146 may be formed in the display area AA and the non-display area NA, or the interlayer insulating layer 146 may be formed only in the display area AA. The interlayer insulating layer 146 may be made of an organic material such as photo-propylene, or the interlayer insulating layer 146 may be composed of a single layer or multiple layers made of an inorganic material such as SiOx or SiNx, but is not limited thereto. In addition, the interlayer insulating layer 146 may be composed of multiple layers of an organic material layer and an inorganic material layer, but is not limited thereto.

[0101] The source electrode 115 and the drain electrode 116 are composed of a single layer or multiple layers made of one or an alloy of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd) and copper (Cu), but are not limited thereto. The source electrode 115 and the drain electrode 116 can contact the source region 112b and the drain region 112c of the semiconductor layer 112 through contact holes formed in the gate insulating layer 144 and the interlayer insulating layer 146, respectively.

[0102] Although not shown in the figure, a bottom shield metal layer may be provided on the substrate 140 below the semiconductor layer 112. The bottom shield metal layer reduces or minimizes a backchannel phenomenon caused by charges trapped in the substrate 140 to reduce or prevent residual images or degradation of transistor performance. The bottom shield metal layer may be composed of a single layer or multiple layers made of titanium (Ti), molybdenum (Mo) or an alloy thereof, but is not limited thereto. As an example, the bottom shield metal layer may be omitted according to the design.

[0103] The planarization layer 148 is formed on the substrate provided with the thin film transistor T. The planarization layer 148 may be formed of an organic material such as photo-acryl, but is not limited thereto. As an example, the planarization layer 148 may include a plurality of layers including an inorganic layer and / or an organic layer.

[0104] The light emitting device D is disposed on the planarization layer 148. The light emitting device D includes a first electrode 132, an organic layer 134, and a second electrode 136.

[0105] The first electrode 132 is disposed on the planarization layer 148 and is electrically connected to the drain electrode 116 of the thin film transistor through a contact hole formed in the planarization layer 148. As an example, the first electrode 132 may be formed of at least one of silver (Ag), aluminum (Al), gold (Au), molybdenum (Mo), tungsten (W), chromium (Cr), or an alloy thereof, but is not limited thereto. Alternatively, as an example, the first electrode 132 may be formed of a transparent metal oxide material such as indium tin oxide (ITO) or indium zinc oxide (IZO), but is not limited thereto.

[0106] When the display device 100 is a top-emitting display device, as an example, the first electrode 132 may also include an opaque conductive material layer used as a reflective electrode for reflecting light, but is not limited thereto. When the display device 100 is a bottom-emitting display device, the first electrode 132 may be made of a transparent conductive material such as ITO or IZO.

[0107] A bank layer BNK is formed at a boundary between sub-pixels on the planarization layer 148. The bank layer BNK may be a barrier wall defining the sub-pixels. The bank layer BNK divides each sub-pixel to reduce or prevent light of a specific color output from adjacent pixels from being mixed and output.

[0108] As an example, the bank layer BNK may be made of at least one of an inorganic insulating material such as SiNx or SiOx, an organic insulating material such as benzocyclobutene, acrylic resin, epoxy resin, phenolic resin, polyamide resin, or a photosensitizer including a black pigment, but is not limited thereto.

[0109] As an example, the organic layer 134 may be formed on the upper surface of the first electrode 132, the inclined surface of the bank layer BNK, and / or a partial area of ​​the upper surface of the bank layer BNK. The organic layer 134 is formed in the R, G, and B sub-pixels, and may include an R light emitting layer for emitting red light, a G light emitting layer for emitting green light, and a B light emitting layer for emitting blue light. For example, the organic layer 134 may include an organic light emitting layer, an inorganic light emitting layer, a nano-sized material layer, a quantum dot layer, a micro LED light emitting layer, or a mini LED light emitting layer, but is not limited thereto.

[0110] The organic layer 134 may further include an electron injection layer for injecting electrons into the light-emitting layer, a hole injection layer for injecting holes into the light-emitting layer, an electron transport layer for transporting the injected electrons to the light-emitting layer, a hole transport layer for transporting the injected holes to the light-emitting layer, an electron blocking layer, and a hole blocking layer, but is not limited thereto. As an example, at least one or all of the electron injection layer, the hole injection layer, the electron transport layer, the hole transport layer, the electron blocking layer, and the hole blocking layer may be omitted.

[0111] As an example, the second electrode 136 is disposed on the organic layer 134 and may be composed of a single layer or multiple layers made of metal or its alloy, but is not limited thereto. Alternatively, as an example, the second electrode 136 may be made of a transparent metal oxide material such as ITO or IZO, but is not limited thereto.

[0112] When the display device 100 is a top emission type, the second electrode 136 may be made of a translucent conductive material that transmits light. For example, the second electrode 136 may be made of at least one or more of alloys such as LiF / Al, CsF / Al, Mg:Ag, Ca / Ag, Ca:Ag, LiF / Mg:Ag, LiF / Ca / Ag, or LiF / Ca:Ag, but is not limited thereto.

[0113] When the display device 100 is a bottom emission type, the second electrode 136 may be a reflective electrode made of an opaque conductive material, but is not limited thereto. For example, the second electrode 136 may be made of at least one or more of silver (Ag), aluminum (Al), gold (Au), molybdenum (Mo), tungsten (W), chromium (Cr), or an alloy thereof, but is not limited thereto.

[0114] Alternatively, the light-emitting device D may be formed into a series structure. The series structure may include a plurality of organic light-emitting layers and a charge generation layer disposed between the organic light-emitting layers. The charge generation layer is configured to adjust the charge balance between the plurality of organic light-emitting layers, and may be formed of a plurality of layers including a first charge generation layer and a second charge generation layer, but is not limited thereto. The charge generation layer may include an N-type charge generation layer and a P-type charge generation layer. In this case, the charge generation layer may be formed of an organic layer doped with an alkali metal such as Li, Na, K, or CS, or an alkaline earth metal such as Mg, Sr, Ba, or Ra, but is not limited thereto.

[0115] As an example, the first electrode 132 and the organic layer 134 are provided in each sub-pixel and are disconnected from the first electrode 132 and the organic layer 134 of the adjacent sub-pixel, and the second electrode 136 is integrally formed in the entire area of ​​the display device 100, but is not limited thereto. Therefore, a corresponding data voltage (i.e., a pixel voltage) may be applied to the first electrode 132 of each sub-pixel, and a low potential voltage (i.e., a common voltage) may be applied to the second electrode 136 formed in all sub-pixels.

[0116] As an example, the auxiliary electrode AL may be disposed on the interlayer insulating layer 146 below the bank layer BNK, but is not limited thereto. The planarization layer 148 and the bank layer BNK on the auxiliary electrode AL are removed to form an opening OPEN, and the auxiliary electrode AL is exposed to the outside through the opening OPEN. The auxiliary electrode AL exposed to the outside is electrically connected to the second electrode 136 through the opening OPEN. As described above, since the auxiliary electrode AL is formed in each sub-pixel in the present invention and the auxiliary electrode AL is electrically connected to the second electrode 136, even in a large-area display device 100, a common voltage can be applied to the second electrode 136 without or with less signal delay.

[0117] As an example, a barrier layer 172 is formed on the auxiliary electrode AL. At this time, since the width of the barrier layer 172 is smaller than the width of the auxiliary electrode AL, the auxiliary electrode AL extends to both sides of the barrier layer 172, and the extended area is exposed to the outside. The second electrode 136 extends from the light emitting device D to the top surface and the side surface of the barrier layer 172, so that the second electrode 136 is formed on the surface of the exposed area of ​​the auxiliary electrode AL located on both sides of the barrier layer 172, so that the second electrode 136 is electrically connected to the auxiliary electrode AL. The embodiment is not limited thereto. As an example, as long as the barrier layer 172 exposes a part of the auxiliary electrode AL, the size and shape of the barrier layer 172 are not limited. As an example, the width of the barrier layer 172 may be equal to or greater than the width of the auxiliary electrode AL. As an example, the barrier layer 172 may be offset relative to the auxiliary electrode AL. As an example, the barrier layer 172 may expose a side area of ​​the auxiliary electrode AL. As an example, the second electrode 136 may extend from the light emitting device D to the top surface and the side surface of the barrier layer 172, so that the second electrode 136 is formed on the surface of the exposed portion of the auxiliary electrode AL located on one side of the barrier layer 172.

[0118] As an example, the barrier layer 172 may include a first pattern 172a located on the auxiliary electrode AL and a second pattern 172b located on the first pattern 172a. At this time, the first pattern 172a may be made of a material having orthogonality, and the second pattern 172b may be made of a photoresist. As an example, the second pattern 172b may be omitted according to the design.

[0119] Orthogonality means that any two elements in a set have independent properties. Orthogonality means that different configurations formed inside the display device 100 have different properties. For example, because a certain layer inside the display device 100 has completely different properties from other layers, materials with orthogonality have little effect on other materials.

[0120] In addition, orthogonality can be understood as the property of two objects existing independently of each other. For example, a material with orthogonality can simultaneously have hydrophobicity with low affinity for water and oleophobicity with low affinity for oil.

[0121] Thus, since the first pattern 172a has orthogonality, chemical damage does not occur between the first pattern 172a and other layers, and other layers are not physically damaged when the first pattern 172a is patterned. In the present invention, as an orthogonal material, a fluorine-containing polymer material containing a large amount of fluorine (F) in a functional group while carbon-carbon bonds are continuously formed in a chain structure can be used, but is not limited thereto.

[0122] In addition, since the first pattern 172a has both hydrophobicity and oleophobicity, it can separate from or repel moisture. Therefore, the first pattern 172a can block moisture or oxygen from flowing into the sub-pixel.

[0123] As an example, the width of the lower surface of the second pattern 172b is the same as the width of the upper surface of the first pattern 172a, and the side surface of the second pattern 172b is formed in a tapered shape. Therefore, when the second electrode 136 is formed on the top surface and the side surface of the barrier layer 172, the second electrode 136 is not disconnected on the side surface of the second pattern 172b of the barrier layer 172. In this way, since the second electrode 136 is formed on the upper surface of the auxiliary electrode AL exposed to both sides of the barrier layer 172 and on the upper surface and the side surface of the barrier layer 172 without disconnection, the voltage from the outside through the auxiliary electrode AL can be provided to the second electrode 136 without delay or with less delay.

[0124] The lateral current between adjacent sub-pixels mainly leaks through the organic layer 134. In the present invention, the organic layer 134 is formed only in the corresponding sub-pixel and is disconnected from the organic layer formed in the adjacent sub-pixel, thereby blocking the path of the leakage current between the adjacent sub-pixels. Therefore, the lateral leakage current between the adjacent sub-pixels can be reduced or prevented.

[0125] In the present invention, since the flow path of the lateral leakage current between adjacent sub-pixels can be blocked, the lateral leakage current can be reduced or prevented even when the gap between adjacent sub-pixels is reduced or minimized. Therefore, by reducing or minimizing the gap between adjacent sub-pixels, the area of ​​the sub-pixel (i.e., the light-emitting area) can be increased or maximized, and high resolution can also be achieved.

[0126] Furthermore, in the present invention, since the first pattern 172a is made of an orthogonal material, it is possible to block moisture from penetrating into the corresponding sub-pixel, thereby reducing or preventing the light emitting device D from being degraded due to moisture.

[0127] Refer again Figure 6 , an encapsulation layer 180 is formed on the second electrode 136 of the light emitting device D. When the light emitting device D is exposed to impurities such as moisture or oxygen, a pixel shrinkage phenomenon in which the light emitting area is reduced or defects such as dark spots in the light emitting area may occur. In addition, moisture or oxygen that penetrates into the light emitting device D oxidizes the metal electrode. The encapsulation layer 180 blocks impurities such as oxygen and moisture from the outside to reduce or prevent defects of the light emitting device D and various electrodes.

[0128] The encapsulation layer 180 may be formed of, but is not limited to, a first encapsulation layer 182, a second encapsulation layer 184, and a third encapsulation layer 186. The encapsulation layer 180 may be formed of two layers or four or more layers.

[0129] The first encapsulation layer 182 and the third encapsulation layer 186 may be made of an inorganic material such as SiOx or SiNx, but are not limited thereto. The second encapsulation layer 184 may be made of an organic insulating material such as acrylic resin, epoxy resin, polyimide, polyethylene, or silicon oxycarbide (SiOC), but are not limited thereto. In addition, the third encapsulation layer 186 may be made of a thin metal (face seal metal), but are not limited thereto.

[0130] Although not shown in the drawings, a touch member may be provided on the encapsulation layer 180. The touch member may detect external touch information using a user's finger or a touch pen. The touch member may be omitted according to design.

[0131] As described above, in the display device 100 according to the first exemplary embodiment of the present invention, the organic layer 134 emitting monochromatic light is formed in each sub-pixel, and the auxiliary electrode is formed between adjacent sub-pixels to supply a low potential voltage or a common voltage to the second electrode 136 of the light emitting device D. In addition, in the present invention, a blocking layer 172 having an orthogonal material (e.g., a fluorine-containing organic material) is formed on the auxiliary electrode between the sub-pixels.

[0132] Therefore, the display device 100 according to the first exemplary embodiment of the present invention can achieve the following effects.

[0133] First, in the present invention, an organic layer 134 emitting monochromatic light (e.g., an organic layer 134 emitting green light, red light, and blue light) is formed in each sub-pixel, respectively. Therefore, since the organic layer 134 is disconnected between adjacent sub-pixels, the current flow path between adjacent sub-pixels is eliminated, and as a result, lateral leakage current between adjacent sub-pixels can be reduced or prevented.

[0134] Second, in the present invention, since the auxiliary electrode AL is provided in each sub-pixel and the auxiliary electrode AL is electrically connected to the second electrode 136 of the corresponding sub-pixel to apply a low potential voltage to the second electrode 136, it is possible to reduce or prevent a signal delay or a voltage drop due to the resistance of the second electrode 136. In particular, since a signal delay or a voltage drop in the entire area of ​​the large-area display device 100 can be reduced or prevented, image quality degradation such as uneven brightness according to a position can be reduced or prevented.

[0135] Third, in the present invention, the barrier layer 172 is disposed on the auxiliary electrode AL, and the barrier layer 172 is formed of a first pattern 172a having orthogonality and a second pattern 172b located on the first pattern 172a. The material having orthogonality can simultaneously have hydrophobicity having low affinity for water and oleophobicity having low affinity for oil, thereby preventing moisture or oxygen from flowing into the sub-pixel.

[0136] Figure 7 is a cross-sectional view showing a structure of a sub-pixel of a display device 200 according to a second exemplary embodiment of the present invention. At this time, description of the same structure as the first exemplary embodiment will be omitted or simplified, and only different structures will be described in detail.

[0137] like Figure 7 As shown, in the display device 200 according to the second exemplary embodiment of the present invention, the thin film transistor T and the light emitting device D are disposed on a substrate 240 .

[0138] The thin film transistor T includes a semiconductor layer 212 disposed on the buffer layer 242 , a gate electrode 214 disposed on the gate insulating layer 244 , and a source electrode 215 and a drain electrode 216 disposed on the interlayer insulating layer 246 .

[0139] The light emitting device D includes a first electrode 232 and an organic layer 234 provided in each sub-pixel, and a second electrode 236 as a common layer formed in all sub-pixels.

[0140] The sub-pixels are separated by the bank layer BNK. The bank layer BNK and the planarization layer 248 between the sub-pixels are partially removed to form an opening OPEN, and an auxiliary electrode AL is formed on the interlayer insulating layer 246 within the opening OPEN.

[0141] In addition, a barrier layer 272 is formed on the auxiliary electrode AL. At this time, since the width of the barrier layer 272 is smaller than that of the auxiliary electrode AL, the auxiliary electrode AL extends to both sides of the barrier layer 272 and is exposed to the outside. Since the second electrode 236 provided in all sub-pixels extends within the opening OPEN, the second electrode 236 is formed on the exposed upper surface of the auxiliary electrode AL and the side surface and upper surface of the barrier layer 272, so that the second electrode 236 is electrically connected to the auxiliary electrode AL.

[0142] The barrier layer 272 includes a first pattern 272a and a second pattern 272b thereon. The first pattern 272a may be made of an orthogonal material (specifically, a fluorine-containing polymer material containing a large amount of fluorine (F) in the functional group while carbon-carbon bonds are continuously formed in a chain structure), but is not limited thereto. The second pattern 272b may be made of a photoresist.

[0143] In this exemplary embodiment, since the width of the first pattern 272a is greater than the width of the second pattern 272b, a step S is formed between the first pattern 272a and the second pattern 272b. Figure 6 In the display device 100 of the first exemplary embodiment shown, the first pattern 172a and the second pattern 172b have the same width at the interface therebetween, while in the display device 200 of this exemplary embodiment, at the interface between the first pattern 172a and the second pattern 172b, the width of the first pattern 272a is greater than the width of the second pattern 272b.

[0144] As an example, the width of the first pattern 172a of the display device 100 according to the first exemplary embodiment is smaller than the width of the first pattern 272a of the display device 200 according to the second exemplary embodiment. Since the first pattern 272a is made of an orthogonal material having a hydrophobicity with a low affinity for water and an oleophobicity with a low affinity for oil, it is able to block moisture or oxygen from penetrating into the sub-pixel. Specifically, the width of the first pattern 272a of the second exemplary embodiment is greater than the width of the first pattern 172a of the first exemplary embodiment, so that when moisture penetrates into the sub-pixel, the length of the moisture penetration path in the first pattern 272a is increased compared to the length of the moisture penetration path in the first pattern 172a. As a result, moisture and oxygen can be more effectively blocked.

[0145] Furthermore, in the second exemplary embodiment, since the step S is formed between the first pattern 272 a and the second pattern 272 b , when the second electrode 236 is formed on the side and upper surfaces of the barrier layer 270 , adhesion of the second electrode and the barrier layer 270 may be improved by the step S.

[0146] Refer again Figure 7, the encapsulation layer 280 is disposed on the second electrode 236. The encapsulation layer 280 may include a first encapsulation layer 282 and a third encapsulation layer 286 made of an inorganic material and a second encapsulation layer 284 made of an organic material disposed therebetween, but is not limited thereto.

[0147] Fig. 8A and Figure 8B is a plan view of a display device 300 according to a third exemplary embodiment of the present invention.

[0148] like Fig. 8A As shown, the display device 300 according to this exemplary embodiment includes a plurality of first to third sub-pixels SP1, SP2 and SP3. At this time, the first sub-pixel SP1 may be a green sub-pixel, the second sub-pixel SP2 may be a red sub-pixel, and the third sub-pixel SP3 may be a blue sub-pixel, but is not limited thereto.

[0149] Each of the plurality of first to third sub-pixels SP1, SP2 and SP3 is surrounded by a bank layer BNK to be separated from adjacent sub-pixels. An auxiliary electrode AL is disposed in an opening formed in the bank layer BNK and is electrically connected to the second electrodes of the light emitting devices D1, D2 and D3 of the corresponding sub-pixels SP1, SP2 and SP3.

[0150] In addition, a disconnection unit 390 is formed at one side of the auxiliary electrode AL on the bank layer BNK. The disconnection unit 390 disconnects the second electrodes of the light emitting devices D1, D2 and D3 to block moisture or oxygen from flowing into the subpixels SP1, SP2 and SP3 along the interface of the second electrodes.

[0151] In the figure, the disconnection unit 390 is arranged on one side of the sub-pixels SP1, SP2 and SP3, but is not limited thereto. The disconnection unit 390 may be arranged on both sides of the sub-pixels SP1, SP2 and SP3, or may be arranged at the upper and lower regions of the sub-pixels SP1, SP2 and SP3. In addition, the disconnection unit 390 may partially or completely surround the sub-pixels SP1, SP2 and SP3. Although it is shown that the disconnection unit 390 is arranged on the same side as the auxiliary electrode AL, the embodiment is not limited thereto. As an example, the disconnection unit 390 may be arranged on a different side from the auxiliary electrode AL. As an example, the disconnection unit 390 may have the same length or a different length from the auxiliary electrode AL.

[0152] As described above, in this exemplary embodiment, since impurities such as moisture and oxygen can be more effectively blocked from flowing into the subpixels SP1, SP2, and SP3 by the disconnection unit 390, degradation of the light emitting device caused by moisture or oxygen, etc. can be reduced or prevented.

[0153] Figure 8Bis a diagram showing another structure of a display device 300 according to a third exemplary embodiment of the present invention. Figure 8B As shown, in the display device 300 of such a structure, the disconnection unit 390 is disposed on one side of the sub-pixels SP1, SP2, and SP3. At this time, the disconnection unit includes a plurality of (e.g., two or more) disconnection units 390 spaced apart from each other at a predetermined distance or a varying distance, and disconnects a portion of the second electrodes of the light-emitting devices D1, D2, and D3. Therefore, moisture or oxygen is reduced or prevented from penetrating through the boundary of the second electrode. In addition, since the second electrode is electrically connected over the entire area through the area between the disconnection units 390, a uniform low potential voltage can be applied to the entire area.

[0154] Fig. 9 is a view specifically showing the structure of a display device 300 according to a third exemplary embodiment of the present invention, and is a view along Fig. 8A At this time, the cross-sectional view of the line II-II' will be omitted or simplified. Figure 6 The same structures as those of the first exemplary embodiment shown are described, and only different structures are described in detail.

[0155] like Fig. 9 As shown, in the display device 300 according to the third exemplary embodiment of the present invention, the thin film transistor T and the light emitting device D are disposed on a substrate 340 .

[0156] The thin film transistor T includes a semiconductor layer 312 disposed on the buffer layer 342 , a gate electrode 314 disposed on the gate insulating layer 344 , and a source electrode 315 and a drain electrode 316 disposed on the interlayer insulating layer 346 .

[0157] The light emitting device D includes a first electrode 332, an organic layer 334 provided in each sub-pixel, and a second electrode 336 as a common layer formed in all sub-pixels.

[0158] The sub-pixels are separated by the bank layer BNK. The bank layer BNK and the planarization layer 348 between the sub-pixels are partially removed to form an opening OPEN, and an auxiliary electrode AL is formed on the interlayer insulating layer 346 within the opening OPEN.

[0159] The barrier layer 372 is formed on the auxiliary electrode AL. At this time, since the width of the barrier layer 372 is smaller than the width of the auxiliary electrode AL, the auxiliary electrode AL extends to both sides of the barrier layer 372, and the extended area is exposed to the outside. The second electrode 336 formed in all sub-pixels extends to the inside of the opening OPEN, so that the second electrode 336 is formed on the upper surface of the auxiliary electrode AL exposed to the outside on both sides of the barrier layer 372 and on the side surface and upper surface of the barrier layer 372, so that the second electrode 336 is electrically connected to the auxiliary electrode AL.

[0160] The barrier layer 372 includes a first pattern 372a and a second pattern 372b thereon. The first pattern 372a may be made of an orthogonal material (specifically, a fluorine-containing polymer material containing a large amount of fluorine (F) in the functional group while carbon-carbon bonds are continuously formed in a chain structure), but is not limited thereto. The second pattern 272b may be made of a photoresist.

[0161] Since the first pattern 372a is made of an orthogonal material having hydrophobicity having a low affinity for water and oleophobicity having a low affinity for oil, it can block moisture or oxygen from penetrating into the sub-pixel.

[0162] The disconnection unit 390 is disposed on the bank layer BNK at one side of the barrier layer 372. As an example, the disconnection unit 390 may have an undercut shape. As an example, the disconnection unit 390 may include a first disconnection layer 391 and a second disconnection layer 392 located thereon, wherein the width of the upper surface of the first disconnection layer 391 is smaller than the width of the lower surface of the second disconnection layer 392, so that the disconnection unit 390 is formed in an undercut shape.

[0163] Therefore, when the second electrode 336 of the light-emitting device D is formed on the disconnection unit 390, due to the undercut shape, the second electrode 336 is disconnected in the disconnection unit 390, so that moisture or oxygen flowing into the sub-pixel along the interface of the second electrode 336 can be blocked by the disconnection area of ​​the second electrode 336.

[0164] As an example, the first disconnection layer 391 may be made of an orthogonal material (specifically, a fluorine-containing polymer material containing a large amount of fluorine (F) in the functional group while the carbon-carbon bonds are continuously formed in a chain structure), but is not limited thereto. The second disconnection layer 392 may be made of a photoresist. As an example, the second disconnection layer 392 may be omitted according to the design.

[0165] Refer again Fig. 9 , the encapsulation layer 380 is disposed on the second electrode 336 of the light emitting device D. The encapsulation layer 380 includes a first encapsulation layer 382 and a third encapsulation layer 386 made of an inorganic material and a second encapsulation layer 384 made of an organic material disposed therebetween.

[0166] When the encapsulation layer 380 is formed on the disconnection unit 390 , the adhesiveness of the encapsulation layer 380 may be reduced on the upper portion of the disconnection unit 390 due to the undercut shape of the disconnection unit 390 , and thus the encapsulation layer 380 may be peeled off.

[0167] like Figure 8BAs shown, when the disconnection unit includes a plurality of disconnection units 390 spaced apart from each other by a certain distance, the disconnection unit 390 reduces the area where the adhesion of the encapsulation layer 380 is reduced, thereby reducing the peeling phenomenon of the encapsulation layer 380. Figure 8B In the structure shown, the disconnection unit 390 can reduce or prevent the penetration of foreign matter such as moisture or oxygen, and reduce the peeling phenomenon of the encapsulation layer 380. As an example, the encapsulation layer 380 may have a height higher than the height of the disconnection unit 390. As an example, the disconnection unit 390 may be embedded in the second encapsulation layer 384. As an example, the upper surface of the disconnection unit 390 may be lower than the upper surface of the second encapsulation layer 384. As an example, the first encapsulation layer 382 may be disconnected at the disconnection unit 390.

[0168] Hereinafter, a method for manufacturing a display device according to the present invention will be described in detail with reference to the accompanying drawings. Fig. 9 The display device 300 of the shown structure is taken as an example.

[0169] Generally, an organic layer, which is a light-emitting layer of a display device, is formed by depositing an organic material on a plurality of sub-pixels using a fine metal mask made of a thin metal. However, when a metal mask is used, the center portion of the mask sags due to the weight of the metal. This sag becomes more serious especially when manufacturing a large-area display device. In addition, since it is difficult to form a metal mask into a fine pattern, there is a limitation in manufacturing a high-resolution display device.

[0170] In order to solve this problem, a method of forming an organic layer by a photoprocess has been proposed. The photoprocess includes a process of applying an organic material, a process of forming a photoresist layer on the organic material, a process of developing the photoresist, and a process of etching the organic material through a patterned photoresist pattern.

[0171] However, in such a photo process, there is a problem that the organic layer is degraded due to high temperature heat during a photoresist development process and damage caused by a developer.

[0172] In the present invention, by forming the organic layer using the lift-off method, damage to the organic layer by the developer or high-temperature heat can be reduced or prevented.

[0173] Hereinafter, a method for manufacturing a display device according to the present invention will be described in detail. Fig. 9 FIG. 1 is a diagram showing a method for manufacturing a display device 300 according to a third exemplary embodiment of the present invention.

[0174] Figure 10A-10M is a view illustrating a method of manufacturing the display device 300 according to an exemplary embodiment of the present invention.

[0175] First, if Fig. 10A As shown, a buffer layer 342 is formed on the entire substrate 340 including the first to third sub-pixels SP1, SP2 and SP3 and the contact unit CNT. As will be described in detail later, the contact unit CNT is the area where the second electrode of the light-emitting device contacts the auxiliary electrode. The contact unit CNT is substantially arranged on one side of each of the first to third sub-pixels SP1, SP2 and SP3, but for ease of explanation, it is only shown in the figure as being on one side of the third sub-pixel SP3. As an example, the contact unit CNT may be substantially arranged on one side or more sides of at least one of the first to third sub-pixels SP1, SP2 and SP3, but is not limited thereto. As an example, the contact unit CNT may not be arranged on any side of at least one of the first to third sub-pixels SP1, SP2 and SP3.

[0176] The substrate 340 may be made of a hard material such as glass or a plastic material including polyimide, polymethyl methacrylate, polyethylene terephthalate, polyethersulfone, and polycarbonate, or may be made of a flexible material.

[0177] The buffer layer 342 may be formed of a single layer or a multi-layer of SiNx or SiOx, but is not limited thereto.

[0178] Thereafter, a polycrystalline semiconductor material such as polysilicon or an oxide semiconductor material such as indium gallium zinc oxide (IGZO), indium zinc oxide (IZO), indium gallium tin oxide (IGTO), and indium gallium oxide (IGO) is deposited and etched to form a semiconductor layer 312 in each of the first to third sub-pixels SP1, SP2, and SP3. In addition, impurities are doped into both sides of the semiconductor layer 312 to form a channel region 312a, a source region 312b, and a drain region 312c.

[0179] Subsequently, a gate insulating layer 344 is formed by depositing an inorganic material such as SiOx or SiNx, and then a metal such as molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu) is deposited by a sputtering method, and etched, for example, by a wet etching method, to form a gate 314. Thereafter, an organic material such as a photo-acrylic material or an inorganic material such as SiNx or SiOx is deposited on the gate 314 to form an interlayer insulating layer 346, and then, the interlayer insulating layer 346 on the source region 312b and the drain region 312c of the semiconductor layer 312 is subjected to, for example, dry etching to form contact holes therein.

[0180] Subsequently, a metal such as Cr, Mo, Ta, Cu, Ti, Al or an Al alloy is deposited, for example, by a sputtering method, and is etched to form a source 315 and a drain 316 in each of the first to third sub-pixels SP1, SP2 and SP3 and to form an auxiliary electrode Al in the contact unit CNT, the source 315 and the drain 316 being in ohmic contact with the source region 312b and the drain region 312c of the semiconductor layer 312 through the contact hole, respectively. As an example, the auxiliary electrode AL may have the same material as the source 315 and the drain 316, or may have the same material as the gate 314, and / or may be formed in the same process as the source 315 and the drain 316 or the gate 314, but is not limited thereto. As an example, the auxiliary electrode AL may be formed separately and may include a material different from that of the source 315, the drain 316 or the gate 314.

[0181] Thereafter, a planarization layer 348 is formed by depositing an organic material such as photo propylene on the source electrode 315 and the drain electrode 316 , and then the planarization layer 348 on the drain electrode 316 is etched (eg, dry-etched) to form a contact hole.

[0182] Afterwards, if Fig. 10B As shown, as an example, a metal or a metal oxide is deposited on the planarization layer 348 by a sputtering method, and is etched by, for example, a wet etching method to form a first electrode 332 electrically connected to the drain 316 through a contact hole in each of the sub-pixels SP1, SP2, and SP3, and then an inorganic insulating material such as SiNx or SiOx, an organic material such as benzocyclobutene (BCB), an acrylic resin, an epoxy resin, a phenolic resin, a polyamide resin, and a polyimide resin, and at least one of a photoresist including a black pigment are deposited on the planarization layer 348 and the first electrode 332 in an edge region, and then, for example, dry etched to form a dam layer 352.

[0183] Afterwards, if Fig. 10C As shown, an orthogonal material (specifically a fluorine-containing polymer material containing a large amount of fluorine (F) in the functionality while carbon-carbon bonds are continuously formed in a chain structure) and a photoresist are continuously deposited to form a first orthogonal material layer 374 and a first photoresist layer 376 in the first to third sub-pixels SP1, SP2 and SP3 and the contact unit CNT.

[0184] Thereafter, the first photoresist layer 376 is developed using a photomask (not shown) to form a first photoresist pattern 376a from which the photoresist of the first sub-pixel SP1 is removed. Fig. 10DAs shown, the first orthogonal material layer 374 is etched using the first photoresist pattern 376a as a mask layer to form a first orthogonal material pattern 374a.

[0185] like Fig. 10E As shown, the first orthogonal material layer 374 is over-etched and a portion of the first orthogonal material layer 374 below the first photoresist pattern 376a is etched so that the upper first photoresist pattern 376a and the lower first orthogonal material pattern 374a form an undercut shape.

[0186] Thereafter, an organic light emitting material is applied onto the entire substrate 340 to form an organic material layer 334a. At this time, the organic material layer 334a is formed on the first photoresist pattern 376a and the planarization layer 348 of the first sub-pixel SP1 from which the photoresist has been removed.

[0187] Thereafter, when the first orthogonal material pattern 374a is removed by a lift-off method, the first photoresist pattern 376a and the organic material layer 334a on the first orthogonal material pattern 374a are removed, as shown in FIG. Fig.10F As shown, the organic layer 334 is formed only on the first electrode 332 of the first sub-pixel SP1.

[0188] As described above, in the manufacturing method according to the exemplary embodiment of the present invention, the orthogonal material layer 374 is formed and patterned, and then removed by the lift-off method to form the organic layer 334 , so that the following effects can be obtained.

[0189] Since the orthogonal material layer 374 has properties independent of other adjacent layers such as the planarization layer 348 or the first electrode 332, the orthogonal material layer 374 does not affect the planarization layer 348 or the first electrode 332 at all. Therefore, when the orthogonal material layer 374 is formed, chemical damage will not occur between the planarization layer 348 and the first electrode 332, and when the orthogonal material layer 374 is etched or removed, the planarization layer 348 and the first electrode 332 will not be damaged.

[0190] Then, if Figure 10G As shown, the second sub-pixel SP2 and the third sub-pixel SP3 are repeated. Figures 10C to 10E The organic layer 334 is formed on the first electrode 332 of the second sub-pixel SP2 and the third sub-pixel SP3 by a process.

[0191] Afterwards, if Fig. 10HAs shown, the bank layer BNK and the planarization layer 348 in the contact unit CNT are etched to form an opening OPEN for exposing the auxiliary electrode AL to the outside in the bank layer BNK and the planarization layer 348. Subsequently, a second orthogonal material layer 394 and a second photoresist layer 398 are formed in the first to third sub-pixels SP1, SP2, and SP3 and the contact unit CNT by depositing an orthogonal material (specifically, a fluorine-containing polymer material containing a large amount of fluorine (F) in the functional group while carbon-carbon bonds are continuously formed in a chain structure). At this time, the second orthogonal material layer 394 and the second photoresist layer 398 are formed on the auxiliary electrode AL in the opening OPEN in the organic layer 334, the bank layer (BNK) and the contact unit CNT of the first to third sub-pixels SP1, SP2, and SP3.

[0192] Subsequently, the second photoresist layer 398 is patterned, for example, by an exposure process, to form a second pattern 372b on the auxiliary electrode AL and a disconnection unit 390 on the bank layer BNK. Fig.10I shown.

[0193] Thereafter, the second orthogonal material layer 394 is etched using the second pattern 372b and the second disconnection layer 392 as a mask layer to form a first pattern 372a below the second pattern 372a and a first disconnection layer 391 below the second disconnection layer 392, as shown in FIG. Fig.10J As shown. The first disconnect layer 391 and the second disconnect layer 392 thereon form a disconnect unit 390. At this time, the second orthogonal material layer 394 below the second disconnect layer 392 is over-etched, and a portion of the second orthogonal material layer 394 below the second disconnect layer 392 is etched, so that the disconnect unit 390 is formed into an undercut shape, wherein at the interface between the first disconnect layer 391 and the second disconnect layer 392, the width of the first disconnect layer 391 is smaller than the width of the second disconnect layer 392.

[0194] The first pattern 372a and the second pattern 372b form a barrier layer 372. At this time, the second orthogonal material layer 394 under the second pattern 372b is over-etched, and a portion of the second orthogonal material layer 394 under the second pattern 372b is etched, so that the barrier layer 372 is formed in an undercut shape, wherein the width of the first pattern 372a is smaller than the width of the second pattern 372b at the interface between the first pattern 372a and the second pattern 372b.

[0195] In the present invention, the barrier layer 372 and the disconnection unit 390 are formed in different layers, but since the barrier layer 372 and the disconnection unit 390 are formed through one process, the manufacturing process can be simplified.

[0196] Then, if Figure 10KAs shown, heat is applied to the substrate 340, and the undercut shape can be changed by heat treatment. That is, the upper layer of the undercut shape melts, and then the width difference between the upper layer and the lower layer decreases, so that the widths of the upper layer and the lower layer of the undercut shape become substantially the same at the interface therebetween, thereby eliminating the undercut shape or the discontinuous boundary between the upper layer and the lower layer.

[0197] Specifically, in the present invention, since the heat treatment is performed on the substrate 340 side, high-temperature heat is applied to the barrier layer 372 relatively close to the substrate 340, and is not applied or less applied to the disconnection unit 390 relatively far from the substrate 340. Therefore, the barrier layer 372 does not maintain the undercut shape due to the heat treatment, while the disconnection unit 390 maintains the undercut shape.

[0198] In addition, since the width of the barrier layer 372 is smaller than the width of the auxiliary electrode AL disposed under the barrier layer 372 , the auxiliary electrode AL extends from both sides of the barrier layer 372 so that a portion of the auxiliary electrode AL is exposed to the outside through the opening OPEN.

[0199] Afterwards, if Fig.10L As shown, metal or metal oxide is deposited on the entire area of ​​the substrate 340 to form the second electrode 336. Since the side surface of the barrier layer 372 is formed in a straight line shape rather than an undercut shape, the second electrode 336 is formed in the opening OPEN, so that the second electrode 336 is not disconnected in the barrier layer 372, and is formed on both the side surface and the top surface of the barrier layer 372 to extend to the sub-pixels SP1, SP2 and SP3. At this time, since the auxiliary electrode AL is exposed on both sides of the barrier layer 372, the second electrode 336 formed in the opening OPEN is formed on the exposed auxiliary electrode AL. Therefore, the auxiliary electrode AL is electrically connected to the second electrode 336. At the same time, since the disconnection unit 390 is formed in an undercut shape, the second electrode 336 is disconnected by the undercut portion at the side surface of the disconnection unit 390.

[0200] Then, if Figure 10M As shown, an inorganic material is applied to the first to third sub-pixels SP1, SP2, and SP3 and the contact unit CNT to form a first encapsulation layer 382, ​​and an organic material is applied to the first encapsulation layer 382 to form a second encapsulation layer 384. Thereafter, an inorganic material is applied to the second encapsulation layer 384 to form a third encapsulation layer 386, thereby forming an encapsulation layer 380 to seal the display device 300.

[0201] As described above, in the method for manufacturing a display device according to the present invention, the orthogonal material layer and the photoresist layer are patterned, and an organic material is formed thereon, and then the orthogonal material layer, the photoresist layer and the organic material are removed by a stripping method to form an organic layer in a sub-pixel. Therefore, compared with a conventional process in which a plurality of organic materials are deposited using a thin metal mask, an organic layer having a uniform thickness can be formed over a large area, so that a large-area and high-resolution display device can be easily manufactured.

[0202] Furthermore, due to the characteristics of orthogonal materials, damage to underlying layers can be reduced or prevented compared to methods that directly etch organic layers through a photo process.

[0203] Meanwhile, in the present invention, an orthogonal material is used when forming an organic layer, a barrier layer, and a disconnecting unit, but the present invention is not limited to this process. In the present invention, an orthogonal material may be used only when forming a barrier layer and a disconnecting unit, and a metal mask may be used when forming an organic layer, or the organic layer may be directly etched by a photoprocess.

[0204] The above description and drawings are merely illustrations of the technical spirit of the present disclosure, and a person skilled in the art in the art to which the present disclosure belongs may combine the configurations within the scope of the essential features of the present disclosure, and may make various modifications or variations such as separation, replacement, and change. Therefore, the embodiments disclosed in the present disclosure are not intended to limit the technical spirit of the present disclosure, but are intended to be illustrative, and the scope of the technical spirit of the present disclosure is not limited by these embodiments.

[0205] CROSS-REFERENCE TO RELATED APPLICATIONS

[0206] The present invention claims priority to and the benefit of Korean Patent Application No. 10-2023-0083504, filed on Jun. 28, 2023, which is hereby incorporated by reference in its entirety for all purposes as if fully set forth herein.

Claims

1. A display device, comprising: A substrate, the substrate comprising a plurality of sub-pixels and a contact unit; at least one transistor, the at least one transistor being disposed in each sub-pixel; A light emitting device, the light emitting device being arranged in each sub-pixel, the light emitting device comprising a first electrode, an organic layer, and a second electrode; an auxiliary electrode, wherein the auxiliary electrode is disposed in the contact unit; as well as a barrier layer, the barrier layer being located above the auxiliary electrode to expose a portion of the auxiliary electrode, wherein the barrier layer comprises a first pattern made of an orthogonal material, and The second electrode extends from the sub-pixel to the blocking layer, so that the second electrode is formed on the exposed portion of the auxiliary electrode.

2. The display device according to claim 1, wherein: The barrier layer has a width smaller than that of the auxiliary electrode, so that the auxiliary electrode extends to the outside of at least one side of the barrier layer to form the exposed portion.

3. The display device according to claim 2, wherein: The second electrode is formed on both sides of the barrier layer and the exposed portions of the auxiliary electrode located on both sides of the barrier layer.

4. The display device according to claim 1, wherein: The first pattern is formed of a fluorine-containing organic material.

5. The display device according to claim 1, wherein: The first pattern is formed of a fluorine-containing polymer material including a plurality of fluorine atoms in a functional group while carbon-carbon bonds are continuously formed in a chain structure.

6. The display device according to claim 5, wherein: The first pattern has hydrophobicity and oleophobicity.

7. The display device according to claim 1, wherein: The barrier layer further includes a second pattern located on the first pattern, and Wherein, the second pattern is formed by photoresist.

8. The display device according to claim 7, wherein: A width of a lower surface of the second pattern is equal to or smaller than a width of an upper surface of the first pattern.

9. The display device according to claim 1, further comprising: a first insulating layer, wherein the first insulating layer covers the transistor; as well as A bank layer is disposed above the first insulating layer and between the plurality of sub-pixels.

10. The display device according to claim 9, wherein: The transistor comprises: a semiconductor layer, the semiconductor layer being located above the substrate; a second insulating layer, wherein the second insulating layer covers the semiconductor layer; a gate, the gate being located on the second insulating layer; a third insulating layer, the third insulating layer covering the gate; and A source electrode and a drain electrode are located on the third insulating layer.

11. The display device according to claim 10, wherein: An opening in which the bank layer and the third insulating layer are removed is formed in the contact unit, and the auxiliary electrode is disposed within the opening.

12. The display device according to claim 11, wherein: The auxiliary electrode is formed of the same material as the source electrode and the drain electrode. 13 . The display device according to claim 9 , further comprising a disconnection unit located above the bank layer at one side of the sub-pixel to disconnect the second electrode.

14. The display device according to claim 13, wherein: The disconnection unit comprises: a first disconnection layer disposed on the bank layer; and a second breaking layer, the second breaking layer being on the first breaking layer, Wherein, at an interface between the first breaking layer and the second breaking layer, a width of the first breaking layer is smaller than a width of the second breaking layer, so that the breaking unit is formed in an undercut shape.

15. The display device according to claim 14, wherein: The first breaking layer is formed of a fluorine-containing polymer material containing a plurality of fluorine atoms in a functional group while carbon-carbon bonds are continuously formed in a chain structure.

16. The display device according to claim 14, wherein: The second disconnection layer is formed of a photoresist.

17. The display device according to claim 13, wherein: The disconnection unit disposed at one side of the sub-pixel includes a plurality of portions spaced apart from each other.

18. The display device according to claim 17, further comprising an encapsulation layer disposed above the second electrode, in, The encapsulation layer is continuous between the plurality of portions.

19. The display device according to claim 1, wherein: The contact unit is disposed at one side of each of the plurality of sub-pixels.

20. The display device according to claim 1, wherein: The auxiliary electrode is electrically connected to a power line for supplying a common voltage to the second electrode.

21. A method for manufacturing a display device, the method comprising the following steps: providing a substrate including a plurality of sub-pixels and a contact unit; forming a transistor in each sub-pixel; forming an auxiliary electrode in the contact unit; forming a first electrode and an organic layer in each sub-pixel; depositing an orthogonal material and a photoresist over the entire area of ​​the substrate; developing the photoresist to form a photoresist pattern on the auxiliary electrode in the contact unit; etching the orthogonal material by using the photoresist pattern as a mask layer to form a blocking layer exposing a portion of the auxiliary electrode; as well as forming a second electrode on the entire area of ​​the substrate, Wherein, the second electrode is formed to be electrically connected to the exposed portion of the auxiliary electrode.

22. The method according to claim 21, wherein: The step of etching the orthogonal material further comprises the following steps: over-etching the orthogonal material by using the photoresist pattern as a mask layer to form the barrier layer in an undercut shape; and The barrier layer is heat treated.

23. The method according to claim 21, wherein: The second electrode is formed on both side surfaces and an upper surface of the barrier layer, and is electrically connected to the auxiliary electrode extending from both side surfaces of the barrier layer.

24. The method according to claim 21, further comprising the steps of: forming an insulating layer covering the transistor; forming a bank layer between the sub-pixels over the insulating layer; as well as The insulating layer and the bank layer are etched in the contact unit to form an opening.

25. The method according to claim 24, wherein: The auxiliary electrode is formed in the opening.

26. The method according to claim 24, further comprising the steps of: A disconnecting cell is formed over the bank layer.

27. The method according to claim 26, wherein: The breaking unit includes a first breaking layer formed of the orthogonal material and a second breaking layer formed of the photoresist located on the first breaking layer, and Wherein, the disconnection unit and the barrier layer are formed simultaneously.

28. The method according to claim 27, wherein: The breaking unit has an undercut shape, and Wherein, the step of etching the orthogonal material further comprises the following steps: over-etching the orthogonal material by using the photoresist pattern as a mask layer to form the barrier layer in an undercut shape; and The barrier layer is heat treated.

29. The method according to claim 28, wherein: In the step of heat-treating the barrier layer, heat treatment is performed on the substrate side so that the barrier layer does not maintain an undercut shape and the breaking unit maintains an undercut shape.

30. The method of claim 21, wherein: The step of forming the organic layer comprises the following steps: continuously depositing the orthogonal material and the photoresist over the entire area of ​​the substrate; removing the photoresist above the first electrode to form the photoresist pattern; etching the orthogonal material using the photoresist pattern as a mask; depositing an organic material over the entire area of ​​the substrate; and The organic layer is formed in the plurality of sub-pixels by removing the orthogonal material to remove the photoresist pattern and the organic material over the orthogonal material.

31. The method according to claim 30, wherein: The etched orthogonal material and the photoresist pattern on the etched orthogonal material are formed in an undercut shape.

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