Capacitor module detection circuit, chip, optical lens movement detection device, focus motor, camera module and electronic equipment
By controlling the capacitor plate voltage and receiving the charge through the capacitor module detection circuit, the manufacturing difficulty of optical lens movement detection in miniaturized camera modules is solved, and accurate optical lens position detection is achieved and manufacturing difficulty is reduced.
Patent Information
- Application Number
- CN202411431595.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2024-10-14
- Publication Date
- 2025-09-09
- Estimated Expiration
- 2044-10-14
AI Technical Summary
In the prior art, it is difficult for a capacitor module detection circuit to accurately detect the moving position of an optical lens in a miniaturized camera module, especially since it requires simultaneous electrical connection of fixed and movable plates, which leads to manufacturing difficulties.
A capacitor module detection circuit is used to control the plate voltages of the first and second capacitors and receive the charge released by the third capacitor plate to output a digital signal related to the capacitance value. Only the movable plate and the second plate of the fixed plate of the capacitor are connected to avoid connecting the two plates of the same capacitor.
It realizes the accurate detection of the moving position of the optical lens in the miniaturized camera module, while reducing the manufacturing difficulty and improving the detection accuracy and reliability.
Smart Images

Figure CN119245698B_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the field of integrated circuit technology, and in particular to a capacitance module detection circuit, a chip, an optical lens movement detection device, a focus motor, a camera module, and an electronic device. Background Art
[0002] At present, camera modules usually need to have optical focus and optical image stabilization functions. Among them, optical focus refers to the movement of the optical lens (or optical lens) along the optical axis of the optical system, so that the camera equipment can adjust the focus and obtain a clear image. Optical image stabilization refers to the movement of the optical lens (or optical lens) in the direction perpendicular to the optical axis to compensate for the displacement caused by the shaking of the equipment during the shooting process, thereby avoiding the phenomenon of image blur caused by the shaking of the equipment. Therefore, the camera module needs to have an optical lens movement detection function to detect the moving position of the optical lens during the focusing process and the optical image stabilization process, and realize the closed-loop control process of optical lens movement control-optical lens movement detection.
[0003] In the related art, in order to reduce the cost of the solution for detecting the moving position of the optical lens, there is a solution that uses a capacitor structure to detect the moving position of the optical lens, wherein one plate of the capacitor is fixed and the other plate moves with the optical lens, and then the change in the spacing / area between the two plates of the capacitor is calculated by measuring the capacitance value of the capacitor, thereby determining the moving position of the optical lens. However, measuring the capacitance value of the capacitor usually requires the detection circuit to be electrically connected to the two plates of the capacitor respectively, that is, the detection circuit needs to be connected to a fixed plate and a moving plate, which is extremely difficult for a miniaturized camera module on an electronic device. Summary of the Invention
[0004] The present application provides a capacitance module detection circuit, a chip, an optical lens movement detection device, a focus motor, a camera module and an electronic device to solve the above technical problems.
[0005] In a first aspect, the present application provides a capacitor module detection circuit, the capacitor module including a first capacitor, a second capacitor, and a third capacitor, wherein the first plate of the first capacitor, the first plate of the second capacitor, and the first plate of the third capacitor are electrically connected to each other, and the capacitor module detection circuit includes:
[0006] a voltage control module, the voltage control module being used to control the voltage of the second plate of the first capacitor and the second plate of the second capacitor;
[0007] a measuring module, configured to output a first digital signal related to the first capacitance value according to the amount of charge released by the second plate of the third capacitor, and output a second digital signal related to the second capacitance value according to the amount of charge released by the second plate of the third capacitor, during the process in which the voltage control module changes the voltages of the second plate of the first capacitor and the second plate of the second capacitor;
[0008] The first capacitance value is the difference between the capacitance values of the first capacitor and the second capacitor, the second capacitance value is the sum of the capacitance values of the first capacitor and the second capacitor, and the difference between the capacitance values of the first capacitor and the second capacitor changes with the movement of the detection object;
[0009] The sum of the capacitance values of the first capacitor and the second capacitor does not change with the movement of the detection object, or the series capacitance value of the first capacitor and the second capacitor does not change with the movement of the detection object.
[0010] In a second aspect, the present application provides a chip comprising the capacitor module detection circuit as described in the first aspect.
[0011] In a third aspect, the present application provides an optical lens movement detection device, comprising:
[0012] The chip according to the second aspect, wherein the chip has a first output pin, a second output pin, and a first input pin;
[0013] A capacitor module, the capacitor module includes a first capacitor, a second capacitor, and a third capacitor, wherein the first plate of the first capacitor, the first plate of the second capacitor, and the first plate of the third capacitor are electrically connected to each other;
[0014] wherein the difference between the capacitance values of the first capacitor and the second capacitor changes as the detection object moves;
[0015] The sum of the capacitance values of the first capacitor and the second capacitor does not change with the movement of the detection object, or the series capacitance value of the first capacitor and the second capacitor does not change with the movement of the detection object;
[0016] The first output pin is connected to the second plate of the first capacitor to control the voltage of the second plate of the first capacitor, the second output pin is connected to the second plate of the second capacitor to control the voltage of the second plate of the second capacitor, and the first input pin is connected to the second plate of the third capacitor to measure the moving distance of the optical lens according to the amount of charge released by the second plate of the third capacitor.
[0017] In a fourth aspect, the present application provides a focus motor comprising the optical lens movement detection device as described in the third aspect.
[0018] In a fifth aspect, the present application provides a camera module comprising a focus motor as described in the fourth aspect.
[0019] In a sixth aspect, the present application provides an electronic device comprising the camera module as described in the fifth aspect.
[0020] In the present application, during the process in which the voltage control module changes the voltage of the second plate of the first capacitor and the second plate of the second capacitor, the measurement module can output a first digital signal related to the difference between the capacitance values of the first capacitor and the second capacitor based on the amount of charge released by the second plate of the third capacitor, and can output a second digital signal related to the sum of the capacitance values of the first capacitor and the second capacitor based on the amount of charge released by the second plate of the third capacitor. Since the sum of the capacitance values of the first capacitor and the second capacitor does not change with the movement of the detection object (such as an optical lens), or the series capacitance value of the first capacitor and the second capacitor does not change with the movement of the detection object, and the difference between the capacitance values of the first capacitor and the second capacitor changes with the movement of the detection object, the sum of the capacitance values of the first capacitor and the second capacitor (or the series capacitance value of the first capacitor and the second capacitor) represents a fixed position, and the difference between the capacitance values of the first capacitor and the second capacitor represents the moving distance of the detection object, and the moving distance of the detection object can be calculated using the first digital signal and the second digital signal.
[0021] At the same time, since the capacitor module detection circuit of the present application controls the voltage of the second plate of the first capacitor and the second plate of the second capacitor, and receives the charge released by the second plate of the third capacitor, that is to say, the capacitor module detection circuit of the present application is only connected to the second plate of the first capacitor, the second plate of the second capacitor and the second plate of the third capacitor, without connecting the first plate and the second plate of the same capacitor (that is, a movable plate and another fixed plate), the capacitor module detection circuit of the present application can accurately determine the moving position of the detection object while also helping to reduce the manufacturing difficulty of the optical lens movement detection device. BRIEF DESCRIPTION OF THE DRAWINGS
[0022] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative work.
[0023] Figure 1 This is a schematic diagram of a solution for detecting the moving distance of an optical lens in the related art;
[0024] Figure 2 A schematic diagram showing a connection between the photocapacitive module detection circuit and the capacitor module in an embodiment of the present application is shown;
[0025] Figure 3 A schematic diagram of the arrangement of relevant capacitors in an embodiment of the present application is shown;
[0026] Figure 4 Another schematic diagram of the arrangement of related capacitors in an embodiment of the present application is shown;
[0027] Figure 5 Another schematic diagram of the arrangement of related capacitors in an embodiment of the present application is shown;
[0028] Figure 6 Another schematic diagram of the arrangement of related capacitors in an embodiment of the present application is shown;
[0029] Figure 7 Another schematic diagram of the arrangement of related capacitors in an embodiment of the present application is shown;
[0030] Figure 8 Another schematic diagram of the arrangement of related capacitors in an embodiment of the present application is shown;
[0031] Figure 9 A schematic diagram of a capacitance module detection circuit in an embodiment of the present application is shown;
[0032] Figure 10 A schematic diagram of state switching of a capacitor module detection circuit in an embodiment of the present application is shown;
[0033] Figure 11 Another state switching schematic diagram of the capacitor module detection circuit in an embodiment of the present application is shown;
[0034] Figure 12 Another schematic diagram of a capacitance module detection circuit in an embodiment of the present application is shown;
[0035] Figure 13 Another schematic diagram of a capacitance module detection circuit in an embodiment of the present application is shown;
[0036] Figure 14 Another schematic diagram of a capacitance module detection circuit in an embodiment of the present application is shown;
[0037] Figure 15 Another schematic diagram of a capacitance module detection circuit in an embodiment of the present application is shown;
[0038] Figure 16 Another schematic diagram of a capacitance module detection circuit in an embodiment of the present application is shown;
[0039] Figure 17 Another schematic diagram of a capacitance module detection circuit in an embodiment of the present application is shown;
[0040] Figure 18 Another schematic diagram of a capacitance module detection circuit in an embodiment of the present application is shown;
[0041] Figure 19 Another schematic diagram of a capacitance module detection circuit in an embodiment of the present application is shown;
[0042] Figure 20 Another schematic diagram of a capacitance module detection circuit in an embodiment of the present application is shown;
[0043] Figure 21 Another schematic diagram of the capacitance module detection circuit in an embodiment of the present application is shown.
[0044] Among them, 100 is a capacitance module detection circuit, 110 is a voltage control module, 111 is a first clock output unit, 112 is a second clock output unit, 120 is a measurement module, 200 is a capacitance module, 210 is a first capacitor, 211 is a first plate of the first capacitor, 212 is a second plate of the first capacitor, 220 is a second capacitor, 221 is a first plate of the second capacitor, 222 is a second plate of the second capacitor, 230 is a third capacitor, 231 is a first plate of the third capacitor, and 232 is a second plate of the second capacitor;
[0045] A first digital signal Dout1, a second digital signal Dout2, a first reference voltage Vref1, and a second reference voltage Vref2;
[0046] A first switch S1, a second switch S2, a third switch S3, a fourth switch S4, a first clock signal CLK1, and a second clock signal CLK2;
[0047] First operational amplifier OP1, integrating capacitor CI, integrating switch SI, feedback resistor RI, analog-to-digital converter ADC, demodulation unit Demod, first integrating switch SIn, second integrating switch SIp, quantizer Qt, digital-to-analog converter DAC, current mirror CM. DETAILED DESCRIPTION
[0048] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the embodiments described are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without making creative efforts shall fall within the scope of protection of the present invention.
[0049] In the description of the present invention, it should be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside" and the like indicate positions or positional relationships based on the positions or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as limiting the present invention. In addition, the terms "first" and "second" are only used for descriptive purposes and cannot be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined as "first" and "second" may explicitly or implicitly include one or more of the said features. In the description of the present invention, the meaning of "multiple" is two or more, unless otherwise clearly and specifically defined.
[0050] In this application, the word "exemplary" is used to mean "serving as an example, illustration, or illustration." Any embodiment described in this application as "exemplary" is not necessarily to be construed as preferred or advantageous over other embodiments. The following description is given to enable any person skilled in the art to make and use the invention. In the following description, details are listed for the purpose of explanation. It should be understood that one of ordinary skill in the art will recognize that the invention can be practiced without these specific details. In other instances, well-known structures and processes are not described in detail to avoid obscuring the description of the invention with unnecessary detail. Therefore, the present invention is not intended to be limited to the embodiments shown, but is to be accorded the widest scope consistent with the principles and features disclosed herein.
[0051] It should be noted that in the embodiments of the present application, "connection" can be understood as electrical connection, and the connection between two electrical components can be a direct or indirect connection between the two electrical components. For example, the connection between A and B can be either a direct connection between A and B or an indirect connection between A and B through one or more other electrical components.
[0052] At present, in order to reduce the cost of the solution for detecting the moving distance of the optical lens, one of the related solutions is to use a capacitor structure to detect the moving distance of the optical lens. The capacitor measures the capacitance value of the capacitor to calculate the distance / area between the two plates of the capacitor, thereby determining the moving distance of the optical lens.
[0053] See Figure 1 , Figure 1A schematic diagram of a related art optical lens movement distance detection solution is shown. This solution requires one plate of a capacitor to be placed on a mobile structure (e.g., a mobile support that carries the optical lens), while the other plate is placed on a fixed structure (e.g., a fixed support that mounts the mobile support to enable it to move). A readout circuit is required to electrically connect both plates at the same time, and then the capacitance calculation formula can be used to obtain the value.
[0054] C=Q / U=εS / 4πkd
[0055] Where C is the capacitance of the capacitor being tested, Q is the charge accumulated in the capacitor, U is the voltage difference between the two plates, ε is the dielectric constant of the medium between the plates, k is the electrostatic force constant, S is the area facing the plates, and d is the spacing between the plates.
[0056] When the optical lens drives the plates to move away from or closer to each other along the X-axis to change the distance between the plates, the moving distance of the optical lens is:
[0057]
[0058] Where D is the moving distance of the optical lens, and d0 is the initial plate distance of the capacitor.
[0059] As can be seen, the readout circuit needs to electrically connect a stationary plate and a moving plate simultaneously, and detect the voltage across the capacitor after injecting a fixed charge into the capacitor to obtain the distance the optical lens has moved along the X-axis. However, the readout circuit requires two wires to electrically connect the stationary plate and the moving plate, which is very difficult for miniaturized camera lenses (such as mobile phone cameras) (for example, it is difficult to route wires on a moving structure).
[0060] To this end, the embodiments of the present application provide a capacitor module detection circuit, a chip, an optical lens movement detection device, a focus motor, a camera module and an electronic device, which are described in detail below.
[0061] Before introducing the capacitor module detection circuit 100 of the present application, the capacitor module 200 of the present application and the connection relationship between the capacitor module detection circuit 100 and the capacitor module 200 are first introduced.
[0062] First, see Figure 2 , Figure 2A connection schematic diagram of the photocapacitor module detection circuit 100 and the capacitor module 200 in an embodiment of the present application is shown, wherein the capacitor module 200 includes a first capacitor 210, a second capacitor 220 and a third capacitor 230, the first plate 211 of the first capacitor 210, the first plate 221 of the second capacitor 220 and the first plate 231 of the third capacitor 230 are electrically connected to each other, and the second plate 212 of the first capacitor 210, the second plate 222 of the second capacitor 220 and the second plate 232 of the third capacitor 230 are connected to the capacitor module detection circuit 100, that is, the capacitor module detection circuit 100 of the present application is only connected to the second plates 212, 222, 232 of each capacitor, without connecting the first plate and the second plate of the same capacitor (that is, a movable plate and another fixed plate).
[0063] In an embodiment of the present application, the difference between the capacitance values of the first capacitor 210 and the second capacitor 220 changes with the movement of the detection object; and the sum of the capacitance values of the first capacitor 210 and the second capacitor 220 does not change with the movement of the detection object, or the series capacitance value of the first capacitor 210 and the second capacitor 220 does not change with the movement of the detection object. For ease of understanding, this application takes the detection object as an optical lens as an example to illustrate how to arrange the plates of the first capacitor 210, the second capacitor 220, and the third capacitor 230, and makes the sum of the capacitance values of the first capacitor 210 and the second capacitor 220 not change with the movement of the detection object, or the series capacitance value of the first capacitor 210 and the second capacitor 220 does not change with the movement of the detection object, while the difference between the capacitance values of the first capacitor 210 and the second capacitor 220 changes with the movement of the detection object. It should be understood that the capacitance module detection circuit 100 of the present application can be applied but not limited to the mobile detection scheme of the optical lens.
[0064] As an example, see Figure 3 , Figure 3 A schematic diagram of the arrangement of related capacitors in an embodiment of the present application is shown. Figure 3 In the figure, the moving structure of the optical lens 1 includes a mover bracket 2 and a stator bracket 3. The optical lens 1 is fixedly connected to the mover bracket 2. The mover bracket 2 can move left and right relative to the stator bracket 3, so that the left and right movement of the optical lens 1 is achieved through the relative movement of the mover bracket 2 and the stator bracket 3. It is understandable that the moving structure of the optical lens 1 may also include other components, such as a motor that drives the mover bracket 2 to move, or a coil or magnet that drives the mover bracket 2 to move.
[0065] Specifically, the first plate 211 of the first capacitor 210, the first plate 221 of the second capacitor 220, and the first plate 231 of the third capacitor 230 are electrically connected to each other, and the first plate 211 of the first capacitor 210, the first plate 221 of the second capacitor 220, and the first plate 231 of the third capacitor 230 are fixed on the mover bracket 2. Among them, the first plate 211 of the first capacitor 210 is fixed on the left side of the mover bracket 2, the first plate 221 of the second capacitor 220 is fixed on the right side of the mover bracket 2, and the first plate 231 of the third capacitor 230 is fixed on the bottom of the mover bracket 2; the second plate 212 of the first capacitor 210 is fixed on the inner wall surface on the left side of the stator bracket 3 and is opposite to the first plate 211 of the first capacitor 210, the second plate 222 of the second capacitor 220 is fixed on the inner wall surface on the right side of the stator bracket 3 and is opposite to the first plate 221 of the second capacitor 220, and the second plate 232 of the third capacitor 230 is fixed on the inner wall surface of the bottom of the stator bracket 3 and is opposite to the first plate 231 of the third capacitor 230.
[0066] It can be seen that in Figure 3 In the embodiment, when the optical lens 1 moves left and right, the areas of the plates facing each other of the first capacitor 210, the second capacitor 220 and the third capacitor 230 remain unchanged, and the plate spacing of the third capacitor 230 remains unchanged. However, the plate spacing of one of the first capacitor 210 and the second capacitor 220 decreases, and the plate spacing of the other increases. However, the sum of the plate spacings of the first capacitor 210 and the second capacitor 220 remains unchanged. According to the capacitance formula, for Figure 3 As for the arranged first capacitor 210, the second capacitor 220 and the third capacitor 230, the series capacitance value of the first capacitor 210 and the second capacitor 220 does not change as the optical lens 1 moves left and right, while the difference in capacitance value between the first capacitor 210 and the second capacitor 220 changes as the optical lens 1 moves left and right.
[0067] As another exemplary embodiment, see Figure 4 , Figure 4 Another schematic diagram of the arrangement of related capacitors in the embodiment of the present application is shown. Figure 4 In the embodiment, the mover bracket 2 can move up and down relative to the stator bracket 3, so that the optical lens 1 can be moved up and down by the relative movement of the mover bracket 2 and the stator bracket 3.
[0068] Specifically, the first plate 211 of the first capacitor 210, the first plate 221 of the second capacitor 220, and the first plate 231 of the third capacitor 230 are electrically connected to each other, and the first plate 211 of the first capacitor 210, the first plate 221 of the second capacitor 220, and the first plate 231 of the third capacitor 230 are fixed to the mover bracket 2, and the second plate 212 of the first capacitor 210, the second plate 222 of the second capacitor 220, and the second plate 232 of the third capacitor 230 are fixed to the stator bracket 3. The first plate 211 of the first capacitor 210 and the first plate 221 of the second capacitor 220 are an integral plate, with a portion of the integral plate opposing the second plate 212 of the first capacitor 210 forming the first capacitor 210, and another portion opposing the second plate 222 of the second capacitor 220 forming the second capacitor 220.
[0069] exist Figure 4 In the embodiment, when the optical lens 1 moves up and down, the distance between the plates of the first capacitor 210, the second capacitor 220 and the third capacitor 230 remains unchanged, and the plate-facing area of the third capacitor 230 remains unchanged. However, the plate-facing area of one of the first capacitor 210 and the second capacitor 220 decreases, and the plate-facing area of the other increases. However, the sum of the plate-facing areas of the first capacitor 210 and the second capacitor 220 remains unchanged. According to the capacitance formula, for Figure 4 As for the arranged first capacitor 210, second capacitor 220 and third capacitor 230, the sum of the capacitance values of the first capacitor 210 and the second capacitor 220 does not change as the optical lens 1 moves left and right, while the difference between the capacitance values of the first capacitor 210 and the second capacitor 220 changes as the optical lens 1 moves up and down.
[0070] It should be noted that the first plate 211 of the first capacitor 210, the first plate 221 of the second capacitor 220, and the first plate 231 of the third capacitor 230, which are electrically connected to each other in the embodiment of the present application, may be independent plates that are electrically connected by wires, for example. Figure 3 As shown, the first plate 211 of the first capacitor 210, the first plate 221 of the second capacitor 220, and the first plate 231 of the third capacitor 230 are electrically connected by wires, or at least two of the three can be integrally formed monolithic plates. For example, Figure 4 In the embodiment, the first plate 211 of the first capacitor 210 and the first plate 221 of the second capacitor 220 are an integral plate; for example, see Figure 5 , Figure 5Another schematic diagram of the arrangement of the relevant capacitors in an embodiment of the present application is shown. The first plate 211 of the first capacitor 210, the first plate 221 of the second capacitor 220, and the first plate 231 of the third capacitor 230 are an integral plate. This can eliminate the need for wires electrically connecting the first plate 211 of the first capacitor 210, the first plate 221 of the second capacitor 220, and the first plate 231 of the third capacitor 230.
[0071] It can be understood that the above arrangement of the first capacitor 210, the second capacitor 220 and the third capacitor 230 is merely an exemplary embodiment in which the sum of the capacitance values of the first capacitor 210 and the second capacitor 220 (or the series capacitance value) does not change with the movement of the detection object, while the difference between the capacitance values of the first capacitor 210 and the second capacitor 220 changes with the movement of the detection object. Those skilled in the art can make equivalent modified designs under the guidance of this application.
[0072] For example, see Figure 6 , Figure 6 Another schematic diagram of the arrangement of relevant capacitors in an embodiment of the present application is shown, wherein the second plate 212 of the first capacitor 210 and the second plate 222 of the second capacitor 220 are complementary trapezoidal plates. In this way, when the optical lens 1 moves up and down, the plate-facing area of one of the first capacitor 210 and the second capacitor 220 decreases, and the plate-facing area of the other increases, but the sum of the plate-facing areas of the first capacitor 210 and the second capacitor 220 remains unchanged. Therefore, the sum of the capacitance values of the first capacitor 210 and the second capacitor 220 does not change with the movement of the optical lens 1, while the difference between the capacitance values of the first capacitor 210 and the second capacitor 220 changes with the movement of the optical lens 1.
[0073] For example, see Figure 7 , Figure 7 Another arrangement schematic diagram of relevant capacitors in an embodiment of the present application is shown. Unlike other embodiments, the movable bracket 2 of the optical lens 1 includes an anti-shake bracket 202 and a focus bracket 201. The anti-shake bracket 202 can move in the plane where the X-axis and Y-axis are located, and the focus bracket 201 can move along the Z-axis on the anti-shake bracket 202. When the first plate 211 of the first capacitor 210, the first plate 221 of the second capacitor 220 and the first plate 231 of the third capacitor 230 are fixed on the focus bracket 201, the capacitor module detection circuit 100 can detect the focus position of the optical lens 1.
[0074] For example, see Figure 8 , Figure 8Another schematic diagram of the arrangement of relevant capacitors in an embodiment of the present application is shown. Unlike other embodiments, the movable bracket 2 of the optical lens 1 includes a first anti-shake bracket 203, a second anti-shake bracket 204 and a first focusing bracket 205. The first anti-shake bracket 203 can move along the X-axis, the second anti-shake bracket 204 can move along the Y-axis, and the first focusing bracket 205 can move along the Z-axis. When the first plate 211 of the first capacitor 210, the first plate 221 of the second capacitor 220 and the first plate 231 of the third capacitor 230 are fixed on the first focusing bracket 205, the capacitor module detection circuit 100 can detect the focusing position of the optical lens 1.
[0075] It can be understood that when the first plate 211 of the first capacitor 210, the first plate 221 of the second capacitor 220 and the first plate 231 of the third capacitor 230 are fixed on other brackets (such as the anti-shake bracket 202, the first anti-shake bracket 203, and the second anti-shake bracket 204), the movement position detection of the optical lens 1 in other directions (such as optical anti-shake function) can be realized.
[0076] Next, we will introduce the capacitor module detection circuit 100 for detecting the capacitor module 200 in this application. Figure 9 , Figure 9 A schematic diagram of a capacitance module detection circuit 100 in an embodiment of the present application is shown, wherein the capacitance module detection circuit 100 includes a voltage control module 110 and a measurement module 120 .
[0077] Specifically, the voltage control module 110 is used to control the voltage of the second plate 212 of the first capacitor 210 and the second plate 222 of the second capacitor 220, so that the second plate 232 of the third capacitor 230 releases charge, and enables the measurement module 120 to receive the charge released by the second plate 232 of the third capacitor 230 and thus output a first digital signal Dout1 related to the first capacitance value, and a second digital signal Dout2 related to the second capacitance value.
[0078] In some embodiments of the present application, the voltage control module 110 may include a switching circuit that switches the voltage signals received by the second plate 212 of the first capacitor 210 and the second plate 222 of the second capacitor 220, thereby controlling the voltages of the second plate 212 of the first capacitor 210 and the second plate 222 of the second capacitor 220. In some embodiments of the present application, the voltage control module 110 may include a clock signal generating circuit that outputs a clock signal that periodically changes between a high level and a low level, thereby controlling the voltages of the second plate 212 of the first capacitor 210 and the second plate 222 of the second capacitor 220 using the clock signal.
[0079] The measurement module 120 is used to output a first digital signal Dout1 related to a first capacitance value according to the amount of charge released by the second plate 232 of the third capacitor 230 during the process in which the voltage control module 110 changes the voltage of the second plate 212 of the first capacitor 210 and the second plate 222 of the second capacitor 220, and to output a second digital signal Dout2 related to a second capacitance value according to the amount of charge released by the second plate 232 of the third capacitor 230, wherein the first capacitance value is the difference between the capacitance values of the first capacitor 210 and the second capacitor 220, and the second capacitance value is the sum of the capacitance values of the first capacitor 210 and the second capacitor 220.
[0080] For example, Figure 3 The capacitor arrangement is such that the series capacitance value of the first capacitor 210 and the second capacitor 220 does not change with the movement of the detection object. For example, the difference between the capacitance values of the first capacitor 210 and the second capacitor 220 changes with the movement of the detection object. The first capacitance value and the second capacitance value satisfy the following relationship:
[0081]
[0082] d0=d1+d2
[0083] Among them, C1 is the capacitance value of the first capacitor 210, C2 is the capacitance value of the second capacitor 220, S0 is the area of the plates facing each other, d1 is the distance between the plates of the first capacitor 210, d2 is the distance between the plates of the second capacitor 220, and d0 is the sum of the distances between the plates of the first capacitor 210 and the second capacitor 220, and d0 is fixed.
[0084] Assume that the first digital signal Dout1 and the first capacitance value, and the second digital signal Dout2 and the second capacitance value satisfy the following relationship:
[0085] Dout1=(C1-C2)*k1
[0086] Dout2=(C1+C2)*k2
[0087] Wherein, C1 is the capacitance value of the first capacitor 210 , C2 is the capacitance value of the second capacitor 220 , and k1 and k2 are conversion coefficients.
[0088] It can be seen that:
[0089]
[0090]
[0091] Therefore, the difference between the plate spacing of the first capacitor 210 and the plate spacing of the second capacitor 220 satisfies the following formula:
[0092]
[0093] exist Figure 3 , it can be seen that the difference between the plate spacing of the first capacitor 210 and the plate spacing of the second capacitor 220 is twice the moving distance of the optical lens. Therefore, the moving distance D of the optical lens can be calculated according to the following formula:
[0094]
[0095] It can be seen that since the sum of the plate distances between the first capacitor 210 and the second capacitor 220 remains unchanged, after determining the first digital signal Dout1 corresponding to the sum of the capacitance values of the first capacitor 210 and the second capacitor 220, and the second digital signal Dout2 corresponding to the difference between the capacitance values of the first capacitor 210 and the second capacitor 220, the moving distance of the optical lens can be calculated according to the above formula.
[0096] Therefore, in the process of the voltage control module 110 changing the voltage of the second plate 212 of the first capacitor 210 and the second plate 222 of the second capacitor 220, the measuring module 120 can output a first digital signal Dout1 related to the sum of the capacitance values of the first capacitor 210 and the second capacitor 220 according to the amount of charge released by the second plate 232 of the third capacitor 230, and can output a second digital signal Dout2 related to the difference in capacitance values of the first capacitor 210 and the second capacitor 220 according to the amount of charge released by the second plate 232 of the third capacitor 230. Since the sum of the capacitance values of the first capacitor 210 and the second capacitor 220 does not change with the detection pair, The detection object may change with the movement of an object (such as an optical lens), or the series capacitance value of the first capacitor 210 and the second capacitor 220 does not change with the movement of the detection object, while the difference between the capacitance values of the first capacitor 210 and the second capacitor 220 changes with the movement of the detection object. Therefore, the sum of the capacitance values of the first capacitor 210 and the second capacitor 220 (or the series capacitance value of the first capacitor 210 and the second capacitor 220) represents a fixed position, and the difference between the capacitance values of the first capacitor 210 and the second capacitor 220 represents the moving distance of the detection object. The moving distance of the detection object can then be calculated using the first digital signal Dout1 and the second digital signal Dout2.
[0097] At the same time, since the capacitor module detection circuit 100 of the present application controls the voltage of the second plate 212 of the first capacitor 210 and the second plate 222 of the second capacitor 220, and receives the charge released by the second plate 232 of the third capacitor 230, that is to say, the capacitor module detection circuit 100 of the present application is only connected to the second plate 212 of the first capacitor 210, the second plate 222 of the second capacitor 220 and the second plate 232 of the third capacitor 230, without connecting the first plate and the second plate of the same capacitor (that is, a movable plate and another fixed plate). Ultimately, the capacitor module detection circuit 100 of the present application can accurately determine the moving position of the detection object while also helping to reduce the manufacturing difficulty of the optical lens movement detection device.
[0098] In some embodiments of the present application, when the measuring module 120 outputs a first digital signal Dout1 related to the first capacitance value based on the amount of charge released by the second plate 232 of the third capacitor 230, the voltage changes of the second plate 212 of the first capacitor 210 and the second plate 222 of the second capacitor 220 are opposite. For example, in one unit time, the second plate 212 of the first capacitor 210 is 5V and the second plate 222 of the second capacitor 220 is 0V. In the next unit time, the second plate 212 of the first capacitor 210 is 0V and the second plate 222 of the second capacitor 220 is 5V.
[0099] At the same time, when the measuring module 120 outputs the second digital signal Dout2 related to the second capacitance value according to the amount of charge released by the second plate 232 of the third capacitor 230, the voltage changes of the second plate 212 of the first capacitor 210 and the second plate 222 of the second capacitor 220 are the same. For example, in one unit time, the second plate 212 of the first capacitor 210 and the second plate 222 of the second capacitor 220 are both 3V, and in the next unit time, the second plate 212 of the first capacitor 210 and the second plate 222 of the second capacitor 220 are both -2V.
[0100] In some embodiments of the present application, the voltage control module 110 has a first working state, a second working state, a third working state, and a fourth working state; in the first working state, the voltage control module 110 controls the voltage of the second plate 212 of the first capacitor 210 to be the first reference voltage Vref1, and controls the voltage of the second plate 222 of the second capacitor 220 to be the second reference voltage Vref2; in the second working state, the voltage control module 110 controls the voltage of the second plate 212 of the first capacitor 210 to be the second reference voltage Vref2, and controls the voltage of the second plate 222 of the second capacitor 220 to be the second reference voltage Vref2. 20 is the first reference voltage Vref1; in the third working state, the voltage control module 110 controls the voltage of the second plate 212 of the first capacitor 210 to be the first reference voltage Vref1, and controls the voltage of the second plate 222 of the second capacitor 220 to be the first reference voltage Vref1; in the fourth working state, the voltage control module 110 controls the voltage of the second plate 212 of the first capacitor 210 to be the second reference voltage Vref2, and controls the voltage of the second plate 222 of the second capacitor 220 to be the second reference voltage Vref2.
[0101] Specifically, see Figure 10 , Figure 10 A state switching diagram of the capacitor module detection circuit 100 in an embodiment of the present application is shown. When the voltage control module 110 switches from the first working state to the second working state, since the first plate 211 of the first capacitor 210, the first plate 221 of the second capacitor 220, and the first plate 231 of the third capacitor 230 do not lose charge, according to the law of charge conservation:
[0102] (VX1-Vref1)*C1+(VX1-Vref2)*C2+VX1*C3=(VX2-Vref2)*C1+(VX2-Vref1
[0103] )*C2+VX2*C3
[0104] Wherein, C3 is the capacitance value of the third capacitor 230, VX1 is the voltage of the first plate of the first capacitor 210, the second capacitor 220 and the third capacitor 230 in the first working state, and VX2 is the voltage of the first plate of the first capacitor 210, the second capacitor 220 and the third capacitor 230 in the second working state.
[0105] After conversion according to the above formula, we can know that:
[0106] (VX1-VX2)*(C1+C2+C3)=(C1-C2)*(Vref1-Vref2)
[0107] The charge released by the second plate 232 of the third capacitor 230 satisfies the following formula:
[0108] △Q1=(VX1-VX2)*C3
[0109] ΔQ1 is the amount of charge released from the second plate 232 of the third capacitor 230 when the voltage control module 110 switches from the first working state to the second working state.
[0110] According to the above formula, the charge released by the second plate 232 of the third capacitor 230 can be calculated as follows:
[0111]
[0112] It can be seen that the above formula contains the term C1-C2. Therefore, when the voltage control module 110 is switched from the first working state to the second working state, the amount of charge released by the second plate 232 of the third capacitor 230 is related to the difference between the capacitance values of the first capacitor 210 and the second capacitor 220. Therefore, the measurement module 120 can output a first digital signal Dout1 related to the first capacitance value (i.e., the difference between the capacitance values of the first capacitor 210 and the second capacitor 220) according to the amount of charge released by the second plate 232 of the third capacitor 230 when the voltage control module 110 is switched from the first working state to the second working state.
[0113] Likewise, see Figure 11 , Figure 11 Another state switching diagram of the capacitor module detection circuit 100 in an embodiment of the present application is shown. When the voltage control module 110 switches from the third working state to the fourth working state, since the first plate 211 of the first capacitor 210, the first plate 221 of the second capacitor 220, and the first plate 231 of the third capacitor 230 do not lose charge, according to the law of charge conservation:
[0114] (VX3-Vref1)*C1+(VX3-Vref1)*C2+VX3*C3=(VX4-Vref2)*C1+(VX4-Vref2
[0115] )*C2+VX4*C3
[0116] Wherein, VX3 is the voltage of the first plates of the first capacitor 210 , the second capacitor 220 , and the third capacitor 230 in the third working state, and VX4 is the voltage of the first plates of the first capacitor 210 , the second capacitor 220 , and the third capacitor 230 in the fourth working state.
[0117] After conversion according to the above formula, we can know that:
[0118] (VX3-VX4)*(C1+C2+C3)=(C1+C2)*(Vref1-Vref2)
[0119] The charge released by the second plate 232 of the third capacitor 230 satisfies the following formula:
[0120] △Q2=(VX3-VX4)*C3
[0121] ΔQ1 is the amount of charge released from the second plate 232 of the third capacitor 230 when the voltage control module 110 switches from the third working state to the fourth working state.
[0122] According to the above formula, the charge released by the second plate 232 of the third capacitor 230 can be calculated as follows:
[0123]
[0124] It can be seen that the above formula contains the term C1+C2. Therefore, when the voltage control module 110 is switched from the third working state to the fourth working state, the amount of charge released by the second plate 232 of the third capacitor 230 is related to the sum of the capacitance values of the first capacitor 210 and the second capacitor 220. Therefore, the measurement module 120 can output a second digital signal Dout2 related to the second capacitance value (i.e., the sum of the capacitance values of the first capacitor 210 and the second capacitor 220) according to the amount of charge released by the second plate 232 of the third capacitor 230 when the voltage control module 110 is switched from the third working state to the fourth working state.
[0125] It should be pointed out that, in the embodiment of the present application, the first reference voltage Vref1 is not equal to the second reference voltage Vref2. Those skilled in the art may select a reference voltage of appropriate size according to actual needs. For example, the first reference voltage Vref1 may be greater than the second reference voltage Vref2, the second reference voltage Vref2 is the ground terminal voltage, and the first reference voltage Vref1 is the power terminal voltage. For another example, the first reference voltage Vref1 may be less than the second reference voltage Vref2, the second reference voltage Vref2 is the power terminal voltage, and the first reference voltage Vref1 is the ground terminal voltage.
[0126] It should be noted that the capacitor module detection circuit 100 of the present application can eliminate multiple interference factors and improve the detection accuracy of the optical lens movement distance. For example, for the embodiment in which the first plate 211 of the first capacitor 210, the first plate 221 of the second capacitor 220, and the first plate 231 of the third capacitor 230 are an integral plate, due to the influence of other metal structural parts (such as a metal shell), parasitic capacitance may exist in the capacitor module 200. For example, see Figure 12 , Figure 12Another schematic diagram of the capacitor module detection circuit 100 in an embodiment of the present application is shown. Other metal structural parts form parasitic capacitance relative to the integral electrode plate. Although the parasitic capacitance phenomenon exists, the solution of the present application will not be affected by the parasitic capacitance, which is described in detail below.
[0127] Specifically, when the voltage control module 110 switches from the first working state to the second working state, since there is no charge loss in the first plate 211 of the first capacitor 210, the first plate 221 of the second capacitor 220, and the first plate 231 of the third capacitor 230, according to the law of charge conservation:
[0128] (VX1-Vref1)*C1+(VX1-Vref2)*C2+VX1*C3+VX1*CP=(VX2-Vref2)*C1+(
[0129] VX2-Vref1)*C2+VX2*C3+VX2*CP
[0130] Wherein, CP is the capacitance value of the parasitic capacitor.
[0131] After conversion according to the above formula, we can know that:
[0132] (VX1-VX2)*(C1+C2+C3+CP)=(C1-C2)*(Vref1-Vref2)
[0133] Therefore, the charge released by the second plate 232 of the third capacitor 230 can be calculated as follows:
[0134]
[0135] Similarly, when the voltage control module 110 switches from the third working state to the fourth working state, the charge released by the second plate 232 of the third capacitor 230 can be calculated according to the following formula:
[0136]
[0137] Assume that the first digital signal Dout1, the second digital signal Dout2 and the charge released by the second plate 232 of the third capacitor 230 satisfy the following relationship:
[0138] Dout1=△Q1*kx
[0139] Dou2=△Q2*ky
[0140] Among them, kx and ky are conversion coefficients.
[0141] Then, we know that:
[0142]
[0143] Finally, combined with the above calculation formula for the moving distance D of the optical lens, the moving distance D of the optical lens can be calculated as follows:
[0144]
[0145] It can be seen that the above formula offsets the Vref1-Vref2 term, the C1+C2+C3+CP term, and the C3 term. Therefore, the capacitor module detection circuit 100 of the present application will not be affected by the accuracy of the first reference voltage Vref1, the accuracy of the second reference voltage Vref2, the parasitic capacitance, and the third capacitor 230, which is beneficial to improving the detection accuracy of the optical lens movement distance.
[0146] It should be noted that, in combination with the above content, the capacitance value of the third capacitor does not affect the calculation of the moving distance D of the optical lens. Figures 3 to 8 The fixed capacitance value of the third capacitor is only an exemplary embodiment of the present application. In fact, the change in the capacitance value of the third capacitor will not affect the detection accuracy of the optical lens movement distance D of the present application.
[0147] In some embodiments of the present application, for example, for an embodiment in which the voltage control module 110 includes a switch circuit, see Figure 13 , Figure 13 Another schematic diagram of the capacitor module detection circuit 100 in an embodiment of the present application is shown, wherein the voltage control module 110 includes a first switch S1, a second switch S2, a third switch S3 and a fourth switch S4; the first end of the first switch S1 is connected to the first reference voltage Vref1, and the second end of the first switch S1 is connected to the second plate 212 of the first capacitor 210; the first end of the second switch S2 is connected to the second reference voltage Vref2, and the second end of the second switch S2 is connected to the second plate 212 of the first capacitor 210; the first end of the third switch S3 is connected to the first reference voltage Vref1, and the second end of the third switch S3 is connected to the second plate 222 of the second capacitor 220; the first end of the fourth switch S4 is connected to the second reference voltage Vref2, and the second end of the fourth switch S4 is connected to the second plate 222 of the second capacitor 220.
[0148] It should be noted that when the first switch S1 and the fourth switch S4 are closed and the second switch S2 and the third switch S3 are opened, the voltage of the second plate 212 of the first capacitor 210 is the first reference voltage Vref1, and the voltage of the second plate 222 of the second capacitor 220 is the second reference voltage Vref2, which is equivalent to the first working state of the voltage control module 110.
[0149] When the second switch S2 and the third switch S3 are closed and the first switch S1 and the fourth switch S4 are opened, the voltage of the second plate 212 of the first capacitor 210 is the second reference voltage Vref2, and the voltage of the second plate 222 of the second capacitor 220 is the first reference voltage Vref1, which corresponds to the second working state of the voltage control module 110.
[0150] When the first switch S1 and the third switch S3 are closed and the second switch S2 and the fourth switch S4 are opened, the voltage of the second plate 212 of the first capacitor 210 is the first reference voltage Vref1, and the voltage of the second plate 222 of the second capacitor 220 is the first reference voltage Vref1, which corresponds to the third working state of the voltage control module 110.
[0151] When the second switch S2 and the fourth switch S4 are closed and the first switch S1 and the third switch S3 are opened, the voltage of the second plate 212 of the first capacitor 210 is the second reference voltage Vref2, and the voltage of the second plate 222 of the second capacitor 220 is the second reference voltage Vref2, which corresponds to the fourth working state of the voltage control module 110.
[0152] It can be seen that by controlling the first switch S1, the second switch S2, the third switch S3 and the fourth switch S4, the voltage control module 110 can achieve the purpose of controlling the voltage of the second plate 212 of the first capacitor 210 and the second plate 222 of the second capacitor 220.
[0153] In some embodiments of the present application, for example, for an embodiment in which the voltage control module 110 includes a clock signal generating circuit, see Figure 14 , Figure 14 Another schematic diagram of the capacitor module detection circuit 100 in an embodiment of the present application is shown, wherein the voltage control module 110 includes a first clock output unit 111 and a second clock output unit 112; the first clock output unit 111 is used to output a first clock signal CLK1 whose high level is the first reference voltage Vref1 and whose low level is the second reference voltage Vref2; the second clock output unit 112 is used to output a second clock signal CLK2 whose high level is the first reference voltage Vref1 and whose low level is the second reference voltage Vref2; wherein the first clock signal CLK1 and the second clock signal CLK2 have opposite phases.
[0154] It should be noted that when the first clock output unit 111 inputs the first clock signal CLK1 to the second plate 212 of the first capacitor 210, and the second clock output unit 112 inputs the second clock signal CLK2 to the second plate 222 of the second capacitor 220, since the first clock signal CLK1 and the second clock signal CLK2 have opposite phases, when the first clock signal CLK1 is at a high level and the second clock optical signal is at a low level, the voltage on the second plate 212 of the first capacitor 210 is the first reference voltage Vref1, and the voltage on the second plate 222 of the second capacitor 220 is the second reference voltage Vref2, which corresponds to the first operating state of the voltage control module 110. Conversely, when the first clock signal CLK1 is at a low level and the second clock optical signal is at a high level, the voltage on the second plate 212 of the first capacitor 210 is the second reference voltage Vref2, and the voltage on the second plate 222 of the second capacitor 220 is the first reference voltage Vref1, which corresponds to the second operating state of the voltage control module 110.
[0155] When the first clock output unit 111 inputs the first clock signal CLK1 to the second plate 212 of the first capacitor 210 and the second plate 222 of the second capacitor 220, or the second clock output unit 112 inputs the second clock signal CLK2 to the second plate 212 of the first capacitor 210 and the second plate 222 of the second capacitor 220, when the first clock signal CLK1 or the second clock signal CLK2 is at a high level, the voltage of the second plate 212 of the first capacitor 210 is the first reference voltage Vref1, and the voltage of the second plate 222 of the second capacitor 220 is the first reference voltage Vref1, which corresponds to the third working state of the voltage control module 110; conversely, when the first clock signal CLK1 or the second clock signal CLK2 is at a low level, the voltage of the second plate 212 of the first capacitor 210 is the second reference voltage Vref2, and the voltage of the second plate 222 of the second capacitor 220 is the second reference voltage Vref2, which corresponds to the fourth working state of the voltage control module 110.
[0156] It can be seen that the present application can also achieve the purpose of voltage control of the second plate 212 of the first capacitor 210 and the second plate 222 of the second capacitor 220 by the voltage control module 110 through the first clock signal CLK1 and the second clock signal CLK2 output by the first clock output unit 111 and the second clock output unit 112.
[0157] For example, the first clock output unit 111 and the second clock output unit 112 may include, but are not limited to, circuits that can generate clock signals, such as an RC oscillator, a crystal oscillator, and a phase-locked loop.
[0158] In some embodiments of this application, see Figure 15 , Figure 15 Another schematic diagram of the capacitance module detection circuit 100 in an embodiment of the present application is shown, wherein the measurement module 120 includes a first operational amplifier OP1 and an integrating capacitor CI; the inverting input terminal of the first operational amplifier OP1 is connected to the second plate 232 of the third capacitor 230, and the non-inverting input terminal of the first operational amplifier OP1 is connected to the ground terminal; the first plate of the integrating capacitor CI is connected to the inverting input terminal of the first operational amplifier OP1, and the second plate of the integrating capacitor CI is connected to the output terminal of the first operational amplifier OP1.
[0159] It should be noted that the first operational amplifier OP1 and the integrating capacitor CI form an integrator, which can integrate the charge output by the second plate 232 of the third capacitor 230, thereby converting the charge signal into a voltage signal. After the voltage signal is further converted into a digital signal through a related analog-to-digital conversion circuit, a first digital signal Dout1 related to the first capacitance value and a second digital signal Dout2 related to the second capacitance value can be output.
[0160] For example, in Figure 15 In the embodiment, the measurement module 120 further includes an integrating switch SI and an analog-to-digital converter ADC; a first end of the integrating switch SI is connected to the inverting input end of the first operational amplifier OP1, and a second end of the integrating switch SI is connected to the output end of the first operational amplifier OP1; an input end of the analog-to-digital converter ADC is connected to the output end of the first operational amplifier OP1, and the analog-to-digital converter ADC is used to output a first digital signal Dout1 and a second digital signal Dout2.
[0161] When the voltage control module 110 is in the first working state, the first switch S1, the fourth switch S4, and the integrating switch S1 are closed, and the second switch S2 and the third switch S3 are opened. Due to the virtual short and virtual off characteristics of the first operational amplifier OP1, the voltage at the inverting input terminal of the first operational amplifier OP1 is the ground voltage. Similarly, when the voltage control module 110 is in the second working state, the first switch S1, the fourth switch S4, and the integrating switch are opened, and the second switch S2 and the third switch S3 are closed. Due to the virtual short and virtual off characteristics of the first operational amplifier OP1, the voltage at the inverting input terminal of the first operational amplifier OP1 is the ground voltage. Therefore, the first working state is switched to the second working state. According to the law of charge conservation:
[0162] (VX1-Vref1)*C1+(VX1-Vref2)*C2+VX1*C3=(VX2-Vref2)*C1+(VX2-Vref1
[0163] )*C2+VX2*C3
[0164] After conversion according to the above formula, we can know that:
[0165] (VX1-VX2)*(C1+C2+C3)=(C1-C2)*(Vref1-Vref2)
[0166] The charge released by the second plate 232 of the third capacitor 230 satisfies the following formula:
[0167] △Q1=(VX2-VX1)*C3
[0168] It can be seen that the charge released by the second plate 232 of the third capacitor 230 can be calculated according to the following formula:
[0169]
[0170] Since the charge released by the second plate 232 of the third capacitor 230 is integrated by the integrating capacitor CI, the voltage difference across the integrating capacitor CI is:
[0171]
[0172] Vout1 is the voltage output by the integrating capacitor CI when the voltage control module 110 switches from the first working state to the third working state.
[0173] Finally, after the analog-to-digital converter ADC converts the voltage output by the integrating capacitor CI, the first digital signal Dout1 obtained is:
[0174] Dout1=Vout1*k
[0175] Wherein, k is the conversion coefficient of the analog-to-digital converter ADC.
[0176] Similarly, when the voltage control module 110 switches from the third working state to the fourth working state, the voltage output by the integral capacitor CI is:
[0177]
[0178] Vout2 is the voltage output by the integrating capacitor CI when the voltage control module 110 switches from the third working state to the fourth working state.
[0179] Finally, after the analog-to-digital converter ADC converts the voltage output by the integrating capacitor CI, the second digital signal Dout2 obtained is:
[0180] Dout2=Vout2*k
[0181] According to the above formula, it can be seen that the first digital signal Dout1 is related to the difference between the capacitance values of the first capacitor 210 and the second capacitor 220, and the second digital signal Dout2 is related to the sum of the capacitance values of the first capacitor 210 and the second capacitor 220. Therefore, the movement distance of the detection object can be calculated using the first digital signal Dout1 and the second digital signal Dout2. The relevant calculation process can be referred to the above content and will not be repeated here.
[0182] In some embodiments of the present application, for example, for an embodiment in which the voltage control module 110 includes a first clock output unit 111 and a second clock output unit 112, see Figure 16 , Figure 16 Another schematic diagram of the capacitor module detection circuit 100 in an embodiment of the present application is shown, wherein the measurement module 120 also includes a feedback resistor RI, a demodulation unit Demod and an analog-to-digital converter ADC; the first end of the feedback resistor RI is connected to the inverting input end of the first operational amplifier OP1, and the second end of the feedback resistor RI is connected to the output end of the first operational amplifier OP1; the demodulation unit Demod is used to demodulate the continuous voltage signal output by the first operational amplifier OP1 into a discrete signal, and the analog-to-digital converter ADC is used to output a first digital signal Dout1 and a second digital signal Dout2 according to the discrete signal.
[0183] It should be noted that the feedback resistor RI, the first operational amplifier OP1 and the integrating capacitor CI form a charge amplifier, which can convert the charge signal output by the second capacitor 220 into a continuous voltage signal, and the demodulation unit Demod can demodulate the continuous voltage signal output by the first operational amplifier OP1 into a discrete signal. For example, the voltage signals Vout1 and Vout2 in the above embodiment are obtained by demodulation, and the analog-to-digital converter ADC performs analog-to-digital conversion to output the first digital signal Dout1 and the second digital signal Dout2. The first digital signal Dout1 and the second digital signal Dout2 can then be used to calculate the moving distance of the detection object.
[0184] In some embodiments of this application, see Figure 17 , Figure 17Another schematic diagram of the capacitor module detection circuit 100 in an embodiment of the present application is shown, wherein the measurement module 120 also includes a first integrating switch SIn, a second integrating switch SIp, a quantizer Qt and a digital-to-analog converter DAC; the first end of the first integrating switch SIn is connected to the inverting input end of the first operational amplifier OP1, and the second end of the first integrating switch SIn is connected to the output end of the first operational amplifier OP1; the first end of the second integrating switch SIp is connected to the inverting input end of the first operational amplifier OP1, and the second end of the second integrating switch SIp is connected to the first plate of the integrating capacitor CI; the quantizer Qt is connected to the output end of the first operational amplifier OP1, the input end of the digital-to-analog converter DAC is connected to the output end of the quantizer Qt, and the output end of the digital-to-analog converter DAC is connected to the inverting input end of the first operational amplifier OP1.
[0185] It should be noted that in the first and third operating states of the voltage control module 110, the first integrating switch SIn is closed and the second integrating switch SIp is open. In the second and fourth operating states of the voltage control module 110, the first integrating switch SIn is open and the second integrating switch SIp is closed. This allows the integrating capacitor CI to integrate the charge output from the second plate 232 of the third capacitor 230 in the second and fourth operating states of the voltage control module 110. Furthermore, the first integrating switch SIn, the second integrating switch SIp, the integrating capacitor CI, the first operational amplifier OP1, the quantizer Qt, and the digital-to-analog converter DAC form part of an SD ADC (Sigma-Delta ADC). Therefore, based on the analog-to-digital conversion principle of the SD ADC, the charge input from the second plate 232 of the third capacitor 230 over multiple cycles can be quantized and output as a first digital signal Dout1 and a second digital signal Dout2.
[0186] In some embodiments of the present application, for example, for an embodiment in which the voltage control module 110 includes a first clock output unit 111 and a second clock output unit 112, see Figure 18 , Figure 18Another schematic diagram of the capacitor module detection circuit 100 in an embodiment of the present application is shown, wherein the measurement module 120 also includes a demodulation unit Demod, a quantizer Qt and a digital-to-analog converter DAC; the input end of the demodulation unit Demod is connected to the second plate 232 of the third capacitor 230, and the output end of the demodulation unit Demod is connected to the inverting input end of the first operational amplifier OP1, and the demodulation unit Demod is used to demodulate the continuous charge signal output by the second plate 232 of the third capacitor 230 into a discrete signal; the quantizer Qt is connected to the output end of the first operational amplifier OP1, the input end of the digital-to-analog converter DAC is connected to the output end of the quantizer Qt, and the output end of the digital-to-analog converter DAC is connected to the inverting input end of the first operational amplifier OP1.
[0187] It should be noted that when the second plate 212 of the first capacitor 210 and the second plate 222 of the second capacitor 220 are connected to the clock signal, the second plate 232 of the third capacitor 230 outputs a continuous charge signal (i.e., a current signal). The demodulation unit Demod can demodulate the continuous charge signal output by the second plate 232 of the third capacitor 230 into a discrete signal. For example, the continuous charge signal can be demodulated into the △Q1 and △Q2 signals described in the aforementioned embodiment. After the SD ADC composed of the integrating capacitor CI, the first operational amplifier OP1, the quantizer Qt and the digital-to-analog converter DAC performs analog-to-digital conversion on △Q1 and △Q2, the first digital signal Dout1 or the second digital signal Dout2 can be obtained.
[0188] In some embodiments of the present application, for example, for an embodiment in which the voltage control module 110 includes a first clock output unit 111 and a second clock output unit 112, see Figure 19 , Figure 19 Another schematic diagram of the capacitance module detection circuit 100 in the embodiment of the present application is shown, wherein, relative to Figure 18 The measurement module 120 further includes a current mirror CM; an input end of the current mirror CM is connected to the second plate 232 of the third capacitor 230, and an output end of the current mirror CM is connected to the input end of the demodulation unit Demod.
[0189] It should be noted that the metal structure of the second plate 232 of the third capacitor 230 and the input port of the capacitor module detection circuit 100 may also have a parasitic capacitance phenomenon, which may cause the charge released by the second plate 232 of the third capacitor 230 to be absorbed by the parasitic capacitance, thereby causing the problem of decreased measurement accuracy. In the above embodiment, since a current mirror CM is further provided, the current mirror CM can mirror the current signal formed by the charge released by the second plate 232 of the third capacitor 230, and input the mirrored current to the demodulation unit Demod for demodulation, ensuring that the measurement module 120 normally outputs the first digital signal Dout1 and the second digital signal Dout2; at the same time, the current mirror CM isolates the influence of the parasitic capacitance between the second plate 232 of the third capacitor 230 and the input port of the capacitor module detection circuit 100, thereby facilitating improving the measurement accuracy of the capacitor module detection circuit 100 of the present application.
[0190] It is worth noting that the above contents about the capacitor module detection circuit 100 are intended to clearly illustrate the implementation verification process of the present application. Those skilled in the art can also make equivalent modified designs under the guidance of the present application. For example, see Figure 20 , Figure 20 Another schematic diagram of the capacitance module detection circuit 100 in an embodiment of the present application is shown. Those skilled in the art can further set a capacitor Cdummy, another set of integrating capacitors CI connected to the non-inverting input terminal and the inverting output terminal of the first operational amplifier OP1, and an integrating switch SI, thereby modifying the measurement module 120 of the present application from a single-ended circuit structure to a fully differential circuit structure.
[0191] Furthermore, an embodiment of the present application also provides a chip, which includes the above-mentioned capacitor module detection circuit 100. A chip (Integrated Circuit, IC) is also called a chip, and the chip can be, but is not limited to, a SOC (System on Chip) chip or a SIP (System in Package) chip. Since the chip of the present application has the capacitor module detection circuit 100 described in the above embodiment, it has all the beneficial effects of the capacitor module detection circuit 100 in the above embodiment, which will not be repeated here.
[0192] Furthermore, in order to better implement the capacitor module detection circuit 100 in the embodiment of the present application, based on the chip having the capacitor module detection circuit 100, the present application also provides an optical lens movement detection device, see Figure 21 , Figure 21A schematic diagram of an optical lens movement detection device in an embodiment of the present application is shown, wherein the optical lens movement detection device includes: a chip 1000 as described in any of the above embodiments, the chip 1000 having a first output pin TX1, a second output pin TX1 and a first input pin RX; a capacitor module 200, the capacitor module 200 including a first capacitor 210, a second capacitor 220 and a third capacitor 230, the first plate 211 of the first capacitor 210, the first plate 221 of the second capacitor 220 and the first plate 231 of the third capacitor 230 being electrically connected to each other.
[0193] The sum of the capacitances of the first capacitor 210 and the second capacitor 220 does not change with the movement of the optical lens, while the difference between the capacitances of the first capacitor 210 and the second capacitor 220 changes with the movement of the optical lens. The first output pin TX1 is connected to the second plate 212 of the first capacitor 210 to control the voltage of the second plate 212 of the first capacitor 210, the second output pin TX2 is connected to the second plate 222 of the second capacitor 220 to control the voltage of the second plate 222 of the second capacitor 220, and the first input pin RX is connected to the second plate 232 of the third capacitor 230 to measure the movement distance of the optical lens based on the amount of charge released by the second plate 232 of the third capacitor 230. The optical lens movement detection device of the embodiment of the present application only needs to electrically connect the first capacitor 210, the second capacitor 220, and the second plate 232 of the third capacitor 230, without having to electrically connect a movable plate and a fixed plate of the same capacitor, thereby reducing the manufacturing difficulty of the optical lens movement detection device.
[0194] Furthermore, to better implement the optical lens movement detection device in the embodiments of the present application, the present application also provides a focus motor based on the optical lens movement detection device. The focus motor includes the optical lens movement detection device described in any of the above embodiments. Because the focus motor in the embodiments of the present application is provided with the optical lens movement detection device described in the above embodiments, it has all the beneficial effects of the above optical lens movement detection devices, and will not be further described here.
[0195] Furthermore, to better implement the focus motor in the embodiments of the present application, the present application also provides a camera module based on the focus motor, which includes the focus motor as described in any of the above embodiments. Since the camera module in the embodiments of the present application is provided with the optical lens movement detection device of the above embodiments, it has all the beneficial effects of the above optical lens movement detection device, and will not be further described here.
[0196] Furthermore, in order to better implement the camera module in the embodiment of the present application, on the basis of the camera module, the present application also provides an electronic device, the electronic device including a camera module as in any of the above embodiments. The electronic device may be, but is not limited to, a display, a car central control panel, a car, a smart wearable device, a mobile terminal, and a smart home device. Smart wearable devices include, but are not limited to, smart watches, smart bracelets, and cervical massagers. Mobile terminals include, but are not limited to, smart phones, laptops, tablet computers, and POS (point of sales terminal). Smart home devices include, but are not limited to, smart sockets, smart rice cookers, smart sweepers, and smart lights. Since the electronic device in the embodiment of the present application is provided with the optical lens movement detection device of the above embodiment, it has all the beneficial effects of the above optical lens movement detection device, which will not be repeated here.
[0197] In the above embodiments, the description of each embodiment has its own focus. For parts that are not described in detail in a certain embodiment, please refer to the detailed description of other embodiments above and will not be repeated here.
[0198] The basic concepts have been described above. It will be apparent to those skilled in the art that the detailed disclosure above is merely illustrative and does not limit the present application. Although not explicitly stated herein, those skilled in the art may make various modifications, improvements, and amendments to the present application. Such modifications, improvements, and amendments are suggested in the present application and remain within the spirit and scope of the exemplary embodiments of the present application.
[0199] At the same time, this application uses specific terms to describe the embodiments of this application. For example, "one embodiment," "an embodiment," and / or "some embodiments" refer to a certain feature, structure, or characteristic related to at least one embodiment of this application. Therefore, it should be emphasized and noted that "one embodiment," "an embodiment," or "an alternative embodiment" mentioned twice or multiple times in different locations in this specification does not necessarily refer to the same embodiment. In addition, certain features, structures, or characteristics in one or more embodiments of this application may be appropriately combined.
[0200] Similarly, it should be noted that, in order to simplify the presentation of this application and thus facilitate understanding of one or more embodiments of the invention, the foregoing descriptions of the embodiments of this application sometimes combine multiple features into a single embodiment, figure, or description thereof. However, this disclosure method does not mean that the subject matter of this application requires more features than those recited in the claims. In fact, an embodiment may have fewer features than all of the features of a single embodiment disclosed above.
[0201] Each patent, patent application, patent application publication, and other materials, such as articles, books, specifications, publications, and documents, cited in this application is hereby incorporated by reference in its entirety, except for any application history that is inconsistent with or conflicts with this application, and excluding any document (currently or subsequently appended to this application) that limits the broadest scope of the claims of this application. It should be noted that if the descriptions, definitions, and / or terminology used in the accompanying materials are inconsistent with or conflict with the content of this application, the descriptions, definitions, and / or terminology used in this application will control.
[0202] The above is a detailed introduction to a capacitor module detection circuit, chip, optical lens movement detection device, focus motor, camera module and electronic device provided in the embodiments of the present application. Specific examples are used in this article to illustrate the principles and implementation methods of the present invention. The description of the above embodiments is only used to help understand the method of the present invention and its core idea; at the same time, for technical personnel in this field, based on the ideas of the present invention, there will be changes in the specific implementation methods and application scope. In summary, the content of this specification should not be understood as a limitation on the present invention.
Claims
1. A capacitance module detection circuit, characterized in that: The capacitor module includes a first capacitor, a second capacitor, and a third capacitor, wherein the first plate of the first capacitor, the first plate of the second capacitor, and the first plate of the third capacitor are electrically connected to each other, and the capacitor module detection circuit includes: a voltage control module, configured to control the voltages of the second plate of the first capacitor and the second plate of the second capacitor; a measuring module, configured to output a first digital signal related to a first capacitance value according to an amount of charge released by the second plate of the third capacitor, and output a second digital signal related to a second capacitance value according to an amount of charge released by the second plate of the third capacitor, during a process in which the voltage control module changes the voltages of the second plate of the first capacitor and the second plate of the second capacitor; The first capacitance value is the difference between the capacitance values of the first capacitance and the second capacitance, the second capacitance value is the sum of the capacitance values of the first capacitance and the second capacitance, and the difference between the capacitance values of the first capacitance and the second capacitance changes with the movement of the detection object; The sum of the capacitance values of the first capacitor and the second capacitor does not change with the movement of the detection object, or the series capacitance value of the first capacitor and the second capacitor does not change with the movement of the detection object.
2. The capacitor module detection circuit according to claim 1, wherein: In the process in which the measuring module outputs a first digital signal related to the first capacitance value according to the amount of charge released by the second plate of the third capacitor, the voltage changes of the second plate of the first capacitor and the second plate of the second capacitor are opposite; When the measuring module outputs a second digital signal related to the second capacitance value according to the amount of charge released by the second plate of the third capacitor, the voltage changes of the second plate of the first capacitor and the second plate of the second capacitor are the same.
3. The capacitor module detection circuit according to claim 2, wherein: The voltage control module has a first working state, a second working state, a third working state and a fourth working state; The measuring module outputs the first digital signal related to the first capacitance value according to the amount of charge released by the second plate of the third capacitor when the voltage control module switches from the first working state to the second working state; The measuring module outputs the second digital signal related to the second capacitance value according to the amount of charge released by the second plate of the third capacitor when the voltage control module switches from the third working state to the fourth working state; Wherein, in the first working state, the voltage control module controls the voltage of the second plate of the first capacitor to be a first reference voltage, and controls the voltage of the second plate of the second capacitor to be a second reference voltage, and the first reference voltage is not equal to the second reference voltage; In the second working state, the voltage control module controls the voltage of the second plate of the first capacitor to be the second reference voltage, and controls the voltage of the second plate of the second capacitor to be the first reference voltage; In the third working state, the voltage control module controls the voltage of the second plate of the first capacitor to be the first reference voltage, and controls the voltage of the second plate of the second capacitor to be the first reference voltage; In the fourth working state, the voltage control module controls the voltage of the second plate of the first capacitor to be the second reference voltage, and controls the voltage of the second plate of the second capacitor to be the second reference voltage.
4. The capacitor module detection circuit according to claim 3, wherein: The voltage control module includes a first switch, a second switch, a third switch and a fourth switch; A first end of the first switch is connected to the first reference voltage, and a second end of the first switch is connected to the second plate of the first capacitor; A first end of the second switch is connected to the second reference voltage, and a second end of the second switch is connected to the second plate of the first capacitor; A first end of the third switch is connected to the first reference voltage, and a second end of the third switch is connected to the second plate of the second capacitor; A first end of the fourth switch is connected to the second reference voltage, and a second end of the fourth switch is connected to the second plate of the second capacitor.
5. The capacitor module detection circuit according to claim 3, wherein: The voltage control module includes a first clock output unit and a second clock output unit; The first clock output unit is configured to output a first clock signal whose high level is the first reference voltage and whose low level is the second reference voltage; The second clock output unit is configured to output a second clock signal whose high level is the first reference voltage and whose low level is the second reference voltage; The first clock signal and the second clock signal are in opposite phases.
6. The capacitor module detection circuit according to claim 1, wherein: The measurement module includes a first operational amplifier and an integrating capacitor; The inverting input terminal of the first operational amplifier is connected to the second plate of the third capacitor, and the non-inverting input terminal of the first operational amplifier is connected to the ground terminal; The first plate of the integrating capacitor is connected to the inverting input terminal of the first operational amplifier, and the second plate of the integrating capacitor is connected to the output terminal of the first operational amplifier.
7. The capacitor module detection circuit according to claim 6, wherein: The measurement module also includes an integration switch and an analog-to-digital converter; A first end of the integration switch is connected to an inverting input end of the first operational amplifier, and a second end of the integration switch is connected to an output end of the first operational amplifier; The input end of the analog-to-digital converter is connected to the output end of the first operational amplifier, and the analog-to-digital converter is used to output the first digital signal and the second digital signal.
8. The capacitor module detection circuit according to claim 6, wherein: The measurement module also includes a feedback resistor, a demodulation unit and an analog-to-digital converter; The first end of the feedback resistor is connected to the inverting input terminal of the first operational amplifier, and the second end of the feedback resistor is connected to the output terminal of the first operational amplifier; The demodulation unit is used to demodulate the continuous voltage signal output by the first operational amplifier into a discrete signal, and the analog-to-digital converter is used to output the first digital signal and the second digital signal according to the discrete signal.
9. The capacitor module detection circuit according to claim 6, wherein: The measurement module further includes a first integrating switch, a second integrating switch, a quantizer, and a digital-to-analog converter; A first terminal of the first integrating switch is connected to an inverting input terminal of the first operational amplifier, and a second terminal of the first integrating switch is connected to an output terminal of the first operational amplifier; A first end of the second integrating switch is connected to the inverting input terminal of the first operational amplifier, and a second end of the second integrating switch is connected to the first plate of the integrating capacitor; The quantizer is connected to the output end of the first operational amplifier, the input end of the digital-to-analog converter is connected to the output end of the quantizer, and the output end of the digital-to-analog converter is connected to the inverting input end of the first operational amplifier.
10. The capacitor module detection circuit according to claim 6, wherein: The measurement module also includes a demodulation unit, a quantizer and a digital-to-analog converter; The input end of the demodulation unit is connected to the second plate of the third capacitor, and the output end of the demodulation unit is connected to the inverting input end of the first operational amplifier, and the demodulation unit is used to demodulate the continuous charge signal output by the second plate of the third capacitor into a discrete signal; The quantizer is connected to the output end of the first operational amplifier, the input end of the digital-to-analog converter is connected to the output end of the quantizer, and the output end of the digital-to-analog converter is connected to the inverting input end of the first operational amplifier.
11. The capacitor module detection circuit according to claim 10, wherein: The measurement module also includes a current mirror; The input end of the current mirror is connected to the second plate of the third capacitor, and the output end of the current mirror is connected to the input end of the demodulation unit.
12. A chip, characterized in that: The method comprises the capacitor module detection circuit according to any one of claims 1 to 11.
13. An optical lens movement detection device, characterized in that: include: The chip according to claim 12, wherein the chip has a first output pin, a second output pin, and a first input pin; a capacitor module, the capacitor module comprising a first capacitor, a second capacitor, and a third capacitor, wherein the first plate of the first capacitor, the first plate of the second capacitor, and the first plate of the third capacitor are electrically connected to each other; wherein the difference between the capacitance values of the first capacitor and the second capacitor changes as the optical lens moves; The sum of the capacitance values of the first capacitor and the second capacitor does not change with the movement of the detection object, or the series capacitance value of the first capacitor and the second capacitor does not change with the movement of the detection object; The first output pin is connected to the second plate of the first capacitor to control the voltage of the second plate of the first capacitor, the second output pin is connected to the second plate of the second capacitor to control the voltage of the second plate of the second capacitor, and the first input pin is connected to the second plate of the third capacitor to measure the moving distance of the optical lens according to the amount of charge released by the second plate of the third capacitor.
14. A focus motor, characterized in that: Comprising the optical lens movement detection device as claimed in claim 13.
15. A camera module, characterized in that: Comprising the focus motor as claimed in claim 14.
16. An electronic device, characterized in that: Including the camera module as described in claim 15.
Citation Information
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Optical lens three-dimensional movement detection device and method, computer readable storage medium, focusing motor, camera module and electronic equipment
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