Data encryption method and device based on parallelism configurable SM3 algorithm

Abstract

The invention provides a data encryption method and device based on a parallelism configurable SM3 algorithm, and relates to the technical field of data encryption, and the method comprises the steps: carrying out the message filling of a to-be-encrypted message, grouping the obtained filled messages, and obtaining a plurality of message groups; based on a pre-configured first degree of parallelism, performing message expansion on each message group to obtain a plurality of message words corresponding to each message group; wherein the first degree of parallelism represents that at least one message extension module is cascaded, and the message extension module is used for generating the message word; and performing data encryption on the to-be-encrypted message based on each message word corresponding to each message group to obtain encrypted data. Through the pre-configured first parallelism degree, the message extension of each message group is realized, and the pre-configured first parallelism degree can be adjusted according to actual conditions, so that data encryption is realized, and the throughput rate of hardware design can be improved.

Description

Technical Field

[0001] The present invention relates to the technical field of data encryption, and in particular to a data encryption method and device based on a configurable parallelism SM3 algorithm. Background Art

[0002] In recent years, with the accelerated development of my country's digital economy, the total amount of data in society has grown explosively. There are higher requirements for improving computing power, that is, improving data processing capabilities, and increasing data storage speed. Similarly, information security cannot be ignored during high-speed data transmission and processing. Therefore, improving the ability to ensure information security is of great significance.

[0003] Cryptography technology is the core of the development of the modern information security technology industry. Among them, the cryptographic hash algorithm (SM3) is widely used in network security and digital signatures due to its security, efficiency and applicability. With the continuous development of technology, the demand for hardware encryption efficiency of the SM3 algorithm has also increased. At present, the SM3 algorithm mainly relies on pipeline technology to improve execution efficiency and speed. Due to the dependency between adjacent iterative calculations, it is difficult to improve the throughput of hardware design by pipeline technology alone. Summary of the invention

[0004] The present invention provides a data encryption method and device based on a configurable parallelism SM3 algorithm, which are used to solve the problem of difficulty in improving the throughput rate of hardware design.

[0005] The present invention provides a data encryption method based on a configurable parallelism SM3 algorithm, comprising: Grouping padded messages obtained after performing message padding on the message to be encrypted to obtain multiple message groups; Based on a pre-configured first parallelism, each of the message groups is message expanded to obtain a plurality of message words corresponding to each of the message groups; wherein the first parallelism represents at least one message expansion module cascaded, and the message expansion module is used to generate the message words; Based on the message words corresponding to the message groups, the message to be encrypted is encrypted to obtain encrypted data.

[0006] According to a data encryption method based on a configurable parallelism SM3 algorithm provided by the present invention, the method encrypts the message to be encrypted based on the message words corresponding to the message groups to obtain the encrypted data, including: Based on a pre-configured second parallelism and the message words corresponding to each message group, the message to be encrypted is encrypted to obtain the encrypted data; the second parallelism represents at least one message iteration module cascaded, and the message iteration module is used to generate the encrypted data.

[0007] According to a data encryption method based on a configurable parallelism SM3 algorithm provided by the present invention, based on a pre-configured first parallelism, performing message expansion on each message group to obtain a plurality of message words corresponding to each message group includes: For each of the message groups, dividing the message group into a plurality of first message words; Determining a clock cycle required for message expansion based on the number of cascaded message expansion modules represented by the first degree of parallelism; obtaining a plurality of second message words based on a clock cycle required for the message extension, each of the first message words, and the at least one message extension module represented by a preconfigured first parallelism; The first message words and the second message words are determined as a plurality of message words corresponding to the message group.

[0008] According to a data encryption method based on a configurable parallelism SM3 algorithm provided by the present invention, the at least one message extension module based on the clock cycle, each of the first message words and the preconfigured first parallelism representation obtains a plurality of second message words, including: In a clock cycle required for current message extension, each of the first message words is input into a first message extension module in the at least one message extension module, and a plurality of third message words output by a last message extension module in the at least one message extension module are obtained; In a clock cycle required for the next message extension, each of the third message words and each of the first message words are input into the first message extension module in the at least one message extension module to obtain a plurality of fourth message words output by the last message extension module in the at least one message extension module; Repeat the above steps until all clock cycles required for message expansion are completed, thereby obtaining a plurality of fifth message words; The third message words, the fourth message words and the fifth message words are determined as the second message words.

[0009] According to a data encryption method based on a configurable parallelism SM3 algorithm provided by the present invention, the method encrypts the message to be encrypted based on a preconfigured second parallelism and each message word corresponding to each message group to obtain the encrypted data, including: Determining a clock cycle required for message iteration based on the number of cascaded message iteration modules represented by the second parallelism; Based on the clock cycle required for the message iteration, the message words corresponding to the message groups respectively, and the at least one message iteration module represented by the pre-configured second parallelism, the message to be encrypted is encrypted to obtain the encrypted data.

[0010] According to a data encryption method based on a configurable parallelism SM3 algorithm provided by the present invention, the at least one message iteration module based on the clock cycle required for the message iteration, the message words corresponding to the message groups, and the pre-configured second parallelism represents, encrypts the message to be encrypted to obtain the encrypted data, including: In the clock cycle required for the current message iteration, the result of the previous iteration, the message words and addressing variables respectively corresponding to the message groups are input into the first message iteration module in the at least one message iteration module, and the iteration result output by the last message iteration module in the at least one message iteration module is obtained; In the next clock cycle required for the message iteration, the iteration result of the previous clock cycle, the message words corresponding to the message groups, and the new addressing variable are input into the first message iteration module in the at least one message iteration module to obtain the iteration result output by the last message iteration module in the at least one message iteration module; The above steps are repeated until all clock cycles required for message iterations are completed, and finally the encrypted data is obtained.

[0011] The present invention also provides a data encryption device based on a configurable parallelism SM3 algorithm, comprising: A grouping module, used for grouping padded messages obtained after performing message padding on the message to be encrypted, to obtain a plurality of message groups; An expansion module, used to perform message expansion on each of the message groups based on a pre-configured first parallelism to obtain a plurality of message words corresponding to each of the message groups; wherein the first parallelism represents at least one message expansion module cascaded, and the message expansion module is used to generate the message words; The encryption module is used to encrypt the message to be encrypted based on the message words corresponding to the message groups to obtain encrypted data.

[0012] The present invention also provides an electronic device, comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein when the processor executes the computer program, the data encryption method based on the SM3 algorithm with configurable parallelism as described in any one of the above is implemented.

[0013] The present invention also provides a non-transitory computer-readable storage medium having a computer program stored thereon. When the computer program is executed by a processor, the data encryption method based on the SM3 algorithm with configurable parallelism as described in any one of the above is implemented.

[0014] The present invention also provides a computer program product, comprising a computer program, wherein when the computer program is executed by a processor, the data encryption method based on the SM3 algorithm with configurable parallelism as described in any one of the above is implemented.

[0015] The data encryption method and device based on the SM3 algorithm with configurable parallelism provided by the present invention, by grouping the filled messages obtained after message filling for the to-be-encrypted messages, a plurality of message groups are obtained; based on the pre-configured first parallelism, each of the message groups is message expanded to obtain a plurality of message words corresponding to each of the message groups; wherein the first parallelism represents at least one message expansion module cascade, and the message expansion module is used to generate the message words; based on each of the message words corresponding to each of the message groups, data encryption is performed on the to-be-encrypted messages to obtain the encrypted data. The message expansion of each message group is realized by the pre-configured first parallelism, and the pre-configured first parallelism can be adjusted according to the actual situation, thereby realizing data encryption, which can improve the throughput of the hardware design. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] In order to more clearly illustrate the technical solutions in the present invention or the prior art, the following briefly introduces the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0017] Figure 1 It is a flowchart of the SM3 algorithm provided by the prior art.

[0018] Figure 2 It is a flow chart of a data encryption method based on the SM3 algorithm with configurable parallelism provided by the present invention.

[0019] Figure 3 It is a schematic diagram of message filling provided by the present invention.

[0020] Figure 4 It is a schematic diagram of the calculation process of the message expansion module provided by the present invention.

[0021] Figure 5 It is a schematic diagram of the message iterative calculation process provided by the present invention.

[0022] Figure 6It is a comparison diagram of iterative calculation processes of the message iteration module provided by the present invention with the second parallelism being 1 and 4 respectively.

[0023] Figure 7 It is a structural schematic diagram of a data encryption device based on the SM3 algorithm with configurable parallelism provided by the present invention.

[0024] Figure 8 It is a structural schematic diagram of the electronic device provided by the present invention. DETAILED DESCRIPTION

[0025] In order to make the purpose, technical solution and advantages of the present invention clearer, the technical solution of the present invention will be clearly and completely described below in conjunction with the drawings of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0026] In order to facilitate a clearer understanding of the embodiments of the present application, the relevant knowledge is first introduced as follows.

[0027] The SM3 algorithm adopts a block cipher structure design, and uses nonlinear functions and shift and XOR logic operations to achieve input data obfuscation and diffusion to ensure data security. The encryption process of the SM3 algorithm includes steps such as message padding, message expansion, and iterative encryption, and finally generates a hash value as the encryption result of the data. Among them, SM3 contains a large number of shift XOR and other logic operations. The main advantage of hardware implementation of the SM3 algorithm is that it can perform logical operations and assignments on a large number of variables at the same time, and can realize parallel operations.

[0028] 1. SM3 algorithm principle.

[0029] Figure 1 It is a flow chart of the SM3 algorithm provided by the prior art, such as Figure 1 As shown in the figure, the SM3 algorithm is implemented in three steps: message padding, message extension, and iterative process. The input (Input_data(m)) of the SM3 cryptographic hash algorithm is a length less than 2. 64 The message of bits is filled, expanded and iteratively compressed to generate a hash value (output_data(V i+1 )), the length of the hash value is 256 bits.

[0030] (1) Message padding.

[0031] Assumption Message The length is bits, first add the bit "1" to the end of the message, then add "0", is satisfied The smallest non-negative integer, and then add a 64-bit bit string, which is the length The binary representation of .

[0032] (2) Message extension (Extend).

[0033] The padded messages are grouped into groups of 512 bits in length, and the grouped messages are numbered to obtain … ,in .

[0034] Grouping messages Extension, generate message word , , …, , , , …, , used for compression function .

[0035] a) First group the messages Divided into 16 words , , …, .

[0036] b) FOR j = 16 TO 67

[0037] W j ←P 1 (W j-16 ⊕W j-9 ⊕(W j-3 <<<15))⊕(W j-13 <<<7) ⊕W j-6

[0038] ENDFOR

[0039] c) FOR j = 0 TO 63

[0040] ←W j ⊕W j+4

[0041] ENDFOR

[0042] (3) Iteration process (Iterate).

[0043] Group messages Iterate as follows: FOR i=0 TO n -1

[0044] V i+1 =CF(V i , B i )

[0045] ENDFOR

[0046] Where CF represents the compression function. When i=0, V 0 Represents the initialization vector (IV) recommended in the SM3 algorithm, with a length of 256 bits. The result of the last iteration is V n .

[0047] The compression function calculation process is as follows: ABCDEFGH←V i

[0048] FOR j=0 TO 63

[0049] SS1←((A<<<12)+E+(T j << <j))<<<7

[0050] SS2←SS1⊕(A<<<12)

[0051] TT1←FF j (A,B,C)+D+SS2+

[0052] TT2←GG j (E, F, G) + H + SS1 + W j

[0053] D←C

[0054] C←B<<<9

[0055] B←A

[0056] A←TT1

[0057] H←G

[0058] G←F<<<19

[0059] F←E

[0060] E←P 0 (TT2)

[0061] ENDFOR V i+1 ←ABCDEFGH⊕V i

[0062] Among them, A, B, C, D, E, F, G, H are word registers, SS1, SS2, TT1, TT2 are intermediate variables, and the word storage method is big endian. The final output 256-bit hash value is y=ABCDEFGH.

[0063] The constants are: The Boolean function is:

[0064] The permutation function is:

[0065] Among them, X, Y, and Z are all characters.

[0066] Combine the following Figure 2-Figure 6 The present invention describes a data encryption method based on the SM3 algorithm with configurable parallelism.

[0067] Figure 2 FIG. 1 is a flow chart of a data encryption method based on the SM3 algorithm with configurable parallelism provided by the present invention, such as Figure 2 As shown, the method includes the following steps 201 to 203.

[0068] Step 201: Group the padded messages obtained after performing message padding on the message to be encrypted to obtain multiple message groups.

[0069] It should be noted that the data encryption method based on the SM3 algorithm with configurable parallelism provided by the present invention can be applied to the scenario of improving the throughput of hardware design. The method can be implemented on a hardware device using the Verilog hardware description language. The executor of the method can be a data encryption device based on the SM3 algorithm with configurable parallelism, such as an electronic device, or a control module in the data encryption device based on the SM3 algorithm with configurable parallelism for executing the data encryption method based on the SM3 algorithm with configurable parallelism.

[0070] Specifically, after receiving the message m to be encrypted, the message filling module can group the filled message m' obtained after performing message filling on the message m to be encrypted to obtain multiple message groups. , the value range of i is from 0 to n-1.

[0071] Figure 3 It is a schematic diagram of message filling provided by the present invention, such as Figure 3As shown in the figure, the 256-bit encrypted message m is padded, that is, the bit "1" is added to the end of the encrypted message m, and then added "0", is satisfied The smallest non-negative integer, l = 256, and then add a 64-bit string, which is the length l The binary representation of .

[0072] Step 202: Based on a preconfigured first parallelism, perform message expansion on each of the message groups to obtain a plurality of message words corresponding to each of the message groups; wherein the first parallelism represents at least one message expansion module cascaded, and the message expansion module is used to generate the message words.

[0073] Specifically, the message extension modules Extend are all composed of combinatorial logic. The first parallelism represents at least one message extension module cascade, that is, parallel computing is achieved by cascading multiple message extension modules. The first parallelism is determined based on the number of instantiated message extension modules. For example, the first parallelism can be set to 1, 2, 4, 8, 16, 32 or 64, and the number of instantiations of the message extension module can be passed as a parameter into the message extension module of the SM3 algorithm.

[0074] Based on the pre-configured first parallelism, each message group can be expanded to obtain multiple message words corresponding to each message group ( , , …, , , , …, ).

[0075] Step 203: Based on the message words corresponding to the message groups, encrypt the message to be encrypted to obtain encrypted data.

[0076] The data encryption method based on the SM3 algorithm with configurable parallelism provided by the present invention is to obtain a plurality of message groups by grouping the filled messages obtained after performing message filling on the message to be encrypted; based on the pre-configured first parallelism, each of the message groups is message expanded to obtain a plurality of message words corresponding to each of the message groups; wherein the first parallelism represents at least one message expansion module cascade, and the message expansion module is used to generate the message words; based on each of the message words corresponding to each of the message groups, the message to be encrypted is data encrypted to obtain the encrypted data. The message expansion of each message group is realized by the pre-configured first parallelism, and the pre-configured first parallelism can be adjusted according to the actual situation, thereby realizing data encryption, which can improve the throughput of the hardware design.

[0077] Optionally, a specific implementation of step 202 includes: (1) For each of the message packets, the message packet is divided into a plurality of first message words.

[0078] Specifically, for each message group , the message group can be divided into multiple first message words, that is, divided into 16 first message words ( , , …, ).

[0079] (2) Determine the clock cycle required for message expansion based on the number of cascaded message expansion modules represented by the first parallelism.

[0080] Specifically, based on the number of cascaded message expansion modules represented by the first parallelism, the clock cycle required for message expansion can be determined. For example, if the number of cascaded message expansion modules represented by the first parallelism is 1, that is, only one message expansion module is instantiated, then 64 clock cycles are required to complete the message expansion; if the number of cascaded message expansion modules represented by the first parallelism is 4, that is, four message expansion modules are instantiated, then 16 clock cycles are required to complete the message expansion.

[0081] (3) Based on the clock cycle required for the message extension, each of the first message words and the at least one message extension module represented by the pre-configured first parallelism, a plurality of second message words are obtained.

[0082] Specifically, based on the clock cycle required for message extension, each first message word ( , , …, ) and at least one message expansion module represented by a preconfigured first parallelism, multiple second message words can be obtained ( , …, , , , …, ).

[0083] (4) Determine each of the first message words and each of the second message words as a plurality of message words corresponding to the message group.

[0084] Specifically, each first message word ( , , …, ) and each of the second message words ( , …, , , , …, ), determine the multiple message words corresponding to the message group ( , , …, , , , …, ).

[0085] Optionally, the at least one message extension module represented based on the clock cycle, each of the first message words and a preconfigured first parallelism obtains a plurality of second message words, including: (3-1) Within a clock cycle required for current message extension, each of the first message words is input into a first message extension module among the at least one message extension module to obtain a plurality of third message words output by a last message extension module among the at least one message extension module.

[0086] Specifically, within the clock cycle required for the current message extension, each first message word ( , , …, ) is stored in the designed register REG_0 and used as the input of the first message expansion module. , , …, ) is input to a first message extension module in at least one message extension module, the output of the first message extension module is input to a second message extension module, the output of the second message extension module is input to a third message extension module, and so on, until the last message extension module, finally obtaining multiple third message words output by the last message extension module.

[0087] For example, when the number of cascaded message expansion modules represented by the first parallelism is 1, each first message word ( , , …, ) is stored in the designed register REG_0 and used as the input of the message extension module. The output of the message extension module is and , …, .Will Stored in register REG_1, Will be stored in REG_0.

[0088] When the number of cascaded message extension modules represented by the first parallelism is 2, the message extension modules are instantiated twice between REG_0 and REG_1, that is, the output of the first message extension module Extend0 is connected to the input of Extend1, and the output of Extend1 is obtained. , .

[0089] (3-2) Within a clock cycle required for the next message extension, each of the third message words and each of the first message words are input into the first message extension module in the at least one message extension module to obtain a plurality of fourth message words output by the last message extension module in the at least one message extension module.

[0090] Specifically, within the clock cycle required for the next message extension, each third message word and each first message word are input into the first message extension module in at least one message extension module, and multiple fourth message words output by the last message extension module in at least one message extension module can be obtained.

[0091] (3-3) Repeat the above steps until all clock cycles required for message extension are completed, and obtain multiple fifth message words.

[0092] (3-4) Determine each of the third message words, each of the fourth message words, and each of the fifth message words as each of the second message words.

[0093] For example, Figure 4 is a schematic diagram of the calculation process of the message expansion module provided by the present invention, such as Figure 4 As shown, when the number of cascaded message extension modules represented by the first parallelism is 1, that is, only Extend0 is instantiated, and each first message word ( , , …, ) is stored in the designed register REG_0 and used as the input of the message extension module. The output of the message extension module is and , …, , and the third message word is and .Will Stored in register REG_1, will be stored in REG_0. In the next clock cycle required for message extension, The subscript of Extend0 will increase by 1, and the input of Extend0 will become ( , …, ), the third message word and each first message word ( , , …, ) is input to Extend0, and the output of Extend0 is and , …, , and the fourth message word is and .Will Stored in register REG_1, Store it in REG_0. Repeat until all the clock cycles required for message expansion are completed, and multiple fifth message words are obtained, where the fifth message word is , and , , …, Other message words except When the subscript is greater than 67, it is no longer calculated , that is, the output of Extend0 will be implemented by padding 0, and the message extension will be completed after 64 cycles. Among them, the bit width of REG_0 is 2176 bits, and the bit width of REG_1 is 2048 bits.

[0094] For example, when the number of cascaded message extension modules represented by the first parallelism is 2, two message extension modules are instantiated between REG_0 and REG_1, that is, the output of the first message extension module Extend0 is connected to the input of Extend1, and the output of Extend1 is obtained. , , that is, it can be calculated within one clock cycle , In the next clock cycle, The subscript of Extend0 is increased by 2, and the input of Extend0 becomes , …, , the output of Extend0 is connected to the input of Extend1, and the output of Extend1 is obtained , , that is, through two message expansion modules, it can be calculated , By analogy, the message expansion will be completed after 32 clock cycles. Then the next message can be input, and the SM3 message expansion algorithm with configurable parallelism is implemented in this way. When the parallelism is 2, the message processing interval is 32 clock cycles.

[0095] Optionally, the specific implementation of step 203 includes: Based on a pre-configured second parallelism and the message words corresponding to each message group, the message to be encrypted is encrypted to obtain the encrypted data; the second parallelism represents at least one message iteration module cascaded, and the message iteration module is used to generate the encrypted data.

[0096] Specifically, the message iteration module Iterate is still composed of combinatorial logic. The second parallelism represents at least one message iteration module cascade, that is, parallel computing is achieved by cascading multiple message iteration modules. The second parallelism is determined based on the number of instantiated message iteration modules. For example, the second parallelism can be set to 1, 2, 4, 8, 16, 32 or 64, and the number of instantiations of the message iteration module can be passed as a parameter into the message iteration module of the SM3 algorithm.

[0097] Based on the pre-configured second parallelism and the message words corresponding to each message group ( , , …, , , , …, ), encrypt the encrypted message to obtain the encrypted data.

[0098] Optionally, the encrypting the message to be encrypted based on the preconfigured second parallelism and the message words corresponding to the message groups to obtain the encrypted data includes: Based on the number of cascaded message iteration modules represented by the second parallelism, the clock cycle required for message iteration is determined; based on the clock cycle required for message iteration, the message words corresponding to the message groups respectively, and the at least one message iteration module represented by the pre-configured second parallelism, data is encrypted on the message to be encrypted to obtain the encrypted data.

[0099] Specifically, based on the number of cascaded message iteration modules represented by the second parallelism, the clock cycle required for message iteration can be determined. For example, if the number of cascaded message iteration modules represented by the second parallelism is 1, that is, only one message iteration module is instantiated, then 64 clock cycles are required to complete message expansion; if the number of cascaded message iteration modules represented by the second parallelism is 4, that is, four message iteration modules are instantiated, then 16 clock cycles are required to complete message expansion.

[0100] Based on the clock cycle required for message iteration, the message words corresponding to the message groups and at least one message iteration module represented by the pre-configured second parallelism, data encryption can be performed on the message to be encrypted to obtain encrypted data.

[0101] Optionally, the at least one message iteration module based on the clock cycle required for the message iteration, the message words corresponding to the message groups, and the pre-configured second parallelism representation, encrypting the message to be encrypted to obtain the encrypted data, comprises: (1) Within the clock cycle required for the current message iteration, the result of the previous round of iteration, the message words and addressing variables corresponding to each of the message groups are input into the first message iteration module in the at least one message iteration module to obtain the iteration result output by the last message iteration module in the at least one message iteration module.

[0102] Specifically, within the clock cycle required for the current message iteration, the result of the previous iteration is , each message word corresponding to each message group ( and ) and addressing variables Input to the first message iteration module in at least one message iteration module, the output of the first message iteration module is input to the second message iteration module, the output of the second message iteration module is input to the third message iteration module, and so on, until the iteration result output by the last message iteration module.

[0103] It should be noted that the number of cascaded message iteration modules represented by the second parallelism is 1, that is, when only one message iteration module is instantiated, the first message iteration module and the last message iteration module are the same message iteration module.

[0104] (2) In the next clock cycle required for the message iteration, the iteration result of the previous clock cycle, the message words corresponding to the message groups and the new addressing variables are input into the first message iteration module in the at least one message iteration module to obtain the iteration result output by the last message iteration module in the at least one message iteration module.

[0105] Specifically, in the next clock cycle required for message iteration, the iteration result of the previous clock cycle, the message words corresponding to each message group, and the new addressing variable (the new addressing variable and The subscript of changes, for example, j+1 or j+4) is input to the first message iteration module in at least one message iteration module, and the iteration result output by the last message iteration module in at least one message iteration module can be obtained.

[0106] (3) Repeat the above steps until all the clock cycles required for message iteration are completed, and finally obtain the encrypted data.

[0107] For example, Figure 5 It is a schematic diagram of the message iterative calculation process provided by the present invention, such as Figure 5 As shown, it should be noted that the input of the Iterate module is , Output of the message iteration module and , and addressing variables , the output is In one clock cycle, the Iterate module is responsible for one iterative calculation. After one calculation is completed, the addressing variable of the Iterate module is set in the next clock cycle. and The subscript of the message is increased by 1, and the message is iterated 64 times in total, and the final output is .

[0108] For example, when the number of cascaded message iteration modules represented by the second parallelism is 4, that is, four Extends are instantiated, and the results of the round iteration are , each message word corresponding to each message group ( and ) and addressing variables Input to Iterate0, connect the output of Iterate0 to the input of Iterate1, connect the output of Iterate1 to the input of Iterate2, and connect the output of Iterate2 to the input of Iterate3, then you can calculate it in one clock cycle. . Addressing the variable in the next clock cycle and The subscript of Iterate0 will be increased by 4, and the input will become , the calculation can be completed in the next clock cycle , and so on, the final output will be completed after 16 clock cycles of starting the message iteration, realizing the parallel computing of the message iteration. In this way, the SM3 message iteration algorithm with configurable parallelism is implemented. When the parallelism is 4, the message processing interval is 16 clock cycles.

[0109] Figure 6 : is a comparison diagram of the iterative calculation process of the message iteration module provided by the present invention with the second parallelism of 1 and 4 respectively, as shown in FIG. Figure 6 As shown, when the number of cascaded message iteration modules represented by the second parallelism is 1, in one clock cycle, the input of Iterate0 is , and , and j = 0, in the next clock cycle, the input of Iterate1 is the output of Iterate0, and , and j = 1, ..., in the last clock cycle, the input of Iterate63 is the output of Iterate62, and , and j=63, iterate 64 times, and get the final output When the number of cascaded message iteration modules represented by the second parallelism is 4, the input of Iterate0 in one clock cycle is , and , and j=0, the output of Iterate0 is connected to the input of Iterate1, the output of Iterate1 is connected to the input of Iterate2, and the output of Iterate2 is connected to the input of Iterate3, then it can be calculated in one clock cycle . Addressing the variable in the next clock cycle and The subscript of Iterate0 will be increased by 4, and the input will become , the calculation can be completed in the next clock cycle , and so on, the final output will be completed after 16 clock cycles of starting message iteration .

[0110] The method provided by the present invention, the SM3 algorithm uses the Verilog hardware description language to implement a set of plaintext messages in parallel ( ) reduces the computing delay and data processing interval, and improves the data processing efficiency. Moreover, the parallelism of the message expansion module and the message iteration module can be customized, and can also be flexibly configured according to different hardware usage scenarios, so as to be more convenient and efficient to be applied to actual needs. The present invention optimizes a group of plaintext message calculation structures of the SM3 algorithm in parallel, and can maximize the expansion of the pipeline mode through pipeline design on the basis of the present invention, and simultaneously process multiple groups of messages in parallel to achieve high-throughput parallel encryption calculation.

[0111] The data encryption device based on the SM3 algorithm with configurable parallelism provided by the present invention is described below. The data encryption device based on the SM3 algorithm with configurable parallelism described below and the data encryption method based on the SM3 algorithm with configurable parallelism described above can be referenced to each other.

[0112] Figure 7 Schematic diagram of the structure of the data encryption device based on the SM3 algorithm with configurable parallelism provided by the present invention, such as Figure 7 As shown, the data encryption device 700 based on the SM3 algorithm with configurable parallelism includes: a grouping module 701, an expansion module 702 and an encryption module 703; wherein,

[0113] A grouping module 701 is used to group padded messages obtained after performing message padding on the message to be encrypted to obtain multiple message groups; An expansion module 702, configured to perform message expansion on each of the message groups based on a pre-configured first parallelism to obtain a plurality of message words corresponding to each of the message groups; wherein the first parallelism represents a cascade of at least one message expansion module, and the message expansion module is configured to generate the message words; The encryption module 703 is used to encrypt the message to be encrypted based on the message words corresponding to the message groups to obtain encrypted data.

[0114] The data encryption device based on the SM3 algorithm with configurable parallelism provided by the present invention obtains multiple message groups by grouping the filled messages obtained after performing message filling on the message to be encrypted; based on the pre-configured first parallelism, each of the message groups is message expanded to obtain multiple message words corresponding to each of the message groups; wherein the first parallelism represents at least one message expansion module cascade, and the message expansion module is used to generate the message words; based on each of the message words corresponding to each of the message groups, the message to be encrypted is data encrypted to obtain the encrypted data. The message expansion of each message group is realized by the pre-configured first parallelism, and the pre-configured first parallelism can be adjusted according to the actual situation, thereby realizing data encryption, which can improve the throughput of the hardware design.

[0115] Optionally, the encryption module 703 is specifically used to: Based on a pre-configured second parallelism and the message words corresponding to each message group, the message to be encrypted is encrypted to obtain the encrypted data; the second parallelism represents at least one message iteration module cascaded, and the message iteration module is used to generate the encrypted data.

[0116] Optionally, the message extension module 702 is specifically configured to: For each of the message groups, dividing the message group into a plurality of first message words; Determining a clock cycle required for message expansion based on the number of cascaded message expansion modules represented by the first degree of parallelism; obtaining a plurality of second message words based on a clock cycle required for the message extension, each of the first message words, and the at least one message extension module represented by a preconfigured first parallelism; The first message words and the second message words are determined as a plurality of message words corresponding to the message group.

[0117] Optionally, the expansion module 702 is further used to: In a clock cycle required for current message extension, each of the first message words is input into a first message extension module in the at least one message extension module, and a plurality of third message words output by a last message extension module in the at least one message extension module are obtained; In a clock cycle required for the next message extension, each of the third message words and each of the first message words are input into the first message extension module in the at least one message extension module to obtain a plurality of fourth message words output by the last message extension module in the at least one message extension module; Repeat the above steps until all clock cycles required for message expansion are completed, thereby obtaining a plurality of fifth message words; The third message words, the fourth message words and the fifth message words are determined as the second message words.

[0118] Optionally, the encryption module 703 is further used to: Determining a clock cycle required for message iteration based on the number of cascaded message iteration modules represented by the second parallelism; Based on the clock cycle required for the message iteration, the message words corresponding to the message groups, and the at least one message iteration module represented by the pre-configured second parallelism, the message to be encrypted is encrypted to obtain the encrypted data.

[0119] Optionally, the encryption module 703 is further used to: In the clock cycle required for the current message iteration, the result of the previous round of iteration, the message words and addressing variables respectively corresponding to the message groups are input into the first message iteration module in the at least one message iteration module, and the iteration result output by the last message iteration module in the at least one message iteration module is obtained; In the next clock cycle required for the message iteration, the iteration result of the previous clock cycle, the message words corresponding to the message groups, and the new addressing variable are input into the first message iteration module in the at least one message iteration module to obtain the iteration result output by the last message iteration module in the at least one message iteration module; The above steps are repeated until all clock cycles required for message iterations are completed, and finally the encrypted data is obtained.

[0120] Figure 8 is a schematic diagram of the physical structure of an electronic device provided by the present invention, such as Figure 8As shown, the electronic device may include: a processor 810, a communication interface 820, a memory 830 and a communication bus 840, wherein the processor 810, the communication interface 820 and the memory 830 communicate with each other through the communication bus 840. The processor 810 may call the logic instructions in the memory 830 to execute a data encryption method based on the SM3 algorithm with configurable parallelism, the method comprising: grouping the filled messages obtained after the message filling to be encrypted to obtain a plurality of message groups; based on a pre-configured first parallelism, performing message expansion on each of the message groups to obtain a plurality of message words corresponding to each of the message groups; wherein the first parallelism represents at least one message expansion module cascade, the message expansion module is used to generate the message words; based on each of the message words corresponding to each of the message groups, performing data encryption on the message to be encrypted to obtain encrypted data.

[0121] In addition, the logic instructions in the above-mentioned memory 830 can be implemented in the form of a software functional unit and can be stored in a computer-readable storage medium when it is sold or used as an independent product. Based on this understanding, the technical solution of the present invention is essentially or the part that contributes to the prior art or the part of the technical solution can be embodied in the form of a software product, and the computer software product is stored in a storage medium, including a number of instructions to enable a computer device (which can be a personal computer, a server, or a network device, etc.) to perform all or part of the steps of the method described in each embodiment of the present invention. The aforementioned storage medium includes: U disk, mobile hard disk, read-only memory (ROM, Read-Only Memory), random access memory (RAM, Random Access Memory), disk or optical disk and other media that can store program codes.

[0122] On the other hand, the present invention also provides a computer program product, which includes a computer program, and the computer program can be stored on a non-transitory computer-readable storage medium. When the computer program is executed by a processor, the computer can execute the data encryption method based on the SM3 algorithm with configurable parallelism provided by the above methods, and the method includes: grouping the filled messages obtained after message filling to be encrypted to obtain multiple message groups; based on a pre-configured first parallelism, performing message expansion on each of the message groups to obtain multiple message words corresponding to each of the message groups; wherein the first parallelism represents at least one message expansion module cascaded, and the message expansion module is used to generate the message words; based on the message words corresponding to each of the message groups, data encryption is performed on the message to be encrypted to obtain encrypted data.

[0123] On the other hand, the present invention also provides a non-transitory computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, is implemented to execute the data encryption method based on the SM3 algorithm with configurable parallelism provided by the above-mentioned methods, the method comprising: grouping the filled messages obtained after message filling for the encrypted messages to obtain a plurality of message groups; based on a pre-configured first parallelism, performing message expansion on each of the message groups to obtain a plurality of message words corresponding to each of the message groups; wherein the first parallelism represents at least one message expansion module cascaded, and the message expansion module is used to generate the message words; based on the message words corresponding to each of the message groups, data encryption is performed on the message to be encrypted to obtain encrypted data.

[0124] The device embodiments described above are merely illustrative, wherein the units described as separate components may or may not be physically separated, and the components displayed as units may or may not be physical units, that is, they may be located in one place, or they may be distributed on multiple network units. Some or all of the modules may be selected according to actual needs to achieve the purpose of the scheme of this embodiment. Ordinary technicians in this field can understand and implement it without paying creative labor.

[0125] Through the description of the above implementation methods, those skilled in the art can clearly understand that each implementation method can be implemented by means of software plus a necessary general hardware platform, and of course, can also be implemented by hardware. Based on this understanding, the above technical solution is essentially or the part that contributes to the prior art can be embodied in the form of a software product, and the computer software product can be stored in a computer-readable storage medium, such as ROM / RAM, a disk, an optical disk, etc., including a number of instructions for a computer device (which can be a personal computer, a server, or a network device, etc.) to execute the methods described in each embodiment or some parts of the embodiments.

[0126] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A data encryption method based on SM3 algorithm with configurable parallelism, characterized in that: include: Grouping padded messages obtained after performing message padding on the message to be encrypted to obtain multiple message groups; Based on a pre-configured first parallelism, each of the message groups is message expanded to obtain a plurality of message words corresponding to each of the message groups; wherein the first parallelism represents at least one message expansion module cascaded, and the message expansion module is used to generate the message words; Based on the message words corresponding to the message groups, the message to be encrypted is encrypted to obtain encrypted data.

2. The data encryption method based on the SM3 algorithm with configurable parallelism according to claim 1, characterized in that: The step of encrypting the message to be encrypted based on the message words corresponding to the message groups to obtain encrypted data comprises: Based on a pre-configured second parallelism and the message words corresponding to each message group, the message to be encrypted is encrypted to obtain the encrypted data; the second parallelism represents at least one message iteration module cascaded, and the message iteration module is used to generate the encrypted data.

3. The data encryption method based on the SM3 algorithm with configurable parallelism according to claim 1, characterized in that: The step of performing message expansion on each of the message groups based on the pre-configured first parallelism to obtain a plurality of message words corresponding to each of the message groups includes: For each of the message groups, dividing the message group into a plurality of first message words; Determining a clock cycle required for message expansion based on the number of cascaded message expansion modules represented by the first degree of parallelism; obtaining a plurality of second message words based on a clock cycle required for the message extension, each of the first message words, and the at least one message extension module represented by a preconfigured first parallelism; The first message words and the second message words are determined as a plurality of message words corresponding to the message group.

4. The data encryption method based on the SM3 algorithm with configurable parallelism according to claim 3 is characterized in that: The at least one message expansion module based on the clock cycle, each of the first message words and the pre-configured first parallelism representation obtains a plurality of second message words, comprising: In a clock cycle required for current message extension, each of the first message words is input into a first message extension module in the at least one message extension module, and a plurality of third message words output by a last message extension module in the at least one message extension module are obtained; In a clock cycle required for the next message extension, each of the third message words and each of the first message words are input into the first message extension module in the at least one message extension module to obtain a plurality of fourth message words output by the last message extension module in the at least one message extension module; Repeat the above steps until all clock cycles required for message expansion are completed, thereby obtaining a plurality of fifth message words; The third message words, the fourth message words and the fifth message words are determined as the second message words.

5. The data encryption method based on the SM3 algorithm with configurable parallelism according to claim 2, characterized in that: The step of encrypting the message to be encrypted based on the pre-configured second parallelism and the message words corresponding to the message groups to obtain the encrypted data includes: Determining a clock cycle required for message iteration based on the number of cascaded message iteration modules represented by the second parallelism; Based on the clock cycle required for the message iteration, the message words corresponding to the message groups, and the at least one message iteration module represented by the pre-configured second parallelism, the message to be encrypted is encrypted to obtain the encrypted data.

6. The data encryption method based on the SM3 algorithm with configurable parallelism according to claim 5, characterized in that: The at least one message iteration module based on the clock cycle required for the message iteration, the message words corresponding to the message groups, and the pre-configured second parallelism represents, encrypting the message to be encrypted to obtain the encrypted data, including: In the clock cycle required for the current message iteration, the result of the previous round of iteration, the message words and addressing variables respectively corresponding to the message groups are input into the first message iteration module in the at least one message iteration module, and the iteration result output by the last message iteration module in the at least one message iteration module is obtained; In the next clock cycle required for the message iteration, the iteration result of the previous clock cycle, the message words corresponding to the message groups, and the new addressing variable are input into the first message iteration module in the at least one message iteration module to obtain the iteration result output by the last message iteration module in the at least one message iteration module; The above steps are repeated until all clock cycles required for message iterations are completed, and finally the encrypted data is obtained.

7. A data encryption device based on the SM3 algorithm with configurable parallelism, characterized in that: include: A grouping module, used for grouping padded messages obtained after performing message padding on the message to be encrypted, to obtain a plurality of message groups; An expansion module, used to perform message expansion on each of the message groups based on a pre-configured first parallelism to obtain a plurality of message words corresponding to each of the message groups; wherein the first parallelism represents at least one message expansion module cascaded, and the message expansion module is used to generate the message words; The encryption module is used to encrypt the message to be encrypted based on the message words corresponding to the message groups to obtain encrypted data.

8. An electronic device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein: When the processor executes the computer program, the data encryption method based on the SM3 algorithm with configurable parallelism as described in any one of claims 1 to 6 is implemented.

9. A non-transitory computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the data encryption method based on the SM3 algorithm with configurable parallelism as claimed in any one of claims 1 to 6 is implemented.

10. A computer program product, comprising a computer program, characterized in that When the computer program is executed by a processor, the data encryption method based on the SM3 algorithm with configurable parallelism as claimed in any one of claims 1 to 6 is implemented.

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