Identification information receiving device, power storage group, identification information receiving method, identification information receiving program, and recording medium on which program is recorded

Abstract

In an identification information receiving device for receiving identification information defined by a plurality of bits and superimposed on a current or a voltage of a power line by an identification information transmitting device connected through the power line, an integrating circuit integrates an input signal obtained by a voltage value of the current or the voltage of the power line. The subtraction circuit subtracts the output signal of the integration circuit from the input signal. The binary conversion unit determines the output signal to be 1 when the output signal of the subtraction circuit is equal to or greater than a threshold value, and determines the output signal to be 0 when the output signal of the subtraction circuit is lower than the threshold value.

Description

Technical Field

[0001] The present disclosure relates to an identification information receiving device, a power storage pack, an identification information receiving method, and an identification information receiving program for receiving identification information superimposed on a current or a voltage of a power line. Background Art

[0002] In recent years, electric-assisted bicycles have become popular. Electric-assisted bicycles use portable battery packs that can be easily loaded and unloaded. The following system has been developed: In order to eliminate the terminals for communication lines from the connector of the battery pack, the battery pack and the electric-assisted bicycle are equipped with wireless communication functions to transmit control signals wirelessly.

[0003] If there are multiple electric-assisted bicycles within the range of wireless communication with the battery pack, the installed battery pack may be mistakenly controlled by other vehicles adjacent to the vehicle, and the safety and reliability of the entire system cannot be ensured. In particular, in rental services and sharing services, there are many cases where multiple electric-assisted bicycles are parked in a parking lot. In order to safely and reliably operate the entire system, each electric-assisted bicycle needs to correctly identify the installed battery pack.

[0004] It is conceivable that the battery pack supplies power to the vehicle through the power line, and at the same time, the identification information is superimposed on the power line using a binary current (other than 0) or a binary voltage (other than 0). On the receiving side, the measured value of the current or voltage is compared with a threshold value, and the measured value above the threshold value is set to 1, and the measured value below the threshold value is set to 0, so as to receive the identification information.

[0005] However, due to differences in component characteristics and changes in current consumption, the measured values ​​of current or voltage may be offset, and it may happen that the identification information cannot be received correctly. There are long-term and short-term factors that cause changes in current or voltage superimposed on the power line. Long-term factors include individual differences in electronic components and changes over time. Long-term factors are almost always caused by changes in the DC component. Short-term factors include unexpected changes in load current such as intermittent operation of microcontrollers. Short-term factors are caused by changes in the AC component, which is equivalent to current changes or voltage changes in one data packet.

[0006] Patent Document 1 discloses a method of switching a load resistance using a switch to switch a current threshold according to the magnitude of a communication current.

[0007] Prior art literature

[0008] Patent Literature

[0009] Patent Document 1: International Publication No. 18 / 173173 Summary of the invention

[0010] In the method disclosed in Patent Document 1, the number of switchable current thresholds depends on the number of load resistors and switches, so in order to increase the number of switchable current thresholds, the circuit scale needs to be increased. In addition, the switching of the current threshold is switching between fixed values. In addition, it is difficult to cope with short-term fluctuation factors.

[0011] The present disclosure has been made in view of such circumstances, and an object of the present disclosure is to provide a technology for reducing erroneous determination when detecting identification information superimposed on a current or voltage of a power line.

[0012] In order to solve the above-mentioned problem, an identification information receiving device of a certain mode of the present invention is used to receive identification information specified by multiple bits, which is superimposed on the current or voltage of the power line by an identification information sending device connected via a power line. The identification information receiving device comprises: an integration circuit, which integrates an input signal that obtains the current or voltage of the power line as a voltage value; a subtraction circuit, which subtracts the output signal of the integration circuit from the input signal; and a binary conversion unit, which judges it as 1 when the output signal of the subtraction circuit is above a threshold value, and judges it as 0 when the output signal of the subtraction circuit is below the threshold value.

[0013] Furthermore, arbitrary combinations of the above-described constituent elements and modes in which the expression of the present disclosure is converted between devices, systems, methods, computer programs, recording media, and the like may also be additional modes of the present disclosure.

[0014] According to the present disclosure, it is possible to reduce erroneous determination when detecting identification information superimposed on a current or voltage of a power line. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] Figure 1 The figure shows an electric assist bicycle equipped with a battery pack according to the embodiment.

[0016] Figure 2 This is a diagram for explaining an overview of a first example of an authentication process for a battery pack mounted on a vehicle.

[0017] Figure 3 It is a diagram showing a first configuration example of a battery pack and a vehicle according to an embodiment.

[0018] Figure 4 This is a diagram for explaining an overview of a second example of an authentication process for a battery pack mounted on a vehicle.

[0019] Figure 5 It is a diagram showing a second configuration example of a battery pack and a vehicle according to the embodiment.

[0020] Fig. 6A This is a diagram showing an example of a transmission current and a reception current superimposed on a power line.

[0021] Figure 6B This is a diagram showing an example of a transmission current and a reception current superimposed on a power line.

[0022] Figure 7 It is a diagram showing a configuration example of a first ID detection circuit.

[0023] Fig. 8A 2 is a diagram showing a simulation waveform indicating the execution result of simulation 1.

[0024] Figure 8B 2 is a diagram showing a simulation waveform indicating the execution result of simulation 1.

[0025] Figure 8C 2 is a diagram showing a simulation waveform indicating the execution result of simulation 1.

[0026] Fig.8D 2 is a diagram showing a simulation waveform indicating the execution result of simulation 1.

[0027] Fig. 9 Yes Fig. 8A The waveform of the input signal (V1) input to the first ID detection circuit shown in FIG. Figure 8B The waveform of the output signal (V2) of the integrating circuit shown in FIG. Figure 8C The waveform of the output signal (V3) of the subtraction circuit shown is superimposed and displayed.

[0028] Fig.10 Yes Fig. 8A The waveform of the input signal (V1) input to the first ID detection circuit shown in FIG. Fig.8D The waveform of the output signal (V4) of the comparison circuit shown is superimposed and displayed.

[0029] Fig.11A 2 is a diagram showing a simulation waveform indicating the execution result of simulation 1.

[0030] Fig. 11B 2 is a diagram showing a simulation waveform indicating the execution result of simulation 1.

[0031] Fig. 11C 2 is a diagram showing a simulation waveform indicating the execution result of simulation 1.

[0032] Fig.11D 2 is a diagram showing a simulation waveform indicating the execution result of simulation 1.

[0033] Fig.12 Yes Fig.11AThe waveform of the input signal (V1) input to the first ID detection circuit shown in FIG. Fig. 11B The waveform of the output signal (V2) of the integrator circuit shown and Fig. 11C The waveform of the output signal (V3) of the subtraction circuit shown is superimposed and displayed.

[0034] Fig.13 Yes Fig.11A The waveform of the input signal (V1) input to the first ID detection circuit shown in FIG. Fig.11D The waveform of the output signal (V4) of the comparison circuit shown is superimposed and displayed. DETAILED DESCRIPTION

[0035] Figure 1 1 is a diagram showing an electric assist bicycle equipped with a battery pack according to an embodiment. The battery pack 10 is a portable / replaceable battery pack 10 that can be installed in a mounting slot of a vehicle 20 or a charger (not shown). In the following, an electric assist bicycle is assumed to be the vehicle 20 in the embodiment.

[0036] Since the replaceable battery pack 10 is frequently attached and detached from the vehicle 20 or the mounting slot of the charger, the connector portion of the battery pack 10 is prone to deterioration. Therefore, in this embodiment, a wireless communication function is provided in the battery pack 10, and control signals are transmitted by wireless communication. As a result, the terminals for the communication line can be eliminated from the connector of the battery pack 10, and only the terminals for the power line can be provided.

[0037] Short-range wireless communication is used for wireless communication between the vehicle 20 and the battery pack 10. As short-range wireless communication, Bluetooth (registered trademark), Wi-Fi (registered trademark), infrared communication, etc. can be used. Next, in this embodiment, it is assumed that BLE (Bluetooth Low Energy) is used as short-range wireless communication.

[0038] BLE is one of the extension standards of Bluetooth and is a low-power short-range wireless communication standard using the 2.4 GHz frequency band. BLE has low power consumption to the extent that it can be driven for several years by a button battery, so it is suitable for battery driving and can minimize the impact on the remaining capacity of the battery pack 10. In addition, BLE communication modules are available in large quantities on the market and can be obtained at a low cost.

[0039] When using general class 2 equipment, the radio wave reach range of BLE is about 10m. Therefore, there may be a situation where multiple vehicles 20 and multiple battery packs 10 exist in one BLE communication circle. In this case, radio wave interference sometimes occurs between vehicle systems, making the operation unstable. In addition, the vehicle 20 sometimes mistakenly connects to a battery pack 10 other than the battery pack 10 installed on itself, in which case it is possible to mistakenly control the battery pack 10 not installed on itself.

[0040] Therefore, a mechanism is required to ensure that the battery pack 10 installed in the vehicle 20 is the same as the battery pack 10 that is the communication object of the vehicle 20. In the present embodiment, identification information (ID) is used to confirm the identity of the battery pack 10 that is physically connected to the vehicle 20 by wire and the battery pack 10 that is connected by wireless communication. The identification information (ID) may be identification information inherent to each vehicle 20 or each battery pack 10, or may be temporary identification information. As the inherent identification information, for example, a BD (Bluetooth Device) address or a MAC (Medium Access Control) address may be used.

[0041] Figure 2 This is a diagram for explaining an overview of example 1 of the authentication process of the battery pack 10 mounted on the vehicle 20. When the connector of the battery pack 10 is connected to the connector of the mounting slot of the vehicle 20, the vehicle 20 transmits ID1 to the battery pack 10 via a wired method. When the battery pack 10 receives ID1 via a wired method, it transmits a broadcast packet (beacon packet) including the received ID1 and its own battery pack ID via short-range wireless communication. The broadcast packet is a signal for notifying the surroundings of its own presence via short-range wireless communication.

[0042] When the vehicle 20 receives a broadcast data packet, it compares the ID1 contained in the broadcast data packet with the ID1 sent to the battery pack 10 via a wired method. When the two are consistent, the vehicle 20 authenticates that the installed battery pack 10 is the same as the communication object of the short-range wireless communication. When the two are inconsistent, the vehicle 20 determines that the installed battery pack 10 is different from the communication object of the short-range wireless communication, and the battery pack 10 as the communication object has not passed the authentication. For example, when a broadcast data packet containing ID2 is received, since it is inconsistent with the ID1 sent to the battery pack 10 via a wired method, the battery pack 10 as the destination of the broadcast data packet containing ID2 has not passed the authentication.

[0043] Figure 3 1 is a diagram showing a first configuration example of a battery pack 10 and a vehicle 20 according to the embodiment. Figure 3 The structure example 1 shown corresponds to the authentication processing example 1. Figure 3 The components required for the authentication processing example 1 are drawn, and the components irrelevant to the authentication processing example 1 are omitted as appropriate. Figure 3 It is assumed that the battery pack 10 is mounted on the vehicle 20 .

[0044] The battery pack 10 includes a storage battery 11, a first relay 12, a first current sensor 13, a first power supply circuit 14, a first control unit 15, a first wireless communication unit 16, a first antenna 17, a first ID detection circuit 19, and a power supply terminal T1. The vehicle 20 includes a motor 21, an inverter 22, a second relay 23, a second power supply circuit 24, a second control unit 25, a second wireless communication unit 26, a second antenna 27, a second ID superimposition circuit 28, and a power receiving terminal T2. When the battery pack 10 is mounted on the vehicle 20, the power supply terminal T1 and the power receiving terminal T2 are in physical contact, and the power line Lp1 in the battery pack 10 and the power line Lp2 in the vehicle 20 are connected.

[0045] The storage battery 11 includes a plurality of cells connected in series or in series-parallel. As the cells, lithium-ion cells, nickel-metal hydride cells, lead-acid cells, etc. can be used. Hereinafter, in this specification, an example using lithium-ion cells (nominal voltage: 3.6V-3.7V) is assumed. The number of cells connected in series is determined according to the drive voltage of the motor 21 of the vehicle 20.

[0046] The first relay 12 is inserted into the power line Lp1 connecting the battery 11 and the power supply terminal T1. In addition, other types of switches such as semiconductor switches may be used instead of the relay.

[0047] The first current sensor 13 measures the current flowing in the power line Lp1 in the battery pack 10 and outputs it to the first ID detection circuit 19. The first current sensor 13 is composed of, for example, a combination of a shunt resistor and an amplifier. The voltage across the shunt resistor inserted in the power line Lp1 is amplified by the amplifier, thereby outputting a voltage value corresponding to the current flowing in the power line Lp1 from the first current sensor 13. In addition, a Hall element or a CT sensor can also be used instead of the shunt resistor.

[0048] The first power supply circuit 14 is a DC / DC converter that steps down the voltage of the battery 11 to generate a power supply voltage (e.g., about 3.3V to 5V) for the first control unit 15 and a power supply voltage (5V in the specific example below) for the first ID detection circuit 19. The first power supply circuit 14 may be composed of a switching regulator or a linear regulator.

[0049] The first control unit 15 is a microcontroller that controls the entire battery pack 10. The first control unit 15 monitors the state of the storage battery 11 (specifically, the voltage, current, and temperature of each single cell included in the storage battery 11). The first control unit 15 estimates the SOC (State Of Charge), FCC (Full Charge Capacity), and SOH (State Of Health) of each single cell included in the storage battery 11 based on these monitoring data. In addition, when the single cell included in the storage battery 11 generates overvoltage, undervoltage, overcurrent, high temperature abnormality, or low temperature abnormality, the first control unit 15 disconnects the first relay 12 to protect the single cell.

[0050] The first wireless communication unit 16 performs short-range wireless communication processing. In this embodiment, the first wireless communication unit 16 is composed of a BLE module, and the first antenna 17 is composed of a patch antenna or a pattern antenna built into the BLE module. The first wireless communication unit 16 outputs the data received through short-range wireless communication to the first control unit 15, and sends the data input from the first control unit 15 through short-range wireless communication.

[0051] In the present embodiment, the vehicle 20 includes a three-phase AC motor as a driving motor 21. The inverter 22 converts the DC power supplied from the battery pack 10 into AC power during power operation and supplies it to the motor 21. During regeneration, the AC power supplied from the motor 21 is converted into DC power and supplied to the battery pack 10. During power operation, the motor 21 rotates according to the AC power supplied from the inverter 22. During regeneration, the motor 21 converts the rotational energy generated by deceleration into AC power and supplies it to the inverter 22.

[0052] A second relay 23 is inserted into the power line Lp2 connecting the inverter 22 and the power receiving terminal T2. In addition, other types of switches such as semiconductor switches may be used instead of the relay.

[0053] The second power supply circuit 24 is a DC / DC converter that generates a power supply voltage (e.g., about 3.3V to 5V) for the second control unit 25 by stepping down the voltage supplied from the storage battery 11 in the battery pack 10 installed in the vehicle 20. The second power supply circuit 24 can be composed of a switching regulator or a linear regulator. In the present embodiment, the vehicle 20 is not equipped with a self-contained battery (e.g., a lead battery) for generating a control power supply. Therefore, it is necessary to generate a control power supply based on the driving power supply supplied from the storage battery 11 in the installed battery pack 10.

[0054] The second control unit 25 is a microcontroller that controls the entire vehicle 20. The second wireless communication unit 26 performs short-range wireless communication processing. In this embodiment, the second wireless communication unit 26 is composed of a BLE module, and the second antenna 27 can be composed of a patch antenna or a pattern antenna built into the BLE module. The second wireless communication unit 26 outputs data received through short-range wireless communication to the second control unit 25, and transmits data input from the second control unit 25 through short-range wireless communication.

[0055] The second ID superimposing circuit 28 superimposes the ID on the current flowing in the power line Lp2. The ID is defined by a plurality of bits, and each bit is represented by a binary current. When the second control unit 25 receives power supply from the storage battery 11 of the battery pack 10 instead of the self-contained battery built into the vehicle 20, it is impossible to specify the power on and off of the current flowing from the storage battery 11 to the vehicle 20 as the binary current of each bit representing the ID. Therefore, the binary current representing each bit needs to be set to two current values ​​other than 0.

[0056] The second ID superimposition circuit 28 includes two loads having different resistance values, and one or more switches for selecting one of the two loads or setting the two loads to non-conduction. In addition, the second ID superimposition circuit 28 may also be configured to include a variable load that can be switched to two resistance values, and one or more switches for switching the resistance value of the variable load or setting the variable load to non-conduction.

[0057] When the second relay 23 is disconnected, the current flowing in the power line Lp2 basically depends on the current consumption of the second control unit 25. When the second relay 23 is disconnected, the second control unit 25 sets the ID to the second ID superimposition circuit 28. The second ID superimposition circuit 28 superimposes the bit "1" of the ID on the current by turning on the load with the smaller resistance value of the two loads, and superimposes the bit "0" of the ID on the current by turning on the load with the larger resistance value. As a result, the value of the current introduced to the vehicle 20 side changes according to each bit of the ID.

[0058] The first control unit 15 or the second control unit 25 is composed of, for example, a microcomputer having a CPU (Central Processing Unit) and a memory as its main structure. In other words, the first control unit 15 or the second control unit 25 is implemented by a computer having a CPU and a memory, and the computer functions as the first control unit 15 or the second control unit 25 by executing a program stored in the memory by the CPU. Here, the program is pre-recorded in the memory of the first control unit 15 or the second control unit 25, but it can also be provided through an electrical communication line such as the Internet, or recorded in a (non-transitory) recording medium such as a memory card.

[0059] The first current sensor 13 of the battery pack 10 measures the current flowing in the power line Lp1 and outputs it to the first ID detection circuit 19. The first ID detection circuit 19 detects the ID superimposed on the current flowing in the power line Lp1 based on the voltage value corresponding to the current measured by the first current sensor 13, and outputs the detected ID to the first control unit 15. A specific configuration example of the first ID detection circuit 19 will be described later.

[0060] Figure 4 This is a diagram for explaining an overview of example 2 of the authentication process of the battery pack 10 mounted on the vehicle 20. When the connector of the battery pack 10 is connected to the connector of the mounting slot of the vehicle 20, the battery pack 10 transmits ID1 to the vehicle 20 via a wired method. At the same time, the battery pack 10 transmits a broadcast packet including ID1 via short-range wireless communication.

[0061] When the vehicle 20 receives a broadcast data packet, it compares the ID1 contained in the broadcast data packet with the ID1 received via a wired method. When the two are consistent, the vehicle 20 authenticates that the installed battery pack 10 is the same as the communication object of the short-range wireless communication. When the two are inconsistent, the vehicle 20 determines that the installed battery pack 10 is different from the communication object of the short-range wireless communication, and the battery pack 10 as the communication object has not passed the authentication. For example, when a broadcast data packet containing ID2 is received, since it is inconsistent with ID1 received via a wired method, the battery pack 10 as the destination of the broadcast data packet containing ID2 has not passed the authentication.

[0062] Figure 5 1 is a diagram showing a second configuration example of a battery pack 10 and a vehicle 20 according to the embodiment. Figure 5 The structural example 2 shown corresponds to the authentication processing example 2. Figure 5 Components required for authentication processing example 2 are drawn in FIG. 1 , and components irrelevant to authentication processing example 2 are omitted as appropriate. In configuration example 1, ID is superimposed on the current flowing in the power line. In configuration example 2, ID is superimposed on the voltage of the power line.

[0063] exist Figure 5 In the structural example 2 shown, compared with Figure 3In the configuration example 1 shown, a first ID superimposition circuit 18 is provided on the battery pack 10 side, and a second ID detection circuit 29 and a voltage detection circuit 210 are provided on the vehicle 20 side. The first ID superimposition circuit 18 is constituted by an adder circuit using an operational amplifier, for example. The operational amplifier uses the voltage of the battery 11 as a power supply voltage, adds a base voltage lower than the power supply voltage to the ID voltage supplied from the first control unit 15, and outputs the added voltage to the power line Lp1. As a result, the value of the voltage supplied to the vehicle 20 side changes according to each bit of the ID.

[0064] The voltage detection circuit 210 on the vehicle 20 side measures the voltage of the power line Lp2 and outputs it to the second ID detection circuit 29. The voltage detection circuit 210 is composed of, for example, a resistor voltage divider circuit, and the divided voltage is input to the second ID detection circuit 29. The second ID detection circuit 29 detects the ID superimposed on the voltage flowing in the power line Lp2 based on the voltage value measured by the voltage detection circuit 210, and outputs the detected ID to the second control unit 25.

[0065] exist Figure 3 In the configuration example 1 shown in FIG. 1 , the ID is transmitted from the vehicle 20 to the battery pack 10, so the vehicle 20 becomes the identification information transmitting device and the battery pack 10 becomes the identification information receiving device. Figure 5 In the configuration example 2 shown, the ID is transmitted from the battery pack 10 to the vehicle 20, so the battery pack 10 becomes the identification information transmitting device and the vehicle 20 becomes the identification information receiving device. The identification information receiving device will be described below based on the configuration example 1 using the current superposition method.

[0066] Figure 6A-6B This is a diagram showing an example of a transmission current and a reception current superimposed on a power line. Fig. 6A An example of a transmission current superimposed by the identification information transmission device is shown. Figure 6B An example of the received current detected by the identification information receiving device is shown. The identification information receiving device determines that the current value I is bit "1" when it is greater than the threshold value Ith, and determines that the current value I is bit "0" when it is less than the threshold value Ith. As an example, the threshold value Ith may be set to 50mA, the assumed value on the low level side of the current value I may be 30mA, and the assumed value on the high level side may be 70mA.

[0067] At this time, the current value I may be additionally offset due to differences in component characteristics and changes in current consumption. The differences in component characteristics are caused by at least one of individual differences, temperature changes, and changes over time. Unexpected changes in current consumption of the identification information sending device (vehicle 20) are caused, for example, by the second control unit 25 starting certain background processes or event processes (for example, software update processes) during the authentication process using the second control unit 25 (microcontroller). In addition, changes in the current consumption of the identification information sending device (vehicle 20) may also occur due to structural changes such as the lighting of the headlights of the identification information sending device (vehicle 20).

[0068] If the current consumption of the identification information transmitting device increases due to such changes in the system state or system structure, the current flowing in the power line increases. In other words, the current flowing in the power line is offset. Due to this offset, the bit determination of the ID superimposed on the current flowing in the power line may be erroneous. Figure 6A-6B In the example shown, the ID superimposed on the current by the identification information transmitting device is "00101011110000011101", while the ID detected by the identification information receiving device based on the current is "00101011110000011111", and a bit error occurs in the second bit from the bottom. Next, a method for preventing ID bit determination errors and achieving stable communication by eliminating the influence of the offset superimposed on the current is described.

[0069] Figure 7 1 is a diagram showing a configuration example of the first ID detection circuit 19. The first ID detection circuit 19 includes an integration circuit 191, a subtraction circuit 192, and a comparison circuit 193. The integration circuit 191 integrates an input signal (V1) obtained by obtaining the current flowing in the power line as a voltage value. The integration circuit 191 constitutes a low-pass filter. The subtraction circuit 192 subtracts the output signal (V2) of the integration circuit 191 from the input signal (V1).

[0070] The comparison circuit 193 compares the output signal (V3) of the subtraction circuit 192 with the threshold value, and outputs a high-level signal to the first control unit 15 when the output signal (V3) of the subtraction circuit 192 is above the threshold value, and outputs a low-level signal to the first control unit 15 when the output signal (V3) of the subtraction circuit 192 is below the threshold value. The first control unit 15 determines that it is "1" when a high-level signal is input from the first ID detection circuit 19, and determines that it is "0" when a low-level signal is input, thereby identifying the ID superimposed on the current flowing in the power line.

[0071] exist Figure 7In the example shown, the integrating circuit 191 includes an RC circuit and a voltage follower. In the RC circuit, a filter resistor Rf and a filter capacitor Cf are connected in series between an input terminal and a ground terminal, and a connection point between the filter resistor Rf and the filter capacitor Cf becomes an output terminal.

[0072] The RC circuit outputs a signal in which components above the cutoff frequency are attenuated.

[0073] The voltage follower is composed of the first operational amplifier OP1. The output terminal of the RC circuit is connected to the non-inverting input terminal of the first operational amplifier OP1, and the output terminal of the first operational amplifier OP1 is connected to the inverting input terminal. The voltage follower is a buffer that can be regarded as amplification factor = 1, input impedance = ∞, and output impedance = 0. By inserting a voltage follower between the RC circuit and the subtraction circuit 192, it is possible to suppress the time constant of the RC circuit from changing due to the influence of the first resistor R1 and the third resistor R3 included in the subtraction circuit 192.

[0074] In addition, Figure 7 , an example of forming the integrating circuit 191 using a combination of a passive filter (RC low-pass filter) and a voltage follower is shown, but an active filter (an integrating circuit using an operational amplifier) ​​may also be used to form the integrating circuit 191. In the integrating circuit using an operational amplifier, a capacitor is connected to the feedback path of the operational amplifier.

[0075] The subtraction circuit 192 includes a second operational amplifier OP2, a first resistor R1, a second resistor R2, a third resistor R3, and a fourth resistor R4. The first resistor R1 is connected between the inverting input terminal of the second operational amplifier OP2 and the output terminal of the first operational amplifier OP1 included in the integration circuit 191. The second resistor R2 is connected between the non-inverting input terminal of the second operational amplifier OP2 and the input terminal of the first ID detection circuit 19 (the input terminal of the integration circuit 191). The third resistor R3 is connected to the feedback path between the output terminal and the inverting input terminal of the second operational amplifier OP2. The fourth resistor R4 is connected between the connection point of the second resistor R2 and the non-inverting input terminal and the ground.

[0076] The resistance values ​​of the first resistor R1, the second resistor R2, the third resistor R3 and the fourth resistor R4 are set to the same value (in Figure 7 In the example shown, it is 10 kΩ). When the resistance values ​​of the first resistor R1, the second resistor R2, the third resistor R3, and the fourth resistor R4 are the same, the output signal (V3) of the second operational amplifier OP2 is a signal obtained by subtracting the signal (V2) input to the inverting input terminal from the signal (V1) input to the non-inverting input terminal.

[0077] The comparison circuit 193 includes a third operational amplifier OP3 that functions as a comparator. The non-inverting input terminal of the third operational amplifier OP3 is connected to the output terminal of the second operational amplifier OP2 of the subtraction circuit 192. The threshold voltage (in Figure 7 The third operational amplifier OP3 outputs a high-level signal (in the example shown) when the output signal (V3) of the subtraction circuit 192 is above the threshold voltage. Figure 7 In the example shown, 5V is output, and when the output signal (V3) of the subtraction circuit 192 is lower than the threshold voltage, a low level signal is output (in Figure 7 0 V in the example shown).

[0078] exist Figure 7 In the example shown, an operational amplifier with a single power supply (also referred to as a single power supply) is used for the first operational amplifier OP1, the second operational amplifier OP2, and the third operational amplifier OP3. Specifically, an operational amplifier with a single power supply of 5V is used. In an operational amplifier with a single power supply, unlike an operational amplifier with a dual power supply (for example, an operational amplifier with a dual power supply of +15V and -15V), a negative amplitude is not generated. The lower limit of the input signal (V1) corresponding to the current measured by the first current sensor 13 is clamped to near 0V by the first operational amplifier OP1. In the first control unit 15 (microcontroller) that processes digital data, it is difficult to process negative amplitudes. By setting the lower limit of the input signal (V1) to 0V, data that is easy for the first control unit 15 (microcontroller) to process can be generated. In addition, by setting the operating range of the first operational amplifier OP1, the second operational amplifier OP2, and the third operational amplifier OP3 to 0V-5V, power consumption can be reduced compared to the case where it is set to -15V to +15V.

[0079] A first switch S1 is connected between a 5V power supply and positive power supply terminals of the first operational amplifier OP1, the second operational amplifier OP2, and the third operational amplifier OP3. A second switch S2 is connected between a ground and negative power supply terminals of the first operational amplifier OP1, the second operational amplifier OP2, and the third operational amplifier OP3. A third switch S3 is connected between a 0.5V power supply and an inverting input terminal of the third operational amplifier OP3. The 5V power supply and the 0.5V power supply are generated based on the voltage supplied from the first power supply circuit 14. The voltage supplied from the first power supply circuit 14 is used directly or is used after being stepped down.

[0080] When the authentication period including the reception of the ID when the battery pack 10 is installed (for example, a period of 10 seconds from the installation of the battery pack 10) ends, the first control unit 15 disconnects the first switch S1, the second switch S2, and the third switch S3 to cut off the active elements (in the case of the integration circuit 191, the subtraction circuit 192, and the comparison circuit 193) included in the integration circuit 191, the subtraction circuit 192, and the comparison circuit 193. Figure 7 In the example shown, the power supply is for the first operational amplifier OP1, the second operational amplifier OP2, and the third operational amplifier OP3. Thus, the power consumption during the period when the first ID detection circuit 19 is not used can be eliminated, and the capacity of the battery 11 can be saved.

[0081] Below, it is shown Figure 7 Execution results of simulations of the first ID detection circuit 19 shown. In simulation 1, a filter resistor Rf of 1 kΩ and a filter capacitor Cf of 0.1 μF are used. In this case, the time constant τ of the RC circuit is 0.1 ms, and the cut-off frequency fc of the RC circuit is ≈1592 Hz. In simulation 2, a filter resistor Rf of 10 kΩ and a filter capacitor Cf of 0.1 μF are used. In this case, the time constant τ of the RC circuit is 1 ms, and the cut-off frequency fc of the RC circuit is ≈159.2 Hz.

[0082] Figure 8A-8D 2 is a diagram showing a simulation waveform indicating the execution result of simulation 1. Fig. 8A 1 shows the waveform of the input signal (V1) input to the first ID detection circuit 19, Figure 8B 1 shows the waveform of the output signal (V2) of the integrating circuit 191, Figure 8C 1 shows the waveform of the output signal (V3) of the subtraction circuit 192, Fig.8D The waveform of the output signal (V4) of the comparison circuit 193 is shown. Fig. 9 Yes Fig. 8A The waveform of the input signal (V1) input to the first ID detection circuit 19 is shown in FIG. Figure 8B The waveform of the output signal (V2) of the integrating circuit 191 and Figure 8C The waveform of the output signal (V3) of the subtraction circuit 192 is shown superimposed.

[0083] Fig.10 Yes Fig. 8A The waveform of the input signal (V1) input to the first ID detection circuit 19 is shown in FIG. Fig.8D The waveform of the output signal (V4) of the comparison circuit 193 is shown superimposed.

[0084] Figures 11A-11D (d) is a diagram showing a simulation waveform indicating the execution result of Simulation 2. Fig.11A1 shows the waveform of the input signal (V1) input to the first ID detection circuit 19, Fig. 11B 1 shows the waveform of the output signal (V2) of the integrating circuit 191, Fig. 11C 1 shows the waveform of the output signal (V3) of the subtraction circuit 192, Fig.11D The waveform of the output signal (V4) of the comparison circuit 193 is shown. Fig.12 Yes Fig.11A The waveform of the input signal (V1) input to the first ID detection circuit 19 is shown in FIG. Fig. 11B The waveform of the output signal (V2) of the integrating circuit 191 and Fig. 11C The waveform of the output signal (V3) of the subtraction circuit 192 is shown superimposed. Fig.13 Yes Fig.11A The waveform of the input signal (V1) input to the first ID detection circuit 19 is shown in FIG. Fig.11D The waveform of the output signal (V4) of the comparison circuit 193 is shown superimposed.

[0085] In this embodiment, 9600 bps is assumed as the communication speed of the ID. In simulation 1, a rectangular wave with a clock frequency of 5 kHz (a period of 0.2 ms) is used as the input signal (V1) to approximate the clock frequency when 9600 bits are transmitted in 1 second.

[0086] The output signal (V2) of the integration circuit 191 follows the input signal (V1) and gradually converges to the center of the amplitude of the input signal (V1). The time constant of simulation 2 is greater than the time constant of simulation 1, so the output signal (V2) of the integration circuit 191 of simulation 2 changes more smoothly.

[0087] In simulations 1 and 2, the following example is shown: an offset is added to the current flowing in the power line from the time point of 1.0 ms, so that the input signal (V1) rises by an amount corresponding to the offset. Following this rise, the output signal (V2) of the integration circuit 191 also gradually rises. By using the subtraction circuit 192 to subtract the output signal (V2) of the integration circuit 191 from the input signal (V1), the influence of the offset (that is, the influence of the current fluctuation in communication) can be eliminated.

[0088] The waveform of the output signal (V3) of the subtraction circuit 192 is a trapezoidal wave. The smoother the output signal (V2) of the integration circuit 191 is, the gentler the slope of the upper side of the trapezoidal wave is (simulation 2). On the contrary, the more drastic the change of the output signal (V2) of the integration circuit 191 is, the more rapid the slope of the upper side of the trapezoidal wave is (simulation 1).

[0089] The pulse width of the output signal (V4) after waveform shaping by the comparison circuit 193 is affected by the slope drop of the upper side of the trapezoidal wave as the output signal (V3) of the subtraction circuit 192. Originally, the comparison circuit 193 should output a high-level signal while the pulse of the input signal (V1) is at a high level.

[0090] During the trapezoidal wave output period corresponding to the period when the pulse of the input signal ( V1 ) is at a high level, if the trapezoidal wave is lower than the threshold voltage (0.5 V), the output signal of the comparison circuit 193 is inverted to a low level.

[0091] like Fig.10 As shown, in simulation 1, the pulse width of the output signal (V4) of the comparison circuit 193 is unstable, and there are many intervals in which the pulse width of the output signal (V4) of the comparison circuit 193 is smaller than the pulse width of the input signal (V1).

[0092] On the other hand, Fig.13 As shown, in simulation 2, the pulse width of the output signal (V4) of the comparison circuit 193 is stable, and the pulse width of the output signal (V4) of the comparison circuit 193 is substantially consistent with the pulse width of the input signal (V1). This is because, in simulation 2, the upper slope of the trapezoidal wave as the output signal (V3) of the subtraction circuit 192 is gently dropped, and the trapezoidal wave does not fall below the threshold voltage (0.5V).

[0093] If the pulse width of the output signal (V4) of the comparison circuit 193 is unstable, the possibility of an error in the bit determination in the first control unit 15 (microcontroller) increases. Therefore, it is desirable to set the time constant of the RC circuit so that the pulse width of the output signal (V4) of the comparison circuit 193 is stable. Specifically, the time constant of the RC low-pass filter is set in such a way that the cutoff frequency fc of the RC low-pass filter becomes less than 1 / 10 of the clock frequency corresponding to the communication speed of the ID. In addition, if the cutoff frequency fc of the RC low-pass filter is too low relative to the clock frequency, the tracking performance of the output signal (V2) of the integration circuit 191 with respect to the input signal (V1) will be reduced. Therefore, the time constant of the RC low-pass filter can also be set in such a way that the cutoff frequency fc of the RC low-pass filter becomes approximately 1 / 10 of the clock frequency corresponding to the communication speed of the ID.

[0094] In the above description, an example in which the first ID detection circuit 19 includes the comparison circuit 193 is shown, but the comparison circuit 193 can also be omitted, and the output signal (V3) of the subtraction circuit 192 can be directly input to the analog input port of the first control unit 15 (microcontroller). The A / D converter in the first control unit 15 (microcontroller) converts the output signal (V3) of the subtraction circuit 192 into a digital value at a predetermined sampling rate. In this way, the output signal (V3) of the subtraction circuit 192 can be converted into a binary signal by using the comparison circuit 193, or the output signal (V3) of the subtraction circuit 192 can be converted into a binary signal by using the first control unit 15. In either case, if the waveform of the output signal (V3) of the subtraction circuit 192 is output as a pulse waveform with an amplitude of 1 / 2 of the pulse waveform of the input signal (V1) as close as possible, high-precision bit determination can be performed.

[0095] In the above description, an example is shown in which the ID superimposed on the current flowing in the power line is detected by hardware processing of the first ID detection circuit 19. In this regard, it is also possible to detect by software processing of the first control unit 15 (microcontroller). In this case, the first ID detection circuit 19 is omitted, and the input signal (V1) corresponding to the current measured by the first current sensor 13 is directly input to the analog input port of the first control unit 15 (microcontroller).

[0096] The A / D converter in the first control unit 15 (microcontroller) converts the input signal (V1) into a digital value at a sampling rate higher than the clock frequency corresponding to the communication speed of the ID (for example, a sampling rate of 10 to 100 times the clock frequency). In order to carefully observe the waveform transition within a unit period of the input signal, high-speed sampling is required. The CPU in the first control unit 15 (microcontroller) integrates the digital input signal (V1) obtained by high-speed sampling to calculate the integral signal (equivalent to the output signal (V2) of the integration circuit 191). The CPU calculates the corrected input signal by subtracting the calculated integral signal from the input signal obtained by periodic sampling at the clock frequency. The CPU compares the corrected input signal with the threshold to detect each bit of the ID.

[0097] The ID detection process by software processing is effective when the communication speed of the ID is low.

[0098] On the other hand, when the communication speed of ID is high, it is necessary to use a high-performance component as the first control unit 15 (microcontroller). In addition, it is also necessary to deal with heat. In the ID detection process based on software processing, it is easier to change the time constant than the ID detection process based on hardware processing.

[0099] The ID superimposition circuit of the identification information transmitting device may also insert a test bit string defined by a plurality of bits (e.g., 4 bits, 8 bits, or 16 bits) that alternately repeat "1" and "0" before the ID bit string. The ID detection circuit or control unit of the identification information receiving device detects a representative value (e.g., an average value, a median value) of the amplitude of a plurality of bits included in the test bit string before detecting the ID bit string, and sets the detected representative value as the initial value of the output signal (V2) of the integration circuit 191 or the integration signal (hereinafter, both are collectively referred to as the integration signal).

[0100] Thus, the initial value of the integrated signal can be set near the center of the input signal (V1), and the integrated signal can be prevented from being biased toward "1" or "0" when the ID bit string is a bit string of continuous "1" or "0". In addition, even when there is an idle bit string or a start bit string of continuous "1" or "0" before the ID bit string, the initial value of the integrated signal can be prevented from being biased toward "1" or "0".

[0101] As described above, in this embodiment, by subtracting the integrated signal of the current signal from the current signal superimposed with ID, the component corresponding to the current fluctuation can be automatically eliminated. In this case, the component corresponding to the current fluctuation obtained by dynamically following the actual current fluctuation can be eliminated.

[0102] More specifically, by extracting the DC component from the current signal using a low-pass filter and subtracting the DC component from the current signal, the influence of long-term current fluctuations due to individual differences in electronic components and changes over the years can be removed. In addition, by setting the cutoff frequency fc of the low-pass filter to approximately 1 / 10 of the clock frequency corresponding to the communication speed of the ID, the influence of short-term current fluctuations in one data packet can be fully removed. Therefore, even if an unexpected current fluctuation occurs during current communication, stable communication can be performed. Through the above, it is possible to reduce erroneous judgments when detecting ID from the current signal.

[0103] In addition, compared with the method of switching the load resistance by a switch according to the size of the communication current to switch the current threshold (refer to patent document 1), the detection value of the current signal can be flexibly corrected, and the correction corresponding range is also wide. In contrast, in the above method, it is impossible to switch the current threshold in detail, so it is difficult to optimize the correction amount for removing the influence of current fluctuations. In addition, the influence of short-term current fluctuations cannot be removed. In addition, the ID detection method involved in this embodiment can be implemented by a simple circuit or simple software, which has great advantages in actual use. There is no need to carry a load resistor and a switch as in the above method. In addition, the ID detection method involved in this embodiment has high versatility and a wide range of applications.

[0104] The present disclosure has been described above based on the embodiments. It should be easily understood by those skilled in the art that the embodiments are illustrative and that various modifications can be made to the combinations of the constituent elements and the processing procedures, and such modifications are also within the scope of the present disclosure.

[0105] In the above embodiment, the following example is described: the battery pack 10 installed in the installation slot of the vehicle 20 is authenticated to be the same as the battery pack 10 that is the communication target of the vehicle 20. In this regard, the ID detection method involved in the above embodiment can also be used in the case where the battery pack 10 installed in the installation slot of the charger is authenticated to be the same as the battery pack 10 that is the communication target of the charger. In this case, the charger can be the identification information sending device and the battery pack 10 can be the identification information receiving device, or the battery pack 10 can be the identification information sending device and the charger can be the identification information receiving device.

[0106] In the above embodiment, an example of using the battery pack 10 with built-in storage battery 11 is described. In this regard, a capacitor pack with built-in capacitors may also be used, wherein the capacitors include double-layer capacitor units, lithium-ion capacitor units, etc. In this specification, the battery pack and the capacitor pack are collectively referred to as a storage pack.

[0107] The present disclosure is suitable for application to a vehicle 20 that is not equipped with a self-contained power supply, but does not exclude application to a vehicle 20 that is equipped with a self-contained power supply. Therefore, the vehicle 20 is not limited to an electric power-assisted bicycle, but also includes an electric motorcycle (electric scooter), an electric kick scooter, an electric car (including a golf cart, a low-speed electric car such as a landcar), a railway vehicle, etc. In addition, the object on which the power storage group is installed is not limited to the vehicle 20, but also includes, for example, an electric ship, a multi-rotor aircraft (drone), and other electric mobile bodies.

[0108] In addition, the embodiment can also be determined by the following items.

[0109] [Project 1]

[0110] An identification information receiving device (10) for receiving identification information defined by a plurality of bits superimposed on a current or voltage of a power line by an identification information transmitting device (20) connected via a power line, wherein the identification information receiving device (10) is characterized in that it comprises:

[0111] An integration circuit (191) that integrates an input signal obtained by obtaining the current or voltage of the power line as a voltage value;

[0112] a subtraction circuit (192) which subtracts the output signal of the integration circuit (191) from the input signal; and

[0113] A binary conversion unit (193) determines that the output signal of the subtraction circuit (192) is 1 when it is greater than a threshold value, and determines that the output signal of the subtraction circuit (192) is 0 when it is less than the threshold value.

[0114] This can reduce erroneous determinations when detecting identification information superimposed on the current or voltage of the power line.

[0115] [Project 2]

[0116] The identification information receiving device (10) described in item 1 is characterized in that:

[0117] The binary conversion unit (193) includes a comparison circuit (193) that compares the output signal of the subtraction circuit (192) with the threshold value and outputs a high-level signal or a low-level signal.

[0118] This makes it possible to stabilize the amplitude and pulse width of the binary waveform.

[0119] [Item 3]

[0120] The identification information receiving device (10) described in item 1 is characterized in that:

[0121] The subtraction circuit (192) is formed by using a single-power supply operational amplifier (OP2).

[0122] The input signal is input to the non-inverting input terminal of the operational amplifier (OP2), and the output signal of the integration circuit (191) is input to the inverting input terminal of the operational amplifier (OP2).

[0123] According to this, the negative amplitude of the input signal can be converted to 0, and the compatibility with the digital signal processing of the microcontroller can be improved.

[0124] [Item 4]

[0125] The identification information receiving device (10) described in item 1 is characterized in that:

[0126] The integration circuit (191) forms a low-pass filter (191),

[0127] A time constant of the low-pass filter (191) is set so that a cutoff frequency of the low-pass filter (191) becomes less than 1 / 10 of a clock frequency corresponding to a communication speed of the identification information.

[0128] This makes it possible to sufficiently eliminate the influence of short-term current fluctuations.

[0129] [Item 5]

[0130] The identification information receiving device (10) described in item 1 is characterized in that:

[0131] The integration circuit (191) includes an RC circuit (Rf, Cf) and a voltage follower (OP1).

[0132] This makes it possible to construct a low-cost and high-precision low-pass filter.

[0133] [Item 6]

[0134] The identification information receiving device (10) described in item 2 is characterized in that:

[0135] When the authentication period including the reception of the identification information ends, the power supply to the active elements (OP1, OP2, OP3) included in the integration circuit (191), the subtraction circuit (192) and the comparison circuit (193) is cut off.

[0136] According to this, useless power consumption can be eliminated.

[0137] [Item 7]

[0138] A portable and detachable power storage pack (10) is provided, which is an identification information receiving device (10) as described in any one of items 1 to 6.

[0139] According to this, it is possible to realize a power storage group (10) that reduces erroneous determination when detecting identification information superimposed on current or voltage of a power line.

[0140] [Item 8]

[0141] A method for receiving identification information is provided in an identification information receiving device (10), the identification information receiving device (10) being used to receive identification information defined by a plurality of bits and superimposed on a current or voltage of a power line by an identification information sending device (20) connected via a power line, the method for receiving identification information being characterized in that it comprises the following steps:

[0142] integrating an input signal obtained by obtaining the current or voltage of the power line as a voltage value;

[0143] subtracting an integrated signal of the input signal from the input signal; and

[0144] When the input signal after subtracting the integral signal is equal to or greater than a threshold value, the value is determined to be 1, and when the input signal after subtracting the integral signal is lower than the threshold value, the value is determined to be 0.

[0145] This can reduce erroneous determinations when detecting identification information superimposed on the current or voltage of the power line.

[0146] [Item 9]

[0147] An identification information receiving program is an identification information receiving program in an identification information receiving device (10), the identification information receiving device (10) being used to receive identification information specified by a plurality of bits superimposed on a current or voltage of a power line by an identification information transmitting device (20) connected via a power line, the identification information receiving program being characterized in that it causes a computer to execute the following processing:

[0148] integrating an input signal obtained by obtaining the current or voltage of the power line as a voltage value;

[0149] subtracting an integrated signal of the input signal from the input signal; and

[0150] When the input signal after subtracting the integral signal is equal to or greater than a threshold value, the value is determined to be 1, and when the input signal after subtracting the integral signal is lower than the threshold value, the value is determined to be 0.

[0151] This can reduce erroneous determinations when detecting identification information superimposed on the current or voltage of the power line.

[0152] Description of Reference Numerals

[0153] 10: battery pack; 20: vehicle; 11: storage battery; 12: first relay; 13: first current sensor; 14: first power supply circuit; 15: first control unit; 16: first wireless communication unit; 17: first antenna; 18: first ID superposition circuit; 19: first ID detection circuit; 21: motor; 22: inverter; 23: second relay; 24: second power supply circuit; 25: second control unit; 26: second wireless communication unit; 27: second antenna; 28: second ID superposition circuit; 29: second ID detection circuit; 210: voltage detection circuit; T1: power supply terminal; T2: power receiving terminal; Lp: power line; 191: integration circuit; 192: subtraction circuit; 193: comparison circuit; Rf: filter resistor; R1-R4: resistors; Cf: filter capacitor; OP1-OP3: third operational amplifier; S1-S3: switch.

Claims

1. An identification information receiving device for receiving identification information defined by a plurality of bits superimposed on a current or voltage of a power line by an identification information transmitting device connected via a power line, the identification information receiving device comprising: an integrating circuit for integrating an input signal obtained by obtaining the current or voltage of the power line as a voltage value; a subtraction circuit that subtracts the output signal of the integration circuit from the input signal; and The binary conversion unit determines that the output signal of the subtraction circuit is 1 when it is equal to or greater than a threshold value, and determines that the output signal of the subtraction circuit is 0 when it is lower than the threshold value.

2. The identification information receiving device according to claim 1, characterized in that: The binary conversion section includes a comparison circuit that compares the output signal of the subtraction circuit with the threshold value and outputs a high-level signal or a low-level signal.

3. The identification information receiving device according to claim 1, characterized in that: The subtraction circuit is constructed using a single-power supply operational amplifier. The input signal is input to a non-inverting input terminal of the operational amplifier, and the output signal of the integration circuit is input to an inverting input terminal of the operational amplifier.

4. The identification information receiving device according to claim 1, characterized in that: The integrating circuit constitutes a low-pass filter, The time constant of the low-pass filter is set so that the cutoff frequency of the low-pass filter becomes 1 / 10 or less of a clock frequency corresponding to the communication speed of the identification information.

5. The identification information receiving device according to claim 1, characterized in that: The integration circuit includes a resistor-capacitor circuit, namely, an RC circuit, and a voltage follower.

6. The identification information receiving device according to claim 2, characterized in that: When an authentication period including reception of the identification information ends, power supply to active elements included in the integration circuit, the subtraction circuit, and the comparison circuit is cut off.

7. A detachable portable power storage pack, which serves as the identification information receiving device according to any one of claims 1 to 6.

8. A method for receiving identification information, in an identification information receiving device, the identification information receiving device being used to receive identification information defined by a plurality of bits superimposed on a current or voltage of the power line by an identification information transmitting device connected via a power line, the identification information receiving method being characterized in that it comprises the following steps: integrating an input signal obtained by obtaining the current or voltage of the power line as a voltage value; subtracting an integrated signal of the input signal from the input signal; as well as When the input signal after subtracting the integral signal is equal to or greater than a threshold value, the value is determined to be 1, and when the input signal after subtracting the integral signal is lower than the threshold value, the value is determined to be 0.

9. An identification information receiving program, the identification information receiving program in an identification information receiving device, the identification information receiving device being used to receive identification information specified by a plurality of bits superimposed on a current or voltage of the power line by an identification information transmitting device connected via a power line, the identification information receiving program being characterized in that it causes a computer to execute the following processing: integrating an input signal obtained by obtaining the current or voltage of the power line as a voltage value; subtracting an integrated signal of the input signal from the input signal; and When the input signal after subtracting the integral signal is equal to or greater than a threshold value, the value is determined to be 1, and when the input signal after subtracting the integral signal is lower than the threshold value, the value is determined to be 0.

10. A non-transitory recording medium recording an identification information receiving program in an identification information receiving device, the identification information receiving device being used to receive identification information defined by a plurality of bits superimposed on a current or voltage of the power line by an identification information transmitting device connected via a power line, the recording medium being characterized in that the identification information receiving program causes a computer to execute the following processing: integrating an input signal obtained by obtaining the current or voltage of the power line as a voltage value; subtracting an integrated signal of the input signal from the input signal; and When the input signal after subtracting the integral signal is equal to or greater than a threshold value, the value is determined to be 1, and when the input signal after subtracting the integral signal is lower than the threshold value, the value is determined to be 0.

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