Simulation method and device of high-voltage direct-hanging energy storage system based on FPGA (Field Programmable Gate Array)

Abstract

The invention discloses a simulation method and device for a high-voltage direct-hanging energy storage system based on an FPGA. A power unit of the high-voltage direct-hanging energy storage system is divided into an H bridge and an energy storage unit part, the H bridge and a network side topology are placed in the FPGA for simulation, an energy storage battery branch part is placed in a CPU for simulation, and submodule voltage and current information interaction is conducted between the FPGA and the CPU through a PCIE bus. The FPGA establishes a Thevenin model of a single high-voltage direct-hanging energy storage system sub-module, algebraic superposition is carried out by using the series relation of the sub-modules, and the capacitor voltage, the terminal voltage and the bridge arm voltage of the sub-modules are calculated; the equivalent model and the network side topology run in an FPGA (Field Programmable Gate Array) of a simulator at a simulation step length of 1 us; the energy storage battery branch runs in a CPU of the simulator, and the CPU supports a user-defined energy storage battery model; and the advantages of the real-time multi-core processor and the FPGA are fully combined, so that accurate real-time simulation on the high-voltage direct-hanging energy storage system of any series with the simulation step length of 1 us is realized on the FPGA.

Description

Technical Field

[0001] The present invention relates to the field of real-time simulation technology, and in particular to a simulation method and device for a high-voltage direct-mounted energy storage system based on FPGA. Background Art

[0002] With the growing demand for energy storage technology and the requirements for grid stability and flexibility, in order to balance the difference between load and supply in the power network and improve the efficiency and reliability of the power system, high-voltage direct-mounted energy storage systems have gradually become the focus of research for various energy storage manufacturers. At present, high-voltage direct-mounted energy storage systems have mature applications in new energy distribution storage, grid side, and large-scale industry and commerce at 6kv and 10kv. There are many demonstration projects for high-voltage direct-mounted energy storage at the 35kV voltage level and it has become the focus of research for many manufacturers.

[0003] High-voltage direct-mounted energy storage systems usually have high voltage levels, large power capacity, many cascaded sub-modules, a large number of switches, and a large battery system volume. Testing based on a physical platform is costly, risky, and complex. Testing and debugging on a physical prototype is difficult, and it is often difficult to show some abnormal operating conditions, such as voltage fluctuations and frequency offsets in the power grid. Therefore, for high-voltage direct-mounted energy storage controllers, it is very necessary to test them using a real-time simulation device that can simulate various operating conditions of the actual system.

[0004] However, for high-voltage direct-mounted energy storage systems, real-time simulation testing has the following main challenges:

[0005] 1. High-voltage direct-mounted energy storage systems usually contain hundreds of power electronic devices, which cannot be accurately simulated by conventional real-time simulation devices. In order to ensure the accuracy of real-time simulation, this requires the real-time simulation device to have an extremely small simulation step size, usually at the level of a few microseconds.

[0006] Second, there is a lot of data interaction between the high-voltage direct-mounted energy storage system and the controller, and the traditional physical IO wiring method cannot be used to achieve interaction;

[0007] 3. The traditional simulation device runs the battery model of the high-voltage direct-mounted energy storage system in the FPGA, and does not support the modification of the energy storage battery characteristics and series and parallel conditions.

[0008] Fourth, the widely used device-level detailed model truly builds each submodule of the high-voltage direct-mounted energy storage system, and can directly simulate the charging and discharging process of each submodule capacitor. However, as the simulation scale increases, the presence of a large number of power electronic devices causes the calculation efficiency to drop sharply, which is not suitable for the rapid electromagnetic transient simulation of the power system. Therefore, a simulation method and device for a high-voltage direct-mounted energy storage system based on FPGA is provided. Summary of the invention

[0009] The purpose of the present invention is to provide a simulation method for a high-voltage direct-mounted energy storage system based on FPGA in view of the defects of the prior art, wherein the power unit of the high-voltage direct-mounted energy storage system is split into an H-bridge and an energy storage unit part, the H-bridge and the grid-side topology are placed in the FPGA for simulation, and the energy storage battery branch part is placed in the CPU for simulation, and the FPGA and the CPU exchange the submodule voltage and current information through the PCIE bus. The FPGA establishes a Thevenin model of a single high-voltage direct-mounted energy storage system submodule, and uses the submodule series relationship for algebraic superposition to calculate the submodule capacitor voltage, submodule terminal voltage, and bridge arm voltage; the equivalent model and the grid-side topology run in the FPGA of the simulator with a simulation step of 1us; the energy storage battery branch runs in the CPU of the simulator, and the CPU supports user-defined energy storage battery models; the advantages of the real-time multi-core processor and the FPGA are fully combined, so as to realize accurate real-time simulation of any series of high-voltage direct-mounted energy storage systems with a simulation step of 1us on the FPGA.

[0010] To achieve the above object, the present invention provides the following technical solution: a simulation method of a high-voltage direct-mounted energy storage system based on FPGA, comprising the following steps:

[0011] Step 1: The host computer applies the model cascade submodules to the high-voltage direct-mounted energy storage system. The module cascade number N, bypass capacitor value C, and capacitor initial voltage V c_initial , discharge resistor R p 、IGBT on-resistance R on 、IGBT turn-off resistance R off As well as the grid-side inductance L0, grid-side resistance R0, grid-side voltage V abc , simulation step length ΔT and other numerical information are configured;

[0012] Step 2: Model the high-voltage cascade submodule on the DC side, where the energy storage battery and the series inductor before the battery are simulated on the CPU, and the DC capacitor of the submodule is equivalent to a controllable voltage source on the CPU; the H-bridge and capacitor of the submodule are simulated on the FPGA for small step size, and the energy storage battery part is equivalent to a controllable current source on the FPGA;

[0013] Step 3: FPGA performs Thevenin equivalent on the submodule capacitor part, and connects the bypass capacitor C and the discharge resistor R p Equivalent to resistance R ceq With voltage source V ceq Equivalent circuit model of series connection;

[0014] Step 4: FPGA performs Thevenin equivalent on the cascaded submodules and connects the H-bridge in parallel with the controllable current source I bat The submodule is equivalent to a resistor R smeq With voltage source V smeqEquivalent circuit model of the series connection, and pre-calculate the generated R smeq , the values ​​of terminal voltage proportionality coefficient A and battery current proportionality coefficient B under different switch tube states;

[0015] Step 5: FPGA performs Thevenin equivalent on each phase bridge arm of the high-voltage direct-mounted energy storage, and converts each phase bridge arm into a resistor R EQ With voltage source V EQ Equivalent circuit model of series connection;

[0016] Step 6: FPGA switches the equivalent circuit parameter R corresponding to the submodule according to the current conduction state of each switch tube of the submodule smeq , terminal voltage proportionality coefficient A and battery current proportionality coefficient B, and according to the capacitor voltage V at the previous moment c (t-ΔT) and battery current I bat , calculate the equivalent voltage V of each submodule smeq , and then the equivalent voltage V of each phase bridge arm is obtained by accumulation EQ ;

[0017] Step 7: FPGA calculates the equivalent resistance R of each bridge arm EQ And the equivalent voltage V EQ , as well as the grid-side voltage and grid-side inductance parameters, the bridge arm current I is obtained by integration calculation. sm ;

[0018] Step 8: FPGA calculates the current I according to the bridge arm current sm and the energy storage battery current I bat , calculate the capacitive current I of each submodule c and capacitor voltage V c ;

[0019] Step 9: The CPU obtains the submodule capacitor voltage V uploaded by the FPGA c , combined with the energy storage battery voltage on the CPU, calculate the energy storage battery current I bat , and the energy storage battery current I bat Send to FPGA;

[0020] Step 10: FPGA uploads the information of submodule voltage, current, bridge arm voltage and current, and the host computer can observe the operating status of the high-voltage direct-mounted energy storage system in real time; the data of submodule voltage, current and SOC are transmitted to the energy storage controller via optical fiber; the battery information in the CPU can be transmitted to the BMS control system via CAN communication.

[0021] As a preferred technical solution of the present invention, the configuration information in step 1 needs to be configured in the host computer, and after configuration, no additional FPGA compilation is required to realize the functions described in the configuration information;

[0022] The specific steps of step 1 are as follows:

[0023] Step 11: The host computer front end connects to the device through the device IP, and configures the module cascade number N, bypass capacitor value C, and capacitor initial voltage V of the cascade submodule of the high-voltage direct-mounted energy storage system application model on the host computer. c_initial , discharge resistor R p 、IGBT on-resistance R on 、IGBT turn-off resistance R off As well as the grid-side inductance L0, grid-side resistance R0, grid-side voltage V abc , simulation step length ΔT parameter information;

[0024] Step 12: The host computer backend reads the front-end configuration information and generates a configuration file.

[0025] As a preferred technical solution of the present invention, the specific steps of step 3 are as follows:

[0026] Step 31: Use the trapezoidal integration method to discretize the submodule equivalent model and convert the bypass capacitor C into a capacitor resistor R. c Series voltage source V c0eq ; Among them, the submodule voltage V c The expression is as follows:

[0027]

[0028] in:

[0029] I c (t) is the capacitor current; R c is the equivalent resistance of capacitor C; ΔT is the simulation step size;

[0030] Step 32: Connect capacitor C in parallel with discharge resistor R p The overall equivalent is a resistor R ceq Series voltage source V ceq The equivalent model of:

[0031]

[0032] As a preferred technical solution of the present invention, the specific steps of step 4 are as follows:

[0033] Step 41: FPGA establishes the Thevenin equivalent model of the high-voltage direct-mounted energy storage system submodule, and regards the four switch tubes S1, S2, S3, and S4 of the submodule as variable resistors R1, R2, R3, and R4 that switch between high and low resistance values. The resistance value in the on state is R on , when off, R off ; On-resistance R on With the off resistance Roff Configure data for parameters;

[0034] Step 42: Connect the H-bridge in parallel with the energy storage unit controllable current source I bat The submodule is equivalent to a resistor R smeq Series voltage source V smeq :

[0035] V sm =R smeq I sm +V smeq (t-ΔT);

[0036] R smeq =R A / / (R2 / / R C ) / / (R4 / / R B );

[0037] in:

[0038] V smeq (t-ΔT)=A*V ceq (t-ΔT)+B*I bat ;

[0039] in:

[0040] R smeq is the equivalent circuit resistance; V smeq is the equivalent voltage source of the submodule; I bat is the battery current, which is calculated and sent by the CPU; V sm is the submodule terminal voltage; A is the terminal voltage proportional coefficient, and B is the battery current proportional coefficient;

[0041] Step 43: Pre-calculate and generate the initialization equivalent circuit parameters R of the sub-modules in each state according to the cascade module parameters and various possible conduction states of the sub-module switches. smeq , terminal voltage proportional coefficient A and capacitor voltage proportional coefficient B.

[0042] As a preferred technical solution of the present invention, in step 5, the N submodule equivalent circuits in the high-voltage direct-hanging energy storage bridge arm are connected in series to form a bridge arm resistor R EQ Series voltage source V EQ The equivalent circuit of each submodule unit is sm The sum is calculated to get the bridge arm voltage V MV :

[0043]

[0044] Then: V MV =REQ I sm +V EQ (t-ΔT);

[0045] in:

[0046] V MV is the bridge arm voltage of each phase; R EQ is the equivalent circuit resistance; V EQ is the equivalent voltage source of the bridge arm; I sm is the bridge arm current.

[0047] As a preferred technical solution of the present invention, in step 6, the FPGA selects the corresponding initialization equivalent circuit parameter R according to the conduction state of the current sub-module switch tube. smeq The resistance value and terminal voltage proportionality coefficient A, the battery current proportionality coefficient B, the four switch tubes of each sub-module H bridge have different conduction state combinations, and the corresponding equivalent circuit parameters R smeq The resistance value, terminal voltage proportionality factor A, and battery current proportionality factor B are also different;

[0048] FPGA selects the equivalent circuit parameters and proportional coefficients at the current moment, based on the capacitor voltage V at the previous moment c (t-ΔT) and battery current I bat , calculate the equivalent voltage V of each cascaded submodule smeq , and then the equivalent voltage V of each phase bridge arm is obtained by cumulative summation EQ .

[0049] As a preferred technical solution of the present invention, in step 8, FPGA is based on the bridge arm current I sm and the energy storage battery current I bat , calculate the capacitive current I of each submodule c (t) and capacitor voltage V c :

[0050]

[0051] Where: R ∑ =R1+R2+R3+R4;

[0052]

[0053] V c (t) = R c I c (t)+V c0eq (t-ΔT);

[0054] I bat is the energy storage battery current, which is calculated by the energy storage battery model in the CPU and uploaded to the FPGA; Ism is the bridge arm current; I c is the capacitor current; I c ′ is the current flowing through the capacitor and bypass capacitor; ΔT is the simulation step; the electrical quantity of each submodule in the equivalent bridge arm at the time t-ΔT is simulated and calculated to obtain the capacitor voltage and current of each submodule in the bridge arm at the time t; the energy storage battery current I bat The energy storage battery model in the CPU calculates and uploads it to the FPGA; at the same time, the FPGA converts the submodule voltage V c Sent to the CPU, the CPU and FPGA communicate at high speed via the PCIE bus.

[0055] As a preferred technical solution of the present invention, in step 9, the CPU obtains the submodule capacitor voltage N uploaded by the FPGA. c , combined with the energy storage battery voltage on the CPU, calculate the energy storage battery current I bat , and the energy storage battery current I bat Send it to FPGA; FPGA and CPU use PCIE bus to conduct closed-loop interaction of data information between high-voltage direct-mounted energy storage battery branch and cascaded H-bridge;

[0056] At the same time, the simulation test of the high-voltage direct-mounted energy storage system usually also includes circuit breaker signals and battery SOC signals. The circuit breaker signal is received by the FPGA optical fiber from the external controller signal, and then uploaded to the energy storage branch of the CPU. The battery SOC is sent to the FPGA and then transmitted to the external controller.

[0057] As a preferred technical solution of the present invention, the data of the submodule voltage, current and SOC in step 10 need to be framed, and the frame structure includes a frame synchronization header and information of each data packet. Each optical fiber transmits information of all submodules of one phase, and the high-voltage direct-mounted energy storage system requires three optical fibers to be connected to an external controller through an external optical port.

[0058] A device for executing a simulation method of a high-voltage direct-mounted energy storage system based on FPGA, comprising a host computer for configuring parameters, FPGA and an optical fiber interface; the optical fiber interface is configured with 8 optical fiber interfaces for sending submodule voltage, current, and SOC information, and receiving PWM signals and circuit breaker signals transmitted by an external controller.

[0059] Compared with the prior art, the present invention has the following advantages:

[0060] The present invention proposes a simulation method and device for a high-voltage direct-mounted energy storage system based on FPGA, which splits the power unit of the high-voltage direct-mounted energy storage system into an H-bridge and an energy storage unit part, wherein the H-bridge and the grid-side topology are simulated in the FPGA, and the energy storage battery branch part is simulated in the CPU. The FPGA and the CPU exchange sub-module voltage and current information through the PCIE bus, and support user-defined energy storage battery models. Combining the respective advantages of a real-time multi-core processor and FPGA, accurate real-time simulation of any number of high-voltage direct-mounted energy storage systems can be achieved on the FPGA with a simulation step size of 1us. BRIEF DESCRIPTION OF THE DRAWINGS

[0061] Figure 1 This is a flow chart of the high-voltage direct-mounted energy storage modeling simulation method of the present invention;

[0062] Figure 2 It is a schematic block diagram of the structure of the high-voltage direct-mounted energy storage simulation device of the present invention;

[0063] Figure 3 The Thevenin equivalent model of the bypass capacitor of the submodule of the high-voltage direct-mounted energy storage system of the present invention;

[0064] Figure 4 The Thevenin equivalent model of the high-voltage direct-mounted energy storage system submodule of the present invention;

[0065] Figure 5 The Thevenin equivalent model of the bridge arm of the high-voltage direct-mounted energy storage system of the present invention;

[0066] Figure 6 This is a waveform diagram of the real-time simulation results of the high-voltage direct-mounted energy storage system of the present invention;

[0067] (a) Battery DC side current; (b) cascaded H-bridge capacitor voltage. DETAILED DESCRIPTION

[0068] The preferred embodiments of the present invention are described in detail below in conjunction with the accompanying drawings so that the advantages and features of the present invention can be more easily understood by those skilled in the art, thereby making a clearer and more definite definition of the protection scope of the present invention.

[0069] Example 1: Please refer to Figure 1 The present invention provides a technical solution: a high-voltage direct-mounted energy storage simulation method based on FPGA, the specific steps are as follows:

[0070] Step 1: The host computer applies the model cascade submodules to the high-voltage direct-mounted energy storage system. The module cascade number N, bypass capacitor value C, and capacitor initial voltage V c_initial , discharge resistor R p 、IGBT on-resistance R on 、IGBT turn-off resistance R offAs well as the grid-side inductance L0, grid-side resistance R0, grid-side voltage V abc , simulation step length ΔT and other parameter information are configured;

[0071] Step 11: Figure 1 As shown, the host computer front end connects to the device through the device IP, and the host computer applies the model cascade sub-module of the high-voltage direct-mounted energy storage system to the module cascade number N, bypass capacitor value C, capacitor initial voltage V c_initial , discharge resistor R p 、IGBT on-resistance R on 、IGBT turn-off resistance R off As well as the grid-side inductance L0, grid-side resistance R0, grid-side voltage V abc Configure the simulation step length ΔT and other parameter information;

[0072] Step 12: The host computer backend reads the front-end configuration information and generates a configuration file;

[0073] Step 2: Segment the high voltage cascade submodule on the DC side, such as Figure 2 As shown, the energy storage battery and the series inductor before the battery are simulated on the CPU, and the DC capacitor of the submodule is equivalent to a controllable voltage source on the CPU; the H bridge and capacitor of the submodule are simulated on the FPGA for small step size, and the energy storage battery part is equivalent to a controllable current source on the FPGA;

[0074] Step 3: FPGA performs Thevenin equivalent on the submodule capacitor part, and connects the bypass capacitor C and the discharge resistor R p Equivalent to resistance R ceq With voltage source V ceq Equivalent circuit model of series connection;

[0075] Step 31: Use the trapezoidal integration method to discretize the submodule equivalent model and convert the bypass capacitor C into a capacitor resistor R. c Series voltage source V c0eq ,like Figure 3 As shown; where the submodule voltage V c The expression is as follows:

[0076]

[0077] in:

[0078] I c (t) is the capacitor current; R c is the equivalent resistance of capacitor C; ΔT is the simulation step size;

[0079] Step 32: Figure 3 As shown, capacitor C is connected in parallel with discharge resistor R pThe overall equivalent is a resistor R ceq Series voltage source V ceq The equivalent model of:

[0080]

[0081] Step 4: FPGA performs Thevenin equivalent on the cascaded submodules and connects the H-bridge in parallel with the controllable current source I bat The submodule is equivalent to a resistor R smeq With voltage source V smeq Equivalent circuit model of the series connection, and pre-calculate the generated R smeq , the values ​​of terminal voltage proportionality coefficient A and battery current proportionality coefficient B under different switch tube states;

[0082] Step 41: FPGA establishes the Thevenin equivalent model of the high-voltage direct-mounted energy storage system submodule, and regards the four switch tubes S1, S2, S3, and S4 of the submodule as variable resistors R1, R2, R3, and R4 that switch between high and low resistance values. The resistance value in the on state is R on , when off, R off ; On-resistance R on With the off resistance R off Configure data for parameters;

[0083] Step 42: Figure 4 As shown, the H bridge is connected in parallel with the energy storage unit controllable current source I bat The cascaded submodule is equivalent to a resistor R smeq Series voltage source V smeq ,in:

[0084] V sm =R smeq I sm +V smeq (t-ΔT);

[0085] R emeq =R A / / (R2 / / R C ) / / (R4 / / R B );

[0086] in:

[0087] V smeq (t-ΔT)=A*V ceq (t-ΔT)+B*I bat ;

[0088] in:

[0089] R smeq is the equivalent circuit resistance; Vsmeq is the equivalent voltage source of the submodule; I bat is the battery current, which is calculated and sent by the CPU; V sm is the submodule terminal voltage; A is the terminal voltage proportional coefficient, and B is the battery current proportional coefficient;

[0090] Step 43: Pre-calculate and generate the initialization equivalent circuit parameters R of the sub-modules in each state according to the cascade module parameters and various possible conduction states of the sub-module switches. smeq , terminal voltage proportionality coefficient A and capacitor voltage proportionality coefficient B;

[0091] Step 5: FPGA performs Thevenin equivalent on each phase bridge arm of the high-voltage direct-mounted energy storage, and the entire bridge arm of each phase is equivalent to a resistor R EQ With voltage source V EQ Equivalent circuit model of series connection;

[0092] like Figure 5 As shown, the N submodule equivalent circuits in the high-voltage direct-mounted energy storage bridge arm are connected in series to form a bridge arm resistor R EQ Series voltage source V EQ The equivalent circuit of each submodule unit is sm The sum is calculated to get the bridge arm voltage V MV :

[0093]

[0094] Then: V MV =R EQ I sm +V EQ (t-ΔT);

[0095] in:

[0096] V MV is the bridge arm voltage of each phase; R EQ is the equivalent circuit resistance; V EQ is the equivalent voltage source of the bridge arm; I sm is the bridge arm current;

[0097] Step 6: FPGA switches the equivalent circuit parameter R corresponding to the submodule according to the current conduction state of each switch tube of the submodule smeq , terminal voltage proportionality coefficient A and battery current proportionality coefficient B, and according to the capacitor voltage V at the previous moment c (t-ΔT) and battery current I bat , calculate the equivalent voltage V of each submodule smeq , and then the equivalent voltage V of each phase bridge arm is obtained by accumulation EQ ;

[0098] Step 61: Switch the equivalent resistance R corresponding to the submodule according to the conduction status of the four switch tubes of the submodule smeq And proportional coefficients A, B:

[0099] When switches S1 and S3 are turned on and S2 and S4 are turned off, switches S1 and S3 are equivalent to a small resistor R on , switches S2 and S4 are equivalent to large resistors R off , then the equivalent circuit R smeq The resistance is R 1010 , A is 0, B is 0;

[0100] When switches S1 and S4 are turned on and S2 and S3 are turned off, switches S1 and S4 are equivalent to a small resistor R on , switches S2 and S3 are equivalent to large resistors R off , equivalent circuit R smeq The resistance is R 1001 , corresponding to A is K Q , B is S Q ;

[0101] When switches S2 and S3 are turned on and S1 and S4 are turned off, switches S2 and S3 are equivalent to a small resistor R on , switches S1 and S4 are equivalent to large resistors R off , equivalent circuit R smeq The resistance is R 0110 , corresponding to A is L Q , B is T Q ;;

[0102] When switches S2 and S4 are turned on and S1 and S3 are turned off, switches S2 and S4 are equivalent to a small resistor R on , switches S1 and S3 are equivalent to large resistors R off , equivalent circuit R smeq The resistance is R 0101 , corresponding to A is 0, B is 0;

[0103] When switches S1, S2, S3, and S4 are all turned off, they are equivalent to large resistors R off , equivalent circuit R smeq The resistance is R 0000 , corresponding to A is 0, B is 0;

[0104] The above R 1010 , R 1001 , R 0110 , R 0110 , R 0101 , K Q , L Q , S Q , T QAll of them are pre-calculated values ​​in advance, and here it is only necessary to select and switch the corresponding values ​​according to the current switch conduction state of each sub-module.

[0105] Step 62: FPGA selects the equivalent resistance R at the current moment smeq And the proportional coefficients A, B, according to the capacitor voltage V at the previous moment c (t-ΔT) and battery current I bat , calculate the equivalent voltage V of each cascaded submodule smeq , and then the equivalent voltage V of each phase bridge arm is obtained by cumulative summation EQ .

[0106] Step 7: FPGA calculates the equivalent resistance R of each bridge arm EQ And the equivalent voltage V EQ , as well as grid-side parameters such as grid-side voltage and grid-side inductance, the bridge arm current I is obtained by integration calculation sm ;

[0107] Step 8: FPGA calculates the current I according to the bridge arm current sm and the energy storage battery current I bat , calculate the capacitive current I of each submodule c and capacitor voltage V c ;

[0108]

[0109] Where: R ∑ =R1+R2+R3+R4;

[0110]

[0111] V c (t) = R c I c (t)+V c0eq (t-ΔT);

[0112] I bat is the energy storage battery current, which is calculated by the energy storage battery model in the CPU and uploaded to the FPGA; I sm is the bridge arm current; I c is the capacitor current; I c ′ is the current flowing through the capacitor and bypass capacitor; ΔT is the simulation step. According to the electrical quantity of each submodule in the equivalent bridge arm at time t-ΔT, the capacitor voltage and current of each submodule in the bridge arm at time t are obtained; the energy storage battery current I bat The energy storage battery model in the CPU calculates and uploads it to the FPGA; at the same time, the FPGA converts the submodule voltage V c Sent to the CPU, the CPU and FPGA communicate at high speed via the PCIE bus;

[0113] Step 9: The CPU obtains the submodule capacitor voltage V uploaded by the FPGA c , combined with the energy storage battery voltage on the CPU, calculate the energy storage battery current I bat , and the energy storage battery current I bat Send to FPGA;

[0114] The CPU obtains the submodule capacitor voltage V uploaded by the FPGA c , combined with the energy storage battery voltage on the CPU, calculate the energy storage battery current I bat , and the energy storage battery current I bat Send it to FPGA; CPU and FPGA exchange information such as submodule voltage, current, SOC, circuit breaker, etc. through PCIE bus;

[0115] Step 10: FPGA uploads submodule voltage, current, bridge arm voltage, current and other information, and the host computer can observe the operating status of the high-voltage direct-mounted energy storage system in real time; submodule voltage, current, SOC and other data are transmitted to the energy storage controller via optical fiber; battery information in the CPU can be transmitted to the BMS control system via CAN communication;

[0116] The submodule voltage, current, SOC and other data are transmitted to the energy storage controller through the optical fiber port of the simulation device. The submodule voltage, current, SOC and other data need to be framed. The frame structure includes the frame synchronization header and each data packet information. Each optical fiber transmits all submodule information of one phase. The high-voltage direct-mounted energy storage system requires three optical fibers to connect to the external controller through the external optical port. The battery information in the CPU can be transmitted to the BMS control system through CAN communication.

[0117] The present invention also provides a device of a high-voltage direct-mounted energy storage system based on FPGA, comprising:

[0118] The host computer is used to configure parameters, including the module cascade number N, bypass capacitor value C, and capacitor initial voltage V of the cascade submodule of the high-voltage direct-mounted energy storage system application model c_initial , discharge resistor R p 、IGBT on-resistance R on 、IGBT turn-off resistance R off As well as the grid-side inductance L0, grid-side resistance R0, grid-side voltage V abc , simulation step length ΔT and other parameter information;

[0119] FPGA, used to execute the simulation method of the present invention;

[0120] Optical fiber interface, equipped with 8 optical fiber interfaces, used to send submodule voltage, current, SOC and other information, and receive PWM signals and circuit breaker signals transmitted by external controller.

[0121] Example 2: Real-time simulation results analysis of high-voltage direct-mounted energy storage;

[0122] The performance of the high-voltage direct-mounted energy storage real-time simulator is verified by taking a 48-level high-voltage direct-mounted energy storage system as an example. The simulation model parameters are as follows: the three-phase grid voltage is 35kV, the rated capacity is 12500kVA, the grid frequency is 50Hz, the number of high-voltage direct-mounted energy storage system levels is 40, the grid-side inductance parameter is 28.8mH, the capacitance parameter is 50000uF, the battery capacity is 50Ah, the rated voltage is 768V, and the DC-side inductance is 0.85mH.

[0123] The high-voltage direct-mounted energy storage real-time simulator provided by the present invention is used to simulate the system architecture and parameters described above, and the high-voltage direct-mounted energy storage controller is connected to the real-time simulator. The high-voltage direct-mounted energy storage controller and the real-time simulation device provided by the present invention exchange data information through optical fiber to realize control of the high-voltage direct-mounted energy storage system.

[0124] Figure 6 Contains two sub-images, Figure 6 (a) Figure 6 (b) are the battery DC side current and cascade H-bridge capacitor voltage sampled by the simulator host computer. As shown in Figures (a) and (b), by analyzing each DC side current and submodule voltage waveform, it can be seen that the simulator can accurately simulate the double frequency characteristics of the battery current and the ripple size and balancing effect of the submodule voltage; therefore, the real-time simulation method of the high-voltage direct-mounted energy storage system using a small step size will produce more accurate results.

[0125] The above is only a specific embodiment of the present invention, but the protection scope of the present invention is not limited thereto. Any technician familiar with the technical field can easily think of various equivalent modifications or replacements within the technical scope disclosed by the present invention, and these modifications or replacements should be included in the protection scope of the present invention. Therefore, the protection scope of the present invention shall be based on the protection scope of the claims.

Claims

1. A simulation method for a high-voltage direct-mounted energy storage system based on FPGA, characterized in that: The specific steps include: Step 1: The host computer applies the model cascade submodules to the high-voltage direct-mounted energy storage system. The module cascade number N, bypass capacitor value C, and capacitor initial voltage V c_initial , discharge resistor R p 、IGBT on-resistance R on 、IGBT turn-off resistance R off As well as the grid-side inductance L0, grid-side resistance R0, grid-side voltage V abc , configure the simulation step length ΔT parameter information; Step 2: Model the high-voltage cascade submodule on the DC side, where the energy storage battery and the series inductor before the battery are simulated on the CPU, and the DC capacitor of the submodule is equivalent to a controllable voltage source on the CPU; the H-bridge and capacitor of the submodule are simulated on the FPGA for small step size, and the energy storage battery part is equivalent to a controllable current source on the FPGA; Step 3: FPGA performs Thevenin equivalent on the submodule capacitor part, and connects the bypass capacitor C and the discharge resistor R p Equivalent to resistance R ceq With voltage source V ceq Equivalent circuit model of series connection; Step 4: FPGA performs Thevenin equivalent on the cascaded submodules and connects the H-bridge in parallel with the controllable current source I bat The submodule is equivalent to a resistor R smeq With voltage source V smeq Equivalent circuit model of the series connection, and pre-calculate the generated R smeq , the values ​​of terminal voltage proportionality coefficient A and battery current proportionality coefficient B under different switch tube states; Step 5: FPGA performs Thevenin equivalent on each phase bridge arm of the high-voltage direct-mounted energy storage, and converts each phase bridge arm into a resistor R EQ With voltage source V EQ Equivalent circuit model of series connection; Step 6: FPGA switches the equivalent circuit parameter R corresponding to the submodule according to the current conduction state of each switch tube of the submodule smeq , terminal voltage proportionality coefficient A and battery current proportionality coefficient B, and according to the capacitor voltage V at the previous moment c (t-ΔT) and battery current I bat , calculate the equivalent voltage V of each submodule smeq , and then the equivalent voltage V of each phase bridge arm is obtained by accumulation EQ ; Step 7: FPGA calculates the equivalent resistance R of each bridge arm EQ And the equivalent voltage V EQ , as well as the grid-side voltage and grid-side inductance parameters, the bridge arm current I is obtained by integration calculation. sm ; Step 8: FPGA calculates the current I according to the bridge arm current sm and the energy storage battery current I bat , calculate the capacitive current I of each submodule c and capacitor voltage V c ; Step 9: The CPU obtains the submodule capacitor voltage V uploaded by the FPGA c , combined with the energy storage battery voltage on the CPU, calculate the energy storage battery current I bat , and the energy storage battery current I bat Send to FPGA; Step 10: FPGA uploads the information of submodule voltage, current, bridge arm voltage and current, and the host computer can observe the operating status of the high-voltage direct-mounted energy storage system in real time; the data of submodule voltage, current and SOC are transmitted to the energy storage controller via optical fiber; the battery information in the CPU can be transmitted to the BMS control system via CAN communication.

2. The simulation method of a high-voltage direct-mounted energy storage system based on FPGA according to claim 1, characterized in that: The configuration information in step 1 must be configured in the host computer. After configuration, no additional FPGA compilation is required to achieve the functions described in the configuration information. The specific steps of step 1 are as follows: Step 11: The host computer front end connects to the device through the device IP, and configures the module cascade number N, bypass capacitor value C, and capacitor initial voltage V of the cascade submodule of the high-voltage direct-mounted energy storage system application model on the host computer. c_initial , discharge resistor R p 、IGBT on-resistance R on 、IGBT turn-off resistance R off As well as the grid-side inductance L0, grid-side resistance R0, grid-side voltage V abc , simulation step length ΔT parameter information; Step 12: The host computer backend reads the front-end configuration information and generates a configuration file.

3. The simulation method of a high-voltage direct-mounted energy storage system based on FPGA according to claim 1, characterized in that: The specific steps of step 3 are as follows: Step 31: Use the trapezoidal integration method to discretize the submodule equivalent model and convert the bypass capacitor C into a capacitor resistor R. c Series voltage source V c0eq ; Among them, the submodule voltage V c The expression is as follows: in: I c (t) is the capacitor current; R c is the equivalent resistance of capacitor C; ΔT is the simulation step size; Step 32: Connect capacitor C in parallel with discharge resistor R p The overall equivalent is a resistor R ceq Series voltage source V ceq The equivalent model of:

4. The simulation method of a high-voltage direct-mounted energy storage system based on FPGA according to claim 1, characterized in that: The specific steps of step 4 are as follows: Step 41: FPGA establishes the Thevenin equivalent model of the high-voltage direct-mounted energy storage system submodule, and regards the four switch tubes S1, S2, S3, and S4 of the submodule as variable resistors R1, R2, R3, and R4 that switch between high and low resistance values. The resistance value in the on state is R on , when off, R off ; On-resistance R on With the off resistance R off Configure data for parameters; Step 42: Connect the H-bridge in parallel with the energy storage unit controllable current source I bat The submodule is equivalent to a resistor R smeq Series voltage source V smeq : V sm =R smeq I sm +V smeq (t-ΔT); R smeq =R A / / (R2 / / R C ) / / (R4 / / R B ); in: V smeq (t-ΔT)=A*V ceq (t-ΔT)+B*I bat ; in: R smeq is the equivalent circuit resistance; V smeq is the equivalent voltage source of the submodule; I bat is the battery current, which is calculated and sent by the CPU; V sm is the submodule terminal voltage; A is the terminal voltage proportional coefficient, and B is the battery current proportional coefficient; Step 43: Pre-calculate and generate the initialization equivalent circuit parameters R of the sub-modules in each state according to the cascade module parameters and various possible conduction states of the sub-module switches. smeq , terminal voltage proportional coefficient A and capacitor voltage proportional coefficient B.

5. The simulation method of a high-voltage direct-mounted energy storage system based on FPGA according to claim 1, characterized in that: In step 5, the N submodule equivalent circuits in the high-voltage direct-mounted energy storage bridge arm are connected in series to be equivalent to a bridge arm resistor R EQ Series voltage source V EQ The equivalent circuit of each submodule unit is sm The sum is calculated to get the bridge arm voltage V MV : Then: V MV = R EQ I sm + V EQ (t - ΔT); in: V MV is the bridge arm voltage of each phase; R EQ is the equivalent circuit resistance; V EQ is the equivalent voltage source of the bridge arm; I sm is the bridge arm current.

6. The simulation method of a high-voltage direct-mounted energy storage system based on FPGA according to claim 1, characterized in that: In step 6, the FPGA selects the corresponding initialization equivalent circuit parameter R according to the conduction state of the current sub-module switch tube. smeq The resistance value and terminal voltage proportionality coefficient A, the battery current proportionality coefficient B, the four switch tubes of each sub-module H bridge have different conduction state combinations, and the corresponding equivalent circuit parameters R smeq The resistance value, terminal voltage proportionality factor A, and battery current proportionality factor B are also different; FPGA selects the equivalent circuit parameters and proportional coefficients at the current moment, based on the capacitor voltage V at the previous moment c (t-ΔT) and battery current I bat , calculate the equivalent voltage V of each cascaded submodule smeq , and then the equivalent voltage V of each phase bridge arm is obtained by cumulative summation EQ .

7. The simulation method of a high-voltage direct-mounted energy storage system based on FPGA according to claim 1, characterized in that: In step 8, the FPGA calculates the bridge arm current I sm and the energy storage battery current I bat , calculate the capacitive current I of each submodule c (t) and capacitor voltage V c : Where: R ∑ =R1+R2+R3+R4; V c (t)=R c ·I c (t)+V c0eq (t-ΔT); I bat is the energy storage battery current, which is calculated by the energy storage battery model in the CPU and uploaded to the FPGA; I sm is the bridge arm current; I c is the capacitor current; I c ′ is the current flowing through the capacitor and bypass capacitor; ΔT is the simulation step; the electrical quantity of each submodule in the equivalent bridge arm at the time t-ΔT is simulated and calculated to obtain the capacitor voltage and current of each submodule in the bridge arm at the time t; the energy storage battery current I bat The energy storage battery model in the CPU calculates and uploads it to the FPGA; at the same time, the FPGA converts the submodule voltage V c Sent to the CPU, the CPU and FPGA communicate at high speed via the PCIE bus.

8. The simulation method of a high-voltage direct-mounted energy storage system based on FPGA according to claim 1, characterized in that: In step 9, the CPU obtains the submodule capacitor voltage V uploaded by the FPGA c , combined with the energy storage battery voltage on the CPU, calculate the energy storage battery current I bat , and the energy storage battery current I bat Send it to FPGA; FPGA and CPU use PCIE bus to conduct closed-loop interaction of data information between high-voltage direct-mounted energy storage battery branch and cascaded H-bridge; At the same time, the simulation test of the high-voltage direct-mounted energy storage system usually also includes circuit breaker signals and battery SOC signals. The circuit breaker signal is received by the FPGA optical fiber from the external controller signal, and then uploaded to the energy storage branch of the CPU. The battery SOC is sent to the FPGA and then transmitted to the external controller.

9. The simulation method of a high-voltage direct-mounted energy storage system based on FPGA according to claim 1, characterized in that: The submodule voltage, current and SOC data in step 10 need to be framed. The frame structure includes a frame synchronization header and information of each data packet. Each optical fiber transmits information of all submodules of one phase. The high-voltage direct-mounted energy storage system requires three optical fibers to be connected to an external controller through an external optical port.

10. A device for executing the simulation method of a high-voltage direct-mounted energy storage system based on FPGA according to any one of claims 1 to 9, characterized in that: It includes a host computer, FPGA and optical fiber interface for configuring parameters; the optical fiber interface is configured with 8 optical fiber interfaces for sending submodule voltage, current, SOC information, and receiving PWM signals and circuit breaker signals transmitted by an external controller.

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