Structure for high side to suppress surge in hot plug process

Through the combined structure of MOS tube, Zener diode array and resistor R, the surge suppression problem during high-side hot plugging is solved, and rapid response and efficient surge suppression are achieved, which improves the stability and reliability of the chip.

CN119297951APending Publication Date: 2025-01-10WUXI STABLE-CHIP TECH CO LTD
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Patent Information

Application Number
CN202411264808.0
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-09-10
Publication Date
2025-01-10

AI Technical Summary

Technical Problem

The prior art cannot effectively suppress the surge phenomenon during hot-swap in high-side occasions, and the external installation of surge protection devices is high cost and poor response efficiency, which affects the stability and reliability of the chip.

Method used

Using a combined structure of MOS tube, Zener diode array and resistor R, the Zener diode array consists of N+1 Zener diodes, connected between the gate source of the MOS tube, and the resistor R is connected between the Zener diode and ground GND During the process, the nanosecond level AC response speed of the Zener diode and the high voltage characteristics of the MOS tube are used to quickly turn on and release surge charge, and the surge suppression efficiency is optimized by adjusting the resistance value of the resistor R.

Benefits of technology

It effectively limits the surge phenomenon during high-side hot plugging, overcomes the problem of low voltage resistance of MOS gate source, ensures rapid response, and improves the stability and reliability of the chip.

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Abstract

The invention is suitable for the technical field of integrated circuits, and provides a structure for high side surge suppression in a hot plug process, and the structure comprises an MOS tube which is used for rapidly conducting and releasing surge charges when a surge voltage is detected; the Zener diode array is connected between the gate and the source of the MOS tube and is used for limiting the gate-source voltage; and the resistor R is connected between the Zener diode array and the ground GND and is used for limiting the current. The Zener diode array is composed of N + 1 Zener diodes, the N Zener diodes are connected in series to the circuit, and the N Zener diodes and the lowermost Zener diode jointly set a trigger point of surge voltage. By utilizing the characteristics of the Zener diode, the resistor and the MOS tube, the problem that high side driving cannot be realized due to relatively low gate-source withstand voltage of the MOS tube is solved, meanwhile, the response characteristic of the selected device is fully exerted, the response rate is ensured, and the surge phenomenon can be efficiently limited in the hot plug process.
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Description

Technical Field

[0001] The invention belongs to the technical field of integrated circuits, and in particular relates to a structure for suppressing surges in a hot plugging process on a high side. Background Art

[0002] In recent decades, with the rapid development of integrated circuit technology, the requirements for chip stability, reliability and post-disaster recovery capabilities have been increasing. The application of hot-swap technology has significantly improved the robustness of chips and has become an indispensable function in power supply systems. How to effectively suppress surge phenomena is a key issue that needs to be addressed in realizing hot-swap functions. In order to suppress surge phenomena, it is usually achieved by controlling the discharge of power tubes through a high-pass filter structure. However, the problem is that the gate-source withstand voltage of both high-voltage and low-voltage MOS tubes is relatively low, making this design only suitable for low-side inputs. For many high-side occasions, this method cannot meet the demand for suppressing surges generated during hot-swap. If this function is realized by adding a surge protection device to the outside of the chip, it will not only fail to meet the requirements of integration, but will also be difficult to provide effective protection due to high cost and poor response efficiency, thereby affecting the stability and reliability of the chip. For this reason, a structure for suppressing surges during hot-swap processes on the high side is proposed. Summary of the invention

[0003] The object of the present invention is to provide a structure for suppressing surges in a hot plugging process on a high side, aiming to solve the problems raised in the above-mentioned background technology.

[0004] To achieve the above object, the present invention provides the following technical solutions:

[0005] A structure for suppressing surge during hot plugging process on high side, comprising:

[0006] MOS tube, used to quickly turn on and release surge charge when surge voltage is detected;

[0007] A Zener diode array is connected between the gate and source of the MOS tube to limit the gate-source voltage;

[0008] The resistor R is connected between the Zener diode array and the ground GND, and is used to limit the current to prevent excessive impact on the circuit when a surge occurs, while affecting the response speed and efficiency of surge suppression.

[0009] Furthermore, the Zener diode array is composed of N+1 Zener diodes, wherein the N Zener diodes are connected in series to the circuit and together with the bottom Zener diode set the trigger point of the surge voltage.

[0010] Furthermore, the Zener diode has an AC response speed of nanoseconds.

[0011] Furthermore, the MOS tube is a high-voltage NMOS tube.

[0012] Furthermore, the surge suppression efficiency is optimized by adjusting the resistance value of the resistor R.

[0013] Furthermore, before the hot plug starts, the Zener diode array is not conducting and the NMOS tube is in a cut-off state.

[0014] Furthermore, when hot plugging begins, the high side circuit is suddenly connected to a high voltage, and the surge voltage rises rapidly. When the voltage exceeds the trigger point set by the Zener diode array, the Zener diode begins to conduct, and the gate-source voltage of the NMOS tube rises rapidly. When the gate-source voltage of the NMOS tube reaches the threshold, the NMOS tube is turned on, and the surge charge is quickly released to the ground GND through the NMOS tube.

[0015] Furthermore, after the surge charge is released, the high side circuit voltage drops rapidly to the normal operating voltage, and the NMOS tube continues to conduct until the surge disappears. After the surge disappears, the Zener diode stops conducting, the gate-source voltage of the NMOS tube drops, and the NMOS tube returns to the cut-off state.

[0016] Compared with the prior art, the present invention has the following beneficial effects:

[0017] The structure for high-side suppression of surges during hot-plugging utilizes the characteristics of Zener diodes, resistors and MOS tubes to overcome the problem of being unable to implement high-side driving due to the low gate-source withstand voltage of the MOS tube itself, while giving full play to the response characteristics of the selected devices to ensure the response rate, thereby being able to effectively limit surges during hot-plugging. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] Figure 1 It is a structural schematic diagram of the present invention.

[0019] Figure 2 Schematic diagram of high side surge waveform in the present invention. DETAILED DESCRIPTION

[0020] In order to make the purpose, technical solution and advantages of the present invention more clearly understood, the present invention is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not used to limit the present invention.

[0021] The specific implementation of the present invention is described in detail below in conjunction with specific embodiments.

[0022] like Figure 1 As shown, a structure for suppressing surges in a hot plugging process on a high side is provided in one embodiment of the present invention, comprising:

[0023] MOS tube, used to quickly turn on and release surge charge when surge voltage is detected;

[0024] The Zener diode array is used to limit the gate-source voltage and is connected between the gate and source of the MOS tube to prevent the gate-source end of the MOS tube from being damaged due to excessive voltage. The Zener diode array consists of N+1 Zener diodes (D0-D n ), and by utilizing the high-voltage-resistant characteristics of the gate and drain, N Zener diodes are connected in series to the circuit, thereby jointly determining the triggering point of the surge voltage during the hot-swap process with a Zener diode below. Since the voltage-stabilizing values ​​of Zener diodes of different processes and the surge protection voltage points required to be triggered by various designs are different, the value of N needs to be determined according to the specific situation, while taking into account the withstand voltage of the MOS tube;

[0025] Resistor R, connected between the Zener diode array and the ground GND, is used to limit the current to prevent excessive impact on the circuit when a surge occurs, and also affects the response speed and efficiency of surge suppression. By adjusting the resistance value of resistor R, the efficiency of suppressing surge during hot plugging can be adjusted, thus ultimately meeting the design requirements.

[0026] In the embodiment of the present invention, how to ensure the effectiveness of the structure is a very important issue. In addition to the DC characteristic of voltage regulation, the Zener diode also responds very quickly to AC signals, and its response time is in the nanosecond level. During the hot plug process, due to the presence of capacitive loads, the voltage will be sharply raised in a short time, and the MOS tube responds slowly. Such a discharge speed in the nanosecond level is sufficient to enable the subsequent circuit to avoid the impact of surges. Under the premise that the power tube driving capability is sufficient, this is the fundamental guarantee for the effectiveness of the simulated surge.

[0027] like Figure 1 As shown, as a preferred embodiment of the present invention, the MOS tube adopts a high-voltage NMOS tube. The high voltage here means that the drain-source (gate-drain) end can withstand high voltage, but the process factory does not provide a MOS tube with gate-source that can withstand high voltage at the same time, which is also the reason why the general structure cannot achieve high side input.

[0028] In the embodiment of the present invention, the surge waveform during the high side hot plugging process is as follows: Figure 2 As shown, the specific process is as follows:

[0029] Normal state: Before the hot swap starts, the Zener diode array is not conducting and the NMOS tube is in the cut-off state.

[0030] Surge occurs: Hot plugging starts at time 0, the high side circuit is suddenly connected to high voltage, and the surge voltage rises rapidly to a peak value V m .

[0031] Trigger protection: When the voltage exceeds the trigger point set by the Zener diode array, the Zener diode begins to conduct and the gate-source voltage of the NMOS tube rises rapidly.

[0032] NMOS tube is turned on: When the gate-source voltage of the NMOS tube reaches the threshold, the NMOS tube is turned on, forming a low-resistance path, and the surge charge is quickly released to the ground GND through the NMOS tube.

[0033] Voltage stabilization: After the surge charge is released, the high side circuit voltage drops rapidly to the normal operating voltage V0 at time T0, and the NMOS tube continues to conduct until the surge completely disappears.

[0034] Return to normal state: After the surge disappears, the Zener diode stops conducting, the gate-source voltage of the high-voltage NMOS tube drops, the NMOS tube returns to the cut-off state, and the circuit returns to normal working state.

[0035] The time required from triggering to discharge completion is only in nanoseconds, which effectively suppresses surges during high-side hot plugging.

[0036] The working principle of the present invention is:

[0037] This structure is used to suppress the surge during the hot plugging process on the high side. Before the hot plugging starts, the Zener diode array is not conducting and the NMOS tube is in the off state. When the hot plugging starts at time 0, the high side circuit is suddenly connected to the high voltage, and the surge voltage rises rapidly to the peak value V m . When the voltage exceeds the trigger point set by the Zener diode array, the Zener diode begins to conduct, and the gate-source voltage of the NMOS tube rises rapidly. When the gate-source voltage of the NMOS tube reaches the threshold, the NMOS tube conducts, forming a low-resistance path, and the surge charge is quickly released to the ground GND through the NMOS tube. After the surge charge is released, the high-side circuit voltage drops rapidly to the normal operating voltage V0 at time T0, and the NMOS tube continues to conduct until the surge completely disappears. After the surge disappears, the Zener diode stops conducting, the gate-source voltage of the high-voltage NMOS tube drops, the NMOS tube returns to the cut-off state, and the circuit returns to normal working state.

[0038] The above are only preferred embodiments of the present invention. It should be pointed out that, for those skilled in the art, several modifications and improvements can be made without departing from the concept of the present invention. These should also be regarded as the protection scope of the present invention. These will not affect the effect of the implementation of the present invention and the practicality of the patent.

Claims

1. A structure for suppressing surge during hot plugging on the high side, characterized in that: include: MOS tube, used to quickly turn on and release surge charge when surge voltage is detected; A Zener diode array is connected between the gate and source of the MOS tube to limit the gate-source voltage; The resistor R is connected between the Zener diode array and the ground GND and is used to limit the current.

2. The structure for suppressing surge during hot plugging process on the high side according to claim 1, characterized in that: The Zener diode array is composed of N+1 Zener diodes, wherein the N Zener diodes are connected in series to the circuit and together with the bottom Zener diode set the trigger point of the surge voltage.

3. The structure for suppressing surge during hot plugging process on the high side according to claim 2, characterized in that: The Zener diode has an AC response speed of nanoseconds.

4. The structure for suppressing surge during hot plugging process on the high side according to claim 2, characterized in that: The MOS tube is a high-voltage NMOS tube.

5. The structure for suppressing surge during hot plugging process on the high side according to claim 1, characterized in that: The surge suppression efficiency is optimized by adjusting the resistance value of the resistor R.

6. The structure for suppressing surge during hot plugging process on the high side according to claim 4, characterized in that: Before the hot plug starts, the Zener diode array is not conducting and the NMOS tube is in a cut-off state.

7. The structure for suppressing surge during hot plugging process on the high side according to claim 6, characterized in that: When hot plugging starts, the high side circuit is connected to a high voltage, and the surge voltage rises. When the voltage exceeds the trigger point set by the Zener diode array, the Zener diode starts to conduct, and the gate-source voltage of the NMOS tube rises. When the gate-source voltage of the NMOS tube reaches the threshold, the NMOS tube is turned on, and the surge charge is quickly released to the ground GND through the NMOS tube.

8. The structure for suppressing surge during hot plugging process on the high side according to claim 7, characterized in that: After the surge charge is released, the high side circuit voltage drops to the normal working voltage, and the NMOS tube continues to conduct until the surge disappears. After the surge disappears, the Zener diode stops conducting, the gate-source voltage of the NMOS tube drops, and the NMOS tube returns to the cut-off state.