A power regulation method, system and device

By adjusting the deadband value between multiple gain adjustment circuits, the problem of power allocation imbalance in parallel operation of LLC topology is solved, and the operating life and safety of the circuit are improved.

CN119315844BActive Publication Date: 2025-02-28SHENZHEN FENGMANG NEW ENERGY TECH CO LTD
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Patent Information

Application Number
CN202411847275.9
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2024-12-16
Publication Date
2025-02-28
Estimated Expiration
2044-12-16

AI Technical Summary

Technical Problem

The power distribution is unbalanced when multiple groups of LLC topology runs in parallel, resulting in excessive voltage and current stress of a group of LLCs, affecting the operating life of the circuit and even causing the risk of bombing.

Method used

By determining the connection mode of the output terminals between multiple gain adjustment circuits, calculating the parameters, obtaining the difference value of the calculated parameters at the output terminal, obtaining the dead zone adjustment value based on the difference value, and adjusting the dead zone value of the gain adjustment circuit according to the dead zone adjustment value to adjust the power between the multiple gain adjustment circuits.

Benefits of technology

It effectively solves the problem of unbalanced power distribution during parallel operation of multiple circuits, and improves the operating life and safety of the circuit.

✦ Generated by Eureka AI based on patent content.

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Patent Text Reader

Abstract

This application discloses a power regulation method, system, and apparatus, belonging to the field of resonant circuit power regulation technology. The power regulation method of this application is applied between multiple gain regulation circuits. The method first determines the connection method of the output terminals of the multiple gain regulation circuits, then determines the calculation parameters based on the connection method, and determines the difference between the calculated parameters of the output terminals of the multiple gain regulation circuits. Next, a dead-time adjustment value is determined based on the difference, and finally, the power between the gain regulation circuits is adjusted according to the dead-time adjustment value. This application adjusts the power of the gain regulation circuit by changing the dead-time value of the gain regulation circuit, thereby solving the problem of unbalanced power distribution when multiple circuits operate in parallel.
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Description

Technical Field

[0001] The present application relates to the technical field of resonant circuit power regulation, and in particular to a power regulation method, system and device. Background Art

[0002] LLC topology is widely used in the design of DCDC converters (DC-DC Converters) with a wide range of input and output voltages. However, considering the limited voltage stress and current stress of power devices, in order to obtain a higher output voltage or output current, it is necessary to design multiple LLC topologies to run in parallel.

[0003] However, due to the components of the LLC topology, especially the differences in the parameters of the resonant inductor, capacitor, and transformer, the power distribution may be unbalanced when multiple LLC groups run in parallel, resulting in excessive voltage and current stress in one group of LLCs, affecting the service life of the entire circuit and even causing the risk of explosion. Summary of the invention

[0004] Purpose of the invention: The purpose of this application is to provide a power regulation method, system and device, aiming to solve the technical problem of unbalanced power distribution when multiple groups of LLCs run in parallel.

[0005] Technical solution: In a first aspect, an embodiment of the present application provides a power adjustment method for adjusting power between multiple gain adjustment circuits, the power adjustment method comprising:

[0006] Determining a connection mode of output terminals among a plurality of the gain adjustment circuits;

[0007] Determining a calculation parameter based on the connection mode;

[0008] Obtaining a difference in the calculated parameters at the output ends of the plurality of gain adjustment circuits, and obtaining a dead zone adjustment value based on the difference;

[0009] The dead-band value of the gain adjustment circuit is adjusted based on the dead-band adjustment value to adjust power among a plurality of gain adjustment circuits.

[0010] In some embodiments, the calculated parameter includes voltage or current.

[0011] In some embodiments, the step of determining the calculation parameter based on the connection mode includes:

[0012] In response to the output terminals of the plurality of gain adjustment circuits being connected in series, determining that the calculated parameter includes a voltage;

[0013] In response to the output terminals of the plurality of gain adjustment circuits being connected in parallel, the calculation parameter is determined to include current.

[0014] In some embodiments, the step of obtaining the dead zone adjustment value based on the difference includes:

[0015] Determine the minimum difference;

[0016] In response to the absolute value of the difference being less than or equal to the minimum difference, determining that the dead zone adjustment value is zero;

[0017] In response to the absolute value of the difference being greater than the minimum difference, it is determined that the dead zone adjustment value is a rounded value of the difference.

[0018] In some embodiments, the step of adjusting the dead zone value of the gain adjustment circuit based on the dead zone adjustment value comprises:

[0019] determining a dead zone value of the gain adjustment circuit;

[0020] In response to a difference in the dead zone values ​​of the plurality of gain adjustment circuits, adjusting a larger dead zone value based on the dead zone adjustment value;

[0021] In response to the dead zone values ​​of the plurality of gain adjustment circuits being the same, the size of the dead zone adjustment value is determined, and the dead zone values ​​of the gain adjustment circuits are adjusted based on the dead zone adjustment value.

[0022] In some embodiments, the plurality of gain adjustment circuits include a first gain adjustment circuit and a second gain adjustment circuit, and the characterization formula of the difference includes:

[0023] d=a1-a2;

[0024] Wherein, d is the difference; a1 is the value of the calculated parameter at the output end of the first gain adjustment circuit; a2 is the value of the calculated parameter at the output end of the second gain adjustment circuit;

[0025] The step of adjusting a larger dead zone value based on the dead zone adjustment value comprises:

[0026] In response to the dead zone value of the first gain adjustment circuit being greater than the dead zone value of the second gain adjustment circuit, updating the result of summing the dead zone value of the first gain adjustment circuit and the dead zone adjustment value as the dead zone value of the first gain adjustment circuit;

[0027] In response to the dead zone value of the first gain adjustment circuit being smaller than the dead zone value of the second gain adjustment circuit, a result obtained by subtracting the dead zone value of the second gain adjustment circuit from the dead zone adjustment value is updated as the dead zone value of the second gain adjustment circuit.

[0028] In some embodiments, the step of adjusting the dead zone value of the gain adjustment circuit based on the dead zone adjustment value comprises:

[0029] In response to the dead zone adjustment value being greater than zero, updating a sum of the dead zone value of the first gain adjustment circuit and the dead zone adjustment value as the dead zone value of the first gain adjustment circuit;

[0030] In response to the dead zone adjustment value being less than zero, a result obtained by subtracting the dead zone value of the second gain adjustment circuit from the dead zone adjustment value is updated as the dead zone value of the second gain adjustment circuit.

[0031] In some embodiments, the gain adjustment circuit includes an LLC resonant circuit, and after adjusting the dead zone value of the gain adjustment circuit based on the dead zone adjustment value, the power adjustment method further includes:

[0032] The adjusted dead zone value is limited, and the minimum dead zone time under the condition of ensuring the soft switching operation of the LLC resonant circuit is determined as the minimum setting value, and the maximum dead zone time under the condition of ensuring the soft switching operation of the LLC resonant circuit is determined as the maximum setting value.

[0033] In a second aspect, an embodiment of the present application further provides a power regulation system for regulating power between multiple gain adjustment circuits, the power regulation system comprising:

[0034] A connection mode confirmation module, the connection mode confirmation module is used to determine the connection mode of the output terminals between the plurality of gain adjustment circuits;

[0035] A calculation parameter confirmation module, the calculation parameter confirmation module is used to determine the calculation parameter based on the connection mode;

[0036] An adjustment value acquisition module, the adjustment value acquisition module is used to obtain the difference between the output end calculation parameters of the plurality of gain adjustment circuits, and obtain the dead zone adjustment value based on the difference;

[0037] A dead zone value adjustment module is used to adjust the dead zone value of the gain adjustment circuit based on the dead zone adjustment value to adjust the power between multiple gain adjustment circuits.

[0038] In a third aspect, an embodiment of the present application further provides a power regulation device, comprising a processor and a memory, wherein the memory stores a computer program executable by the processor, and when the processor executes the computer program, the steps of the power regulation method described in any one of the first aspects are implemented.

[0039] The beneficial effect of the present application is that: compared with the prior art, the present application provides a power regulation method, which is applied between multiple gain regulation circuits. The power regulation method provided by the present application first determines the connection mode of the output terminals between the multiple gain regulation circuits, then determines the calculation parameters according to the connection mode of the output terminals, and determines the difference of the calculation parameters of the output terminals between the multiple gain regulation circuits, and then determines the dead zone adjustment value based on the difference, and finally adjusts the power between the gain regulation circuits according to the dead zone adjustment value. The present application adjusts the power of the gain regulation circuit by changing the dead zone value of the gain regulation circuit to solve the problem of unbalanced power distribution when multiple circuits run in parallel. BRIEF DESCRIPTION OF THE DRAWINGS

[0040] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For those skilled in the art, other drawings can be obtained based on these drawings without creative work.

[0041] Figure 1 The circuit diagram of the gain adjustment circuit (LLC topology);

[0042] Figure 2 A flowchart of the power regulation method provided in the embodiment of the present application;

[0043] Figure 3 A specific flow chart of step 200 in the power regulation method provided in an embodiment of the present application;

[0044] Figure 4 A specific flow chart of step 400 in the power regulation method provided in an embodiment of the present application;

[0045] Figure 5 A specific flow chart of step 420 in the power regulation method provided in an embodiment of the present application;

[0046] Figure 6 A specific flow chart of step 430 in the power regulation method provided in an embodiment of the present application;

[0047] Figure 7 A module connection diagram of a power regulation system provided in an embodiment of the present application;

[0048] Figure 8 A schematic diagram of the structure of a power regulation device provided in an embodiment of the present application;

[0049] Fig. 9 are two PWM driving signals with complementary relationship;

[0050] Fig.10A circuit diagram showing the serial connection of the output terminals of LLC1 and LLC2;

[0051] Fig.11 The circuit diagram of the parallel connection of the output terminals of LLC1 and LLC2;

[0052] Fig.12 A flowchart of an embodiment;

[0053] Figure numerals: 10, connection mode confirmation module; 20, calculation parameter confirmation module; 30, adjustment value acquisition module; 40, dead zone value adjustment module. DETAILED DESCRIPTION

[0054] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative work are within the scope of protection of this application.

[0055] LLC topology is widely used in the design of DCDC converters (DC-DC Converters) with a wide range of input and output voltages. However, considering the limited voltage stress and current stress of power devices, in order to obtain a higher output voltage or output current, it is necessary to design multiple LLC topologies to run in parallel.

[0056] Generally, the input side of multiple LLC topologies can be connected in parallel or in series, and the output side is designed according to actual needs. When a higher voltage is required, the output side uses the series mode, and when a higher current is required, the output side uses the parallel mode. However, regardless of the output side series mode or parallel mode, due to the differences in the components of the LLC topology, especially the resonant inductor, capacitor, and transformer parameters, the power distribution may be unbalanced when multiple LLCs are running in parallel, resulting in excessive voltage and current stress on one LLC group, affecting the service life of the entire circuit and even causing the risk of explosion.

[0057] Nowadays, with the market's higher technical requirements for charging piles, charging pile power modules also need to improve their output capacity over a wide range. Therefore, considering the output characteristics of the LLC topology output side under different connection modes (series or parallel), how to design a safe and efficient switching mode so that the LLC topology can switch the connection mode according to different working requirements and ensure the balance of power distribution of multiple groups of LLC topologies under different connection modes, so as to improve the applicability and safety of the power module, has become a feasible research direction.

[0058] In view of this, an embodiment of the present application provides a power regulation method, which is applied between multiple gain regulation circuits. The power regulation method provided by the present application first determines the connection mode of the output terminals between the multiple gain regulation circuits, then determines the calculation parameters according to the connection mode of the output terminals, and determines the difference of the calculation parameters of the output terminals between the multiple gain regulation circuits, and then determines the dead zone adjustment value based on the difference, and finally adjusts the power between the gain regulation circuits according to the dead zone adjustment value. The present application adjusts the power of the gain regulation circuit by changing the dead zone value of the gain regulation circuit to solve the problem of unbalanced power distribution when multiple circuits run in parallel.

[0059] In some embodiments, see Figure 2 , Figure 2 The power regulation method provided in the embodiment of the present application includes the following steps:

[0060] Step 100: Determine the connection mode of output terminals among multiple gain adjustment circuits.

[0061] In some embodiments, the gain adjustment circuit includes an LLC topology. The input sides of multiple groups of LLC topologies can be connected in parallel or in series. The output side is designed according to actual needs. When a higher voltage is obtained, the output side uses a series mode. When a higher current is obtained, the output side uses a parallel mode.

[0062] Step 200: Determine calculation parameters based on the connection mode.

[0063] It can be understood that the LLC topology achieves different input and output voltage gain requirements by controlling the PWM frequency, and the PWM (Pulse Width Modulation) of the upper and lower MOSFETs (Metal-Oxide-Semiconductor Field-Effect Transistor) of the same bridge arm are complementary. Theoretically, each PWM duty cycle is 50%, but in order to prevent the upper and lower bridge arms from being directly connected and causing a short circuit, the duty cycle of the upper and lower PWMs will set a dead zone value to ensure that when one MOSFET of the same bridge arm is turned on, the other MOSFET must be turned off. The lower limit of the dead zone value must satisfy the rising and falling edges of the MOSFETs in the complementary relationship of the same bridge arm cannot overlap, and it cannot be too large to affect the soft switching effect.

[0064] In some embodiments, the calculated parameter includes voltage or current. Figure 3 , Figure 3The specific flow chart of step 200 in the power regulation method provided in the embodiment of the present application, the method of determining the calculation parameter by connection mode is specifically implemented by step e and step f:

[0065] Step e: In response to the output terminals of the plurality of gain adjustment circuits being connected in series, determining a calculation parameter including a voltage.

[0066] Step f: In response to the output terminals of the plurality of gain adjustment circuits being connected in parallel, determining the calculation parameters including the current.

[0067] Step 300: Obtain the difference of the calculated parameters at the output ends of the plurality of gain adjustment circuits, and obtain the dead zone adjustment value based on the difference.

[0068] In some embodiments, when determining the dead zone adjustment value, the dead zone adjustment value is obtained by a step-by-step approximation method, specifically, the minimum difference is set to ERRmin. When the absolute value of the difference is less than or equal to ERRmin, it is determined that the circuit is in a balanced state and the dead zone adjustment value is zero. When the absolute value of the difference is greater than ERRmin, the adjustment value is taken as the difference and the result is rounded.

[0069] Step 400: Adjust the dead-zone value of the gain adjustment circuit based on the dead-zone adjustment value to adjust the power among multiple gain adjustment circuits.

[0070] In some embodiments, see Figure 4 , Figure 4 The specific flow chart of step 400 in the power adjustment method provided in the embodiment of the present application, the method for adjusting the dead zone value of the gain adjustment circuit based on the dead zone adjustment value is specifically implemented through steps 410 to 430:

[0071] Step 410: Determine a dead zone value of a gain adjustment circuit;

[0072] Step 420: In response to differences in the dead zone values ​​of the plurality of gain adjustment circuits, adjusting a larger dead zone value based on the dead zone adjustment value;

[0073] In some embodiments, the plurality of gain adjustment circuits include a first gain adjustment circuit and a second gain adjustment circuit, and the characterization formula of the difference includes:

[0074] d=a1-a2;

[0075] Wherein, d is the difference; a1 is the value of the calculated parameter at the output end of the first gain adjustment circuit; and a2 is the value of the calculated parameter at the output end of the second gain adjustment circuit.

[0076] Specifically, see Figure 5 , Figure 5The specific flow chart of step 420 in the power adjustment method provided in the embodiment of the present application, the method of adjusting the larger dead zone value based on the dead zone adjustment value is specifically implemented by step a and step b:

[0077] Step a: in response to the dead zone value of the first gain adjustment circuit being greater than the dead zone value of the second gain adjustment circuit, updating the result of summing the dead zone value of the first gain adjustment circuit and the dead zone adjustment value as the dead zone value of the first gain adjustment circuit;

[0078] Step b: In response to the dead zone value of the first gain adjustment circuit being smaller than the dead zone value of the second gain adjustment circuit, the result of subtracting the dead zone value of the second gain adjustment circuit from the dead zone adjustment value is updated as the dead zone value of the second gain adjustment circuit.

[0079] Step 430: In response to the dead zone values ​​of the plurality of gain adjustment circuits being the same, determine the size of the dead zone adjustment value, and adjust the dead zone value of the gain adjustment circuit based on the dead zone adjustment value.

[0080] In some embodiments, see 6, Figure 6 The specific flow chart of step 430 in the power adjustment method provided in the embodiment of the present application, the method of adjusting the dead zone value of the gain adjustment circuit based on the dead zone adjustment value is specifically implemented by step c and step d:

[0081] Step c: in response to the dead zone adjustment value being greater than zero, updating the sum of the dead zone value of the first gain adjustment circuit and the dead zone adjustment value as the dead zone value of the first gain adjustment circuit.

[0082] Step d: In response to the dead zone adjustment value being less than zero, updating the result of subtracting the dead zone value of the second gain adjustment circuit from the dead zone adjustment value as the dead zone value of the second gain adjustment circuit.

[0083] Step 500: Limiting the adjusted dead zone value.

[0084] Specifically, the gain adjustment circuit includes an LLC resonant circuit. When limiting the adjusted dead zone value, the minimum dead zone time under the condition of ensuring the soft switching working of the LLC resonant circuit is determined as the minimum setting value, and the maximum dead zone time under the condition of ensuring the soft switching working of the LLC resonant circuit is determined as the maximum setting value.

[0085] It can be understood that when the output side of the LLC running in parallel enters the series mode, the output voltages of the two LLCs are detected in real time, and the dead zone values ​​of the upper and lower LLCs are adjusted according to the deviation of the output voltages. The adjustment is based on: locking the LLC with a smaller output voltage as the minimum dead zone, and gradually adjusting the dead zone of the LLC with a larger output voltage;

[0086] When the output side of the LLC running in parallel enters the parallel mode, the output currents of the two LLCs are detected in real time, and the dead zone values ​​of the upper and lower LLCs are adjusted according to the deviation of the output currents. The adjustment is based on: locking the LLC with the smaller output current as the minimum dead zone, and gradually adjusting the dead zone of the LLC with the larger output current.

[0087] When the above two dead zone adjustments are adjusted to the maximum value, if the power balance is still not achieved, an alarm signal is reported and the output power of the whole machine is reduced to ensure that the current and voltage stress of the whole machine will not exceed the limit.

[0088] It can be understood that the power regulation method provided by the present application is applied between multiple gain regulation circuits. The power regulation method provided by the present application first determines the connection mode of the output terminals between the multiple gain regulation circuits, then determines the calculation parameters according to the connection mode of the output terminals, and determines the difference of the calculation parameters of the output terminals between the multiple gain regulation circuits, and then determines the dead zone adjustment value based on the difference, and finally adjusts the power between the gain regulation circuits according to the dead zone adjustment value. The present application adjusts the power of the gain regulation circuit by changing the dead zone value of the gain regulation circuit to solve the problem of unbalanced power distribution when multiple circuits run in parallel.

[0089] Specifically, see Fig. 9 , Fig. 9 These are two complementary PWM drive signals. In order to prevent the MOSFETs on the same bridge arm from being turned on at the same time, a dead zone value is set between PWM1 and PWM2.

[0090] See also Fig.10 and Fig.11 , Fig.10 and Fig.11 The two circuit diagrams of the embodiments of the present application include two groups of LLC modules, an output voltage sampling module, an output current sampling module and a controller. The two groups of LLC modules include LLC1 and LLC2, the input ends of LLC1 and LLC2 are connected in series, and the output ends are set according to the working requirements. When a larger output voltage is required, the output ends of LLC1 and LLC2 are connected in series, such as Fig.10 As shown; when a larger output current is required, the output terminals of LLC1 and LLC2 are connected in parallel, as shown Fig.11 As shown. Fig.10 As shown, the output voltage sampling module includes voltage sampling 1 and voltage sampling 2. Voltage sampling 1 samples the output voltage of LLC1, and voltage sampling 2 samples the output voltage of LLC2. Fig.11 As shown, the current sampling module includes current sampling 1 and current sampling 2. Current sampling 1 samples the output current of LLC1, and current sampling 2 samples the output current of LLC2. Fig.10 and Fig.11As shown, the controller receives the voltage sampling signal from the output voltage sampling module and the current sampling signal from the output current sampling module, and adjusts the dead-time values of the PWM drives of LLC1 and LLC2 after feedback control.

[0091] Specifically, please refer to Fig.12 , Fig.12 which is a flowchart of the operation of an embodiment of this application:

[0092] S1. After the circuit operates, the controller determines whether the output terminals of LLC1 and LLC2 are in parallel mode or series mode. When the output terminals of LLC1 and LLC2 are in series mode, step S2 is executed; when the output terminals of LLC1 and LLC2 are in parallel mode, step S4 is executed.

[0093] S2. The controller then detects the output voltages Vout1 and Vout2 of LLC1 and LLC2 in real time.

[0094] S3. Calculate the voltage difference Vout_err = Vout1 - Vout2, and then execute step S6.

[0095] S4. The controller detects the output currents Iout1 and Iout2 of LLC1 and LLC2 in real time.

[0096] S5. Calculate the current difference Iout_err = Iout1 - Iout2.

[0097] S6. According to the voltage difference Vout_err or the current difference Iout_err, calculate the dead-time adjustment amount ΔTdead through negative feedback control.

[0098] S7. Obtain the historical dead-time setting value Tdead1 of LLC1 and the historical dead-time setting value Tdead2 of LLC2.

[0099] S8. Compare the magnitudes of Tdead1 and Tdead2. When Tdead1 > Tdead2, execute step S11; otherwise, execute step S9.

[0100] S9. When Tdead1 < Tdead2, execute step S12; when Tdead1 = Tdead2, execute step S10.

[0101] S10. Judge the magnitude of ΔTdead. When ΔTdead > 0, execute step S11; otherwise, execute step S12.

[0102] S11. Adjust the dead-time setting of LLC1, increase the value of the adjustment amount ΔTdead based on the historical dead-time setting value of LLC1, and then execute step S13.

[0103] S12, adjusting the dead zone setting of LLC2, subtracting the value of the adjustment amount ΔTdead from the historical setting value of LLC2, and then executing step S13.

[0104] S13, limiting the new dead zone setting values ​​of LLC1 and LLC2, limiting the minimum setting value and the maximum setting value of Tdead1 and Tdead2, the minimum setting value is to prevent the dead zone value from being insufficient, resulting in a short circuit of the LLC bridge arm, and the maximum setting value is to prevent abnormal circuit operation.

[0105] Accordingly, the present application also provides a power regulation system, see Figure 7 , Figure 7 A module connection diagram of a power regulation system provided in an embodiment of the present application, which is used to regulate power between multiple gain regulation circuits, and the power regulation system includes:

[0106] A connection mode confirmation module, the connection mode confirmation module is used to determine the connection mode of the output terminals between the multiple gain adjustment circuits;

[0107] A calculation parameter confirmation module, the calculation parameter confirmation module is used to determine the calculation parameters based on the connection mode;

[0108] An adjustment value acquisition module, the adjustment value acquisition module is used to obtain the difference between the output end calculation parameters of multiple gain adjustment circuits, and obtain the dead zone adjustment value based on the difference;

[0109] The dead zone value adjustment module is used to adjust the dead zone value of the gain adjustment circuit based on the dead zone adjustment value to adjust the power between multiple gain adjustment circuits.

[0110] In some embodiments, the calculation parameter confirmation module is specifically used to:

[0111] In response to the output terminals of the plurality of gain adjustment circuits being connected in series, the calculation parameter is determined to include voltage; in response to the output terminals of the plurality of gain adjustment circuits being connected in parallel, the calculation parameter is determined to include current.

[0112] In some embodiments, the adjustment value acquisition module is specifically used to:

[0113] Determine the minimum difference;

[0114] In response to the absolute value of the difference being less than or equal to the minimum difference, determining that the dead zone adjustment value is zero;

[0115] In response to the absolute value of the difference being greater than the minimum difference, it is determined that the dead zone adjustment value is a rounded value of the difference.

[0116] In some embodiments, the dead zone value adjustment module is specifically used to:

[0117] Determine a dead zone value of a gain adjustment circuit; in response to differences in the dead zone values ​​of a plurality of gain adjustment circuits, adjust a larger dead zone value based on the dead zone adjustment value; in response to the dead zone values ​​of a plurality of gain adjustment circuits being the same, determine the size of the dead zone adjustment value, and adjust the dead zone values ​​of the gain adjustment circuits based on the dead zone adjustment value.

[0118] In some embodiments, the dead zone value adjustment module is specifically used to:

[0119] In response to the dead zone value of the first gain adjustment circuit being greater than the dead zone value of the second gain adjustment circuit, the result of summing the dead zone value of the first gain adjustment circuit and the dead zone adjustment value is updated as the dead zone value of the first gain adjustment circuit; in response to the dead zone value of the first gain adjustment circuit being less than the dead zone value of the second gain adjustment circuit, the result of subtracting the dead zone value of the second gain adjustment circuit from the dead zone adjustment value is updated as the dead zone value of the second gain adjustment circuit.

[0120] In some embodiments, the dead zone value adjustment module is specifically used to:

[0121] In response to the dead zone adjustment value being greater than zero, the result of summing the dead zone value of the first gain adjustment circuit and the dead zone adjustment value is updated as the dead zone value of the first gain adjustment circuit; in response to the dead zone adjustment value being less than zero, the result of subtracting the dead zone value of the second gain adjustment circuit from the dead zone adjustment value is updated as the dead zone value of the second gain adjustment circuit.

[0122] In some embodiments, the power regulation system is specifically configured to:

[0123] The adjusted dead zone value is limited, and the minimum dead zone time under the condition of ensuring the soft switching working of the LLC resonant circuit is determined to be the minimum setting value, and the maximum dead zone time under the condition of ensuring the soft switching working of the LLC resonant circuit is determined to be the maximum setting value.

[0124] Accordingly, see Figure 8 , Figure 8 This is a structural schematic diagram of a power regulation device provided in an embodiment of the present application. The power regulation device provided in an embodiment of the present application includes a processor and a memory. The memory stores a computer program executable by the processor. When the processor executes the computer program, the steps of the power regulation method provided in the embodiment of the present application are implemented.

[0125] Those of ordinary skill in the art will appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professional and technical personnel can use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of this application.

[0126] Those skilled in the art can clearly understand that, for the convenience and brevity of description, the specific working processes of the systems, devices and units described above can refer to the corresponding processes in the aforementioned method embodiments and will not be repeated here.

[0127] In the several embodiments provided in the present application, it should be understood that the disclosed systems, devices and methods can be implemented in other ways. For example, the device embodiments described above are only schematic. For example, the division of units is only a logical function division. There may be other division methods in actual implementation. For example, multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some interfaces, indirect coupling or communication connection of devices or units, which can be electrical, mechanical or other forms.

[0128] The units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed on multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0129] In addition, each functional unit in each embodiment of the present application may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit.

[0130] If the function is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present application, or the part that contributes to the prior art, or the part of the technical solution, can be embodied in the form of a software product, which is stored in a storage medium and includes several instructions for a computer device (which can be a personal computer, a server, or a network device, etc.) to execute all or part of the steps of the methods of each embodiment of the present application.

[0131] The aforementioned storage media include: U disk, mobile hard disk, read-only memory (ROM), random access memory (RAM), disk or CD and other media that can store program code.

[0132] The above are only specific implementations of the present application, but the protection scope of the present application is not limited thereto. Any technician familiar with the technical field can easily think of changes or substitutions within the technical scope disclosed in the present application, which should be included in the protection scope of the present application. Therefore, the protection scope of the present application should be based on the protection scope of the claims.

Claims

1. A power regulation method, characterized in that: For adjusting power between multiple gain adjustment circuits, the power adjustment method comprises: Determining a connection mode of output terminals among a plurality of the gain adjustment circuits; Determining a calculation parameter based on the connection mode; Obtaining a difference in the output terminal calculation parameters between the plurality of gain adjustment circuits, and obtaining a dead zone adjustment value based on the difference; adjusting the dead zone value of the gain adjustment circuit based on the dead zone adjustment value to adjust the power between the plurality of gain adjustment circuits; The step of adjusting the dead zone value of the gain adjustment circuit based on the dead zone adjustment value comprises: determining a dead zone value of the gain adjustment circuit; In response to a difference in the dead zone values ​​of the plurality of gain adjustment circuits, adjusting a larger dead zone value based on the dead zone adjustment value; In response to the dead zone values ​​of the plurality of gain adjustment circuits being the same, the size of the dead zone adjustment value is determined, and the dead zone values ​​of the gain adjustment circuits are adjusted based on the dead zone adjustment value.

2. The power regulation method according to claim 1, characterized in that: The calculated variable includes voltage or current.

3. The power regulation method according to claim 2, characterized in that: The step of determining the calculation parameter based on the connection mode comprises: In response to the output terminals of the plurality of gain adjustment circuits being connected in series, determining that the calculated parameter includes a voltage; In response to the output terminals of the plurality of gain adjustment circuits being connected in parallel, the calculation parameter is determined to include current.

4. The power regulation method according to claim 1, characterized in that: The step of obtaining the dead zone adjustment value based on the difference comprises: Determine the minimum difference; In response to the absolute value of the difference being less than or equal to the minimum difference, determining that the dead zone adjustment value is zero; In response to the absolute value of the difference being greater than the minimum difference, it is determined that the dead zone adjustment value is a rounded value of the difference.

5. The power regulation method according to claim 1, characterized in that: The plurality of gain adjustment circuits include a first gain adjustment circuit and a second gain adjustment circuit, and the characterization formula of the difference includes: d=a1-a2; Wherein, d is the difference; a1 is the value of the calculated parameter at the output end of the first gain adjustment circuit; a2 is the value of the calculated parameter at the output end of the second gain adjustment circuit; The step of adjusting a larger dead zone value based on the dead zone adjustment value comprises: In response to the dead zone value of the first gain adjustment circuit being greater than the dead zone value of the second gain adjustment circuit, updating the result of summing the dead zone value of the first gain adjustment circuit and the dead zone adjustment value as the dead zone value of the first gain adjustment circuit; In response to the dead zone value of the first gain adjustment circuit being smaller than the dead zone value of the second gain adjustment circuit, a result obtained by subtracting the dead zone value of the second gain adjustment circuit from the dead zone adjustment value is updated as the dead zone value of the second gain adjustment circuit.

6. The power regulation method according to claim 5, characterized in that: The step of adjusting the dead zone value of the gain adjustment circuit based on the dead zone adjustment value comprises: In response to the dead zone adjustment value being greater than zero, updating a sum of the dead zone value of the first gain adjustment circuit and the dead zone adjustment value as the dead zone value of the first gain adjustment circuit; In response to the dead zone adjustment value being less than zero, a result obtained by subtracting the dead zone value of the second gain adjustment circuit from the dead zone adjustment value is updated as the dead zone value of the second gain adjustment circuit.

7. The power regulation method according to claim 1, characterized in that: The gain adjustment circuit includes an LLC resonant circuit. After the dead zone value of the gain adjustment circuit is adjusted based on the dead zone adjustment value, the power adjustment method further includes: The adjusted dead zone value is limited, and the minimum dead zone time under the condition of ensuring the soft switching operation of the LLC resonant circuit is determined as the minimum setting value, and the maximum dead zone time under the condition of ensuring the soft switching operation of the LLC resonant circuit is determined as the maximum setting value.

8. A power regulation system, characterized in that: Used to adjust the power between multiple gain adjustment circuits, the power adjustment system includes: A connection mode confirmation module, the connection mode confirmation module is used to determine the connection mode of the output terminals between the plurality of gain adjustment circuits; A calculation parameter confirmation module, the calculation parameter confirmation module is used to determine the calculation parameter based on the connection mode; An adjustment value acquisition module, the adjustment value acquisition module is used to obtain the difference of the output end calculation parameters between the plurality of gain adjustment circuits, and obtain the dead zone adjustment value based on the difference; A dead zone value adjustment module is used to adjust the dead zone value of the gain adjustment circuit based on the dead zone adjustment value to adjust the power between multiple gain adjustment circuits.

9. A power regulating device, characterized in that: The method comprises a processor and a memory, wherein the memory stores a computer program executable by the processor, and when the processor executes the computer program, the steps of the power regulation method according to any one of claims 1 to 7 are implemented.

Citation Information

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