Display device

Abstract

A display device is provided. The display device includes: a light emitting element; a color conversion layer that absorbs light emitted from the light emitting element and emits one of first color light, second color light, and third color light; a color filter layer that selectively passes light emitted from the color conversion layer through the color filter layer; and an intermediate layer disposed between the color conversion layer and the color filter layer, the intermediate layer reflecting a portion of the third color light to the color conversion layer and transmitting a portion of the first color light and a portion of the second color light to the color filter layer. The intermediate layer includes a first layer, a second layer, a third layer, a fourth layer, and a fifth layer. Each of the first layer, the third layer, and the fifth layer includes a conductive material. Each of the second layer and the fourth layer includes a material different from the conductive material of the first layer, the third layer, and the fifth layer.

Description

[0001] This application claims priority to and the benefit of Korean Patent Application No. 10-2023-0089967 filed in the Korean Intellectual Property Office on July 11, 2023, the entire contents of which are incorporated herein by reference. Technical Field

[0002] Various disclosed embodiments relate to a display device. Background Art

[0003] Recently, as interest in information display increases, research and development of display devices have been ongoing.

[0004] It will be understood that this background section is intended, in part, to provide a useful background for understanding the technology. However, this background section may also include ideas, concepts or realizations that were not known or understood by a person skilled in the relevant art before the corresponding effective filing date of the subject matter disclosed herein. Summary of the invention

[0005] Various embodiments may provide a display device having improved reliability.

[0006] The embodiment provides a display device, which may include: a light emitting element; a color conversion layer disposed on the light emitting element, the color conversion layer absorbing light emitted from the light emitting element and emitting one of a first color light, a second color light, and a third color light; a color filter layer disposed on the color conversion layer, the color filter layer selectively allowing light emitted from the color conversion layer to pass through the color filter layer; and an intermediate layer disposed between the color conversion layer and the color filter layer, the intermediate layer reflecting a portion of the third color light to the color conversion layer, and transmitting a portion of the first color light and a portion of the second color light to the color filter layer. The intermediate layer may include a first layer, a second layer, a third layer, a fourth layer, and a fifth layer sequentially stacked on each other. Each of the first layer, the third layer, and the fifth layer may include a conductive material. Each of the second layer and the fourth layer may include a material different from the conductive material of each of the first layer, the third layer, and the fifth layer.

[0007] In an embodiment, each of the first layer, the third layer, and the fifth layer may include a metal thin film having a thickness of about 30 nm or less. Each of the second layer and the fourth layer may include one of an organic insulating layer and an inorganic insulating layer.

[0008] In an embodiment, each of the second layer and the fourth layer may have a refractive index in a range of about 1.3 to about 2.5, and have a thickness of about 1 μm.

[0009] In an embodiment, the first layer, the second layer, the third layer, the fourth layer, and the fifth layer may have different thicknesses.

[0010] In an embodiment, the second layer and the fourth layer may have the same thickness.

[0011] In an embodiment, the second layer and the fourth layer may have different thicknesses.

[0012] In an embodiment, a thickness of one of the second layer and the fourth layer may be less than twice a thickness of the other of the second layer and the fourth layer.

[0013] In an embodiment, the first color light may include red light having a wavelength in the range of about 620nm to about 680nm. The second color light may include green light having a wavelength in the range of about 520nm to about 580nm. The third color light may include blue light having a wavelength in the range of about 420nm to about 480nm.

[0014] In an embodiment, the intermediate layer may reflect about 60% or more of the third color light to the color conversion layer, and transmit about 20% or less of the third color light to the color filter layer. The intermediate layer may transmit about 50% or more of the first color light to the color filter layer, absorb less than about 5% of the first color light, and reflect the remaining portion of the first color light to the color conversion layer. The intermediate layer may transmit about 60% or more of the second color light to the color filter layer, absorb less than about 5% of the second color light, and reflect the remaining portion of the second color light to the color conversion layer.

[0015] In an embodiment, the color conversion layer may include: a first color conversion pattern including first color conversion particles that absorb light emitted from the light emitting element and emit red light; a second color conversion pattern including second color conversion particles that absorb light emitted from the light emitting element and emit green light; and a light scattering pattern including light scattering particles that scatter blue light.

[0016] In an embodiment, the color filter layer may include: a first color filter disposed on the first color conversion pattern; a second color filter disposed on the second color conversion pattern; and a third color filter disposed on the light scattering pattern. The first color filter may include a red color filter, the second color filter may include a green color filter, and the third color filter may include a blue color filter.

[0017] In an embodiment, the light emitting element may include an organic light emitting diode. The organic light emitting diode may include: a pixel electrode disposed on a substrate; an emission layer disposed on the pixel electrode; and a common electrode disposed on the emission layer. One of the pixel electrode and the common electrode may include a transparent conductive material, and the other of the pixel electrode and the common electrode may include an opaque conductive material.

[0018] In an embodiment, the light emitting element may include a plurality of inorganic light emitting diodes, each of which includes a first end and a second end facing each other. The plurality of inorganic light emitting diodes may include: a first semiconductor layer disposed at the second end and including an n-type semiconductor layer; a second semiconductor layer disposed at the first end and including a p-type semiconductor layer; and an active layer disposed between the first semiconductor layer and the second semiconductor layer.

[0019] In an embodiment, the display device may further include: a first electrode electrically connected to a first end of each of the light emitting diodes; and a second electrode electrically connected to a second end of each of the light emitting diodes. Each of the first electrode and the second electrode may include a transparent conductive material.

[0020] In an embodiment, the display device may further include: a low reflection layer disposed on the color filter layer.

[0021] The embodiment provides a display device, which may include: a light emitting element; a color conversion layer disposed on the light emitting element, the color conversion layer absorbing light emitted from the light emitting element and emitting one of a first color light, a second color light, and a third color light; a color filter layer disposed on the color conversion layer, the color filter layer allowing light emitted from the color conversion layer to selectively pass through the color filter layer; and a cover layer disposed between the color conversion layer and the color filter layer. The cover layer may include a plurality of sub-insulating layers, each of which includes a first sub-layer and a second sub-layer. The first sub-layer and the second sub-layer may have different refractive indices.

[0022] In an embodiment, the second sublayer may be disposed on the first sublayer. The first sublayer may include a first inorganic layer having a first refractive index, and the second sublayer may include a second inorganic layer having a second refractive index. The first refractive index may be greater than the second refractive index.

[0023] In an embodiment, the first sublayer may be disposed on the second sublayer. The first sublayer may include a first inorganic layer having a first refractive index, and the second sublayer may include a second inorganic layer having a second refractive index. The second refractive index may be less than the first refractive index.

[0024] An embodiment provides a display device, which may include: a light emitting element; a color conversion layer disposed on the light emitting element, the color conversion layer absorbing light emitted from the light emitting element and emitting one of a first color light, a second color light, and a third color light; an intermediate layer disposed on the color conversion layer, the intermediate layer reflecting a portion of the third color light to the color conversion layer and allowing a portion of the first color light and a portion of the second color light to pass through the color conversion layer; an anti-reflection film disposed on the intermediate layer. The intermediate layer may include a first layer, a second layer, a third layer, a fourth layer, and a fifth layer sequentially stacked on each other. Each of the first layer, the third layer, and the fifth layer may include a conductive material. Each of the second layer and the fourth layer may include a material different from the conductive material of each of the first layer, the third layer, and the fifth layer.

[0025] In an embodiment, each of the first layer, the third layer, and the fifth layer may include a metal thin film having a thickness of about 30 nm or less. Each of the second layer and the fourth layer may include one of an organic insulating layer and an inorganic insulating layer. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] The above and other aspects and features of the disclosure will become more apparent by describing the disclosed embodiments in detail with reference to the attached drawings.

[0027] Figure 1 is a schematic plan view showing a display device according to an embodiment.

[0028] Figure 2 It is shown Figure 1 Schematic cross-sectional view of a display panel.

[0029] Figure 3 It is shown Figure 1 Schematic circuit diagram of the electrical connection relationship of components included in each of the pixels shown in FIG.

[0030] Figure 4 It is along Figure 1 A schematic cross-sectional view taken along line II'.

[0031] Figure 5 yes Figure 4 Schematic enlarged view of portion EA1.

[0032] Fig. 6A is depicted from the setting Figure 4 FIG. 5 is a graph of simulation results of light emitted from an intermediate layer on a first color conversion pattern.

[0033] Figure 6B is depicted from the setting Figure 4 FIG. 5 is a graph of simulation results of light emitted from the intermediate layer on the second color conversion pattern.

[0034] Figure 7 shows a pixel according to an embodiment and is Figure 1 A schematic cross-sectional view corresponding to line II'.

[0035] Figure 8 shows a pixel according to an embodiment and is Figure 1 A schematic cross-sectional view corresponding to line II'.

[0036] Fig. 9 shows a pixel according to an embodiment and is Figure 1 A schematic cross-sectional view corresponding to line II'.

[0037] Fig.10 and Fig.11 It is shown Fig. 9 Schematic enlarged view of portion EA2.

[0038] Fig.12 It is shown that the Fig.10 A graph of the light reflectivity of the covering layer.

[0039] Fig.13 It is shown Figure 1 Schematic circuit diagram of the electrical connection relationship of components included in each of the pixels shown in FIG.

[0040] Fig.14 It is shown Fig.13 Schematic perspective view of a light emitting element.

[0041] Fig.15 It is shown Fig.14 Schematic cross-sectional view of a light-emitting element.

[0042] Fig.16 It is along Figure 1 A schematic cross-sectional view taken along line II'. DETAILED DESCRIPTION

[0043] Since the disclosure allows various changes and many embodiments, the embodiments will be shown in the drawings and described in detail in the written description. However, this is not intended to limit the disclosure to a given mode of practice, and it will be understood that all changes, equivalents and substitutes that do not depart from the technical scope of the disclosure are included in the disclosure.

[0044] Throughout the disclosure, like reference numerals refer to like components throughout the various figures and embodiments disclosed. For clarity of illustration, the size of the elements in the drawings may be exaggerated.

[0045] In the specification and claims, the term "and / or" is intended to include any combination of the terms "and" and "or" for the purpose of its meaning and interpretation. For example, "A and / or B" may be understood to mean "A, B, or A and B". The terms "and" and "or" may be used in a conjunction or disjunction sense and may be understood to be equivalent to "and / or".

[0046] In the specification and claims, the phrase "at least one of..." is intended to include the meaning of "at least one selected from the group of..." for the purpose of its meaning and interpretation. For example, "at least one of A and B" may be understood to mean "A, B, or A and B".

[0047] It will be understood that although the terms "first", "second", etc. may be used herein to describe various elements, these elements should not be limited by these terms. These terms are only used to distinguish one element from another element. For example, without departing from the disclosed teachings, the first element discussed below may be referred to as the second element. Similarly, the second element may also be referred to as the first element.

[0048] It will also be understood that when the terms “comprises,” “including,” “having,” etc. are used in this specification, it indicates the presence of the stated features, integers, steps, operations, elements, components and / or combinations thereof, but does not exclude the presence or addition of one or more other features, integers, steps, operations, elements, components and / or combinations thereof.

[0049] In addition, in the case where a first part (component) such as a layer, a film, a region or a plate is disposed on a second part (component), the first part may not only be directly on the second part (component), but a third part (component) may also be placed between the first part (component) and the second part (component). For example, in the case where a first part (component) such as a layer, a film, a region or a plate is formed on a second part (component), the surface of the second part (component) on which the first part (component) is formed is not limited to the upper surface of the second part (component), but may include other surfaces (such as the side surface or the lower surface of the second part). On the contrary, in the case where a first part (component) such as a layer, a film, a region or a plate is under a second part (component), the first part (component) may not only be directly under the second part (component), but a third part (component) may also be placed between the first part (component) and the second part (component).

[0050] The term "superimposed" or "overlapping" means that a first object can be above or below or to the side of a second object, and vice versa. In addition, the term "superimposed" may include stacked, stacked, facing or facing, extending over, covering or, partially covering, or any other suitable term as will be understood and appreciated by those of ordinary skill in the art.

[0051] When an element is described as “not “overlying” or “overlapping” another element, this may include the elements being spaced apart, offset or biased from each other, or any other suitable terminology as would be understood and appreciated by one of ordinary skill in the art.

[0052] The terms "facing" and "facing" mean that the first element can be directly or indirectly opposite to the second element. In the case where a third element is placed between the first element and the second element, the first element and the second element can be understood as being indirectly opposite to each other, although still facing each other.

[0053] It will be understood that when an element (e.g., a first element) is referred to as being "coupled to" or "coupled to" another element (e.g., the second element) or "connected to" or "connected to" another element (e.g., the second element) (operably or communicatively), the first element may be directly coupled to or connected to the second element or directly coupled to or connected to the second element, or may be coupled to or connected to the second element via another element (e.g., the third element) or coupled to or connected to the second element via another element (e.g., the third element). Conversely, it will be understood that when an element (e.g., a first element) is referred to as being "directly coupled to" or "directly coupled to" another element (e.g., the second element) or "directly connected to" or "directly connected to" another element (e.g., the second element), no other element (e.g., the third element) is interposed between the element and the other element.

[0054] As used herein, "about" or "approximately" is inclusive of the stated value and means within an acceptable range of deviation for the particular value as determined by one of ordinary skill in the art, taking into account the measurement in question and the errors associated with the measurement of the particular quantity (i.e., the limitations of the measurement system). For example, "about" can mean within one or more standard deviations, or within ±30%, ±20%, ±10%, ±5% of the stated value.

[0055] Unless otherwise defined or implied herein, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which the disclosure belongs. It will also be understood that terms (such as those defined in common dictionaries) should be interpreted as having a meaning consistent with their meaning in the context of the relevant art and will not be interpreted in an idealized or overly formal sense unless expressly so defined herein.

[0056] The embodiments and details are described with reference to the accompanying drawings to describe the disclosure in detail so that those having ordinary skill in the art to which the disclosure pertains can practice the disclosure.

[0057] As used herein, the singular forms “a”, “an” and “the” are intended to include the plural forms as well, unless the context clearly indicates otherwise.

[0058] Figure 1 is a schematic plan view showing a display device DD according to the embodiment. Figure 2 It is shown Figure 1 Schematic cross-sectional view of a display panel DP.

[0059] exist Figure 1 and Figure 2 , for convenience, the display device DD (eg, a structure of a display panel DP provided in the display device DD centered on a display area DA in which an image is displayed) is schematically illustrated.

[0060] Reference Figure 1 and Figure 2 The display panel DP (or display device DD) according to the embodiment may be provided in various shapes. For example, the display panel DP may be provided in the form of a rectangle including two pairs of sides parallel to each other. However, the disclosure is not limited to the foregoing embodiment. In the case where the display panel DP is provided in the form of a rectangular plate, one of the two pairs of sides may be longer than the other pair of sides.

[0061] At least a portion of the display panel DP may have flexibility, and the display panel DP may be folded about the portion having the flexibility, but the disclosure is not limited thereto.

[0062] The display panel DP can display an image. A self-emissive display panel, such as an organic light-emitting display panel (OLED panel) using an organic light-emitting diode as a light-emitting element, an ultra-small light-emitting diode (microLED or nanoLED) display panel using an ultra-small LED as a light-emitting element, and a quantum dot organic light-emitting display panel (QDOLED panel) using quantum dots and organic light-emitting diodes, can be used as the display panel DP. For example, a non-emissive display panel, such as a liquid crystal display (LCD) panel, an electrophoretic display (EPD) panel, or an electrowetting display (EWD) panel, can be used as the display panel DP. In the case where the non-emissive display panel is used as the display panel DP, the display device DD may include a backlight unit configured to supply light to the display panel DP.

[0063] The display panel DP may include a substrate SUB and pixels PXL disposed on the substrate SUB.

[0064] The substrate SUB may include a transparent insulating material to transmit light, but is not limited thereto. The substrate SUB may be a rigid substrate or a flexible substrate.

[0065] For example, the rigid substrate may be one of a glass substrate, a quartz substrate, a glass ceramic substrate, and a crystallized glass substrate, but is not limited thereto.

[0066] The flexible substrate may be a film substrate or a plastic substrate including a polymer organic material. For example, the flexible substrate may include at least one of the following materials: polystyrene, polyvinyl alcohol, polymethyl methacrylate, polyether sulfone, polyacrylate, polyetherimide, polyethylene naphthalate, polyethylene terephthalate, polyphenylene sulfide, polyarylate, polyimide, polycarbonate, cellulose triacetate, and cellulose acetate propionate.

[0067] One area or region of the substrate SUB may be set as a display area DA in which the pixels PXL are disposed, and another area of ​​the substrate SUB may be set as a non-display area NDA. For example, the substrate SUB may include a display area DA including a pixel area PXA on which corresponding pixels PXL are disposed, and a non-display area NDA disposed around the periphery of the display area DA (or adjacent to the display area DA).

[0068] The non-display area NDA may be disposed adjacent to the display area DA. The non-display area NDA may be disposed on at least one side or one side of the display area DA. For example, the non-display area NDA may surround the periphery (or edge) of the display area DA. A line assembly connected to each of the pixels PXL and a driver connected to the line assembly and configured to drive the pixels PXL may be disposed in the non-display area NDA.

[0069] Each of the pixels PXL may be disposed in a display area DA of a substrate SUB. Each of the pixels PXL may include a light emitting element emitting white light and / or color light and a pixel circuit configured to drive the light emitting element. The pixel circuit may include at least one transistor electrically connected to the light emitting element. Each pixel PXL may emit light of any one color of red, green, and blue, and is not limited thereto. Each pixel PXL may emit light of any one color of cyan, magenta, yellow, and white.

[0070] The pixels PXL may be arranged or provided in a matrix form along pixel rows extending in a first direction DR1 and pixel columns extending in a second direction DR2 intersecting the first direction DR1. However, the arrangement of the pixels PXL is not limited to the optional arrangement. In other words, the pixels PXL may be arranged or provided in various forms. In addition, in the case where the pixels PXL are provided, the pixels PXL may have different surface areas (or different sizes). For example, in the case where the pixels PXL emit light of different colors, the pixels PXL may have different surface areas (or different sizes) or different shapes according to the colors.

[0071] The driver may provide a given signal and a given voltage to each pixel PXL through the line assembly to control the operation of the pixel PXL.

[0072] The display panel DP (or each of the pixels PXL) may include a pixel circuit layer PCL, a display element layer DPL, and an encapsulation layer TFE sequentially disposed on a substrate SUB.

[0073] The pixel circuit layer PCL may be disposed on the substrate SUB and include transistors and signal lines connected to the transistors. For example, the transistor may have a structure in which an active pattern (or semiconductor pattern), a gate electrode, a source electrode, and a drain electrode are stacked in sequence with an insulating layer interposed therebetween. The semiconductor pattern may include amorphous silicon, polycrystalline silicon, low-temperature polycrystalline silicon, and an organic semiconductor and / or an oxide semiconductor. Although the gate electrode, the source electrode, and the drain electrode may each include one of aluminum (Al), copper (Cu), titanium (Ti), and molybdenum (Mo), the embodiment is not limited thereto. For example, the pixel circuit layer PCL may include at least one or more insulating layers.

[0074] The display element layer DPL may be disposed on the pixel circuit layer PCL. The display element layer DPL may include a light emitting element configured to emit light. Although the light emitting element may be, for example, an organic light emitting diode, the embodiment is not limited thereto. In an embodiment, the light emitting element may be an inorganic light emitting element including an inorganic light emitting material or a light emitting element that emits light after changing the wavelength of the light to be emitted using quantum dots.

[0075] The encapsulation layer TFE may be disposed on the display element layer DPL. The encapsulation layer TFE may be an encapsulation substrate or in the form of an encapsulation film having a multilayer structure. In the case where the encapsulation layer TFE has the form of an encapsulation film, the encapsulation layer TFE may include an inorganic layer and / or an organic layer. For example, the encapsulation layer TFE may have a structure formed by sequentially stacking an inorganic layer, an organic layer, and an inorganic layer. The encapsulation layer TFE may prevent external air or water from penetrating the display element layer DPL or the pixel circuit layer PCL.

[0076] Figure 3 It is shown Figure 1 Schematic circuit diagram of the electrical connection relationship of the components included in each of the pixels PXL shown in FIG. For ease of explanation, Figure 3 A pixel PXL (or a sub-pixel SPX) positioned at an i-th horizontal line (or an i-th pixel row) and connected to a j-th data line Dj is shown.

[0077] Reference Figures 1 to 3 The pixel PXL (or sub-pixel SPX) may include a pixel circuit PXC and a light emitting element LD. The pixel circuit PXC may include a first transistor T1, a second transistor T2, a third transistor T3, a fourth transistor T4, a fifth transistor T5, a sixth transistor T6, a seventh transistor T7, and a storage capacitor Cst.

[0078] A first electrode (or pixel electrode) of the light emitting element LD may be connected to a fourth node N4, and a second electrode (or common electrode) of the light emitting element LD may be connected to a fourth power line PL4. The light emitting element LD may emit light of a given brightness corresponding to the amount of current (or driving current) supplied from the first transistor T1. In an embodiment, the light emitting element LD may be an organic light emitting diode including an organic light emitting layer. However, the embodiment is not limited to the foregoing embodiment. In an embodiment, the light emitting element LD may be an inorganic light emitting diode formed of an inorganic material or a light emitting diode formed of a combination of an inorganic material and an organic material.

[0079] The first transistor T1 (or driving transistor) may be electrically connected between the first power line PL1 and the first electrode of the light emitting element LD. The first transistor T1 may include a gate electrode electrically connected to the first node N1. The first transistor T1 may control the amount of current (or driving current) flowing from the first power line PL1 to the fourth power line PL4 via the light emitting element LD in response to the voltage of the first node N1. The first power voltage VDD may be provided to the first power line PL1. The second power voltage VSS may be provided to the fourth power line PL4. The first power voltage VDD may be set to a voltage higher than the second power voltage VSS.

[0080] The second transistor T2 may be electrically connected between the j-th data line Dj and the second node N2. A gate electrode of the second transistor T2 may be connected to the 1i-th scan line S1i (or the first scan line). In the case where the first scan signal GW[i] (e.g., the first scan signal having a low level) is supplied to the 1i-th scan line S1i, the second transistor T2 may be turned on to electrically connect the j-th data line Dj to the second node N2. In the case where each of the first transistor T1 and the third transistor T3 is turned on, the second transistor T2 may transmit the data signal of the j-th data line Dj to the first node N1 in response to the first scan signal GW[i].

[0081] The third transistor T3 may be electrically connected between the first node N1 and the third node N3. A gate electrode of the third transistor T3 may be electrically connected to the 1i-th scan line S1i. When the first scan signal GW[i] is supplied to the 1i-th scan line S1i, the third transistor T3 may be turned on. If the third transistor T3 is turned on, the first transistor T1 may have a diode connection form.

[0082] The fourth transistor T4 may be electrically connected between the first node N1 and the second power line PL2. The gate electrode of the fourth transistor T4 may be electrically connected to the 2i-th scan line S2i (or the second scan line). The first initialization power voltage Vint1 may be provided to the second power line PL2. The fourth transistor T4 may be turned on by the second scan signal GI[i] supplied to the 2i-th scan line S2i. If the fourth transistor T4 is turned on, the first initialization power voltage Vint1 may be supplied to the first node N1 (e.g., the gate electrode of the first transistor T1).

[0083] The fifth transistor T5 may be electrically connected between the first power line PL1 and the second node N2. The gate electrode of the fifth transistor T5 may be electrically connected to the i-th emission control line Ei (or the emission control line). The sixth transistor T6 may be electrically connected between the third node N3 and the light emitting element LD (or the fourth node N4). The gate electrode of the sixth transistor T6 may be electrically connected to the i-th emission control line Ei. The fifth transistor T5 and the sixth transistor T6 may be turned off when the emission control signal EM[i] (e.g., the emission control signal EM[i] having a high level) is supplied to the i-th emission control line Ei, and may be turned on in other cases.

[0084] The seventh transistor T7 may be electrically connected between the first electrode (e.g., the fourth node N4) of the light emitting element LD and the third power line PL3. The gate electrode of the seventh transistor T7 may be electrically connected to the 3i-th scan line S3i. The second initialization power voltage Vint2 may be provided to the third power line PL3. In an embodiment, the second initialization power voltage Vint2 may be the same as or different from the first initialization power voltage Vint1. The seventh transistor T7 may be turned on by the third scan signal GB[i] supplied to the 3i-th scan line S3i to supply the second initialization power voltage Vint2 to the first electrode of the light emitting element LD.

[0085] The storage capacitor Cst may be connected or formed between the first power line PL1 and the first node N1.

[0086] Figure 4 It is along Figure 1 A schematic cross-sectional view taken along line II'. Figure 5 yes Figure 4 Schematic enlarged view of portion EA1.

[0087] exist Figure 4 In the present invention, the term “pixel PXL” includes not only components included in the pixel PXL but also a region in which the components are disposed (or located).

[0088] Reference Figures 1 to 5 , the pixel PXL may be disposed in a pixel area PXA in the display area DA. The pixel area PXA may include an emission area and a non-emission area NEA.

[0089] The pixel PXL may include a first subpixel SPX1, a second subpixel SPX2, and a third subpixel SPX3. The first subpixel SPX1 may emit red light (or light of a first color). The second subpixel SPX2 may emit green light (or light of a second color). The third subpixel SPX3 may emit blue light (or light of a third color). The embodiment is not limited to the foregoing example.

[0090] The first subpixel SPX1 may include a first emission area EMA1 and a non-emission area NEA adjacent to the first emission area EMA1 (or surrounding at least one side of the first emission area EMA1). The second subpixel SPX2 may include a second emission area EMA2 and a non-emission area NEA adjacent to the second emission area EMA2 (or surrounding at least one side of the second emission area EMA2). The third subpixel SPX3 may include a third emission area EMA3 and a non-emission area NEA adjacent to the third emission area EMA3 (or surrounding at least one side of the third emission area EMA3). The first emission area EMA1, the second emission area EMA2, and the third emission area EMA3 may form an emission area of ​​the pixel PXL.

[0091] Each of the first sub-pixel SPX1, the second sub-pixel SPX2, and the third sub-pixel SPX3 may include a light emitting element LD configured to emit light and a circuit element configured to drive the light emitting element LD. The first emission area EMA1 may be an area where light is emitted from the light emitting element LD driven by the circuit element of the first sub-pixel SPX1. The second emission area EMA2 may be an area where light is emitted from the light emitting element LD driven by the circuit element of the second sub-pixel SPX2. The third emission area EMA3 may be an area where light is emitted from the light emitting element LD driven by the circuit element of the third sub-pixel SPX3.

[0092] Each of the first to third sub-pixels SPX1 , SPX2 , and SPX3 may include a substrate SUB, a pixel circuit layer PCL, a display element layer DPL, an encapsulation layer TFE, a color conversion layer CCL, an intermediate layer CTL, and a color filter layer CFL.

[0093] The pixel circuit layer PCL and the display element layer DPL may be disposed on one surface or one surface of the substrate SUB and overlap each other. For example, the pixel area PXA of the substrate SUB may include a pixel circuit layer PCL disposed on one surface or one surface of the substrate SUB and a display element layer DPL disposed on the pixel circuit layer PCL. However, the relative positions of the pixel circuit layer PCL and the display element layer DPL on the substrate SUB may be changed according to the embodiment.

[0094] The substrate SUB may include a transparent insulating material to transmit light. The substrate SUB may be a rigid substrate or a flexible substrate.

[0095] In the pixel circuit layer PCL, a pixel circuit forming each of the first to third sub-pixels SPX1, SPX2, and SPX3 may be provided (refer to Figure 3 At least one insulating layer may be provided in the pixel circuit layer PCL. For example, a buffer layer BFL, a gate insulating layer GI, an interlayer insulating layer ILD, and a via layer VIA may be provided in the pixel circuit layer PCL.

[0096] The buffer layer BFL may be disposed on the entire surface of the substrate SUB. The buffer layer BFL may prevent impurities from diffusing into transistors (eg, first to seventh transistors (see FIG. 1 ) included in the pixel circuit PXC. Figure 3 The buffer layer BFL may be an inorganic insulating layer including an inorganic material (or substance). The buffer layer BFL may include silicon nitride (SiN x ), silicon oxide (SiO x ) and silicon oxynitride (SiOx N y ) or includes at least one of aluminum oxide (AlO x ) at least one of the metal oxides of the substrate SUB. Although the buffer layer BFL may be provided as a single-layer structure, the buffer layer BFL may be provided as a multi-layer structure having at least two layers. In the case where the buffer layer BFL has a multi-layer structure, the respective layers may be formed of the same material or different materials. Depending on the material or processing conditions of the substrate SUB, the buffer layer BFL may be omitted.

[0097] The gate insulating layer GI may be disposed on the entire surface of the buffer layer BFL. The gate insulating layer GI may include the same material as that of the buffer layer BFL, or include a suitable (or selected) material among the materials constituting the buffer layer BFL. For example, the gate insulating layer GI may include an inorganic insulating layer including an inorganic material. In an embodiment, the gate insulating layer GI may be partially disposed on the buffer layer BFL.

[0098] The interlayer insulating layer ILD may be disposed and / or formed on the entire surface of the gate insulating layer GI. The interlayer insulating layer ILD may include the same material as that of the buffer layer BFL, or include one or more suitable (or selected) materials among the materials constituting the buffer layer BFL.

[0099] The via layer VIA may be disposed and / or formed on the entire surface of the interlayer insulating layer ILD. The via layer VIA may be an inorganic insulating layer including an inorganic material or an organic insulating layer including an organic material. The inorganic insulating layer may include, for example, silicon oxide (SiO x )、Silicon Nitride(SiN x ), silicon oxynitride (SiO x N y ) and aluminum oxide (AlO x ). The organic insulating layer may include, for example, at least one of polyacrylic resin, epoxy resin, phenolic resin, polyamide resin, polyimide resin, unsaturated polyester resin, polyphenylene ether resin, polyphenylene sulfide resin, and benzocyclobutene resin. In an embodiment, the via layer VIA may be formed of an organic insulating layer including an organic material.

[0100] The display element layer DPL may be disposed on the pixel circuit layer PCL (or the via layer VIA).

[0101] The light emitting element LD and the pixel defining layer PDL may be disposed in the display element layer DPL.

[0102] The light emitting element LD may include a first light emitting element LD1, a second light emitting element LD2, and a third light emitting element LD3. The first light emitting element LD1 may be disposed in the display element layer DPL of the first sub-pixel SPX1. The second light emitting element LD2 may be disposed in the display element layer DPL of the second sub-pixel SPX2. The third light emitting element LD3 may be disposed in the display element layer DPL of the third sub-pixel SPX3.

[0103] The first light emitting element LD1 may include a first pixel electrode PE1 (anode electrode or first electrode), a first emission layer EML1, and a common electrode CE (cathode electrode or second electrode). The second light emitting element LD2 may include a second pixel electrode PE2 (anode electrode or first electrode), a second emission layer EML2, and a common electrode CE (cathode electrode or second electrode). The third light emitting element LD3 may include a third pixel electrode PE3 (anode electrode or first electrode), a third emission layer EML3, and a common electrode CE (cathode electrode or second electrode). Each of the first light emitting element LD1, the second light emitting element LD2, and the third light emitting element LD3 may be electrically connected to a corresponding sub-pixel (refer to Figure 3 The pixel circuit PXC of "SPX" in FIG.

[0104] The first pixel electrode PE1 may be disposed and / or formed on the via layer VIA of the first sub-pixel SPX1. The second pixel electrode PE2 may be disposed and / or formed on the via layer VIA of the second sub-pixel SPX2. The third pixel electrode PE3 may be disposed and / or formed on the via layer VIA of the third sub-pixel SPX3. The first pixel electrode PE1, the second pixel electrode PE2, and the third pixel electrode PE3 may form the pixel electrode PE of the pixel PXL. Each of the first pixel electrode PE1, the second pixel electrode PE2, and the third pixel electrode PE3 may be electrically connected to a transistor disposed in the pixel circuit layer PCL through a contact hole passing through an insulating layer disposed in the pixel circuit layer PCL.

[0105] Each of the first pixel electrode PE1, the second pixel electrode PE2, and the third pixel electrode PE3 may be formed of a conductive material (or substance). The conductive material may include an opaque metal. For example, the opaque metal may include metals such as silver (Ag), magnesium (Mg), aluminum (Al), platinum (Pt), palladium (Pd), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), titanium (Ti), and alloys thereof. The material of each of the first pixel electrode PE1, the second pixel electrode PE2, and the third pixel electrode PE3 is not limited to the materials of the aforementioned embodiments. In an embodiment, each of the first pixel electrode PE1, the second pixel electrode PE2, and the third pixel electrode PE3 may include a transparent conductive material (or substance). The transparent conductive material (or substance) may include a transparent conductive oxide (such as indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO x ), indium gallium zinc oxide (IGZO) and indium tin zinc oxide (ITZO) and conductive polymers such as PEDOT (poly (3,4-ethylenedioxythiophene)). In the case where each of the first pixel electrode PE1, the second pixel electrode PE2 and the third pixel electrode PE3 includes a transparent conductive material (or substance), a separate conductive layer made of an opaque metal may be provided for reflecting light emitted from the first emission layer EML1, the second emission layer EML2 and the third emission layer EML3 in an image display direction of the display device DD (or an upward direction of the encapsulation layer TFE).

[0106] The first pixel electrode PE1 may be positioned in at least the first emission area EMA1. The second pixel electrode PE2 may be positioned in at least the second emission area EMA2. The third pixel electrode PE3 may be positioned in at least the third emission area EMA3. The first pixel electrode PE1, the second pixel electrode PE2, and the third pixel electrode PE3 may be spaced apart from each other on the via layer VIA.

[0107] The pixel defining layer PDL may be disposed on the pixel circuit layer PCL (or the via layer VIA) in the non-emission area NEA, and may define (or separate) the first emission area EMA1, the second emission area EMA2, and the third emission area EMA3. The pixel defining layer PDL may include an organic insulating layer made of an organic material. Within the spirit and scope of the disclosure, the organic material may include an acryl resin, an epoxy resin, a phenolic resin, a polyamide resin, or a polyimide resin, etc. In an embodiment, the pixel defining layer PDL may include a light absorbing material or be coated with a light absorber, so that the pixel defining layer PDL may be used to absorb light introduced from the outside. For example, the pixel defining layer PDL may include a carbon-based black pigment, but is not limited thereto.

[0108] The pixel defining layer PDL may include openings exposing given corresponding regions of the first to third pixel electrodes PE1, PE2, and PE3, and may protrude from the via layer VIA in the third direction DR3 along the periphery of each of the first to third emission areas EMA1, EMA2, and EMA3.

[0109] The emission layer EML may be disposed on each of the first pixel electrode PE1, the second pixel electrode PE2, and the third pixel electrode PE3 exposed through the opening of the pixel defining layer PDL. For example, the first emission layer EML1 may be disposed on the first pixel electrode PE1 exposed through the corresponding opening of the pixel defining layer PDL. The second emission layer EML2 may be disposed on the second pixel electrode PE2 exposed through the corresponding opening of the pixel defining layer PDL. The third emission layer EML3 may be disposed on the third pixel electrode PE3 exposed through the corresponding opening of the pixel defining layer PDL.

[0110] The first emission layer EML1 may be positioned on the first pixel electrode PE1 in the corresponding opening of the pixel defining layer PDL. The second emission layer EML2 may be positioned on the second pixel electrode PE2 in the corresponding opening of the pixel defining layer PDL. The third emission layer EML3 may be positioned on the third pixel electrode PE3 in the corresponding opening of the pixel defining layer PDL. Each of the first emission layer EML1, the second emission layer EML2, and the third emission layer EML3 may be supplied to a target area of ​​the corresponding sub-pixel SPX (e.g., the pixel electrode PE exposed through the corresponding opening of the pixel defining layer PDL) by an inkjet printing method or the like, but the embodiment is not limited thereto.

[0111] Each of the first emission layer EML1, the second emission layer EML2, and the third emission layer EML3 may have a multilayer thin film structure including a light generation layer configured to generate light. For example, each of the first emission layer EML1, the second emission layer EML2, and the third emission layer EML3 may include a light generation layer configured to generate and emit blue light. Each of the first emission layer EML1, the second emission layer EML2, and the third emission layer EML3 may include at least one of a hole transport material, a hole injection material, an electron transport material, and an electron injection material.

[0112] The common electrode CE may be disposed on the first emission layer EML1, the second emission layer EML2, and the third emission layer EML3. The common electrode CE may be commonly disposed for the first to third sub-pixels SPX1, SPX2, and SPX3. The common electrode CE may be disposed throughout the display area (refer to Figure 1The entire area of ​​the common electrode CE is provided in the form of a plate, but is not limited thereto. The common electrode CE may be a thin film metal layer having a thickness sufficient to transmit the blue light emitted from each of the first emission layer to the third emission layer EML1, EML2, and EML3. The common electrode CE may be made of a transparent conductive material or a metal material having a relatively small thickness. For example, the common electrode CE may include at least one of various transparent conductive materials (including indium tin oxide, indium zinc oxide, indium tin zinc oxide, aluminum zinc oxide, gallium zinc oxide, zinc tin oxide, and gallium tin oxide), and may be substantially transparent or translucent to provide a satisfactory transmittance. Therefore, the blue light emitted from each of the first emission layer to the third emission layer EML1, EML2, and EML3 positioned below or under the common electrode CE may pass through the common electrode CE and be emitted in an upward direction of the encapsulation layer TFE.

[0113] The encapsulation layer TFE may include a first encapsulation layer ENC1, a second encapsulation layer ENC2, and a third encapsulation layer ENC3 sequentially positioned on the common electrode CE. The first encapsulation layer ENC1 may be disposed on the display element layer DPL (or the common electrode CE) and positioned over at least a portion of the non-display area NDA and the display area DA. The second encapsulation layer ENC2 may be formed on the first encapsulation layer ENC1 and positioned over at least a portion of the display area DA and the non-display area NDA. The third encapsulation layer ENC3 may be formed on the second encapsulation layer ENC2 and positioned over at least a portion of the non-display area NDA and the display area DA. In an embodiment, the third encapsulation layer ENC3 may be positioned over the display area DA and the entire non-display area NDA.

[0114] Each of the first encapsulation layer ENC1 and the third encapsulation layer ENC3 may be formed of an inorganic layer including an inorganic material. The second encapsulation layer ENC2 may be formed of an organic layer including an organic material. The inorganic layer may include, for example, silicon nitride (SiN x ), silicon oxide (SiO x ) or silicon oxynitride (SiO x N y ). The organic layer may include an organic insulating material such as a polyacrylate resin, an epoxy resin, a phenolic resin, a polyamide resin, a polyimide resin, an unsaturated polyester resin, a polyphenylene resin, a polyphenylene sulfide resin, or a benzocyclobutene (BCB) resin.

[0115] The color conversion layer CCL may be disposed on the encapsulation layer TFE. The color conversion layer CCL may include a bank BNK, first and second color conversion patterns CCP1 and CCP2, and a light scattering pattern LSP.

[0116] The bank BNK may be disposed on the encapsulation layer TFE to correspond to the pixel defining layer PDL in the non-emission area NEA. The bank BNK may define corresponding positions of the first color conversion pattern CCP1, the second color conversion pattern CCP2, and the light scattering pattern LSP, thereby defining the first emission area EMA1, the second emission area EMA2, and the third emission area EMA3. The bank BNK may surround each of the first color conversion pattern CCP1, the second color conversion pattern CCP2, and the light scattering pattern LSP.

[0117] The bank BNK may be constructed to include at least one light blocking material and / or reflective material and enable light emitted from each of the first color conversion pattern CCP1, the second conversion pattern CCP2, and the light scattering pattern LSP to more reliably travel in the image display direction of the display device DD, thereby enhancing the light output efficiency of each pixel PXL.

[0118] The first color conversion pattern CCP1 may be positioned on the encapsulation layer TFE to correspond to the first light emitting element LD1. The first color conversion pattern CCP1 may include first color conversion particles QD1 dispersed in a matrix material such as a matrix resin. For example, the first color conversion particles QD1 may be red quantum dots that absorb incident blue light, shift the wavelength of the blue light according to energy transition, and emit red light. The first sub-pixel SPX1 may be a red pixel. The first color conversion pattern CCP1 may be disposed in at least the first emission area EMA1.

[0119] The second color conversion pattern CCP2 may be positioned on the encapsulation layer TFE to correspond to the second light emitting element LD2. The second color conversion pattern CCP2 may include second color conversion particles QD2 dispersed in a matrix material such as a matrix resin. For example, the second color conversion particles QD2 may be green quantum dots that absorb incident blue light, shift the wavelength of the blue light according to energy transition, and emit green light. The second sub-pixel SPX2 may be a green pixel. The second color conversion pattern CCP2 may be disposed in at least the second emission area EMA2.

[0120] The light scattering pattern LSP may be positioned on the encapsulation layer TFE to correspond to the third light emitting element LD3. The light scattering pattern LSP may include light scattering particles SCT dispersed in a matrix material such as a base resin. The light scattering pattern LSP may include light scattering particles SCT formed of a material such as silicon dioxide, but the constituent material of the light scattering particles SCT is not limited thereto. In an embodiment, the light scattering particles SCT may be omitted, and a light scattering pattern LSP formed of a transparent polymer may be provided. The third sub-pixel SPX3 may be a blue pixel. The light scattering pattern LSP may be provided in at least the third emission area EMA3 to scatter the emitted blue light.

[0121] The first cover layer CPL1 may be disposed on the color conversion layer CCL, thereby protecting the color conversion layer CCL. The first cover layer CPL1 may be, for example, an inorganic insulating layer including an inorganic material.

[0122] The color filter layer CFL may be disposed on the color conversion layer CCL. The color filter layer CFL may include a color filter CF and a light blocking pattern BM. The color filter CF may include a first color filter CF1, a second color filter CF2, and a third color filter CF3.

[0123] The first color filter CF1 may be disposed on the color conversion layer CCL to correspond to the first color conversion pattern CCP1 (or the first emission layer EML1). The second color filter CF2 may be disposed on the color conversion layer CCL to correspond to the second color conversion pattern CCP2 (or the second emission layer EML2). The third color filter CF3 may be disposed on the color conversion layer CCL to correspond to the light scattering pattern LSP (or the third emission layer EML3).

[0124] The light blocking pattern BM may be disposed adjacent to the first to third color filters CF1, CF2, and CF3. In addition, the light blocking pattern BM may be disposed on the color conversion layer CCL to correspond to the dam BNK (or pixel defining layer PDL) in the non-emission area NEA. The light blocking pattern BM may include a light blocking material. For example, the light blocking pattern BM may include a black matrix, but is not limited thereto. In an embodiment, the light blocking pattern BM may include at least one light blocking material and / or a reflective material, and enable the light emitted from the color conversion layer CCL to more reliably travel in the image display direction of the display device DD, thereby improving the light output efficiency. The light blocking pattern BM may prevent the colors of the light emitted from the first to third color filters CF1, CF2, and CF3 from mixing with each other.

[0125] Each of the first color filter CF1, the second color filter CF2, and the third color filter CF3 may include a colorant such as a dye or a pigment, which may absorb light of a wavelength other than the corresponding color wavelength. The first color filter CF1 may be a red color filter. The second color filter CF2 may be a green color filter. The third color filter CF3 may be a blue color filter. Although the drawings show that the color filters CF adjacent to each other are spaced apart from each other and the light blocking pattern BM is placed therebetween, the adjacent color filters CF may at least partially overlap each other on the light blocking pattern BM. In an embodiment, the first to third color filters CF1, CF2, and CF3 may be disposed in the non-emission area NEA and overlap each other, thereby serving as a light blocking component for preventing optical interference between adjacent sub-pixels SPX. The light blocking pattern BM may be omitted.

[0126] The overcoat layer OC may be disposed on the color filter layer CFL. The overcoat layer OC may be disposed on the color filter layer CFL and cover the components including the color filter layer CFL below. The overcoat layer OC may prevent the color filter layer CFL from being damaged or contaminated due to penetration of external impurities such as water or air. In addition, the overcoat layer OC may prevent the colorant of the color filter layer CFL from diffusing into other components. The overcoat layer OC may include an inorganic insulating layer including an inorganic material, but is not limited thereto.

[0127] In embodiments, an intermediate layer CTL may be disposed between the color conversion layer CCL and the color filter layer CFL.

[0128] The intermediate layer CTL may be formed on the first cover layer CPL1 for protecting the color conversion layer CCL by a sequential process. In an embodiment, the intermediate layer CTL may be a filter layer that reflects (or blocks) light in some wavelength regions of the visible light region emitted from the color conversion layer CCL toward the color conversion layer CCL and transmits light in other wavelength regions to the color filter layer CFL. For example, the intermediate layer CTL may reflect blue light emitted from the color conversion layer CCL toward the color conversion layer CCL while transmitting red light and / or green light to the color filter layer CFL.

[0129] The intermediate layer CTL may include a first layer FL, a second layer SL, a third layer TL, a fourth layer FOL, and a fifth layer FIL sequentially stacked in the third direction DR3 on the first cover layer CPL1.

[0130] The first layer FL, the third layer TL, and the fifth layer FIL may include the same material. For example, the first layer FL, the third layer TL, and the fifth layer FIL may include a conductive material. In an embodiment, each of the first layer FL, the third layer TL, and the fifth layer FIL may be formed of a metal film. For example, each of the first layer FL, the third layer TL, and the fifth layer FIL may be formed as a single layer including at least one of aluminum, silver, molybdenum, chromium, iron, copper, platinum, and gold, or may be formed as a single layer made of an alloy thereof. In an embodiment, each of the first layer FL, the third layer TL, and the fifth layer FIL may have a multilayer structure. Each of the first layer FL, the third layer TL, and the fifth layer FIL may have a thickness of about 30 nm or less in the third direction DR3.

[0131] The first layer FL of the first subpixel SPX1, the first layer FL of the second subpixel SPX2, and the first layer FL of the third subpixel SPX3 may include the same conductive material, but the embodiment is not limited thereto. In an embodiment, the first layer FL of the first subpixel SPX1, the first layer FL of the second subpixel SPX2, and the first layer FL of the third subpixel SPX3 may include different conductive materials. The third layer TL of the first subpixel SPX1, the third layer TL of the second subpixel SPX2, and the third layer TL of the third subpixel SPX3 may include the same conductive material, but the embodiment is not limited thereto. In an embodiment, the third layer TL of the first subpixel SPX1, the third layer TL of the second subpixel SPX2, and the third layer TL of the third subpixel SPX3 may include different conductive materials. The fifth layer FIL of the first subpixel SPX1, the fifth layer FIL of the second subpixel SPX2, and the fifth layer FIL of the third subpixel SPX3 may include the same conductive material, but the embodiment is not limited thereto. In an embodiment, the fifth layer FIL of the first sub-pixel SPX1 , the fifth layer FIL of the second sub-pixel SPX2 , and the fifth layer FIL of the third sub-pixel SPX3 may include different conductive materials.

[0132] The second layer SL and the fourth layer FOL may include the same material. For example, each of the second layer SL and the fourth layer FOL may be an organic layer including an organic material or an inorganic layer including an inorganic material. For example, each of the second layer SL and the fourth layer FOL may include at least one of a transparent organic layer, titanium oxide, silicon oxide, silicon nitride, and silicon oxynitride. In an embodiment, the second layer SL and the fourth layer FOL may include a transparent conductive oxide such as indium tin oxide or indium zinc oxide.

[0133] In the third direction DR3, the thickness d1 of the first layer FL, the thickness d3 of the third layer TL, and the thickness d5 of the fifth layer FIL may be the same as each other. However, the embodiment is not limited to the foregoing example. In the embodiment, in the third direction DR3, the thickness d1 of the first layer FL, the thickness d3 of the third layer TL, and the thickness d5 of the fifth layer FIL may be different from each other. In the embodiment, in the third direction DR3, at least two of the thickness d1 of the first layer FL, the thickness d3 of the third layer TL, and the thickness d5 of the fifth layer FIL may be the same as each other, and the other may be different from the two.

[0134] In an embodiment, the refractive index of each of the second layer SL and the fourth layer FOL may be in the range of about 1.3 to about 2.5. Each of the second layer SL and the fourth layer FOL may have a thickness of about 1 μm or less. In the third direction DR3, the thickness d2 of the second layer SL and the thickness d4 of the fourth layer FOL may be the same as each other. However, the embodiment is not limited to the foregoing example. In an embodiment, in the third direction DR3, the thickness d2 of the second layer SL and the thickness d4 of the fourth layer FOL may be different from each other. In the case where the thickness d2 of the second layer SL and the thickness d4 of the fourth layer FOL are different from each other, one of the second layer SL and the fourth layer FOL may be designed to have a thickness not greater than twice the thickness of the other layer.

[0135] The second layer SL as a dielectric layer may be placed between the first layer FL and the third layer TL, each of which is formed of a metal film. In addition, the fourth layer FOL as a dielectric layer may be placed between the third layer TL and the fifth layer FIL, each of which is formed of a metal film. The intermediate layer CTL including the first layer FL, the second layer SL, the third layer TL, the fourth layer FOL and the fifth layer FIL, which may be sequentially stacked on each other, may be constructed as a double Fabry-Perot cavity structure having a metal (reflector or semi-reflector)-dielectric-metal (reflector or semi-reflector)-dielectric-metal (reflector or semi-reflector) structure. The first layer FL, the third layer TL and the fifth layer FIL, all of which are formed of metal films, may be used as semi-reflector, and each of the second layer SL and the fourth layer FOL may be used as a medium that determines the wavelength-dependent transmittance and reflectance using a refractive index and thickness. Making the thicknesses of the second layer SL and the fourth layer FOL (each of which serves as a medium) different can expand the band in which the resonance effect of the intermediate layer CTL occurs.

[0136] The intermediate layer CTL including the first layer FL, the second layer SL, the third layer TL, the fourth layer FOL, and the fifth layer FIL, which may be sequentially stacked on each other, may be configured to selectively reflect light in a given wavelength range emitted from the color conversion layer CCL and traveling toward the intermediate layer CTL. For example, the intermediate layer CTL may reflect about 60% or more of light (e.g., light of the first wavelength band) in a wavelength range of about 420 nm to about 480 nm emitted from the color conversion layer CCL and traveling toward the intermediate layer CTL, thereby guiding the reflected light toward the color conversion layer CCL.

[0137] In the first sub-pixel SPX1, the intermediate layer CTL may reflect about 60% or more of the light of the first wavelength band that travels toward the intermediate layer CTL without reacting with the first color conversion pattern CCP1 back to the first color conversion pattern CCP1 to cause a reaction with the first color conversion pattern CCP1. The light of the first wavelength band reflected toward the first color conversion pattern CCP1 may react with the first color conversion particles QD1, and thus be emitted as red light. The recycling rate of the light of the first wavelength band (e.g., blue light) in the first color conversion pattern CCP1 may be increased, thereby increasing the red light emitted from the first color conversion pattern CCP1. Therefore, the light output efficiency of the first color conversion pattern CCP1 may be improved.

[0138] In the second sub-pixel SPX2, the intermediate layer CTL may reflect about 60% or more of the light of the first wavelength band that does not react with the second color conversion pattern CCP2 and travels toward the intermediate layer CTL back to the second color conversion pattern CCP2 to cause a reaction with the second color conversion pattern CCP2. The light of the first wavelength band reflected toward the second color conversion pattern CCP2 may react with the second color conversion particles QD2, and thus be emitted as green light. The recycling rate of the light of the first wavelength band (e.g., blue light) in the second color conversion pattern CCP2 may be increased, thereby increasing the green light emitted from the second color conversion pattern CCP2. Therefore, the light output efficiency of the second color conversion pattern CCP2 may be increased.

[0139] In an embodiment, the intermediate layer CTL transmits light of a second wavelength band different from the light of the first wavelength band and light of a third wavelength band to the color filter layer CFL. The light of the second wavelength band may be light ranging from about 520 nm to about 580 nm (e.g., green light). The light of the third wavelength band may be light ranging from about 620 nm to about 680 nm (e.g., red light).

[0140] In the first sub-pixel SPX1, the intermediate layer CTL may transmit red light (e.g., light of the third wavelength band) that reacts with the first color conversion pattern CCP1 and travels toward the intermediate layer CTL to the first color filter CF1 of the color filter layer CFL. For example, in the intermediate layer CTL, the transmittance of red light may be greater than about 60%, the absorptivity of red light may be less than about 5%, and the remainder may be the reflectivity of red light. In other words, for incident red light, the intermediate layer CTL may transmit greater than about 60%, absorb less than about 5%, and reflect the remainder. However, the embodiment is not limited to the foregoing example. In an embodiment, the intermediate layer CTL may transmit about 60% or more of the red light to the first color filter CF1 of the color filter layer CFL, absorb less than about 5% of the red light, and reflect the remainder of the red light toward the first color conversion pattern CCP1.

[0141] In the second sub-pixel SPX2, the intermediate layer CTL transmits the green light (e.g., light of the second wavelength band) that reacts with the second color conversion pattern CCP2 and travels toward the intermediate layer CTL to the second color filter CF2 of the color filter layer CFL. For example, in the intermediate layer CTL, the transmittance of the green light may be greater than about 60%, the absorptivity of the green light may be less than about 5%, and the remainder may be the reflectivity of the green light. In other words, for the incident green light, the intermediate layer CTL may transmit greater than about 60%, absorb less than about 5%, and reflect the remainder. However, the embodiment is not limited to the foregoing example. In an embodiment, the intermediate layer CTL may transmit about 60% or more of the green light to the second color filter CF2 of the color filter layer CFL, absorb less than about 5% of the green light, and reflect the remainder of the green light toward the second color conversion pattern CCP2.

[0142] In the aforementioned embodiment, the intermediate layer CTL may reflect about 60% or more of the incident blue light toward the color conversion layer CCL, thereby improving the recycling rate of the blue light. The intermediate layer CTL may transmit about 60% or more of the incident red light to the color filter layer CFL, and transmit about 60% or more of the incident green light to the color filter layer CFL, thereby reducing the loss of red and green light. The characteristics of the intermediate layer CTL, which may reflect about 60% or more of the blue light and allow about 60% or more of each of the red light and the green light to pass through it, may be adjusted based on the thickness and material of each of the first layer FL, the second layer SL, the third layer TL, the fourth layer FOL, and the fifth layer FIL.

[0143] The second cover layer CPL2 may be disposed on the intermediate layer CTL. The second cover layer CPL2 may be positioned between the intermediate layer CTL and the color filter layer CFL to protect the intermediate layer CTL. The second cover layer CPL2 may be, for example, an inorganic insulating layer including an inorganic material, but the embodiment is not limited thereto.

[0144] In the following, reference will be made to Fig. 6A and Figure 6B To describe the transmittance and reflectance of the intermediate layer CTL for each wavelength band.

[0145] Fig. 6A is depicted from the setting Figure 4 FIG. 5 is a graph of simulation results of light emitted from the intermediate layer on the first color conversion pattern CCP1. Figure 6B is depicted from the setting Figure 4 FIG. 5 is a graph of simulation results of light emitted from the intermediate layer on the second color conversion pattern CCP2. Fig. 6A and Figure 6BThe graphs in respectively represent the results of characteristic evaluation of intermediate layers placed on the first color conversion pattern and the second color conversion pattern, the intermediate layers including a first layer (metal thin film) having a thickness of about 10 nm, a second layer (dielectric) having a thickness of about 90 nm, a third layer (metal thin film) having a thickness of about 15 nm, a fourth layer (dielectric) having a thickness of about 85 nm, and a fifth layer (metal thin film) having a thickness of about 10 nm.

[0146] Reference Figures 1 to 6A , the first color conversion pattern (refer to Figure 4 The first color conversion pattern CCP1 may emit light having a wavelength ranging from about 620 nm to about 690 nm (e.g., light in a red spectrum). In addition, the first color conversion pattern CCP1 may emit light having a wavelength ranging from about 420 nm to about 480 nm (e.g., light in a blue spectrum). The light in the blue spectrum may be the first color conversion particles (refer to Figure 4 The first color conversion pattern CCP1 on the middle layer (refer to Figure 4 The intermediate layer CTL may transmit about 54% of red spectrum light having a wavelength of about 630 nm emitted from the first color conversion pattern CCP1 and reflect about 9% of the light. In addition, the intermediate layer CTL may reflect about 75% of blue spectrum light having a wavelength of about 460 nm emitted from the first color conversion pattern CCP1 and transmit about 14% of the light.

[0147] Reference Figures 1 to 6B , the second color conversion pattern (refer to Figure 4 The second color conversion pattern CCP2 may emit light having a wavelength ranging from about 520 nm to about 580 nm (e.g., light in the green spectrum). In addition, the second color conversion pattern CCP2 may emit light having a wavelength ranging from about 420 nm to about 480 nm (e.g., light in the blue spectrum). The blue spectrum light may be the second color conversion particles (refer to Figure 4 The intermediate layer CTL on the second color conversion pattern CCP2 may transmit about 68% of green spectrum light having a wavelength of about 540 nm emitted from the second color conversion pattern CCP2 and reflect about 6% of the light. In addition, the intermediate layer CTL may reflect about 75% of blue spectrum light having a wavelength of 460 nm emitted from the second color conversion pattern CCP2 and transmit about 14% of the light.

[0148] If a first layer having a thickness of about 10 nm (refer to Figure 5 ” FL” in ), a second layer having a thickness of about 90 nm (refer to Figure 5 SL in FIG. 1 ), a third layer having a thickness of about 15 nm (refer to Figure 5 ), a fourth layer having a thickness of about 85 nm (refer to Figure 5 "FOL" in ) and a fifth layer having a thickness of about 10 nm (ref. Figure 5 In the embodiment of the present invention, if the first color conversion pattern CCP1 and the second color conversion pattern CCP2 have an intermediate layer CTL (“FIL”) formed therein, about 60% or more of the blue spectrum light emitted from the first color conversion pattern CCP1 and the second color conversion pattern CCP2, respectively, may be reflected to the first color conversion pattern CCP1 and the second color conversion pattern CCP2. Therefore, the first color conversion pattern CCP1 may recycle and convert the incident blue light into red light, and the second color conversion pattern CCP2 may recycle and convert the incident blue light into green light.

[0149] The intermediate layer CTL on the first color conversion pattern CCP1 may transmit about 50% or more of red spectrum light, thereby reducing the loss of red spectrum light emitted from (or converted in) the first color conversion pattern CCP1. The intermediate layer CTL on the second color conversion pattern CCP2 may transmit about 60% or more of green spectrum light, thereby reducing the loss of green spectrum light emitted from (or converted in) the second color conversion pattern CCP2.

[0150] Figure 7 A pixel PXL according to an embodiment is shown and is Figure 1 A schematic cross-sectional view corresponding to line II'.

[0151] about Figure 7 The following description will focus on the differences from the aforementioned embodiments to avoid redundant explanations.

[0152] Reference Figures 1 to 7 , the pixel PXL may further include a low reflection film LRF positioned between the color filter layer CFL and the overcoat layer OC.

[0153] The low reflection film LRF can cause the incident light to the display device (refer to Figure 1 The low-reflection film LRF can cause destructive interference between light in the display device DD (or pixel PXL) and light reflected by the metal below, thereby reducing the reflectivity of external light. For example, the low-reflection film LRF can cause destructive interference between light reflected by the upper surface of the low-reflection film LRF and light reflected by the upper surface of the common electrode CE, thereby causing extinction of light. The low-reflection film LRF can reduce the reflectivity of external light, thereby improving the display quality and visibility of the display device DD.

[0154] The low reflection film LRF may include an inorganic material having a relatively low reflectivity, and may include, for example, a metal, a metal oxide, or a silicide (eg, SiO 2 or SiN x In the case where the low-reflection film LRF includes a metal, the metal may include, for example, ytterbium (Yb), bismuth (Bi), cobalt (Co), molybdenum (Mo), titanium (Ti), zirconium (Zr), aluminum (Al), chromium (Cr), niobium (Nb), platinum (Pt), tungsten (W), indium (In), tin (Sn), iron (Fe), nickel (Ni), tantalum (Ta), manganese (Mn), zinc (Zn), germanium (Ge), silver (Ag), magnesium (Mg), gold (Au), copper (Cu), calcium (Ca), or a combination thereof. In the case where the low-reflection film LRF includes a metal oxide, the metal oxide may include, for example, TiO 2 、ZrO 2 、 2 O 5 , HfO 2 、Al 2 O 3 , ZnO, Y 2 O 3 , BeO, MgO, PbO 2 , WO 3 、LiF、CaF 2 MgF 2 , CdS or a combination thereof.

[0155] Figure 8 A pixel PXL according to an embodiment is shown and is Figure 1 A schematic cross-sectional view corresponding to line II'.

[0156] about Figure 8 The following description will focus on the differences from the aforementioned embodiments to avoid redundant explanations.

[0157] Reference Figures 1 to 3 as well as Figure 8 , the pixel PXL may include a first sub-pixel SPX1, a second sub-pixel SPX2, and a third sub-pixel SPX3. Each of the first sub-pixel SPX1, the second sub-pixel SPX2, and the third sub-pixel SPX3 may include a substrate SUB, a pixel circuit layer PCL, a display element layer DPL, an encapsulation layer TFE, a color conversion layer CCL, an intermediate layer CTL, an anti-reflection film ARF, and an overcoat layer OC.

[0158] The anti-reflection film ARF may be disposed on the intermediate layer CTL between the second cover layer CPL2 and the outer coating layer OC. The anti-reflection film ARF may reduce the incident light to the display device (refer to Figure 1 The reflectivity of external light ("DD" in FIG.

[0159] The anti-reflection film ARF may be formed of a polarizing film. The polarizing film may include a linear polarizing layer (or a circular polarizing layer) and a phase delay film (such as a quarter wave plate (λ / 4 plate)). The number of phase delay films and the phase delay length of each phase delay film may be determined according to the operating principle of the anti-reflection film ARF. In an embodiment, the anti-reflection film ARF may include a filter layer including a black matrix and a color filter. In an embodiment, the anti-reflection film ARF may include a destructive interference structure. The destructive interference structure may include a first reflective layer and a second reflective layer disposed in corresponding different layers. The first reflected light and the second reflected light reflected by the first reflective layer and the second reflective layer, respectively, destructively interfere with each other, thereby reducing the reflectivity of external light.

[0160] Fig. 9 A pixel PXL according to an embodiment is shown and is Figure 1 A schematic cross-sectional view corresponding to line II'. Fig.10 and Fig.11 It is shown Fig. 9 Schematic enlarged view of portion EA2.

[0161] Figures 9 to 11 The description of the embodiment will focus on the differences from the above-described embodiment to avoid redundant description.

[0162] Reference Figures 1 to 3 as well as Figures 9 to 11 , the pixel PXL may include a cover layer CVL disposed between the color conversion layer CCL and the color filter layer CFL. The cover layer CVL may be disposed between a first cover layer CPL1 located on the color conversion layer CCL and a second cover layer CPL2 located below or under the color filter layer CFL. The first cover layer CPL1 and the second cover layer CPL2 are respectively connected to the reference Figure 4 The described first cover layer CPL1 and second cover layer CPL2 are the same; therefore, further explanation thereof will be omitted.

[0163] The cover layer CVL can utilize the difference in refractive index to recycle light (eg, blue light) that has not reacted with the color conversion layer CCL to react with the color conversion layer CCL, thereby increasing the light output efficiency of the color conversion layer CCL and improving the display device (refer to Figure 1 The reliability of the "DD" in the

[0164] The cover layer CVL may be configured to selectively reflect light in a given wavelength range. The cover layer CVL may be configured to allow light of a first wavelength emitted from the color conversion layer CCL and traveling toward the cover layer CVL to pass through the cover layer CVL while reflecting light of a wavelength different from the first wavelength. For example, the cover layer CVL may reflect blue spectrum light emitted from the color conversion layer CCL and traveling toward the cover layer CVL, and transmit green spectrum light and / or red spectrum light in addition to the blue spectrum light to the color filter layer CFL.

[0165] The cover layer CVL may include at least one sub-insulating layer including a first sub-layer SUL1 and a second sub-layer SUL2 which may be sequentially stacked with each other and have different refractive indices. For example, the cover layer CVL may include a first sub-insulating layer SINS1, a second sub-insulating layer SINS2, a third sub-insulating layer SINS3, and a fourth sub-insulating layer SINS4. Each of the first sub-insulating layer SINS1, the second sub-insulating layer SINS2, the third sub-insulating layer SINS3, and the fourth sub-insulating layer SINS4 may include a first sub-layer SUL1 and a second sub-layer SUL2 which may be sequentially stacked with each other in a third direction DR3.

[0166] The first sublayer SUL1 may include a first inorganic layer having a first refractive index. The second sublayer SUL2 may include a second inorganic layer having a second refractive index different from the first refractive index. The second refractive index may be less than the first refractive index. For example, the first sublayer SUL1 may be formed of a transparent inorganic layer having a first refractive index of 1.85. The second sublayer SUL2 may be formed of a transparent inorganic layer having a second refractive index of 1.45. The first sublayer SUL1 may have a thickness of about 60 nm, and the second sublayer SUL2 may have a thickness of about 60 nm, but the embodiment is not limited thereto. The first sublayer SUL1 may include silicon nitride (SiN x ), the second sub-layer SUL2 may include silicon oxide (SiO x ), but the embodiment is not limited thereto.

[0167] Each of the first to fourth sub-insulating layers SINS1, SINS2, SINS3, and SINS4 may include a first sub-layer SUL1 and a second sub-layer SUL2 disposed on top of the first sub-layer SUL1 in the third direction DR3. The cover layer CVL may include a distributed Bragg reflection layer formed of a first sub-layer SUL1 with a high refractive index and a second sub-layer SUL2 with a low refractive index, and the first sub-layer SUL1 with a high refractive index and the second sub-layer SUL2 with a low refractive index may be alternately stacked with each other in a repeating pattern. However, the embodiment is not limited thereto. In an embodiment, as Fig.11As shown in , each of the first to fourth sub-insulating layers SINS1, SINS2, SINS3, and SINS4 may include a second sub-layer SUL2 and a first sub-layer SUL1 disposed on top of the second sub-layer SUL2 in the third direction DR3. The cover layer CVL may include a distributed Bragg reflector layer formed of a second sub-layer SUL2 with a low refractive index and a first sub-layer SUL1 with a high refractive index, and the second sub-layer SUL2 with a low refractive index and the first sub-layer SUL1 with a high refractive index may be alternately stacked with each other in a repeating pattern.

[0168] As described above, the cover layer CVL can be formed by alternately stacking the first sublayer SUL1 and the second sublayer SUL2 having different refractive indices, thereby forming a repeated refractive index difference in the cover layer CVL. As a result, the light emitted from the color conversion layer CCL and incident on the cover layer CVL can have a transmittance that varies according to the incident angle. By adjusting the materials included in the stacked first sublayer SUL1 and the second sublayer SUL2, their thicknesses and / or the number of stacked layers, respectively, the reflectivity of the light incident on the cover layer CVL can be increased to an optimized level. The thickness of the first sublayer SUL1 and the second sublayer SUL2 can be adjusted according to the wavelength and refractive index of the light.

[0169] In the following, according to the embodiments, reference will be made to Fig.12 To describe the reflectivity of light passing through the cover layer CVL.

[0170] Fig.12 It is shown that the Fig.10 A graph showing the reflectivity of light from the covering layer. Fig.12 In the embodiment 1, the cover layer (refer to Fig.10 "CVL" in Fig.10 Embodiment 2 is an embodiment in which the cover layer CVL includes three sub-insulating layers, Embodiment 3 refers to an embodiment in which the cover layer CVL includes four sub-insulating layers, Embodiment 4 refers to an embodiment in which the cover layer CVL includes five sub-insulating layers, and Embodiment 5 refers to an embodiment in which the cover layer CVL includes six sub-insulating layers.

[0171] Reference Fig. 9 , Fig.10 and Fig.12, the cover layer CVL corresponding to Example 1 reflects less than about 50% of blue spectrum light having a wavelength range from about 420nm to about 480nm, reflects about 20% or more of green spectrum light having a wavelength range from 520nm to about 580nm, and reflects less than about 20% of red spectrum light having a wavelength range from about 620nm to about 680nm. The cover layer CVL corresponding to Example 2 may reflect about 60% or more of blue spectrum light, less than about 40% of green spectrum light, and less than about 10% of red spectrum light. The cover layer CVL corresponding to Example 3 reflects about 60% or more of blue spectrum light, less than about 20% of green spectrum light, and less than about 20% of red spectrum light. The cover layer CVL corresponding to Example 4 reflects about 70% or more of blue spectrum light, less than about 30% of green spectrum light, and less than about 10% of red spectrum light. The cover layer CVL corresponding to Example 5 reflects about 70% or more of blue spectrum light, reflects less than about 20% of green spectrum light, and reflects less than about 10% of red spectrum light.

[0172] In the case where the cover layer CVL includes at least three sub-insulating layers, the cover layer CVL may reflect about 60% or more of blue spectrum light. In the case where the cover layer CVL includes at least four sub-insulating layers, the cover layer CVL may reflect less than about 20% of green spectrum light. In the case where the cover layer CVL includes at least three sub-insulating layers, the cover layer CVL may reflect less than about 20% of red spectrum light.

[0173] If a cover layer CVL including at least three sub-insulating layers is provided on the color conversion layer (refer to Fig. 9 "CCL") and the color filter layer (refer to Fig. 9 In the embodiment of the present invention, the refractive index difference between the sub-insulating layers can be utilized so that some of the blue spectrum light that does not react with the color conversion layer CCL but is incident on the cover layer CVL can be reflected to the color conversion layer CCL and react with the color conversion layer CCL. Thus, the recycling rate of blue light can be increased, thereby enhancing the luminous brightness of the color conversion layer CCL.

[0174] In the following, reference will be made to Figures 13 to 16 The pixel PXL using an inorganic light emitting diode (or inorganic light emitting element) including an inorganic light emitting material as a light source will be described.

[0175] Fig.13 It is shown Figure 1 Schematic circuit diagram of the electrical connection relationship of the components included in each pixel PXL shown in FIG. For ease of description, Fig.13A pixel PXL (or a sub-pixel SPX) positioned at an i-th horizontal line (or an i-th pixel row) and connected to a j-th data line Dj is shown.

[0176] Fig.13 The electrical connection relationship of components included in the pixel PXL that can be adopted in the active matrix display device according to the embodiment is shown. Here, the connection relationship of the components of each pixel PXL is not limited thereto.

[0177] Reference Figures 1 to 13 , the pixel PXL (or the sub-pixel SPX) may include an emission component EMU configured to generate light having brightness corresponding to the data signal. In addition, the pixel PXL may include a pixel circuit PXC configured to drive the emission component EMU.

[0178] The emission module EMU may include light emitting elements LD connected in parallel between a first power line PL1 applied with a first power voltage VDD and a second power line PL2 applied with a second power voltage VSS. Each of the light emitting elements LD may be composed of an inorganic light emitting diode (or inorganic light emitting element) including an inorganic light emitting material.

[0179] For example, the emission component EMU may include a first electrode EL1 connected to the pixel circuit PXC and the first power line PL1, a second electrode EL2 connected to the second power line PL2, and a light emitting element LD connected in parallel in the same direction between the first electrode EL1 and the second electrode EL2. In an embodiment, the first electrode EL1 may be an anode electrode, and the second electrode EL2 may be a cathode electrode.

[0180] Each of the light emitting elements LD included in the emission component EMU may include one end (or first end) connected to the first power line PL1 through the first electrode EL1 and the remaining end (or second end) connected to the second power line PL2 through the second electrode EL2. The first power voltage VDD and the second power voltage VSS may have different potentials. For example, the first power voltage VDD may be a high potential power voltage, and the second power voltage VSS may be a low potential power voltage. Here, the potential difference between the first power voltage VDD and the second power voltage VSS may be set to a value equal to or greater than the threshold voltage of the light emitting element LD during the emission period of the pixel PXL.

[0181] As described above, the light emitting elements LD connected in parallel to each other in the same direction (eg, in the forward direction) between the first electrode EL1 and the second electrode EL2 supplied with different voltages may form corresponding effective light sources.

[0182] The light emitting element LD of the emission component EMU can emit light having a brightness corresponding to the driving current supplied to the light emitting element LD through the pixel circuit PXC. For example, during each frame period, a driving current corresponding to the grayscale value of the corresponding frame data of the pixel circuit PXC can be supplied to the emission component EMU. The driving current supplied to the emission component EMU can be divided into a plurality of parts flowing into each light emitting element LD. Therefore, each of the light emitting elements LD can emit light having a brightness corresponding to the current applied thereto, so that the emission component EMU can emit light having a brightness corresponding to the driving current.

[0183] Although an embodiment has been described in which the opposite ends of the light emitting element LD are connected in the same direction between the first power line PL1 and the second power line PL2, the embodiment is not limited thereto. In an embodiment, the emission assembly EMU may include at least one invalid light source (e.g., a reverse light emitting element LDr) in addition to the light emitting element LD forming the corresponding effective light source. The reverse light emitting element LDr, together with the light emitting element LD forming the effective light source, may be connected in parallel to each other between the first electrode EL1 and the second electrode EL2. Here, the reverse light emitting element LDr may be connected between the first electrode EL1 and the second electrode EL2 in a direction opposite to that of the light emitting element LD. Even when a given driving voltage (e.g., a normal direction driving voltage) is applied between the first electrode EL1 and the second electrode EL2, the reverse light emitting element LDr remains disabled. Therefore, current does not substantially flow through the reverse light emitting element LDr.

[0184] The pixel circuit PXC may be connected to an i th scan line Si, a j th data line Dj, an i th control line CLi, and a j th sensing line SENj of the display area DA.

[0185] The pixel circuit PXC may include first to third transistors T1 to T3 and a storage capacitor Cst.

[0186] The first transistor T1 may be a driving transistor configured to control a driving current to be applied to the emission component EMU, and may be connected between the first power line PL1 and the emission component EMU. In detail, the first terminal of the first transistor T1 may be connected to the first power line PL1. The second terminal of the first transistor T1 may be connected to the second node N2. The gate electrode of the first transistor T1 may be connected to the first node N1. The first transistor T1 may control the amount of driving current to be applied to the emission component EMU from the first power line PL1 through the second node N2 in response to the voltage applied to the first node N1. The first terminal of the first transistor T1 may be a drain electrode, the second terminal of the first transistor T1 may be a source electrode, and the embodiment is not limited thereto. In an embodiment, the first terminal may be a source electrode, and the second terminal may be a drain electrode.

[0187] The second transistor T2 may be a switching transistor that selects the pixel PXL (or the sub-pixel SPX) in response to the scan signal and activates the pixel PXL, and may be connected between the j-th data line Dj and the first node N1. The first terminal of the second transistor T2 may be connected to the j-th data line Dj. The second terminal of the second transistor T2 may be connected to the first node N1. The gate electrode of the second transistor T2 may be connected to the i-th scan line Si. The first terminal and the second terminal of the second transistor T2 are different terminals, and for example, if the first terminal is a drain electrode, the second terminal may be a source electrode.

[0188] In the case where a scan signal of a gate-on voltage (e.g., a high level voltage) is supplied from the i-th scan line Si, the second transistor T2 may be turned on to electrically connect the j-th data line Dj to the first node N1. The first node N1 may be a point at which the second terminal of the second transistor T2 and the gate electrode of the first transistor T1 are connected to each other. The second transistor T2 may transmit a data signal to the gate electrode of the first transistor T1.

[0189] The third transistor T3 may acquire a sensing signal through the sensing line SENj by connecting the first transistor T1 to the j-th sensing line SENj, and use the sensing signal to detect the characteristics of the pixel PXL (such as the threshold voltage of the first transistor T1). Information about the characteristics of the pixel PXL may be used to convert image data so that characteristic deviations between the pixels PXL may be compensated. The second terminal of the third transistor T3 may be connected to the second terminal of the first transistor T1. The first terminal of the third transistor T3 may be connected to the j-th sensing line SENj. The gate electrode of the third transistor T3 may be connected to the i-th control line CLi. In addition, the first terminal of the third transistor T3 may be connected to an initialization power supply. The third transistor T3 may be an initialization transistor configured to initialize the second node N2, and may be turned on when a sensing control signal is supplied from the i-th control line CLi to the third transistor T3, so that the voltage of the initialization power supply may be transmitted to the second node N2.

[0190] The storage capacitor Cst may include a first storage electrode and a second storage electrode. The first storage electrode of the storage capacitor Cst may be connected to the first node N1. The second storage electrode of the storage capacitor Cst may be connected to the second node N2. The storage capacitor Cst may be charged with a data voltage corresponding to a data signal to be supplied to the first node N1 during one frame period. Therefore, the storage capacitor Cst may store a voltage corresponding to a difference between a voltage of the gate electrode of the first transistor T1 and a voltage of the second node N2.

[0191] In the following, reference will be made to Fig.14 and Fig.15Each light emitting element LD will be described.

[0192] Fig.14 It is shown Fig.13 Schematic perspective view of a light emitting element LD. Fig.15 It is shown Fig.14 Schematic cross-sectional view of a light emitting element LD.

[0193] Reference Figures 13 to 15 , the light emitting element LD may include a first semiconductor layer 11, a second semiconductor layer 13, and an active layer 12 disposed between the first semiconductor layer 11 and the second semiconductor layer 13. For example, the light emitting element LD may be implemented as an emission stack (or referred to as a "light emitting stack pattern") formed by sequentially stacking the first semiconductor layer 11, the active layer 12, and the second semiconductor layer 13. The type and / or shape of the light emitting element LD is not limited to Fig.14 The type and / or shape of the embodiments shown in .

[0194] The light emitting element LD may be formed in a shape extending in one direction or in a direction. If the direction in which the light emitting element LD extends is defined as a longitudinal direction, the light emitting element LD may have a first end EP1 and a second end EP2 opposite to each other along the longitudinal direction. For example, the second semiconductor layer 13 may be disposed at the first end EP1 of the light emitting element LD, and the first semiconductor layer 11 may be disposed at the second end EP2 of the light emitting element LD. However, the embodiment is not limited to the foregoing example.

[0195] The light emitting element LD can be arranged in various shapes. Fig.14 As shown in , the light emitting element LD may have a rod-like shape, a strip-like shape, or a column-like shape that is long in the longitudinal direction (e.g., having an aspect ratio greater than 1). The light emitting element LD may include a light emitting diode (LED) manufactured to have an ultra-small size (e.g., having a diameter D and / or a length L corresponding to a range from nanoscale (or nanoscale) to microscale (or micrometer scale)).

[0196] In the case where the light emitting element LD is long relative to the longitudinal direction, the diameter D of the light emitting element LD may be in the range of about 0.5 μm to about 6 μm, and the length L of the light emitting element LD may be in the range of about 1 μm to about 10 μm. However, the diameter D and the length L of the light emitting element LD are not limited thereto. The size of the light emitting element LD may be changed to meet the requirements (or design conditions) of the lighting device or the self-emitting display device to which the light emitting element LD is applied.

[0197] The first semiconductor layer 11 may include, for example, at least one n-type semiconductor layer. For example, the first semiconductor layer 11 may include an n-type semiconductor layer including at least one semiconductor material of InAlGaN, GaN, AlGaN, InGaN, AlN, and InN and doped with a first conductive dopant (or n-type dopant) such as Si, Ge, or Sn. However, the constituent material of the first semiconductor layer 11 is not limited thereto, and various other materials may be used to form the first semiconductor layer 11.

[0198] The active layer 12 (or emission layer) may be disposed on the first semiconductor layer 11 and may have a single quantum well structure or a multi-quantum well structure. For example, in the case where the active layer 12 has a multi-quantum well structure, the active layer 12 may be formed by periodically and repeatedly stacking a barrier layer, a strain enhancement layer, and a well layer as a unit. However, the structure of the active layer 12 is not limited to that of the aforementioned embodiment.

[0199] The active layer 12 may emit light having a wavelength ranging from about 400 nm to about 900 nm and have a double heterostructure. In an embodiment, a cladding layer doped with a conductive dopant may be formed on or below or below the active layer 12 along the longitudinal direction of the light emitting element LD. For example, the cladding layer may be formed of an AlGaN layer or an InAlGaN layer. In an embodiment, a material such as AlGaN or InAlGaN may be used to form the active layer 12, and various other materials may be used to form the active layer 12.

[0200] If an electric field having a given voltage or higher is applied to opposite ends of the light emitting element LD, the light emitting element LD can emit light by recombination of electron-hole pairs in the active layer 12. Since light emission of the light emitting element LD can be controlled based on the aforementioned principle, the light emitting element LD can be used as a light source (light emitting source) of various light emitting devices and a pixel of a display device.

[0201] The second semiconductor layer 13 may be disposed on the active layer 12 and include a semiconductor layer of a type different from that of the first semiconductor layer 11. For example, the second semiconductor layer 13 may include at least one p-type semiconductor layer. For example, the second semiconductor layer 13 may include a p-type semiconductor layer including at least one semiconductor material of InAlGaN, GaN, AlGaN, InGaN, AlN, and InN and doped with a second conductive dopant (or p-type dopant) such as Mg, Zn, Ca, Sr, or Ba. However, the material used to form the second semiconductor layer 13 is not limited thereto, and various other materials may be used to form the second semiconductor layer 13.

[0202] The first semiconductor layer 11 and the second semiconductor layer 13 may have different thicknesses in the longitudinal direction of the light emitting element LD. For example, the first semiconductor layer 11 may have a thickness greater than that of the second semiconductor layer 13 in the longitudinal direction of the light emitting element LD, but the embodiment is not limited thereto.

[0203] although Fig.14 and Fig.15 It is shown that each of the first semiconductor layer 11 and the second semiconductor layer 13 is formed of a single layer, but the embodiment is not limited thereto. In an embodiment, each of the first semiconductor layer 11 and the second semiconductor layer 13 may further include at least one layer (e.g., a cap layer and / or a tensile strain barrier reduction (TSBR) layer) depending on the material of the active layer 12.

[0204] In an embodiment, in addition to the first semiconductor layer 11, the active layer 12 and the second semiconductor layer 13, the light emitting element LD may further include a contact electrode (hereinafter referred to as a "first contact electrode") disposed on the second semiconductor layer 13. In addition, in an embodiment, the light emitting element LD may further include an additional contact electrode (hereinafter referred to as a "second contact electrode") disposed at one end or one end of the first semiconductor layer 11.

[0205] Each of the first contact electrode and the second contact electrode may be an ohmic contact electrode, but the embodiment is not limited thereto. In an embodiment, each of the first contact electrode and the second contact electrode may be a Schottky contact electrode.

[0206] Materials included in the first contact electrode and the second contact electrode may be the same as or different from each other.The first contact electrode and the second contact electrode may be substantially transparent or translucent.

[0207] In the embodiment, the light emitting element LD may further include an insulating layer 14. However, according to the embodiment, the insulating layer 14 may be omitted or may be provided to cover only some of the first semiconductor layer 11, the active layer 12, and the second semiconductor layer 13.

[0208] The insulating layer 14 can prevent the active layer 12 from being short-circuited due to contact with conductive materials other than the first semiconductor layer 11 and the second semiconductor layer 13. In addition, the insulating layer 14 can minimize surface defects of the light-emitting element LD, thereby improving the life and emission efficiency of the light-emitting element LD. In the case where the light-emitting elements LD are arranged in close contact with each other, the insulating layer 14 can prevent an undesired short circuit from occurring between the light-emitting elements LD. The presence or absence of the insulating layer 14 is not limited as long as the active layer 12 can be prevented from being short-circuited with an external conductive material.

[0209] The insulating layer 14 may be provided to surround the entire outer peripheral surface of the emitter stack including the first semiconductor layer 11 , the active layer 12 , and the second semiconductor layer 13 , but is not limited thereto.

[0210] The insulating layer 14 may include a transparent insulating material. Various materials having insulating properties may be used as the material of the insulating layer 14. The insulating layer 14 may have a single-layer structure or a multi-layer structure including a double-layer structure.

[0211] In the embodiment, the light emitting element LD may be implemented as a light emitting pattern having a core-shell structure.

[0212] The light emitting element LD may be used as a light source (or light source) of various display devices. The light emitting element LD may be manufactured by a surface treatment process.

[0213] Fig.16 It is along Figure 1 A schematic cross-sectional view taken along line II'.

[0214] about Fig.16 The following description will focus on the differences from the aforementioned embodiments to avoid redundant explanations.

[0215] Reference Figure 1 as well as Figures 13 to 16 , the pixel PXL may be disposed in the pixel area PXA in the display area DA. The pixel PXL may include a first sub-pixel SPX1, a second sub-pixel SPX2, and a third sub-pixel SPX3. The first sub-pixel SPX1 may be a red pixel. The second sub-pixel SPX2 may be a green pixel. The third sub-pixel SPX3 may be a blue pixel.

[0216] The pixel area PXA may include a first emission area EMA1, a second emission area EMA2, a third emission area EMA3, and a non-emission area NEA. The first emission area EMA1 may be an emission area of ​​the first sub-pixel SPX1. The second emission area EMA2 may be an emission area of ​​the second sub-pixel SPX2. The third emission area EMA3 may be an emission area of ​​the third sub-pixel SPX3.

[0217] Each of the first subpixel SPX1 , the second subpixel SPX2 , and the third subpixel SPX3 may include a substrate SUB, a pixel circuit layer PCL, a display element layer DPL, an intermediate layer CTL, a color filter layer CFL, and an overcoat layer OC.

[0218] The pixel circuit layer PCL may be disposed on the substrate SUB. In the pixel circuit layer PCL, a pixel circuit forming each of the first to third sub-pixels SPX1, SPX2, and SPX3 may be disposed (refer to Fig.13The buffer layer BFL, the gate insulating layer GI, the interlayer insulating layer ILD and the via layer VIA may be disposed in the pixel circuit layer PCL.

[0219] The display element layer DPL may be disposed on the pixel circuit layer PCL. In the display element layer DPL, first and second bank patterns BNKP1 and BNKP2, a bank BNK, first and second alignment electrodes ALE1 and ALE2, a light emitting element LD, first and second electrodes EL1 and EL2, and a color conversion layer CCL may be disposed. In addition, a first insulating layer INS1, a second insulating layer INS2, a third insulating layer INS3, and a fourth insulating layer INS4 may be disposed in the display element layer DPL.

[0220] Each of the first dam pattern BNKP1 and the second dam pattern BNKP2 may be disposed and / or formed on the pixel circuit layer PCL (or the via layer VIA), and may be positioned in each of the first emission area EMA1, the second emission area EMA2, and the third emission area EMA3. The first dam pattern BNKP1 and the second dam pattern BNKP2 may respectively support the first alignment electrode ALE1 and the second alignment electrode ALE2 to change the surface profile (or surface shape) of each of the first alignment electrode ALE1 and the second alignment electrode ALE2, so that the light emitted from the light emitting element LD may be guided in the image display direction of the display panel DP. Each of the first dam pattern BNKP1 and the second dam pattern BNKP2 may be an inorganic insulating layer made of an inorganic material or an organic insulating layer made of an organic material. Each of the first dam pattern BNKP1 and the second dam pattern BNKP2 may include an organic insulating layer having a single-layer structure and / or an inorganic insulating layer having a single-layer structure, but the embodiment is not limited thereto.

[0221] Each of the first alignment electrode ALE1 and the second alignment electrode ALE2 may have a protrusion disposed and / or formed on the corresponding embankment pattern and protruding from the via layer VIA in the third direction DR3. For example, the first alignment electrode ALE1 may have a protrusion disposed and / or formed on the first embankment pattern BNKP1 and protruding from the via layer VIA in the third direction DR3. The second alignment electrode ALE2 may include a protrusion disposed and / or formed on the second embankment pattern BNKP2 and protruding from the via layer VIA in the third direction DR3. Each of the first alignment electrode ALE1 and the second alignment electrode ALE2 may include a conductive material having reflectivity so that light emitted from the light emitting element LD travels in the image display direction of the display device DD. The first alignment electrode ALE1 may be electrically connected to a pixel circuit PXC disposed in the pixel circuit layer PCL. The second alignment electrode ALE2 may be electrically connected to a second power line (refer to Fig.13 2 in the .

[0222] The first insulating layer INS1 may be disposed on the first alignment electrode ALE1 and the second alignment electrode ALE2. The first insulating layer INS1 may be partially opened to expose components disposed thereunder. For example, the first insulating layer INS1 may be partially opened to expose a portion of each of the first alignment electrode ALE1 and the second alignment electrode ALE2. The first insulating layer INS1 may be formed of an inorganic insulating layer including an inorganic material or an organic insulating layer including an organic material. For example, the first insulating layer INS1 may include silicon nitride (SiN x ), silicon oxide (SiO x ), silicon oxynitride (SiO x N y ) and aluminum oxide (AlO x ), but the embodiment is not limited thereto.

[0223] The bank BNK may be disposed and / or formed on the first insulating layer INS1 .

[0224] The bank BNK may be disposed on the first insulating layer INS1 in the non-emission area NEA, and may define (or separate) the first emission area EMA1, the second emission area EMA2, and the third emission area EMA3. In the step of inputting (supplying) the light emitting element LD to each of the first emission area EMA1, the second emission area EMA2, and the third emission area EMA3, the bank BNK may be used as a dam structure configured to prevent the solution in which the light emitting element LD is mixed from being sucked into the adjacent sub-pixel SPX or to control the amount of the solution so that a constant amount of the solution is supplied to each emission area. In addition, the bank BNK may define the corresponding positions of the first color conversion pattern CCP1, the second color conversion pattern CCP2, and the light scattering pattern LSP, thereby defining the first emission area EMA1, the second emission area EMA2, and the third emission area EMA3. For example, the bank BNK may surround each of the first color conversion pattern CCP1, the second color conversion pattern CCP2, and the light scattering pattern LSP. The bank BNK may include at least one light blocking material and / or reflective material, thereby preventing a light leakage defect in which light (or rays) leaks between the first to third sub-pixels SPX1 , SPX2 , and SPX3 .

[0225] The light emitting element LD may be supplied to each of the first to third emission areas EMA1, EMA2, and EMA3 and / or aligned in each of the first to third emission areas EMA1, EMA2, and EMA3. For example, within the spirit and scope of the disclosure, the light emitting element LD may be supplied (or input) to each of the first to third emission areas EMA1, EMA2, and EMA3 by an inkjet printing method or the like. The light emitting element LD may be aligned between the first alignment electrode ALE1 and the second alignment electrode ALE2 by a given signal (or alignment signal) applied to each of the first alignment electrode ALE1 and the second alignment electrode ALE2. The light emitting element LD may include a first light emitting element LD1 disposed in the first sub-pixel SPX1 (or the first emission area EMA1), a second light emitting element LD2 disposed in the second sub-pixel SPX2 (or the second emission area EMA2), and a third light emitting element LD3 disposed in the third sub-pixel SPX3 (or the third emission area EMA3). The first light emitting element LD1 may be disposed in the first sub-pixel SPX1. The second light emitting element LD2 may be disposed in the second sub-pixel SPX2. The third light emitting element LD3 may be disposed in the third subpixel SPX3. Each of the first light emitting element LD1, the second light emitting element LD2, and the third light emitting element LD3 may include a first end EP1 and a second end EP2. In an embodiment, the first light emitting element LD1, the second light emitting element LD2, and the third light emitting element LD3 may emit blue light.

[0226] The second insulating layer INS2 may be disposed and / or formed on each of the first light emitting element LD1, the second light emitting element LD2, and the third light emitting element LD3, and partially covers the outer peripheral surface (or surface) of each of the first light emitting element LD1, the second light emitting element LD2, and the third light emitting element LD3, so that the first end EP1 and the second end EP2 of each of the first light emitting element LD1, the second light emitting element LD2, and the third light emitting element LD3 are exposed to the outside. The second insulating layer INS2 may be formed of a single layer or a multilayer, and include an inorganic insulating layer including at least one inorganic material or an organic insulating layer including at least one organic material.

[0227] In each of the first emission area EMA1, the second emission area EMA2, and the third emission area EMA3, the first electrode EL1 may be disposed on the first alignment electrode ALE1 on the first end EP1 of each of the first light emitting element LD1, the second light emitting element LD2, and the third light emitting element LD3, the second insulating layer INS2, and the first insulating layer INS1. The first electrode EL1 may be electrically connected to the first alignment electrode ALE1 exposed from the first insulating layer INS1.

[0228] The third insulating layer INS3 may be disposed and / or formed on the first electrode EL1. The third insulating layer INS3 may be formed of an inorganic insulating layer including an inorganic material or an organic insulating layer including an organic material. For example, the third insulating layer INS3 may include silicon nitride (SiN x ), silicon oxide (SiO x ), silicon oxynitride (SiO x N y ) and aluminum oxide (AlO x ), but the embodiment is not limited thereto. In an embodiment, the third insulating layer INS3 may be omitted.

[0229] The second electrode EL2 may be disposed on the second end EP2 of each of the first light emitting element LD1, the second light emitting element LD2, and the third light emitting element LD3, the second insulating layer INS2 of each of the first light emitting element LD1, the second light emitting element LD2, and the third light emitting element LD3, the first insulating layer INS1 on the second alignment electrode ALE2, and the third insulating layer INS3 on the second insulating layer INS2. The second electrode EL2 may be electrically connected to the second alignment electrode ALE2 exposed from the first insulating layer INS1.

[0230] The first electrode EL1 and the second electrode EL2 may be formed by different processes and disposed at different layers. However, the embodiment is not limited thereto. In the embodiment, the first electrode EL1 and the second electrode EL2 may be formed by the same process and disposed at the same layer.

[0231] The first electrode EL1 and the second electrode EL2 may be formed of various transparent conductive materials. For example, the first electrode EL1 and the second electrode EL2 may include indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO x ), indium gallium zinc oxide (IGZO) and indium tin zinc oxide (ITZO) and is substantially transparent or translucent to meet a selectable transmittance (or transmittance).

[0232] The fourth insulating layer INS4 may be disposed and / or formed on the first electrode EL1 and the second electrode EL2. The fourth insulating layer INS4 may be an inorganic insulating layer including an inorganic material or an organic insulating layer including an organic material. For example, the fourth insulating layer INS4 may have a structure formed by alternately stacking at least one inorganic insulating layer and at least one organic insulating layer. In an embodiment, the fourth insulating layer INS4 may be omitted.

[0233] The color conversion layer CCL may be disposed on the fourth insulating layer INS4.

[0234] The color conversion layer CCL may include first and second color conversion patterns CCP1 and CCP2 and a light scattering pattern LSP. The bank BNK may surround each of the first and second color conversion patterns CCP1, CCP2, and the light scattering pattern LSP.

[0235] The first color conversion pattern CCP1 may be positioned on the fourth insulating layer INS4 to correspond to the first light emitting element LD1 and absorb incident blue light to emit red light. The first color conversion pattern CCP1 may include first color conversion particles QD1 dispersed in a matrix material such as a base resin.

[0236] The second color conversion pattern CCP2 may be positioned on the fourth insulating layer INS4 to correspond to the second light emitting element LD2 and absorb incident blue light to emit green light. The second color conversion pattern CCP2 may include second color conversion particles QD2 dispersed in a matrix material such as a base resin.

[0237] The light scattering pattern LSP may be positioned on the fourth insulating layer INS4 to correspond to the third light emitting element LD3 and allow incident blue light to pass through the fourth insulating layer INS4 without change. The light scattering pattern LSP may include light scattering particles SCT dispersed in a matrix material such as a base resin.

[0238] The first cover layer CPL1 may be disposed on the display element layer DPL (or the color conversion layer CCL), thus protecting the display element layer DPL.

[0239] The intermediate layer CTL may be disposed and / or formed on the first cover layer CPL1. The intermediate layer CTL may be a filter layer that reflects (or blocks) light in some wavelength regions in the visible light region emitted from the color conversion layer CCL toward the color conversion layer CCL, and transmits light in other wavelength regions to the color filter layer CFL. For example, the intermediate layer CTL may reflect some of the blue light emitted from the color conversion layer CCL toward the color conversion layer CCL, while transmitting some of the red light and / or some of the green light to the color filter layer CFL. The intermediate layer CTL may be the same as the reference layer CCL. Figure 4 and Figure 5 For example, the intermediate layer CTL may include Figure 5 As shown in the figure, the first layer FL, the second layer SL, the third layer TL, the fourth layer FOL and the fifth layer FIL can be sequentially stacked on the first cover layer CPL1 in the third direction DR3. The intermediate layer CTL including the first layer FL, the second layer SL, the third layer TL, the fourth layer FOL and the fifth layer FIL that can be sequentially stacked on each other can be constructed as a double Fabry-Perot cavity structure having a metal (reflector or semi-reflector)-dielectric-metal (reflector or semi-reflector)-dielectric-metal (reflector or semi-reflector) structure.

[0240] In the first subpixel SPX1, the intermediate layer CTL may reflect about 60% or more of the blue light that does not react with the first color conversion pattern CCP1 but travels toward the intermediate layer CTL back to the first color conversion pattern CCP1 to cause a reaction with the first color conversion pattern CCP1. The blue light reflected toward the first color conversion pattern CCP1 may react with the first color conversion particles QD1, thereby being emitted as red light. Thus, the recycling rate of the blue light in the first color conversion pattern CCP1 may be increased, thereby increasing the light output efficiency of the first color conversion pattern CCP1.

[0241] In the first subpixel SPX1 , the intermediate layer CTL may transmit about 60% or more of the red light, which reacts with the first color conversion pattern CCP1 and travels toward the intermediate layer CTL, to the first color filter CF1 of the color filter layer CFL.

[0242] In the second sub-pixel SPX2, the intermediate layer CTL may reflect about 60% or more of the blue light that does not react with the second color conversion pattern CCP2 but travels toward the intermediate layer CTL back to the second color conversion pattern CCP2 to cause a reaction with the second color conversion pattern CCP2. The blue light reflected toward the second color conversion pattern CCP2 may react with the second color conversion particles QD2, thereby emitting green light. Thus, the recycling rate of the blue light in the second color conversion pattern CCP2 may be increased, thereby improving the light output efficiency of the second color conversion pattern CCP2.

[0243] In the second sub-pixel SPX2, the intermediate layer CTL may transmit about 60% or more of the green light, which reacts with the second color conversion pattern CCP2 and travels toward the intermediate layer CTL, to the second color filter CF2 of the color filter layer CFL.

[0244] In the aforementioned embodiment, the intermediate layer CTL can reflect about 60% or more of the incident blue light toward the color conversion layer CCL, thereby improving the recycling rate of the blue light. In addition, the intermediate layer CTL can transmit about 60% or more of the red light and about 60% or more of the green light to the color filter layer CFL, thereby reducing the loss of red light and green light.

[0245] The second cover layer CPL2 may be disposed on the intermediate layer CTL, thereby protecting the intermediate layer CTL.

[0246] The color filter layer CFL may be disposed and / or formed on the second cover layer CPL2. The color filter layer CFL may include a color filter CF and a light blocking pattern BM. The color filter CF may include a first color filter CF1, a second color filter CF2, and a third color filter CF3.

[0247] The first color filter CF1 may be disposed on the second cover layer CPL2 to correspond to the first color conversion pattern CCP1 (or the first light emitting element LD1). The second color filter CF2 may be disposed on the second cover layer CPL2 to correspond to the second color conversion pattern CCP2 (or the second light emitting element LD2). The third color filter CF3 may be disposed on the second cover layer CPL2 to correspond to the light scattering pattern LSP (or the third light emitting element LD3).

[0248] The light blocking pattern BM may be disposed adjacent to the first to third color filters CF1, CF2, and CF3. In addition, the light blocking pattern BM may be disposed on the second cover layer CPL2 to correspond to the bank BNK in the non-emission area NEA. The light blocking pattern BM may include a light blocking material.

[0249] An overcoat layer OC may be disposed on the color filter layer CFL. The overcoat layer OC may be disposed on the color filter layer CFL and cover underlying components including the color filter layer CFL.

[0250] In an embodiment, an intermediate layer including a first layer, a second layer, a third layer, a fourth layer and a fifth layer (or a covering layer including a sub-insulating layer each including a first sub-layer and a second sub-layer having different refractive indices) can be disposed between the color conversion layer (or the QD conversion layer) and the color filter layer, thereby reflecting some of the blue light emitted from the color conversion layer to the color conversion layer, thereby further enhancing the recycling effect of the blue light in the color conversion layer.

[0251] In an embodiment, an intermediate layer is disposed between the color conversion layer and the color filter layer to increase transmittance of red light and green light emitted from the color conversion layer, thereby reducing loss of the red light and green light.

[0252] In an embodiment, light output efficiency of light emitted from a color conversion layer may be improved, whereby a display device having improved reliability may be provided.

[0253] The effects of the embodiment are not limited to the foregoing, and other various effects are included here.

[0254] While one or more embodiments have been described above, those skilled in the art will appreciate that various modifications, additions and substitutions are possible without departing from the scope of the disclosure.

[0255] Therefore, the embodiments disclosed in this specification are only for illustrative purposes, rather than limiting the scope of the disclosed technology. The scope of the disclosure is also defined by the appended claims.

Claims

1. A display device, comprising: Light emitting element; a color conversion layer disposed on the light emitting element, the color conversion layer absorbing light emitted from the light emitting element and emitting one of a first color light, a second color light, and a third color light; a color filter layer disposed on the color conversion layer, the color filter layer allowing light emitted from the color conversion layer to selectively pass through the color filter layer; as well as an intermediate layer disposed between the color conversion layer and the color filter layer, the intermediate layer reflecting a portion of the third color light to the color conversion layer and transmitting a portion of the first color light and a portion of the second color light to the color filter layer, wherein The intermediate layer includes a first layer, a second layer, a third layer, a fourth layer, and a fifth layer sequentially stacked on each other, Each of the first layer, the third layer, and the fifth layer includes a conductive material, and Each of the second layer and the fourth layer includes a material different from the conductive material of each of the first layer, the third layer, and the fifth layer.

2. The display device according to claim 1, wherein: Each of the first layer, the third layer, and the fifth layer includes a metal thin film having a thickness of 30 nm or less, and Each of the second layer and the fourth layer includes one of an organic insulating layer and an inorganic insulating layer.

3. The display device according to claim 2, wherein: Each of the second layer and the fourth layer has a refractive index in the range of 1.3 to 2.5, and has a thickness of 1 μm.

4. The display device according to claim 2, wherein: The first layer, the second layer, the third layer, the fourth layer, and the fifth layer have different thicknesses.

5. The display device according to claim 2, wherein: The second layer and the fourth layer have the same thickness.

6. The display device according to claim 2, wherein: The second layer and the fourth layer have different thicknesses.

7. The display device according to claim 6, wherein: A thickness of one of the second layer and the fourth layer is less than twice a thickness of the other of the second layer and the fourth layer.

8. The display device according to claim 2, wherein: The first color light includes red light with a wavelength in the range of 620nm to 680nm, The second color light includes green light having a wavelength in the range of 520 nm to 580 nm, and The third color light includes blue light having a wavelength in the range of 420 nm to 480 nm.

9. The display device according to claim 8, wherein: the intermediate layer reflects 60% or more of the third color light to the color conversion layer and transmits 20% or less of the third color light to the color filter layer, The intermediate layer transmits 50% or more of the first color light to the color filter layer, absorbs less than 5% of the first color light, and reflects the remainder of the first color light to the color conversion layer, and The intermediate layer transmits 60% or more of the second color light to the color filter layer, absorbs less than 5% of the second color light, and reflects the remainder of the second color light to the color conversion layer.

10. The display device according to claim 8, wherein: The color conversion layer comprises: a first color conversion pattern including first color conversion particles that absorb light emitted from the light emitting element and emit the red light; a second color conversion pattern including second color conversion particles that absorb light emitted from the light emitting element and emit the green light; and The light scattering pattern includes light scattering particles that scatter the blue light.

11. The display device according to claim 10, wherein: The color filter layer includes: a first color filter disposed on the first color conversion pattern; a second color filter disposed on the second color conversion pattern; and a third color filter disposed on the light scattering pattern. The first color filter includes a red color filter, The second color filter includes a green color filter, and The third color filter includes a blue color filter.

12. The display device according to claim 1, wherein: The light emitting element comprises an organic light emitting diode, The organic light emitting diode comprises: a pixel electrode disposed on a substrate; an emission layer disposed on the pixel electrode; and a common electrode disposed on the emission layer, and One of the pixel electrode and the common electrode includes a transparent conductive material, and the other of the pixel electrode and the common electrode includes an opaque conductive material.

13. The display device according to claim 1, wherein: The light emitting element includes a plurality of inorganic light emitting diodes, each of the plurality of inorganic light emitting diodes includes a first end and a second end facing each other, and The plurality of inorganic light emitting diodes include: a first semiconductor layer disposed at the second end and including an n-type semiconductor layer; a second semiconductor layer disposed at the first end and including a p-type semiconductor layer; and an active layer disposed between the first semiconductor layer and the second semiconductor layer.

14. The display device according to claim 13, further comprising: a first electrode electrically connected to the first end of each of the light emitting diodes; as well as a second electrode electrically connected to the second end of each of the light emitting diodes, Wherein, each of the first electrode and the second electrode comprises a transparent conductive material.

15. The display device according to claim 1, further comprising: The low reflection layer is disposed on the color filter layer.

16. A display device, comprising: Light emitting element; a color conversion layer disposed on the light emitting element, the color conversion layer absorbing light emitted from the light emitting element and emitting one of a first color light, a second color light, and a third color light; a color filter layer disposed on the color conversion layer, the color filter layer allowing light emitted from the color conversion layer to selectively pass through the color filter layer; as well as A covering layer is disposed between the color conversion layer and the color filter layer, wherein: The cover layer includes a plurality of sub-insulating layers, each of the plurality of sub-insulating layers includes a first sub-layer and a second sub-layer, and The first sublayer and the second sublayer have different refractive indices.

17. The display device according to claim 16, wherein: The second sublayer is disposed on the first sublayer, The first sublayer includes a first inorganic layer having a first refractive index, and the second sublayer includes a second inorganic layer having a second refractive index, and The first refractive index is greater than the second refractive index.

18. The display device according to claim 16, wherein: The first sublayer is disposed on the second sublayer, The first sublayer includes a first inorganic layer having a first refractive index, and the second sublayer includes a second inorganic layer having a second refractive index, and The second refractive index is lower than the first refractive index.

19. A display device, comprising: Light emitting element; a color conversion layer disposed on the light emitting element, the color conversion layer absorbing light emitted from the light emitting element and emitting one of a first color light, a second color light, and a third color light; an intermediate layer disposed on the color conversion layer, the intermediate layer reflecting a portion of the third color light to the color conversion layer and allowing a portion of the first color light and a portion of the second color light to pass through the color conversion layer; as well as An anti-reflection film is disposed on the intermediate layer, wherein The intermediate layer includes a first layer, a second layer, a third layer, a fourth layer, and a fifth layer sequentially stacked on each other, Each of the first layer, the third layer, and the fifth layer includes a conductive material, and Each of the second layer and the fourth layer includes a material different from the conductive material of each of the first layer, the third layer, and the fifth layer.

20. The display device according to claim 19, wherein: Each of the first layer, the third layer, and the fifth layer includes a metal thin film having a thickness of 30 nm or less, and Each of the second layer and the fourth layer includes one of an organic insulating layer and an inorganic insulating layer.

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